Searched defs:mtr (Results 1 – 6 of 6) sorted by relevance
107 u16 mtr[MAX_SLOTS][MAX_BRANCHES]; /* Memory Technlogy Reg */ member174 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 8)) argument175 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 7)) argument176 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument177 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 5)) ? 8 : 4) argument178 #define MTR_DIMM_RANKS(mtr) (((mtr) & (1 << 4)) ? 1 : 0) argument179 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument181 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument182 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument183 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument[all …]
283 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 10)) argument284 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 9)) argument285 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 8)) ? 8 : 4) argument286 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument287 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) argument288 #define MTR_DIMM_RANK(mtr) (((mtr) >> 5) & 0x1) argument289 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) argument290 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument291 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument292 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument[all …]
278 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8)) argument279 #define MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4) argument280 #define MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4) argument281 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) argument282 #define MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1) argument283 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) argument284 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument285 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument286 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument287 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument[all …]
330 } mtr[I5100_CHANNELS][I5100_MAX_RANKS_PER_CHAN]; member
35 tsunami_64 mtr; member
36 titan_64 mtr; member