1 // SPDX-License-Identifier: GPL-2.0
2 
3 #include <media/videobuf2-v4l2.h>
4 #include <media/videobuf2-dma-contig.h>
5 #include <media/v4l2-event.h>
6 #include <media/v4l2-mem2mem.h>
7 #include <linux/module.h>
8 
9 #include "mtk_vcodec_drv.h"
10 #include "mtk_vcodec_dec.h"
11 #include "mtk_vcodec_intr.h"
12 #include "mtk_vcodec_util.h"
13 #include "mtk_vcodec_dec_pm.h"
14 #include "vdec_drv_if.h"
15 
16 /**
17  * struct mtk_stateless_control  - CID control type
18  * @cfg: control configuration
19  * @codec_type: codec type (V4L2 pixel format) for CID control type
20  */
21 struct mtk_stateless_control {
22 	struct v4l2_ctrl_config cfg;
23 	int codec_type;
24 };
25 
26 static const struct mtk_stateless_control mtk_stateless_controls[] = {
27 	{
28 		.cfg = {
29 			.id = V4L2_CID_STATELESS_H264_SPS,
30 		},
31 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
32 	},
33 	{
34 		.cfg = {
35 			.id = V4L2_CID_STATELESS_H264_PPS,
36 		},
37 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
38 	},
39 	{
40 		.cfg = {
41 			.id = V4L2_CID_STATELESS_H264_SCALING_MATRIX,
42 		},
43 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
44 	},
45 	{
46 		.cfg = {
47 			.id = V4L2_CID_STATELESS_H264_DECODE_PARAMS,
48 		},
49 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
50 	},
51 	{
52 		.cfg = {
53 			.id = V4L2_CID_MPEG_VIDEO_H264_PROFILE,
54 			.def = V4L2_MPEG_VIDEO_H264_PROFILE_MAIN,
55 			.max = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
56 			.menu_skip_mask =
57 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
58 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED),
59 		},
60 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
61 	},
62 	{
63 		.cfg = {
64 			.id = V4L2_CID_STATELESS_H264_DECODE_MODE,
65 			.min = V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED,
66 			.def = V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED,
67 			.max = V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED,
68 		},
69 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
70 	},
71 	{
72 		.cfg = {
73 			.id = V4L2_CID_STATELESS_H264_START_CODE,
74 			.min = V4L2_STATELESS_H264_START_CODE_ANNEX_B,
75 			.def = V4L2_STATELESS_H264_START_CODE_ANNEX_B,
76 			.max = V4L2_STATELESS_H264_START_CODE_ANNEX_B,
77 		},
78 		.codec_type = V4L2_PIX_FMT_H264_SLICE,
79 	},
80 	{
81 		.cfg = {
82 			.id = V4L2_CID_STATELESS_VP8_FRAME,
83 		},
84 		.codec_type = V4L2_PIX_FMT_VP8_FRAME,
85 	},
86 	{
87 		.cfg = {
88 			.id = V4L2_CID_MPEG_VIDEO_VP8_PROFILE,
89 			.min = V4L2_MPEG_VIDEO_VP8_PROFILE_0,
90 			.def = V4L2_MPEG_VIDEO_VP8_PROFILE_0,
91 			.max = V4L2_MPEG_VIDEO_VP8_PROFILE_3,
92 		},
93 		.codec_type = V4L2_PIX_FMT_VP8_FRAME,
94 	},
95 	{
96 		.cfg = {
97 			.id = V4L2_CID_STATELESS_VP9_FRAME,
98 		},
99 		.codec_type = V4L2_PIX_FMT_VP9_FRAME,
100 	},
101 	{
102 		.cfg = {
103 			.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE,
104 			.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
105 			.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
106 			.max = V4L2_MPEG_VIDEO_VP9_PROFILE_3,
107 		},
108 		.codec_type = V4L2_PIX_FMT_VP9_FRAME,
109 	},
110 };
111 
112 #define NUM_CTRLS ARRAY_SIZE(mtk_stateless_controls)
113 
114 static struct mtk_video_fmt mtk_video_formats[5];
115 
116 static struct mtk_video_fmt default_out_format;
117 static struct mtk_video_fmt default_cap_format;
118 static unsigned int num_formats;
119 
120 static const struct v4l2_frmsize_stepwise stepwise_fhd = {
121 	.min_width = MTK_VDEC_MIN_W,
122 	.max_width = MTK_VDEC_MAX_W,
123 	.step_width = 16,
124 	.min_height = MTK_VDEC_MIN_H,
125 	.max_height = MTK_VDEC_MAX_H,
126 	.step_height = 16
127 };
128 
mtk_vdec_stateless_cap_to_disp(struct mtk_vcodec_ctx * ctx,int error,struct media_request * src_buf_req)129 static void mtk_vdec_stateless_cap_to_disp(struct mtk_vcodec_ctx *ctx, int error,
130 					   struct media_request *src_buf_req)
131 {
132 	struct vb2_v4l2_buffer *vb2_dst;
133 	enum vb2_buffer_state state;
134 
135 	if (error)
136 		state = VB2_BUF_STATE_ERROR;
137 	else
138 		state = VB2_BUF_STATE_DONE;
139 
140 	vb2_dst = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
141 	if (vb2_dst) {
142 		v4l2_m2m_buf_done(vb2_dst, state);
143 		mtk_v4l2_debug(2, "free frame buffer id:%d to done list",
144 			       vb2_dst->vb2_buf.index);
145 	} else {
146 		mtk_v4l2_err("dst buffer is NULL");
147 	}
148 
149 	if (src_buf_req)
150 		v4l2_ctrl_request_complete(src_buf_req, &ctx->ctrl_hdl);
151 }
152 
vdec_get_cap_buffer(struct mtk_vcodec_ctx * ctx)153 static struct vdec_fb *vdec_get_cap_buffer(struct mtk_vcodec_ctx *ctx)
154 {
155 	struct mtk_video_dec_buf *framebuf;
156 	struct vb2_v4l2_buffer *vb2_v4l2;
157 	struct vb2_buffer *dst_buf;
158 	struct vdec_fb *pfb;
159 
160 	vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
161 	if (!vb2_v4l2) {
162 		mtk_v4l2_debug(1, "[%d] dst_buf empty!!", ctx->id);
163 		return NULL;
164 	}
165 
166 	dst_buf = &vb2_v4l2->vb2_buf;
167 	framebuf = container_of(vb2_v4l2, struct mtk_video_dec_buf, m2m_buf.vb);
168 
169 	pfb = &framebuf->frame_buffer;
170 	pfb->base_y.va = vb2_plane_vaddr(dst_buf, 0);
171 	pfb->base_y.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
172 	pfb->base_y.size = ctx->q_data[MTK_Q_DATA_DST].sizeimage[0];
173 
174 	if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 2) {
175 		pfb->base_c.va = vb2_plane_vaddr(dst_buf, 1);
176 		pfb->base_c.dma_addr =
177 			vb2_dma_contig_plane_dma_addr(dst_buf, 1);
178 		pfb->base_c.size = ctx->q_data[MTK_Q_DATA_DST].sizeimage[1];
179 	}
180 	mtk_v4l2_debug(1, "id=%d Framebuf  pfb=%p VA=%p Y_DMA=%pad C_DMA=%pad Size=%zx frame_count = %d",
181 		       dst_buf->index, pfb, pfb->base_y.va, &pfb->base_y.dma_addr,
182 		       &pfb->base_c.dma_addr, pfb->base_y.size, ctx->decoded_frame_cnt);
183 
184 	return pfb;
185 }
186 
vb2ops_vdec_buf_request_complete(struct vb2_buffer * vb)187 static void vb2ops_vdec_buf_request_complete(struct vb2_buffer *vb)
188 {
189 	struct mtk_vcodec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
190 
191 	v4l2_ctrl_request_complete(vb->req_obj.req, &ctx->ctrl_hdl);
192 }
193 
mtk_vdec_worker(struct work_struct * work)194 static void mtk_vdec_worker(struct work_struct *work)
195 {
196 	struct mtk_vcodec_ctx *ctx =
197 		container_of(work, struct mtk_vcodec_ctx, decode_work);
198 	struct mtk_vcodec_dev *dev = ctx->dev;
199 	struct vb2_v4l2_buffer *vb2_v4l2_src;
200 	struct vb2_buffer *vb2_src;
201 	struct mtk_vcodec_mem *bs_src;
202 	struct mtk_video_dec_buf *dec_buf_src;
203 	struct media_request *src_buf_req;
204 	enum vb2_buffer_state state;
205 	bool res_chg = false;
206 	int ret;
207 
208 	vb2_v4l2_src = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
209 	if (!vb2_v4l2_src) {
210 		v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx);
211 		mtk_v4l2_debug(1, "[%d] no available source buffer", ctx->id);
212 		return;
213 	}
214 
215 	vb2_src = &vb2_v4l2_src->vb2_buf;
216 	dec_buf_src = container_of(vb2_v4l2_src, struct mtk_video_dec_buf,
217 				   m2m_buf.vb);
218 	bs_src = &dec_buf_src->bs_buffer;
219 
220 	mtk_v4l2_debug(3, "[%d] (%d) id=%d, vb=%p", ctx->id,
221 		       vb2_src->vb2_queue->type, vb2_src->index, vb2_src);
222 
223 	bs_src->va = vb2_plane_vaddr(vb2_src, 0);
224 	bs_src->dma_addr = vb2_dma_contig_plane_dma_addr(vb2_src, 0);
225 	bs_src->size = (size_t)vb2_src->planes[0].bytesused;
226 	if (!bs_src->va) {
227 		v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx);
228 		mtk_v4l2_err("[%d] id=%d source buffer is NULL", ctx->id,
229 			     vb2_src->index);
230 		return;
231 	}
232 
233 	mtk_v4l2_debug(3, "[%d] Bitstream VA=%p DMA=%pad Size=%zx vb=%p",
234 		       ctx->id, bs_src->va, &bs_src->dma_addr, bs_src->size, vb2_src);
235 	/* Apply request controls. */
236 	src_buf_req = vb2_src->req_obj.req;
237 	if (src_buf_req)
238 		v4l2_ctrl_request_setup(src_buf_req, &ctx->ctrl_hdl);
239 	else
240 		mtk_v4l2_err("vb2 buffer media request is NULL");
241 
242 	ret = vdec_if_decode(ctx, bs_src, NULL, &res_chg);
243 	if (ret) {
244 		mtk_v4l2_err(" <===[%d], src_buf[%d] sz=0x%zx pts=%llu vdec_if_decode() ret=%d res_chg=%d===>",
245 			     ctx->id, vb2_src->index, bs_src->size,
246 			     vb2_src->timestamp, ret, res_chg);
247 		if (ret == -EIO) {
248 			mutex_lock(&ctx->lock);
249 			dec_buf_src->error = true;
250 			mutex_unlock(&ctx->lock);
251 		}
252 	}
253 
254 	state = ret ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE;
255 	if (!IS_VDEC_LAT_ARCH(dev->vdec_pdata->hw_arch) ||
256 	    ctx->current_codec == V4L2_PIX_FMT_VP8_FRAME) {
257 		v4l2_m2m_buf_done_and_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx, state);
258 		if (src_buf_req)
259 			v4l2_ctrl_request_complete(src_buf_req, &ctx->ctrl_hdl);
260 	} else {
261 		v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
262 		v4l2_m2m_buf_done(vb2_v4l2_src, state);
263 		v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx);
264 	}
265 }
266 
vb2ops_vdec_stateless_buf_queue(struct vb2_buffer * vb)267 static void vb2ops_vdec_stateless_buf_queue(struct vb2_buffer *vb)
268 {
269 	struct mtk_vcodec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
270 	struct vb2_v4l2_buffer *vb2_v4l2 = to_vb2_v4l2_buffer(vb);
271 
272 	mtk_v4l2_debug(3, "[%d] (%d) id=%d, vb=%p", ctx->id, vb->vb2_queue->type, vb->index, vb);
273 
274 	mutex_lock(&ctx->lock);
275 	v4l2_m2m_buf_queue(ctx->m2m_ctx, vb2_v4l2);
276 	mutex_unlock(&ctx->lock);
277 	if (vb->vb2_queue->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
278 		return;
279 
280 	/* If an OUTPUT buffer, we may need to update the state */
281 	if (ctx->state == MTK_STATE_INIT) {
282 		ctx->state = MTK_STATE_HEADER;
283 		mtk_v4l2_debug(1, "Init driver from init to header.");
284 	} else {
285 		mtk_v4l2_debug(3, "[%d] already init driver %d", ctx->id, ctx->state);
286 	}
287 }
288 
mtk_vdec_flush_decoder(struct mtk_vcodec_ctx * ctx)289 static int mtk_vdec_flush_decoder(struct mtk_vcodec_ctx *ctx)
290 {
291 	bool res_chg;
292 
293 	return vdec_if_decode(ctx, NULL, NULL, &res_chg);
294 }
295 
mtk_vcodec_dec_ctrls_setup(struct mtk_vcodec_ctx * ctx)296 static int mtk_vcodec_dec_ctrls_setup(struct mtk_vcodec_ctx *ctx)
297 {
298 	unsigned int i;
299 
300 	v4l2_ctrl_handler_init(&ctx->ctrl_hdl, NUM_CTRLS);
301 	if (ctx->ctrl_hdl.error) {
302 		mtk_v4l2_err("v4l2_ctrl_handler_init failed\n");
303 		return ctx->ctrl_hdl.error;
304 	}
305 
306 	for (i = 0; i < NUM_CTRLS; i++) {
307 		struct v4l2_ctrl_config cfg = mtk_stateless_controls[i].cfg;
308 
309 		v4l2_ctrl_new_custom(&ctx->ctrl_hdl, &cfg, NULL);
310 		if (ctx->ctrl_hdl.error) {
311 			mtk_v4l2_err("Adding control %d failed %d", i, ctx->ctrl_hdl.error);
312 			return ctx->ctrl_hdl.error;
313 		}
314 	}
315 
316 	v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
317 
318 	return 0;
319 }
320 
fops_media_request_validate(struct media_request * mreq)321 static int fops_media_request_validate(struct media_request *mreq)
322 {
323 	const unsigned int buffer_cnt = vb2_request_buffer_cnt(mreq);
324 
325 	switch (buffer_cnt) {
326 	case 1:
327 		/* We expect exactly one buffer with the request */
328 		break;
329 	case 0:
330 		mtk_v4l2_debug(1, "No buffer provided with the request");
331 		return -ENOENT;
332 	default:
333 		mtk_v4l2_debug(1, "Too many buffers (%d) provided with the request",
334 			       buffer_cnt);
335 		return -EINVAL;
336 	}
337 
338 	return vb2_request_validate(mreq);
339 }
340 
341 const struct media_device_ops mtk_vcodec_media_ops = {
342 	.req_validate	= fops_media_request_validate,
343 	.req_queue	= v4l2_m2m_request_queue,
344 };
345 
mtk_vcodec_add_formats(unsigned int fourcc,struct mtk_vcodec_ctx * ctx)346 static void mtk_vcodec_add_formats(unsigned int fourcc,
347 				   struct mtk_vcodec_ctx *ctx)
348 {
349 	struct mtk_vcodec_dev *dev = ctx->dev;
350 	const struct mtk_vcodec_dec_pdata *pdata = dev->vdec_pdata;
351 	int count_formats = *pdata->num_formats;
352 
353 	switch (fourcc) {
354 	case V4L2_PIX_FMT_H264_SLICE:
355 	case V4L2_PIX_FMT_VP8_FRAME:
356 	case V4L2_PIX_FMT_VP9_FRAME:
357 		mtk_video_formats[count_formats].fourcc = fourcc;
358 		mtk_video_formats[count_formats].type = MTK_FMT_DEC;
359 		mtk_video_formats[count_formats].num_planes = 1;
360 		mtk_video_formats[count_formats].frmsize = stepwise_fhd;
361 
362 		if (!(ctx->dev->dec_capability & VCODEC_CAPABILITY_4K_DISABLED) &&
363 		    fourcc != V4L2_PIX_FMT_VP8_FRAME) {
364 			mtk_video_formats[count_formats].frmsize.max_width =
365 				VCODEC_DEC_4K_CODED_WIDTH;
366 			mtk_video_formats[count_formats].frmsize.max_height =
367 				VCODEC_DEC_4K_CODED_HEIGHT;
368 		}
369 		break;
370 	case V4L2_PIX_FMT_MM21:
371 	case V4L2_PIX_FMT_MT21C:
372 		mtk_video_formats[count_formats].fourcc = fourcc;
373 		mtk_video_formats[count_formats].type = MTK_FMT_FRAME;
374 		mtk_video_formats[count_formats].num_planes = 2;
375 		break;
376 	default:
377 		mtk_v4l2_err("Can not add unsupported format type");
378 		return;
379 	}
380 
381 	num_formats++;
382 	mtk_v4l2_debug(3, "num_formats: %d dec_capability: 0x%x",
383 		       count_formats, ctx->dev->dec_capability);
384 }
385 
mtk_vcodec_get_supported_formats(struct mtk_vcodec_ctx * ctx)386 static void mtk_vcodec_get_supported_formats(struct mtk_vcodec_ctx *ctx)
387 {
388 	int cap_format_count = 0, out_format_count = 0;
389 
390 	if (num_formats)
391 		return;
392 
393 	if (ctx->dev->dec_capability & MTK_VDEC_FORMAT_MM21) {
394 		mtk_vcodec_add_formats(V4L2_PIX_FMT_MM21, ctx);
395 		cap_format_count++;
396 	}
397 	if (ctx->dev->dec_capability & MTK_VDEC_FORMAT_MT21C) {
398 		mtk_vcodec_add_formats(V4L2_PIX_FMT_MT21C, ctx);
399 		cap_format_count++;
400 	}
401 	if (ctx->dev->dec_capability & MTK_VDEC_FORMAT_H264_SLICE) {
402 		mtk_vcodec_add_formats(V4L2_PIX_FMT_H264_SLICE, ctx);
403 		out_format_count++;
404 	}
405 	if (ctx->dev->dec_capability & MTK_VDEC_FORMAT_VP8_FRAME) {
406 		mtk_vcodec_add_formats(V4L2_PIX_FMT_VP8_FRAME, ctx);
407 		out_format_count++;
408 	}
409 	if (ctx->dev->dec_capability & MTK_VDEC_FORMAT_VP9_FRAME) {
410 		mtk_vcodec_add_formats(V4L2_PIX_FMT_VP9_FRAME, ctx);
411 		out_format_count++;
412 	}
413 
414 	if (cap_format_count)
415 		default_cap_format = mtk_video_formats[cap_format_count - 1];
416 	if (out_format_count)
417 		default_out_format =
418 			mtk_video_formats[cap_format_count + out_format_count - 1];
419 }
420 
mtk_init_vdec_params(struct mtk_vcodec_ctx * ctx)421 static void mtk_init_vdec_params(struct mtk_vcodec_ctx *ctx)
422 {
423 	struct vb2_queue *src_vq;
424 
425 	src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx,
426 				 V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
427 
428 	if (!ctx->dev->vdec_pdata->is_subdev_supported)
429 		ctx->dev->dec_capability |=
430 			MTK_VDEC_FORMAT_H264_SLICE | MTK_VDEC_FORMAT_MM21;
431 	mtk_vcodec_get_supported_formats(ctx);
432 
433 	/* Support request api for output plane */
434 	src_vq->supports_requests = true;
435 	src_vq->requires_requests = true;
436 }
437 
vb2ops_vdec_out_buf_validate(struct vb2_buffer * vb)438 static int vb2ops_vdec_out_buf_validate(struct vb2_buffer *vb)
439 {
440 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
441 
442 	vbuf->field = V4L2_FIELD_NONE;
443 	return 0;
444 }
445 
446 static struct vb2_ops mtk_vdec_request_vb2_ops = {
447 	.queue_setup	= vb2ops_vdec_queue_setup,
448 	.wait_prepare	= vb2_ops_wait_prepare,
449 	.wait_finish	= vb2_ops_wait_finish,
450 	.start_streaming	= vb2ops_vdec_start_streaming,
451 	.stop_streaming	= vb2ops_vdec_stop_streaming,
452 
453 	.buf_queue	= vb2ops_vdec_stateless_buf_queue,
454 	.buf_out_validate = vb2ops_vdec_out_buf_validate,
455 	.buf_init	= vb2ops_vdec_buf_init,
456 	.buf_prepare	= vb2ops_vdec_buf_prepare,
457 	.buf_finish	= vb2ops_vdec_buf_finish,
458 	.buf_request_complete = vb2ops_vdec_buf_request_complete,
459 };
460 
461 const struct mtk_vcodec_dec_pdata mtk_vdec_8183_pdata = {
462 	.init_vdec_params = mtk_init_vdec_params,
463 	.ctrls_setup = mtk_vcodec_dec_ctrls_setup,
464 	.vdec_vb2_ops = &mtk_vdec_request_vb2_ops,
465 	.vdec_formats = mtk_video_formats,
466 	.num_formats = &num_formats,
467 	.default_out_fmt = &default_out_format,
468 	.default_cap_fmt = &default_cap_format,
469 	.uses_stateless_api = true,
470 	.worker = mtk_vdec_worker,
471 	.flush_decoder = mtk_vdec_flush_decoder,
472 	.cap_to_disp = mtk_vdec_stateless_cap_to_disp,
473 	.get_cap_buffer = vdec_get_cap_buffer,
474 	.is_subdev_supported = false,
475 	.hw_arch = MTK_VDEC_PURE_SINGLE_CORE,
476 };
477 
478 /* This platform data is used for one lat and one core architecture. */
479 const struct mtk_vcodec_dec_pdata mtk_lat_sig_core_pdata = {
480 	.init_vdec_params = mtk_init_vdec_params,
481 	.ctrls_setup = mtk_vcodec_dec_ctrls_setup,
482 	.vdec_vb2_ops = &mtk_vdec_request_vb2_ops,
483 	.vdec_formats = mtk_video_formats,
484 	.num_formats = &num_formats,
485 	.default_out_fmt = &default_out_format,
486 	.default_cap_fmt = &default_cap_format,
487 	.uses_stateless_api = true,
488 	.worker = mtk_vdec_worker,
489 	.flush_decoder = mtk_vdec_flush_decoder,
490 	.cap_to_disp = mtk_vdec_stateless_cap_to_disp,
491 	.get_cap_buffer = vdec_get_cap_buffer,
492 	.is_subdev_supported = true,
493 	.hw_arch = MTK_VDEC_LAT_SINGLE_CORE,
494 };
495 
496 const struct mtk_vcodec_dec_pdata mtk_vdec_single_core_pdata = {
497 	.init_vdec_params = mtk_init_vdec_params,
498 	.ctrls_setup = mtk_vcodec_dec_ctrls_setup,
499 	.vdec_vb2_ops = &mtk_vdec_request_vb2_ops,
500 	.vdec_formats = mtk_video_formats,
501 	.num_formats = &num_formats,
502 	.default_out_fmt = &default_out_format,
503 	.default_cap_fmt = &default_cap_format,
504 	.uses_stateless_api = true,
505 	.worker = mtk_vdec_worker,
506 	.flush_decoder = mtk_vdec_flush_decoder,
507 	.cap_to_disp = mtk_vdec_stateless_cap_to_disp,
508 	.get_cap_buffer = vdec_get_cap_buffer,
509 	.is_subdev_supported = true,
510 	.hw_arch = MTK_VDEC_PURE_SINGLE_CORE,
511 };
512