1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2016 MediaTek Inc.
4 * Author: Tiffany Lin <tiffany.lin@mediatek.com>
5 */
6
7 #include <linux/clk.h>
8 #include <linux/interrupt.h>
9 #include <linux/of_address.h>
10 #include <linux/of_platform.h>
11 #include <linux/pm_runtime.h>
12
13 #include "mtk_vcodec_dec_hw.h"
14 #include "mtk_vcodec_dec_pm.h"
15 #include "mtk_vcodec_util.h"
16
mtk_vcodec_init_dec_clk(struct platform_device * pdev,struct mtk_vcodec_pm * pm)17 int mtk_vcodec_init_dec_clk(struct platform_device *pdev, struct mtk_vcodec_pm *pm)
18 {
19 struct mtk_vcodec_clk *dec_clk;
20 struct mtk_vcodec_clk_info *clk_info;
21 int i = 0, ret;
22
23 dec_clk = &pm->vdec_clk;
24 pm->dev = &pdev->dev;
25
26 dec_clk->clk_num =
27 of_property_count_strings(pdev->dev.of_node, "clock-names");
28 if (dec_clk->clk_num > 0) {
29 dec_clk->clk_info = devm_kcalloc(&pdev->dev,
30 dec_clk->clk_num, sizeof(*clk_info),
31 GFP_KERNEL);
32 if (!dec_clk->clk_info)
33 return -ENOMEM;
34 } else {
35 mtk_v4l2_err("Failed to get vdec clock count");
36 return -EINVAL;
37 }
38
39 for (i = 0; i < dec_clk->clk_num; i++) {
40 clk_info = &dec_clk->clk_info[i];
41 ret = of_property_read_string_index(pdev->dev.of_node,
42 "clock-names", i, &clk_info->clk_name);
43 if (ret) {
44 mtk_v4l2_err("Failed to get clock name id = %d", i);
45 return ret;
46 }
47 clk_info->vcodec_clk = devm_clk_get(&pdev->dev,
48 clk_info->clk_name);
49 if (IS_ERR(clk_info->vcodec_clk)) {
50 mtk_v4l2_err("devm_clk_get (%d)%s fail", i,
51 clk_info->clk_name);
52 return PTR_ERR(clk_info->vcodec_clk);
53 }
54 }
55
56 return 0;
57 }
58 EXPORT_SYMBOL_GPL(mtk_vcodec_init_dec_clk);
59
mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm * pm)60 static int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm)
61 {
62 int ret;
63
64 ret = pm_runtime_resume_and_get(pm->dev);
65 if (ret)
66 mtk_v4l2_err("pm_runtime_resume_and_get fail %d", ret);
67
68 return ret;
69 }
70
mtk_vcodec_dec_pw_off(struct mtk_vcodec_pm * pm)71 static void mtk_vcodec_dec_pw_off(struct mtk_vcodec_pm *pm)
72 {
73 int ret;
74
75 ret = pm_runtime_put_sync(pm->dev);
76 if (ret)
77 mtk_v4l2_err("pm_runtime_put_sync fail %d", ret);
78 }
79
mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm * pm)80 static void mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm *pm)
81 {
82 struct mtk_vcodec_clk *dec_clk;
83 int ret, i;
84
85 dec_clk = &pm->vdec_clk;
86 for (i = 0; i < dec_clk->clk_num; i++) {
87 ret = clk_prepare_enable(dec_clk->clk_info[i].vcodec_clk);
88 if (ret) {
89 mtk_v4l2_err("clk_prepare_enable %d %s fail %d", i,
90 dec_clk->clk_info[i].clk_name, ret);
91 goto error;
92 }
93 }
94
95 return;
96 error:
97 for (i -= 1; i >= 0; i--)
98 clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk);
99 }
100
mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm * pm)101 static void mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm *pm)
102 {
103 struct mtk_vcodec_clk *dec_clk;
104 int i;
105
106 dec_clk = &pm->vdec_clk;
107 for (i = dec_clk->clk_num - 1; i >= 0; i--)
108 clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk);
109 }
110
mtk_vcodec_dec_enable_irq(struct mtk_vcodec_dev * vdec_dev,int hw_idx)111 static void mtk_vcodec_dec_enable_irq(struct mtk_vcodec_dev *vdec_dev, int hw_idx)
112 {
113 struct mtk_vdec_hw_dev *subdev_dev;
114
115 if (!test_bit(hw_idx, vdec_dev->subdev_bitmap))
116 return;
117
118 if (vdec_dev->vdec_pdata->is_subdev_supported) {
119 subdev_dev = mtk_vcodec_get_hw_dev(vdec_dev, hw_idx);
120 if (subdev_dev)
121 enable_irq(subdev_dev->dec_irq);
122 else
123 mtk_v4l2_err("Failed to get hw dev\n");
124 } else {
125 enable_irq(vdec_dev->dec_irq);
126 }
127 }
128
mtk_vcodec_dec_disable_irq(struct mtk_vcodec_dev * vdec_dev,int hw_idx)129 static void mtk_vcodec_dec_disable_irq(struct mtk_vcodec_dev *vdec_dev, int hw_idx)
130 {
131 struct mtk_vdec_hw_dev *subdev_dev;
132
133 if (!test_bit(hw_idx, vdec_dev->subdev_bitmap))
134 return;
135
136 if (vdec_dev->vdec_pdata->is_subdev_supported) {
137 subdev_dev = mtk_vcodec_get_hw_dev(vdec_dev, hw_idx);
138 if (subdev_dev)
139 disable_irq(subdev_dev->dec_irq);
140 else
141 mtk_v4l2_err("Failed to get hw dev\n");
142 } else {
143 disable_irq(vdec_dev->dec_irq);
144 }
145 }
146
mtk_vcodec_load_racing_info(struct mtk_vcodec_ctx * ctx)147 static void mtk_vcodec_load_racing_info(struct mtk_vcodec_ctx *ctx)
148 {
149 void __iomem *vdec_racing_addr;
150 int j;
151
152 mutex_lock(&ctx->dev->dec_racing_info_mutex);
153 if (atomic_inc_return(&ctx->dev->dec_active_cnt) == 1) {
154 vdec_racing_addr = ctx->dev->reg_base[VDEC_MISC] + 0x100;
155 for (j = 0; j < 132; j++)
156 writel(ctx->dev->vdec_racing_info[j], vdec_racing_addr + j * 4);
157 }
158 mutex_unlock(&ctx->dev->dec_racing_info_mutex);
159 }
160
mtk_vcodec_record_racing_info(struct mtk_vcodec_ctx * ctx)161 static void mtk_vcodec_record_racing_info(struct mtk_vcodec_ctx *ctx)
162 {
163 void __iomem *vdec_racing_addr;
164 int j;
165
166 mutex_lock(&ctx->dev->dec_racing_info_mutex);
167 if (atomic_dec_and_test(&ctx->dev->dec_active_cnt)) {
168 vdec_racing_addr = ctx->dev->reg_base[VDEC_MISC] + 0x100;
169 for (j = 0; j < 132; j++)
170 ctx->dev->vdec_racing_info[j] = readl(vdec_racing_addr + j * 4);
171 }
172 mutex_unlock(&ctx->dev->dec_racing_info_mutex);
173 }
174
mtk_vcodec_dec_get_pm(struct mtk_vcodec_dev * vdec_dev,int hw_idx)175 static struct mtk_vcodec_pm *mtk_vcodec_dec_get_pm(struct mtk_vcodec_dev *vdec_dev,
176 int hw_idx)
177 {
178 struct mtk_vdec_hw_dev *subdev_dev;
179
180 if (!test_bit(hw_idx, vdec_dev->subdev_bitmap))
181 return NULL;
182
183 if (vdec_dev->vdec_pdata->is_subdev_supported) {
184 subdev_dev = mtk_vcodec_get_hw_dev(vdec_dev, hw_idx);
185 if (subdev_dev)
186 return &subdev_dev->pm;
187
188 mtk_v4l2_err("Failed to get hw dev\n");
189 return NULL;
190 }
191
192 return &vdec_dev->pm;
193 }
194
mtk_vcodec_dec_child_dev_on(struct mtk_vcodec_dev * vdec_dev,int hw_idx)195 static void mtk_vcodec_dec_child_dev_on(struct mtk_vcodec_dev *vdec_dev,
196 int hw_idx)
197 {
198 struct mtk_vcodec_pm *pm;
199
200 pm = mtk_vcodec_dec_get_pm(vdec_dev, hw_idx);
201 if (pm) {
202 mtk_vcodec_dec_pw_on(pm);
203 mtk_vcodec_dec_clock_on(pm);
204 }
205
206 if (hw_idx == MTK_VDEC_LAT0) {
207 pm = mtk_vcodec_dec_get_pm(vdec_dev, MTK_VDEC_LAT_SOC);
208 if (pm) {
209 mtk_vcodec_dec_pw_on(pm);
210 mtk_vcodec_dec_clock_on(pm);
211 }
212 }
213 }
214
mtk_vcodec_dec_child_dev_off(struct mtk_vcodec_dev * vdec_dev,int hw_idx)215 static void mtk_vcodec_dec_child_dev_off(struct mtk_vcodec_dev *vdec_dev,
216 int hw_idx)
217 {
218 struct mtk_vcodec_pm *pm;
219
220 pm = mtk_vcodec_dec_get_pm(vdec_dev, hw_idx);
221 if (pm) {
222 mtk_vcodec_dec_clock_off(pm);
223 mtk_vcodec_dec_pw_off(pm);
224 }
225
226 if (hw_idx == MTK_VDEC_LAT0) {
227 pm = mtk_vcodec_dec_get_pm(vdec_dev, MTK_VDEC_LAT_SOC);
228 if (pm) {
229 mtk_vcodec_dec_clock_off(pm);
230 mtk_vcodec_dec_pw_off(pm);
231 }
232 }
233 }
234
mtk_vcodec_dec_enable_hardware(struct mtk_vcodec_ctx * ctx,int hw_idx)235 void mtk_vcodec_dec_enable_hardware(struct mtk_vcodec_ctx *ctx, int hw_idx)
236 {
237 mutex_lock(&ctx->dev->dec_mutex[hw_idx]);
238
239 if (IS_VDEC_LAT_ARCH(ctx->dev->vdec_pdata->hw_arch) &&
240 hw_idx == MTK_VDEC_CORE)
241 mtk_vcodec_dec_child_dev_on(ctx->dev, MTK_VDEC_LAT0);
242 mtk_vcodec_dec_child_dev_on(ctx->dev, hw_idx);
243
244 mtk_vcodec_dec_enable_irq(ctx->dev, hw_idx);
245
246 if (IS_VDEC_INNER_RACING(ctx->dev->dec_capability))
247 mtk_vcodec_load_racing_info(ctx);
248 }
249 EXPORT_SYMBOL_GPL(mtk_vcodec_dec_enable_hardware);
250
mtk_vcodec_dec_disable_hardware(struct mtk_vcodec_ctx * ctx,int hw_idx)251 void mtk_vcodec_dec_disable_hardware(struct mtk_vcodec_ctx *ctx, int hw_idx)
252 {
253 if (IS_VDEC_INNER_RACING(ctx->dev->dec_capability))
254 mtk_vcodec_record_racing_info(ctx);
255
256 mtk_vcodec_dec_disable_irq(ctx->dev, hw_idx);
257
258 mtk_vcodec_dec_child_dev_off(ctx->dev, hw_idx);
259 if (IS_VDEC_LAT_ARCH(ctx->dev->vdec_pdata->hw_arch) &&
260 hw_idx == MTK_VDEC_CORE)
261 mtk_vcodec_dec_child_dev_off(ctx->dev, MTK_VDEC_LAT0);
262
263 mutex_unlock(&ctx->dev->dec_mutex[hw_idx]);
264 }
265 EXPORT_SYMBOL_GPL(mtk_vcodec_dec_disable_hardware);
266