1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include <linux/devcoredump.h>
5 #include <linux/etherdevice.h>
6 #include <linux/timekeeping.h>
7 #include "mt7921.h"
8 #include "../dma.h"
9 #include "mac.h"
10 #include "mcu.h"
11
12 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f)
13 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\
14 IEEE80211_RADIOTAP_HE_##f)
15
mt7921_rx_get_wcid(struct mt7921_dev * dev,u16 idx,bool unicast)16 static struct mt76_wcid *mt7921_rx_get_wcid(struct mt7921_dev *dev,
17 u16 idx, bool unicast)
18 {
19 struct mt7921_sta *sta;
20 struct mt76_wcid *wcid;
21
22 if (idx >= ARRAY_SIZE(dev->mt76.wcid))
23 return NULL;
24
25 wcid = rcu_dereference(dev->mt76.wcid[idx]);
26 if (unicast || !wcid)
27 return wcid;
28
29 if (!wcid->sta)
30 return NULL;
31
32 sta = container_of(wcid, struct mt7921_sta, wcid);
33 if (!sta->vif)
34 return NULL;
35
36 return &sta->vif->sta.wcid;
37 }
38
mt7921_sta_ps(struct mt76_dev * mdev,struct ieee80211_sta * sta,bool ps)39 void mt7921_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
40 {
41 }
42 EXPORT_SYMBOL_GPL(mt7921_sta_ps);
43
mt7921_mac_wtbl_update(struct mt7921_dev * dev,int idx,u32 mask)44 bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask)
45 {
46 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
47 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);
48
49 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY,
50 0, 5000);
51 }
52
mt7921_mac_sta_poll(struct mt7921_dev * dev)53 void mt7921_mac_sta_poll(struct mt7921_dev *dev)
54 {
55 static const u8 ac_to_tid[] = {
56 [IEEE80211_AC_BE] = 0,
57 [IEEE80211_AC_BK] = 1,
58 [IEEE80211_AC_VI] = 4,
59 [IEEE80211_AC_VO] = 6
60 };
61 struct ieee80211_sta *sta;
62 struct mt7921_sta *msta;
63 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS];
64 LIST_HEAD(sta_poll_list);
65 struct rate_info *rate;
66 int i;
67
68 spin_lock_bh(&dev->sta_poll_lock);
69 list_splice_init(&dev->sta_poll_list, &sta_poll_list);
70 spin_unlock_bh(&dev->sta_poll_lock);
71
72 while (true) {
73 bool clear = false;
74 u32 addr, val;
75 u16 idx;
76 u8 bw;
77
78 spin_lock_bh(&dev->sta_poll_lock);
79 if (list_empty(&sta_poll_list)) {
80 spin_unlock_bh(&dev->sta_poll_lock);
81 break;
82 }
83 msta = list_first_entry(&sta_poll_list,
84 struct mt7921_sta, poll_list);
85 list_del_init(&msta->poll_list);
86 spin_unlock_bh(&dev->sta_poll_lock);
87
88 idx = msta->wcid.idx;
89 addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET);
90
91 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
92 u32 tx_last = msta->airtime_ac[i];
93 u32 rx_last = msta->airtime_ac[i + 4];
94
95 msta->airtime_ac[i] = mt76_rr(dev, addr);
96 msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);
97
98 tx_time[i] = msta->airtime_ac[i] - tx_last;
99 rx_time[i] = msta->airtime_ac[i + 4] - rx_last;
100
101 if ((tx_last | rx_last) & BIT(30))
102 clear = true;
103
104 addr += 8;
105 }
106
107 if (clear) {
108 mt7921_mac_wtbl_update(dev, idx,
109 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
110 memset(msta->airtime_ac, 0, sizeof(msta->airtime_ac));
111 }
112
113 if (!msta->wcid.sta)
114 continue;
115
116 sta = container_of((void *)msta, struct ieee80211_sta,
117 drv_priv);
118 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
119 u8 q = mt76_connac_lmac_mapping(i);
120 u32 tx_cur = tx_time[q];
121 u32 rx_cur = rx_time[q];
122 u8 tid = ac_to_tid[i];
123
124 if (!tx_cur && !rx_cur)
125 continue;
126
127 ieee80211_sta_register_airtime(sta, tid, tx_cur,
128 rx_cur);
129 }
130
131 /* We don't support reading GI info from txs packets.
132 * For accurate tx status reporting and AQL improvement,
133 * we need to make sure that flags match so polling GI
134 * from per-sta counters directly.
135 */
136 rate = &msta->wcid.rate;
137 addr = mt7921_mac_wtbl_lmac_addr(idx,
138 MT_WTBL_TXRX_CAP_RATE_OFFSET);
139 val = mt76_rr(dev, addr);
140
141 switch (rate->bw) {
142 case RATE_INFO_BW_160:
143 bw = IEEE80211_STA_RX_BW_160;
144 break;
145 case RATE_INFO_BW_80:
146 bw = IEEE80211_STA_RX_BW_80;
147 break;
148 case RATE_INFO_BW_40:
149 bw = IEEE80211_STA_RX_BW_40;
150 break;
151 default:
152 bw = IEEE80211_STA_RX_BW_20;
153 break;
154 }
155
156 if (rate->flags & RATE_INFO_FLAGS_HE_MCS) {
157 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw;
158
159 rate->he_gi = (val & (0x3 << offs)) >> offs;
160 } else if (rate->flags &
161 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) {
162 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw))
163 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
164 else
165 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
166 }
167 }
168 }
169 EXPORT_SYMBOL_GPL(mt7921_mac_sta_poll);
170
171 static void
mt7921_mac_decode_he_radiotap_ru(struct mt76_rx_status * status,struct ieee80211_radiotap_he * he,__le32 * rxv)172 mt7921_mac_decode_he_radiotap_ru(struct mt76_rx_status *status,
173 struct ieee80211_radiotap_he *he,
174 __le32 *rxv)
175 {
176 u32 ru_h, ru_l;
177 u8 ru, offs = 0;
178
179 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L);
180 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H);
181 ru = (u8)(ru_l | ru_h << 4);
182
183 status->bw = RATE_INFO_BW_HE_RU;
184
185 switch (ru) {
186 case 0 ... 36:
187 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26;
188 offs = ru;
189 break;
190 case 37 ... 52:
191 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52;
192 offs = ru - 37;
193 break;
194 case 53 ... 60:
195 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106;
196 offs = ru - 53;
197 break;
198 case 61 ... 64:
199 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242;
200 offs = ru - 61;
201 break;
202 case 65 ... 66:
203 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484;
204 offs = ru - 65;
205 break;
206 case 67:
207 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996;
208 break;
209 case 68:
210 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996;
211 break;
212 }
213
214 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
215 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) |
216 le16_encode_bits(offs,
217 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET);
218 }
219
220 static void
mt7921_mac_decode_he_mu_radiotap(struct sk_buff * skb,__le32 * rxv)221 mt7921_mac_decode_he_mu_radiotap(struct sk_buff *skb, __le32 *rxv)
222 {
223 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
224 static const struct ieee80211_radiotap_he_mu mu_known = {
225 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) |
226 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) |
227 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) |
228 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN) |
229 HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN),
230 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN) |
231 HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN),
232 };
233 struct ieee80211_radiotap_he_mu *he_mu;
234
235 status->flag |= RX_FLAG_RADIOTAP_HE_MU;
236
237 he_mu = skb_push(skb, sizeof(mu_known));
238 memcpy(he_mu, &mu_known, sizeof(mu_known));
239
240 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f)
241
242 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx);
243 if (status->he_dcm)
244 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm);
245
246 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) |
247 MU_PREP(FLAGS2_SIG_B_SYMS_USERS,
248 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER));
249
250 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0);
251
252 if (status->bw >= RATE_INFO_BW_40) {
253 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN);
254 he_mu->ru_ch2[0] =
255 le32_get_bits(rxv[3], MT_CRXV_HE_RU1);
256 }
257
258 if (status->bw >= RATE_INFO_BW_80) {
259 he_mu->ru_ch1[1] =
260 le32_get_bits(rxv[3], MT_CRXV_HE_RU2);
261 he_mu->ru_ch2[1] =
262 le32_get_bits(rxv[3], MT_CRXV_HE_RU3);
263 }
264 }
265
266 static void
mt7921_mac_decode_he_radiotap(struct sk_buff * skb,__le32 * rxv,u32 mode)267 mt7921_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode)
268 {
269 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
270 static const struct ieee80211_radiotap_he known = {
271 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) |
272 HE_BITS(DATA1_DATA_DCM_KNOWN) |
273 HE_BITS(DATA1_STBC_KNOWN) |
274 HE_BITS(DATA1_CODING_KNOWN) |
275 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) |
276 HE_BITS(DATA1_DOPPLER_KNOWN) |
277 HE_BITS(DATA1_SPTL_REUSE_KNOWN) |
278 HE_BITS(DATA1_BSS_COLOR_KNOWN),
279 .data2 = HE_BITS(DATA2_GI_KNOWN) |
280 HE_BITS(DATA2_TXBF_KNOWN) |
281 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) |
282 HE_BITS(DATA2_TXOP_KNOWN),
283 };
284 struct ieee80211_radiotap_he *he = NULL;
285 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1;
286
287 status->flag |= RX_FLAG_RADIOTAP_HE;
288
289 he = skb_push(skb, sizeof(known));
290 memcpy(he, &known, sizeof(known));
291
292 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) |
293 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]);
294 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]);
295 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) |
296 le16_encode_bits(ltf_size,
297 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE);
298 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF)
299 he->data5 |= HE_BITS(DATA5_TXBF);
300 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) |
301 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]);
302
303 switch (mode) {
304 case MT_PHY_TYPE_HE_SU:
305 he->data1 |= HE_BITS(DATA1_FORMAT_SU) |
306 HE_BITS(DATA1_UL_DL_KNOWN) |
307 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) |
308 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
309
310 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) |
311 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
312 break;
313 case MT_PHY_TYPE_HE_EXT_SU:
314 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) |
315 HE_BITS(DATA1_UL_DL_KNOWN) |
316 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
317
318 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
319 break;
320 case MT_PHY_TYPE_HE_MU:
321 he->data1 |= HE_BITS(DATA1_FORMAT_MU) |
322 HE_BITS(DATA1_UL_DL_KNOWN);
323
324 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
325 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]);
326
327 mt7921_mac_decode_he_radiotap_ru(status, he, rxv);
328 mt7921_mac_decode_he_mu_radiotap(skb, rxv);
329 break;
330 case MT_PHY_TYPE_HE_TB:
331 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) |
332 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) |
333 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) |
334 HE_BITS(DATA1_SPTL_REUSE4_KNOWN);
335
336 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) |
337 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) |
338 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) |
339 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]);
340
341 mt7921_mac_decode_he_radiotap_ru(status, he, rxv);
342 break;
343 default:
344 break;
345 }
346 }
347
348 static void
mt7921_get_status_freq_info(struct mt7921_dev * dev,struct mt76_phy * mphy,struct mt76_rx_status * status,u8 chfreq)349 mt7921_get_status_freq_info(struct mt7921_dev *dev, struct mt76_phy *mphy,
350 struct mt76_rx_status *status, u8 chfreq)
351 {
352 if (!test_bit(MT76_HW_SCANNING, &mphy->state) &&
353 !test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) &&
354 !test_bit(MT76_STATE_ROC, &mphy->state)) {
355 status->freq = mphy->chandef.chan->center_freq;
356 status->band = mphy->chandef.chan->band;
357 return;
358 }
359
360 if (chfreq > 180) {
361 status->band = NL80211_BAND_6GHZ;
362 chfreq = (chfreq - 181) * 4 + 1;
363 } else if (chfreq > 14) {
364 status->band = NL80211_BAND_5GHZ;
365 } else {
366 status->band = NL80211_BAND_2GHZ;
367 }
368 status->freq = ieee80211_channel_to_frequency(chfreq, status->band);
369 }
370
371 static void
mt7921_mac_rssi_iter(void * priv,u8 * mac,struct ieee80211_vif * vif)372 mt7921_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
373 {
374 struct sk_buff *skb = priv;
375 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
376 struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
377 struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
378
379 if (status->signal > 0)
380 return;
381
382 if (!ether_addr_equal(vif->addr, hdr->addr1))
383 return;
384
385 ewma_rssi_add(&mvif->rssi, -status->signal);
386 }
387
388 static void
mt7921_mac_assoc_rssi(struct mt7921_dev * dev,struct sk_buff * skb)389 mt7921_mac_assoc_rssi(struct mt7921_dev *dev, struct sk_buff *skb)
390 {
391 struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
392
393 if (!ieee80211_is_assoc_resp(hdr->frame_control) &&
394 !ieee80211_is_auth(hdr->frame_control))
395 return;
396
397 ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev),
398 IEEE80211_IFACE_ITER_RESUME_ALL,
399 mt7921_mac_rssi_iter, skb);
400 }
401
402 /* The HW does not translate the mac header to 802.3 for mesh point */
mt7921_reverse_frag0_hdr_trans(struct sk_buff * skb,u16 hdr_gap)403 static int mt7921_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap)
404 {
405 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
406 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap);
407 struct mt7921_sta *msta = (struct mt7921_sta *)status->wcid;
408 __le32 *rxd = (__le32 *)skb->data;
409 struct ieee80211_sta *sta;
410 struct ieee80211_vif *vif;
411 struct ieee80211_hdr hdr;
412 u16 frame_control;
413
414 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) !=
415 MT_RXD3_NORMAL_U2M)
416 return -EINVAL;
417
418 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4))
419 return -EINVAL;
420
421 if (!msta || !msta->vif)
422 return -EINVAL;
423
424 sta = container_of((void *)msta, struct ieee80211_sta, drv_priv);
425 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv);
426
427 /* store the info from RXD and ethhdr to avoid being overridden */
428 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL);
429 hdr.frame_control = cpu_to_le16(frame_control);
430 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL));
431 hdr.duration_id = 0;
432
433 ether_addr_copy(hdr.addr1, vif->addr);
434 ether_addr_copy(hdr.addr2, sta->addr);
435 switch (frame_control & (IEEE80211_FCTL_TODS |
436 IEEE80211_FCTL_FROMDS)) {
437 case 0:
438 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);
439 break;
440 case IEEE80211_FCTL_FROMDS:
441 ether_addr_copy(hdr.addr3, eth_hdr->h_source);
442 break;
443 case IEEE80211_FCTL_TODS:
444 ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
445 break;
446 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:
447 ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
448 ether_addr_copy(hdr.addr4, eth_hdr->h_source);
449 break;
450 default:
451 break;
452 }
453
454 skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2);
455 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||
456 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))
457 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);
458 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)
459 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);
460 else
461 skb_pull(skb, 2);
462
463 if (ieee80211_has_order(hdr.frame_control))
464 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9],
465 IEEE80211_HT_CTL_LEN);
466 if (ieee80211_is_data_qos(hdr.frame_control)) {
467 __le16 qos_ctrl;
468
469 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL));
470 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,
471 IEEE80211_QOS_CTL_LEN);
472 }
473
474 if (ieee80211_has_a4(hdr.frame_control))
475 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
476 else
477 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);
478
479 return 0;
480 }
481
482 static int
mt7921_mac_fill_rx(struct mt7921_dev * dev,struct sk_buff * skb)483 mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
484 {
485 u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;
486 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
487 bool hdr_trans, unicast, insert_ccmp_hdr = false;
488 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info;
489 u16 hdr_gap;
490 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data;
491 struct mt76_phy *mphy = &dev->mt76.phy;
492 struct mt7921_phy *phy = &dev->phy;
493 struct ieee80211_supported_band *sband;
494 u32 rxd0 = le32_to_cpu(rxd[0]);
495 u32 rxd1 = le32_to_cpu(rxd[1]);
496 u32 rxd2 = le32_to_cpu(rxd[2]);
497 u32 rxd3 = le32_to_cpu(rxd[3]);
498 u32 rxd4 = le32_to_cpu(rxd[4]);
499 u16 seq_ctrl = 0;
500 __le16 fc = 0;
501 u32 mode = 0;
502 int i, idx;
503
504 memset(status, 0, sizeof(*status));
505
506 if (rxd1 & MT_RXD1_NORMAL_BAND_IDX)
507 return -EINVAL;
508
509 if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
510 return -EINVAL;
511
512 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR)
513 return -EINVAL;
514
515 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS;
516 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM))
517 return -EINVAL;
518
519 /* ICV error or CCMP/BIP/WPI MIC error */
520 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR)
521 status->flag |= RX_FLAG_ONLY_MONITOR;
522
523 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);
524 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;
525 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);
526 status->wcid = mt7921_rx_get_wcid(dev, idx, unicast);
527
528 if (status->wcid) {
529 struct mt7921_sta *msta;
530
531 msta = container_of(status->wcid, struct mt7921_sta, wcid);
532 spin_lock_bh(&dev->sta_poll_lock);
533 if (list_empty(&msta->poll_list))
534 list_add_tail(&msta->poll_list, &dev->sta_poll_list);
535 spin_unlock_bh(&dev->sta_poll_lock);
536 }
537
538 mt7921_get_status_freq_info(dev, mphy, status, chfreq);
539
540 switch (status->band) {
541 case NL80211_BAND_5GHZ:
542 sband = &mphy->sband_5g.sband;
543 break;
544 case NL80211_BAND_6GHZ:
545 sband = &mphy->sband_6g.sband;
546 break;
547 default:
548 sband = &mphy->sband_2g.sband;
549 break;
550 }
551
552 if (!sband->channels)
553 return -EINVAL;
554
555 if ((rxd0 & csum_mask) == csum_mask)
556 skb->ip_summed = CHECKSUM_UNNECESSARY;
557
558 if (rxd1 & MT_RXD1_NORMAL_FCS_ERR)
559 status->flag |= RX_FLAG_FAILED_FCS_CRC;
560
561 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR)
562 status->flag |= RX_FLAG_MMIC_ERROR;
563
564 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 &&
565 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) {
566 status->flag |= RX_FLAG_DECRYPTED;
567 status->flag |= RX_FLAG_IV_STRIPPED;
568 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
569 }
570
571 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2);
572
573 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
574 return -EINVAL;
575
576 rxd += 6;
577 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) {
578 u32 v0 = le32_to_cpu(rxd[0]);
579 u32 v2 = le32_to_cpu(rxd[2]);
580
581 fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0));
582 seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2);
583 qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2);
584
585 rxd += 4;
586 if ((u8 *)rxd - skb->data >= skb->len)
587 return -EINVAL;
588 }
589
590 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) {
591 u8 *data = (u8 *)rxd;
592
593 if (status->flag & RX_FLAG_DECRYPTED) {
594 switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) {
595 case MT_CIPHER_AES_CCMP:
596 case MT_CIPHER_CCMP_CCX:
597 case MT_CIPHER_CCMP_256:
598 insert_ccmp_hdr =
599 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
600 fallthrough;
601 case MT_CIPHER_TKIP:
602 case MT_CIPHER_TKIP_NO_MIC:
603 case MT_CIPHER_GCMP:
604 case MT_CIPHER_GCMP_256:
605 status->iv[0] = data[5];
606 status->iv[1] = data[4];
607 status->iv[2] = data[3];
608 status->iv[3] = data[2];
609 status->iv[4] = data[1];
610 status->iv[5] = data[0];
611 break;
612 default:
613 break;
614 }
615 }
616 rxd += 4;
617 if ((u8 *)rxd - skb->data >= skb->len)
618 return -EINVAL;
619 }
620
621 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) {
622 status->timestamp = le32_to_cpu(rxd[0]);
623 status->flag |= RX_FLAG_MACTIME_START;
624
625 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) {
626 status->flag |= RX_FLAG_AMPDU_DETAILS;
627
628 /* all subframes of an A-MPDU have the same timestamp */
629 if (phy->rx_ampdu_ts != status->timestamp) {
630 if (!++phy->ampdu_ref)
631 phy->ampdu_ref++;
632 }
633 phy->rx_ampdu_ts = status->timestamp;
634
635 status->ampdu_ref = phy->ampdu_ref;
636 }
637
638 rxd += 2;
639 if ((u8 *)rxd - skb->data >= skb->len)
640 return -EINVAL;
641 }
642
643 /* RXD Group 3 - P-RXV */
644 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {
645 u8 stbc, gi;
646 u32 v0, v1;
647 bool cck;
648
649 rxv = rxd;
650 rxd += 2;
651 if ((u8 *)rxd - skb->data >= skb->len)
652 return -EINVAL;
653
654 v0 = le32_to_cpu(rxv[0]);
655 v1 = le32_to_cpu(rxv[1]);
656
657 if (v0 & MT_PRXV_HT_AD_CODE)
658 status->enc_flags |= RX_ENC_FLAG_LDPC;
659
660 status->chains = mphy->antenna_mask;
661 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1);
662 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1);
663 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1);
664 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1);
665 status->signal = -128;
666 for (i = 0; i < hweight8(mphy->antenna_mask); i++) {
667 if (!(status->chains & BIT(i)) ||
668 status->chain_signal[i] >= 0)
669 continue;
670
671 status->signal = max(status->signal,
672 status->chain_signal[i]);
673 }
674
675 stbc = FIELD_GET(MT_PRXV_STBC, v0);
676 gi = FIELD_GET(MT_PRXV_SGI, v0);
677 cck = false;
678
679 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
680 mode = FIELD_GET(MT_PRXV_TX_MODE, v0);
681
682 switch (mode) {
683 case MT_PHY_TYPE_CCK:
684 cck = true;
685 fallthrough;
686 case MT_PHY_TYPE_OFDM:
687 i = mt76_get_rate(&dev->mt76, sband, i, cck);
688 break;
689 case MT_PHY_TYPE_HT_GF:
690 case MT_PHY_TYPE_HT:
691 status->encoding = RX_ENC_HT;
692 if (i > 31)
693 return -EINVAL;
694 break;
695 case MT_PHY_TYPE_VHT:
696 status->nss =
697 FIELD_GET(MT_PRXV_NSTS, v0) + 1;
698 status->encoding = RX_ENC_VHT;
699 if (i > 11)
700 return -EINVAL;
701 break;
702 case MT_PHY_TYPE_HE_MU:
703 case MT_PHY_TYPE_HE_SU:
704 case MT_PHY_TYPE_HE_EXT_SU:
705 case MT_PHY_TYPE_HE_TB:
706 status->nss =
707 FIELD_GET(MT_PRXV_NSTS, v0) + 1;
708 status->encoding = RX_ENC_HE;
709 i &= GENMASK(3, 0);
710
711 if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
712 status->he_gi = gi;
713
714 status->he_dcm = !!(idx & MT_PRXV_TX_DCM);
715 break;
716 default:
717 return -EINVAL;
718 }
719
720 status->rate_idx = i;
721
722 switch (FIELD_GET(MT_PRXV_FRAME_MODE, v0)) {
723 case IEEE80211_STA_RX_BW_20:
724 break;
725 case IEEE80211_STA_RX_BW_40:
726 if (mode & MT_PHY_TYPE_HE_EXT_SU &&
727 (idx & MT_PRXV_TX_ER_SU_106T)) {
728 status->bw = RATE_INFO_BW_HE_RU;
729 status->he_ru =
730 NL80211_RATE_INFO_HE_RU_ALLOC_106;
731 } else {
732 status->bw = RATE_INFO_BW_40;
733 }
734 break;
735 case IEEE80211_STA_RX_BW_80:
736 status->bw = RATE_INFO_BW_80;
737 break;
738 case IEEE80211_STA_RX_BW_160:
739 status->bw = RATE_INFO_BW_160;
740 break;
741 default:
742 return -EINVAL;
743 }
744
745 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
746 if (mode < MT_PHY_TYPE_HE_SU && gi)
747 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
748
749 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
750 rxd += 18;
751 if ((u8 *)rxd - skb->data >= skb->len)
752 return -EINVAL;
753 }
754 }
755
756 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4);
757 status->amsdu = !!amsdu_info;
758 if (status->amsdu) {
759 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME;
760 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME;
761 }
762
763 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad;
764 if (hdr_trans && ieee80211_has_morefrags(fc)) {
765 if (mt7921_reverse_frag0_hdr_trans(skb, hdr_gap))
766 return -EINVAL;
767 hdr_trans = false;
768 } else {
769 skb_pull(skb, hdr_gap);
770 if (!hdr_trans && status->amsdu) {
771 memmove(skb->data + 2, skb->data,
772 ieee80211_get_hdrlen_from_skb(skb));
773 skb_pull(skb, 2);
774 }
775 }
776
777 if (!hdr_trans) {
778 struct ieee80211_hdr *hdr;
779
780 if (insert_ccmp_hdr) {
781 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
782
783 mt76_insert_ccmp_hdr(skb, key_id);
784 }
785
786 hdr = mt76_skb_get_hdr(skb);
787 fc = hdr->frame_control;
788 if (ieee80211_is_data_qos(fc)) {
789 seq_ctrl = le16_to_cpu(hdr->seq_ctrl);
790 qos_ctl = *ieee80211_get_qos_ctl(hdr);
791 }
792 } else {
793 status->flag |= RX_FLAG_8023;
794 }
795
796 mt7921_mac_assoc_rssi(dev, skb);
797
798 if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023))
799 mt7921_mac_decode_he_radiotap(skb, rxv, mode);
800
801 if (!status->wcid || !ieee80211_is_data_qos(fc))
802 return 0;
803
804 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc);
805 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl);
806 status->qos_ctl = qos_ctl;
807
808 return 0;
809 }
810
mt7921_tx_check_aggr(struct ieee80211_sta * sta,__le32 * txwi)811 void mt7921_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi)
812 {
813 struct mt7921_sta *msta;
814 u16 fc, tid;
815 u32 val;
816
817 if (!sta || !(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
818 return;
819
820 tid = le32_get_bits(txwi[1], MT_TXD1_TID);
821 if (tid >= 6) /* skip VO queue */
822 return;
823
824 val = le32_to_cpu(txwi[2]);
825 fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 |
826 FIELD_GET(MT_TXD2_SUB_TYPE, val) << 4;
827 if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA)))
828 return;
829
830 msta = (struct mt7921_sta *)sta->drv_priv;
831 if (!test_and_set_bit(tid, &msta->ampdu_state))
832 ieee80211_start_tx_ba_session(sta, tid, 0);
833 }
834 EXPORT_SYMBOL_GPL(mt7921_tx_check_aggr);
835
836 static bool
mt7921_mac_add_txs_skb(struct mt7921_dev * dev,struct mt76_wcid * wcid,int pid,__le32 * txs_data)837 mt7921_mac_add_txs_skb(struct mt7921_dev *dev, struct mt76_wcid *wcid, int pid,
838 __le32 *txs_data)
839 {
840 struct mt7921_sta *msta = container_of(wcid, struct mt7921_sta, wcid);
841 struct mt76_sta_stats *stats = &msta->stats;
842 struct ieee80211_supported_band *sband;
843 struct mt76_dev *mdev = &dev->mt76;
844 struct ieee80211_tx_info *info;
845 struct rate_info rate = {};
846 struct sk_buff_head list;
847 u32 txrate, txs, mode;
848 struct sk_buff *skb;
849 bool cck = false;
850
851 mt76_tx_status_lock(mdev, &list);
852 skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list);
853 if (!skb)
854 goto out;
855
856 info = IEEE80211_SKB_CB(skb);
857 txs = le32_to_cpu(txs_data[0]);
858 if (!(txs & MT_TXS0_ACK_ERROR_MASK))
859 info->flags |= IEEE80211_TX_STAT_ACK;
860
861 info->status.ampdu_len = 1;
862 info->status.ampdu_ack_len = !!(info->flags &
863 IEEE80211_TX_STAT_ACK);
864
865 info->status.rates[0].idx = -1;
866
867 if (!wcid->sta)
868 goto out;
869
870 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs);
871
872 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate);
873 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1;
874
875 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss))
876 stats->tx_nss[rate.nss - 1]++;
877 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs))
878 stats->tx_mcs[rate.mcs]++;
879
880 mode = FIELD_GET(MT_TX_RATE_MODE, txrate);
881 switch (mode) {
882 case MT_PHY_TYPE_CCK:
883 cck = true;
884 fallthrough;
885 case MT_PHY_TYPE_OFDM:
886 if (dev->mphy.chandef.chan->band == NL80211_BAND_5GHZ)
887 sband = &dev->mphy.sband_5g.sband;
888 else
889 sband = &dev->mphy.sband_2g.sband;
890
891 rate.mcs = mt76_get_rate(dev->mphy.dev, sband, rate.mcs, cck);
892 rate.legacy = sband->bitrates[rate.mcs].bitrate;
893 break;
894 case MT_PHY_TYPE_HT:
895 case MT_PHY_TYPE_HT_GF:
896 if (rate.mcs > 31)
897 goto out;
898
899 rate.flags = RATE_INFO_FLAGS_MCS;
900 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI)
901 rate.flags |= RATE_INFO_FLAGS_SHORT_GI;
902 break;
903 case MT_PHY_TYPE_VHT:
904 if (rate.mcs > 9)
905 goto out;
906
907 rate.flags = RATE_INFO_FLAGS_VHT_MCS;
908 break;
909 case MT_PHY_TYPE_HE_SU:
910 case MT_PHY_TYPE_HE_EXT_SU:
911 case MT_PHY_TYPE_HE_TB:
912 case MT_PHY_TYPE_HE_MU:
913 if (rate.mcs > 11)
914 goto out;
915
916 rate.he_gi = wcid->rate.he_gi;
917 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate);
918 rate.flags = RATE_INFO_FLAGS_HE_MCS;
919 break;
920 default:
921 goto out;
922 }
923 stats->tx_mode[mode]++;
924
925 switch (FIELD_GET(MT_TXS0_BW, txs)) {
926 case IEEE80211_STA_RX_BW_160:
927 rate.bw = RATE_INFO_BW_160;
928 stats->tx_bw[3]++;
929 break;
930 case IEEE80211_STA_RX_BW_80:
931 rate.bw = RATE_INFO_BW_80;
932 stats->tx_bw[2]++;
933 break;
934 case IEEE80211_STA_RX_BW_40:
935 rate.bw = RATE_INFO_BW_40;
936 stats->tx_bw[1]++;
937 break;
938 default:
939 rate.bw = RATE_INFO_BW_20;
940 stats->tx_bw[0]++;
941 break;
942 }
943 wcid->rate = rate;
944
945 out:
946 if (skb)
947 mt76_tx_status_skb_done(mdev, skb, &list);
948 mt76_tx_status_unlock(mdev, &list);
949
950 return !!skb;
951 }
952
mt7921_mac_add_txs(struct mt7921_dev * dev,void * data)953 void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data)
954 {
955 struct mt7921_sta *msta = NULL;
956 struct mt76_wcid *wcid;
957 __le32 *txs_data = data;
958 u16 wcidx;
959 u8 pid;
960
961 if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1)
962 return;
963
964 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID);
965 pid = le32_get_bits(txs_data[3], MT_TXS3_PID);
966
967 if (pid < MT_PACKET_ID_FIRST)
968 return;
969
970 if (wcidx >= MT7921_WTBL_SIZE)
971 return;
972
973 rcu_read_lock();
974
975 wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
976 if (!wcid)
977 goto out;
978
979 mt7921_mac_add_txs_skb(dev, wcid, pid, txs_data);
980
981 if (!wcid->sta)
982 goto out;
983
984 msta = container_of(wcid, struct mt7921_sta, wcid);
985 spin_lock_bh(&dev->sta_poll_lock);
986 if (list_empty(&msta->poll_list))
987 list_add_tail(&msta->poll_list, &dev->sta_poll_list);
988 spin_unlock_bh(&dev->sta_poll_lock);
989
990 out:
991 rcu_read_unlock();
992 }
993 EXPORT_SYMBOL_GPL(mt7921_mac_add_txs);
994
mt7921_queue_rx_skb(struct mt76_dev * mdev,enum mt76_rxq_id q,struct sk_buff * skb)995 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
996 struct sk_buff *skb)
997 {
998 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
999 __le32 *rxd = (__le32 *)skb->data;
1000 __le32 *end = (__le32 *)&skb->data[skb->len];
1001 enum rx_pkt_type type;
1002 u16 flag;
1003
1004 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
1005 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG);
1006
1007 if (type == PKT_TYPE_RX_EVENT && flag == 0x1)
1008 type = PKT_TYPE_NORMAL_MCU;
1009
1010 switch (type) {
1011 case PKT_TYPE_RX_EVENT:
1012 mt7921_mcu_rx_event(dev, skb);
1013 break;
1014 case PKT_TYPE_TXS:
1015 for (rxd += 2; rxd + 8 <= end; rxd += 8)
1016 mt7921_mac_add_txs(dev, rxd);
1017 dev_kfree_skb(skb);
1018 break;
1019 case PKT_TYPE_NORMAL_MCU:
1020 case PKT_TYPE_NORMAL:
1021 if (!mt7921_mac_fill_rx(dev, skb)) {
1022 mt76_rx(&dev->mt76, q, skb);
1023 return;
1024 }
1025 fallthrough;
1026 default:
1027 dev_kfree_skb(skb);
1028 break;
1029 }
1030 }
1031 EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb);
1032
mt7921_mac_reset_counters(struct mt7921_phy * phy)1033 void mt7921_mac_reset_counters(struct mt7921_phy *phy)
1034 {
1035 struct mt7921_dev *dev = phy->dev;
1036 int i;
1037
1038 for (i = 0; i < 4; i++) {
1039 mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1040 mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
1041 }
1042
1043 dev->mt76.phy.survey_time = ktime_get_boottime();
1044 memset(&dev->mt76.aggr_stats[0], 0, sizeof(dev->mt76.aggr_stats) / 2);
1045
1046 /* reset airtime counters */
1047 mt76_rr(dev, MT_MIB_SDR9(0));
1048 mt76_rr(dev, MT_MIB_SDR36(0));
1049 mt76_rr(dev, MT_MIB_SDR37(0));
1050
1051 mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1052 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1053 }
1054
mt7921_mac_set_timing(struct mt7921_phy * phy)1055 void mt7921_mac_set_timing(struct mt7921_phy *phy)
1056 {
1057 s16 coverage_class = phy->coverage_class;
1058 struct mt7921_dev *dev = phy->dev;
1059 u32 val, reg_offset;
1060 u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |
1061 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);
1062 u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |
1063 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);
1064 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
1065 int sifs = is_2ghz ? 10 : 16, offset;
1066
1067 if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
1068 return;
1069
1070 mt76_set(dev, MT_ARB_SCR(0),
1071 MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
1072 udelay(1);
1073
1074 offset = 3 * coverage_class;
1075 reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |
1076 FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);
1077
1078 mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset);
1079 mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset);
1080 mt76_wr(dev, MT_TMAC_ICR0(0),
1081 FIELD_PREP(MT_IFS_EIFS, 360) |
1082 FIELD_PREP(MT_IFS_RIFS, 2) |
1083 FIELD_PREP(MT_IFS_SIFS, sifs) |
1084 FIELD_PREP(MT_IFS_SLOT, phy->slottime));
1085
1086 if (phy->slottime < 20 || !is_2ghz)
1087 val = MT7921_CFEND_RATE_DEFAULT;
1088 else
1089 val = MT7921_CFEND_RATE_11B;
1090
1091 mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val);
1092 mt76_clear(dev, MT_ARB_SCR(0),
1093 MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
1094 }
1095
1096 static u8
mt7921_phy_get_nf(struct mt7921_phy * phy,int idx)1097 mt7921_phy_get_nf(struct mt7921_phy *phy, int idx)
1098 {
1099 return 0;
1100 }
1101
1102 static void
mt7921_phy_update_channel(struct mt76_phy * mphy,int idx)1103 mt7921_phy_update_channel(struct mt76_phy *mphy, int idx)
1104 {
1105 struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76);
1106 struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv;
1107 struct mt76_channel_state *state;
1108 u64 busy_time, tx_time, rx_time, obss_time;
1109 int nf;
1110
1111 busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx),
1112 MT_MIB_SDR9_BUSY_MASK);
1113 tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx),
1114 MT_MIB_SDR36_TXTIME_MASK);
1115 rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx),
1116 MT_MIB_SDR37_RXTIME_MASK);
1117 obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx),
1118 MT_MIB_OBSSTIME_MASK);
1119
1120 nf = mt7921_phy_get_nf(phy, idx);
1121 if (!phy->noise)
1122 phy->noise = nf << 4;
1123 else if (nf)
1124 phy->noise += nf - (phy->noise >> 4);
1125
1126 state = mphy->chan_state;
1127 state->cc_busy += busy_time;
1128 state->cc_tx += tx_time;
1129 state->cc_rx += rx_time + obss_time;
1130 state->cc_bss_rx += rx_time;
1131 state->noise = -(phy->noise >> 4);
1132 }
1133
mt7921_update_channel(struct mt76_phy * mphy)1134 void mt7921_update_channel(struct mt76_phy *mphy)
1135 {
1136 struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76);
1137
1138 if (mt76_connac_pm_wake(mphy, &dev->pm))
1139 return;
1140
1141 mt7921_phy_update_channel(mphy, 0);
1142 /* reset obss airtime */
1143 mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1144
1145 mt76_connac_power_save_sched(mphy, &dev->pm);
1146 }
1147 EXPORT_SYMBOL_GPL(mt7921_update_channel);
1148
1149 static void
mt7921_vif_connect_iter(void * priv,u8 * mac,struct ieee80211_vif * vif)1150 mt7921_vif_connect_iter(void *priv, u8 *mac,
1151 struct ieee80211_vif *vif)
1152 {
1153 struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1154 struct mt7921_dev *dev = mvif->phy->dev;
1155 struct ieee80211_hw *hw = mt76_hw(dev);
1156
1157 if (vif->type == NL80211_IFTYPE_STATION)
1158 ieee80211_disconnect(vif, true);
1159
1160 mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, true);
1161 mt7921_mcu_set_tx(dev, vif);
1162
1163 if (vif->type == NL80211_IFTYPE_AP) {
1164 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.wcid,
1165 true);
1166 mt7921_mcu_sta_update(dev, NULL, vif, true,
1167 MT76_STA_INFO_STATE_NONE);
1168 mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true);
1169 }
1170 }
1171
1172 /* system error recovery */
mt7921_mac_reset_work(struct work_struct * work)1173 void mt7921_mac_reset_work(struct work_struct *work)
1174 {
1175 struct mt7921_dev *dev = container_of(work, struct mt7921_dev,
1176 reset_work);
1177 struct ieee80211_hw *hw = mt76_hw(dev);
1178 struct mt76_connac_pm *pm = &dev->pm;
1179 int i;
1180
1181 dev_err(dev->mt76.dev, "chip reset\n");
1182 dev->hw_full_reset = true;
1183 ieee80211_stop_queues(hw);
1184
1185 cancel_delayed_work_sync(&dev->mphy.mac_work);
1186 cancel_delayed_work_sync(&pm->ps_work);
1187 cancel_work_sync(&pm->wake_work);
1188
1189 mutex_lock(&dev->mt76.mutex);
1190 for (i = 0; i < 10; i++)
1191 if (!mt7921_dev_reset(dev))
1192 break;
1193 mutex_unlock(&dev->mt76.mutex);
1194
1195 if (i == 10)
1196 dev_err(dev->mt76.dev, "chip reset failed\n");
1197
1198 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) {
1199 struct cfg80211_scan_info info = {
1200 .aborted = true,
1201 };
1202
1203 ieee80211_scan_completed(dev->mphy.hw, &info);
1204 }
1205
1206 dev->hw_full_reset = false;
1207 pm->suspended = false;
1208 ieee80211_wake_queues(hw);
1209 ieee80211_iterate_active_interfaces(hw,
1210 IEEE80211_IFACE_ITER_RESUME_ALL,
1211 mt7921_vif_connect_iter, NULL);
1212 mt76_connac_power_save_sched(&dev->mt76.phy, pm);
1213 }
1214
mt7921_reset(struct mt76_dev * mdev)1215 void mt7921_reset(struct mt76_dev *mdev)
1216 {
1217 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1218
1219 if (!dev->hw_init_done)
1220 return;
1221
1222 if (dev->hw_full_reset)
1223 return;
1224
1225 queue_work(dev->mt76.wq, &dev->reset_work);
1226 }
1227
mt7921_mac_update_mib_stats(struct mt7921_phy * phy)1228 void mt7921_mac_update_mib_stats(struct mt7921_phy *phy)
1229 {
1230 struct mt7921_dev *dev = phy->dev;
1231 struct mib_stats *mib = &phy->mib;
1232 int i, aggr0 = 0, aggr1;
1233 u32 val;
1234
1235 mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0),
1236 MT_MIB_SDR3_FCS_ERR_MASK);
1237 mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0),
1238 MT_MIB_ACK_FAIL_COUNT_MASK);
1239 mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0),
1240 MT_MIB_BA_FAIL_COUNT_MASK);
1241 mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0),
1242 MT_MIB_RTS_COUNT_MASK);
1243 mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0),
1244 MT_MIB_RTS_FAIL_COUNT_MASK);
1245
1246 mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0));
1247 mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0));
1248 mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0));
1249
1250 val = mt76_rr(dev, MT_MIB_SDR32(0));
1251 mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val);
1252 mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val);
1253
1254 val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0));
1255 mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val);
1256 mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val);
1257
1258 val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0));
1259 mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val);
1260 mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val);
1261 mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val);
1262 mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val);
1263
1264 mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0));
1265 mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0));
1266 mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0));
1267 mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0));
1268
1269 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
1270 val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i));
1271 mib->tx_amsdu[i] += val;
1272 mib->tx_amsdu_cnt += val;
1273 }
1274
1275 for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) {
1276 u32 val2;
1277
1278 val = mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1279 val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
1280
1281 dev->mt76.aggr_stats[aggr0++] += val & 0xffff;
1282 dev->mt76.aggr_stats[aggr0++] += val >> 16;
1283 dev->mt76.aggr_stats[aggr1++] += val2 & 0xffff;
1284 dev->mt76.aggr_stats[aggr1++] += val2 >> 16;
1285 }
1286 }
1287
mt7921_mac_work(struct work_struct * work)1288 void mt7921_mac_work(struct work_struct *work)
1289 {
1290 struct mt7921_phy *phy;
1291 struct mt76_phy *mphy;
1292
1293 mphy = (struct mt76_phy *)container_of(work, struct mt76_phy,
1294 mac_work.work);
1295 phy = mphy->priv;
1296
1297 mt7921_mutex_acquire(phy->dev);
1298
1299 mt76_update_survey(mphy);
1300 if (++mphy->mac_work_count == 2) {
1301 mphy->mac_work_count = 0;
1302
1303 mt7921_mac_update_mib_stats(phy);
1304 }
1305
1306 mt7921_mutex_release(phy->dev);
1307
1308 mt76_tx_status_check(mphy->dev, false);
1309 ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work,
1310 MT7921_WATCHDOG_TIME);
1311 }
1312
mt7921_pm_wake_work(struct work_struct * work)1313 void mt7921_pm_wake_work(struct work_struct *work)
1314 {
1315 struct mt7921_dev *dev;
1316 struct mt76_phy *mphy;
1317
1318 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1319 pm.wake_work);
1320 mphy = dev->phy.mt76;
1321
1322 if (!mt7921_mcu_drv_pmctrl(dev)) {
1323 struct mt76_dev *mdev = &dev->mt76;
1324 int i;
1325
1326 if (mt76_is_sdio(mdev)) {
1327 mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
1328 mt76_worker_schedule(&mdev->sdio.txrx_worker);
1329 } else {
1330 mt76_for_each_q_rx(mdev, i)
1331 napi_schedule(&mdev->napi[i]);
1332 mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
1333 mt7921_mcu_tx_cleanup(dev);
1334 }
1335 if (test_bit(MT76_STATE_RUNNING, &mphy->state))
1336 ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work,
1337 MT7921_WATCHDOG_TIME);
1338 }
1339
1340 ieee80211_wake_queues(mphy->hw);
1341 wake_up(&dev->pm.wait);
1342 }
1343
mt7921_pm_power_save_work(struct work_struct * work)1344 void mt7921_pm_power_save_work(struct work_struct *work)
1345 {
1346 struct mt7921_dev *dev;
1347 unsigned long delta;
1348 struct mt76_phy *mphy;
1349
1350 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1351 pm.ps_work.work);
1352 mphy = dev->phy.mt76;
1353
1354 delta = dev->pm.idle_timeout;
1355 if (test_bit(MT76_HW_SCANNING, &mphy->state) ||
1356 test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) ||
1357 dev->fw_assert)
1358 goto out;
1359
1360 if (mutex_is_locked(&dev->mt76.mutex))
1361 /* if mt76 mutex is held we should not put the device
1362 * to sleep since we are currently accessing device
1363 * register map. We need to wait for the next power_save
1364 * trigger.
1365 */
1366 goto out;
1367
1368 if (time_is_after_jiffies(dev->pm.last_activity + delta)) {
1369 delta = dev->pm.last_activity + delta - jiffies;
1370 goto out;
1371 }
1372
1373 if (!mt7921_mcu_fw_pmctrl(dev)) {
1374 cancel_delayed_work_sync(&mphy->mac_work);
1375 return;
1376 }
1377 out:
1378 queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta);
1379 }
1380
mt7921_coredump_work(struct work_struct * work)1381 void mt7921_coredump_work(struct work_struct *work)
1382 {
1383 struct mt7921_dev *dev;
1384 char *dump, *data;
1385
1386 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1387 coredump.work.work);
1388
1389 if (time_is_after_jiffies(dev->coredump.last_activity +
1390 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) {
1391 queue_delayed_work(dev->mt76.wq, &dev->coredump.work,
1392 MT76_CONNAC_COREDUMP_TIMEOUT);
1393 return;
1394 }
1395
1396 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ);
1397 data = dump;
1398
1399 while (true) {
1400 struct sk_buff *skb;
1401
1402 spin_lock_bh(&dev->mt76.lock);
1403 skb = __skb_dequeue(&dev->coredump.msg_list);
1404 spin_unlock_bh(&dev->mt76.lock);
1405
1406 if (!skb)
1407 break;
1408
1409 skb_pull(skb, sizeof(struct mt7921_mcu_rxd));
1410 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) {
1411 dev_kfree_skb(skb);
1412 continue;
1413 }
1414
1415 memcpy(data, skb->data, skb->len);
1416 data += skb->len;
1417
1418 dev_kfree_skb(skb);
1419 }
1420
1421 if (dump)
1422 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,
1423 GFP_KERNEL);
1424
1425 mt7921_reset(&dev->mt76);
1426 }
1427
1428 /* usb_sdio */
1429 static void
mt7921_usb_sdio_write_txwi(struct mt7921_dev * dev,struct mt76_wcid * wcid,enum mt76_txq_id qid,struct ieee80211_sta * sta,struct ieee80211_key_conf * key,int pid,struct sk_buff * skb)1430 mt7921_usb_sdio_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid,
1431 enum mt76_txq_id qid, struct ieee80211_sta *sta,
1432 struct ieee80211_key_conf *key, int pid,
1433 struct sk_buff *skb)
1434 {
1435 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE);
1436
1437 memset(txwi, 0, MT_SDIO_TXD_SIZE);
1438 mt76_connac2_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, 0);
1439 skb_push(skb, MT_SDIO_TXD_SIZE);
1440 }
1441
mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev * mdev,void * txwi_ptr,enum mt76_txq_id qid,struct mt76_wcid * wcid,struct ieee80211_sta * sta,struct mt76_tx_info * tx_info)1442 int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
1443 enum mt76_txq_id qid, struct mt76_wcid *wcid,
1444 struct ieee80211_sta *sta,
1445 struct mt76_tx_info *tx_info)
1446 {
1447 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1448 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
1449 struct ieee80211_key_conf *key = info->control.hw_key;
1450 struct sk_buff *skb = tx_info->skb;
1451 int err, pad, pktid, type;
1452
1453 if (unlikely(tx_info->skb->len <= ETH_HLEN))
1454 return -EINVAL;
1455
1456 if (!wcid)
1457 wcid = &dev->mt76.global_wcid;
1458
1459 if (sta) {
1460 struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
1461
1462 if (time_after(jiffies, msta->last_txs + HZ / 4)) {
1463 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
1464 msta->last_txs = jiffies;
1465 }
1466 }
1467
1468 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
1469 mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);
1470
1471 type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0;
1472 mt7921_skb_add_usb_sdio_hdr(dev, skb, type);
1473 pad = round_up(skb->len, 4) - skb->len;
1474 if (mt76_is_usb(mdev))
1475 pad += 4;
1476
1477 err = mt76_skb_adjust_pad(skb, pad);
1478 if (err)
1479 /* Release pktid in case of error. */
1480 idr_remove(&wcid->pktid, pktid);
1481
1482 return err;
1483 }
1484 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb);
1485
mt7921_usb_sdio_tx_complete_skb(struct mt76_dev * mdev,struct mt76_queue_entry * e)1486 void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
1487 struct mt76_queue_entry *e)
1488 {
1489 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE);
1490 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE;
1491 struct ieee80211_sta *sta;
1492 struct mt76_wcid *wcid;
1493 u16 idx;
1494
1495 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);
1496 wcid = rcu_dereference(mdev->wcid[idx]);
1497 sta = wcid_to_sta(wcid);
1498
1499 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE)))
1500 mt7921_tx_check_aggr(sta, txwi);
1501
1502 skb_pull(e->skb, headroom);
1503 mt76_tx_complete_skb(mdev, e->wcid, e->skb);
1504 }
1505 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb);
1506
mt7921_usb_sdio_tx_status_data(struct mt76_dev * mdev,u8 * update)1507 bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
1508 {
1509 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1510
1511 mt7921_mutex_acquire(dev);
1512 mt7921_mac_sta_poll(dev);
1513 mt7921_mutex_release(dev);
1514
1515 return false;
1516 }
1517 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data);
1518
1519 #if IS_ENABLED(CONFIG_IPV6)
mt7921_set_ipv6_ns_work(struct work_struct * work)1520 void mt7921_set_ipv6_ns_work(struct work_struct *work)
1521 {
1522 struct mt7921_dev *dev = container_of(work, struct mt7921_dev,
1523 ipv6_ns_work);
1524 struct sk_buff *skb;
1525 int ret = 0;
1526
1527 do {
1528 skb = skb_dequeue(&dev->ipv6_ns_list);
1529
1530 if (!skb)
1531 break;
1532
1533 mt7921_mutex_acquire(dev);
1534 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1535 MCU_UNI_CMD(OFFLOAD), true);
1536 mt7921_mutex_release(dev);
1537
1538 } while (!ret);
1539
1540 if (ret)
1541 skb_queue_purge(&dev->ipv6_ns_list);
1542 }
1543 #endif
1544