1 /*
2  * This is the Fusion MPT base driver providing common API layer interface
3  * for access to MPT (Message Passing Technology) firmware.
4  *
5  * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6  * Copyright (C) 2007-2010  LSI Corporation
7  *  (mailto:DL-MPTFusionLinux@lsi.com)
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License
11  * as published by the Free Software Foundation; either version 2
12  * of the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * NO WARRANTY
20  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24  * solely responsible for determining the appropriateness of using and
25  * distributing the Program and assumes all risks associated with its
26  * exercise of rights under this Agreement, including but not limited to
27  * the risks and costs of program errors, damage to or loss of data,
28  * programs or equipment, and unavailability or interruption of operations.
29 
30  * DISCLAIMER OF LIABILITY
31  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38 
39  * You should have received a copy of the GNU General Public License
40  * along with this program; if not, write to the Free Software
41  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
42  * USA.
43  */
44 
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60 #include <linux/time.h>
61 #include <linux/aer.h>
62 
63 #include "mpt2sas_base.h"
64 
65 static MPT_CALLBACK	mpt_callbacks[MPT_MAX_CALLBACKS];
66 
67 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68 
69 static int max_queue_depth = -1;
70 module_param(max_queue_depth, int, 0);
71 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
72 
73 static int max_sgl_entries = -1;
74 module_param(max_sgl_entries, int, 0);
75 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
76 
77 static int msix_disable = -1;
78 module_param(msix_disable, int, 0);
79 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
80 
81 static int missing_delay[2] = {-1, -1};
82 module_param_array(missing_delay, int, NULL, 0);
83 MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
84 
85 /* diag_buffer_enable is bitwise
86  * bit 0 set = TRACE
87  * bit 1 set = SNAPSHOT
88  * bit 2 set = EXTENDED
89  *
90  * Either bit can be set, or both
91  */
92 static int diag_buffer_enable;
93 module_param(diag_buffer_enable, int, 0);
94 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
95     "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
96 
97 int mpt2sas_fwfault_debug;
98 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
99     "and halt firmware - (default=0)");
100 
101 static int disable_discovery = -1;
102 module_param(disable_discovery, int, 0);
103 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
104 
105 /**
106  * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
107  *
108  */
109 static int
_scsih_set_fwfault_debug(const char * val,struct kernel_param * kp)110 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
111 {
112 	int ret = param_set_int(val, kp);
113 	struct MPT2SAS_ADAPTER *ioc;
114 
115 	if (ret)
116 		return ret;
117 
118 	printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
119 	list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
120 		ioc->fwfault_debug = mpt2sas_fwfault_debug;
121 	return 0;
122 }
123 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
124     param_get_int, &mpt2sas_fwfault_debug, 0644);
125 
126 /**
127  * _base_fault_reset_work - workq handling ioc fault conditions
128  * @work: input argument, used to derive ioc
129  * Context: sleep.
130  *
131  * Return nothing.
132  */
133 static void
_base_fault_reset_work(struct work_struct * work)134 _base_fault_reset_work(struct work_struct *work)
135 {
136 	struct MPT2SAS_ADAPTER *ioc =
137 	    container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
138 	unsigned long	 flags;
139 	u32 doorbell;
140 	int rc;
141 
142 	spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
143 	if (ioc->shost_recovery)
144 		goto rearm_timer;
145 	spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
146 
147 	doorbell = mpt2sas_base_get_iocstate(ioc, 0);
148 	if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
149 		rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
150 		    FORCE_BIG_HAMMER);
151 		printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
152 		    __func__, (rc == 0) ? "success" : "failed");
153 		doorbell = mpt2sas_base_get_iocstate(ioc, 0);
154 		if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
155 			mpt2sas_base_fault_info(ioc, doorbell &
156 			    MPI2_DOORBELL_DATA_MASK);
157 	}
158 
159 	spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
160  rearm_timer:
161 	if (ioc->fault_reset_work_q)
162 		queue_delayed_work(ioc->fault_reset_work_q,
163 		    &ioc->fault_reset_work,
164 		    msecs_to_jiffies(FAULT_POLLING_INTERVAL));
165 	spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
166 }
167 
168 /**
169  * mpt2sas_base_start_watchdog - start the fault_reset_work_q
170  * @ioc: per adapter object
171  * Context: sleep.
172  *
173  * Return nothing.
174  */
175 void
mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER * ioc)176 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
177 {
178 	unsigned long	 flags;
179 
180 	if (ioc->fault_reset_work_q)
181 		return;
182 
183 	/* initialize fault polling */
184 	INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
185 	snprintf(ioc->fault_reset_work_q_name,
186 	    sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
187 	ioc->fault_reset_work_q =
188 		create_singlethread_workqueue(ioc->fault_reset_work_q_name);
189 	if (!ioc->fault_reset_work_q) {
190 		printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
191 		    ioc->name, __func__, __LINE__);
192 			return;
193 	}
194 	spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
195 	if (ioc->fault_reset_work_q)
196 		queue_delayed_work(ioc->fault_reset_work_q,
197 		    &ioc->fault_reset_work,
198 		    msecs_to_jiffies(FAULT_POLLING_INTERVAL));
199 	spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
200 }
201 
202 /**
203  * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
204  * @ioc: per adapter object
205  * Context: sleep.
206  *
207  * Return nothing.
208  */
209 void
mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER * ioc)210 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
211 {
212 	unsigned long	 flags;
213 	struct workqueue_struct *wq;
214 
215 	spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
216 	wq = ioc->fault_reset_work_q;
217 	ioc->fault_reset_work_q = NULL;
218 	spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
219 	if (wq) {
220 		if (!cancel_delayed_work(&ioc->fault_reset_work))
221 			flush_workqueue(wq);
222 		destroy_workqueue(wq);
223 	}
224 }
225 
226 /**
227  * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
228  * @ioc: per adapter object
229  * @fault_code: fault code
230  *
231  * Return nothing.
232  */
233 void
mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER * ioc,u16 fault_code)234 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
235 {
236 	printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
237 	    ioc->name, fault_code);
238 }
239 
240 /**
241  * mpt2sas_halt_firmware - halt's mpt controller firmware
242  * @ioc: per adapter object
243  *
244  * For debugging timeout related issues.  Writing 0xCOFFEE00
245  * to the doorbell register will halt controller firmware. With
246  * the purpose to stop both driver and firmware, the enduser can
247  * obtain a ring buffer from controller UART.
248  */
249 void
mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER * ioc)250 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
251 {
252 	u32 doorbell;
253 
254 	if (!ioc->fwfault_debug)
255 		return;
256 
257 	dump_stack();
258 
259 	doorbell = readl(&ioc->chip->Doorbell);
260 	if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
261 		mpt2sas_base_fault_info(ioc , doorbell);
262 	else {
263 		writel(0xC0FFEE00, &ioc->chip->Doorbell);
264 		printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
265 		    "timeout\n", ioc->name);
266 	}
267 
268 	panic("panic in %s\n", __func__);
269 }
270 
271 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
272 /**
273  * _base_sas_ioc_info - verbose translation of the ioc status
274  * @ioc: per adapter object
275  * @mpi_reply: reply mf payload returned from firmware
276  * @request_hdr: request mf
277  *
278  * Return nothing.
279  */
280 static void
_base_sas_ioc_info(struct MPT2SAS_ADAPTER * ioc,MPI2DefaultReply_t * mpi_reply,MPI2RequestHeader_t * request_hdr)281 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
282      MPI2RequestHeader_t *request_hdr)
283 {
284 	u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
285 	    MPI2_IOCSTATUS_MASK;
286 	char *desc = NULL;
287 	u16 frame_sz;
288 	char *func_str = NULL;
289 
290 	/* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
291 	if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
292 	    request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
293 	    request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
294 		return;
295 
296 	if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
297 		return;
298 
299 	switch (ioc_status) {
300 
301 /****************************************************************************
302 *  Common IOCStatus values for all replies
303 ****************************************************************************/
304 
305 	case MPI2_IOCSTATUS_INVALID_FUNCTION:
306 		desc = "invalid function";
307 		break;
308 	case MPI2_IOCSTATUS_BUSY:
309 		desc = "busy";
310 		break;
311 	case MPI2_IOCSTATUS_INVALID_SGL:
312 		desc = "invalid sgl";
313 		break;
314 	case MPI2_IOCSTATUS_INTERNAL_ERROR:
315 		desc = "internal error";
316 		break;
317 	case MPI2_IOCSTATUS_INVALID_VPID:
318 		desc = "invalid vpid";
319 		break;
320 	case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
321 		desc = "insufficient resources";
322 		break;
323 	case MPI2_IOCSTATUS_INVALID_FIELD:
324 		desc = "invalid field";
325 		break;
326 	case MPI2_IOCSTATUS_INVALID_STATE:
327 		desc = "invalid state";
328 		break;
329 	case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
330 		desc = "op state not supported";
331 		break;
332 
333 /****************************************************************************
334 *  Config IOCStatus values
335 ****************************************************************************/
336 
337 	case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
338 		desc = "config invalid action";
339 		break;
340 	case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
341 		desc = "config invalid type";
342 		break;
343 	case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
344 		desc = "config invalid page";
345 		break;
346 	case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
347 		desc = "config invalid data";
348 		break;
349 	case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
350 		desc = "config no defaults";
351 		break;
352 	case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
353 		desc = "config cant commit";
354 		break;
355 
356 /****************************************************************************
357 *  SCSI IO Reply
358 ****************************************************************************/
359 
360 	case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
361 	case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
362 	case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
363 	case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
364 	case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
365 	case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
366 	case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
367 	case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
368 	case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
369 	case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
370 	case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
371 	case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
372 		break;
373 
374 /****************************************************************************
375 *  For use by SCSI Initiator and SCSI Target end-to-end data protection
376 ****************************************************************************/
377 
378 	case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
379 		desc = "eedp guard error";
380 		break;
381 	case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
382 		desc = "eedp ref tag error";
383 		break;
384 	case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
385 		desc = "eedp app tag error";
386 		break;
387 
388 /****************************************************************************
389 *  SCSI Target values
390 ****************************************************************************/
391 
392 	case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
393 		desc = "target invalid io index";
394 		break;
395 	case MPI2_IOCSTATUS_TARGET_ABORTED:
396 		desc = "target aborted";
397 		break;
398 	case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
399 		desc = "target no conn retryable";
400 		break;
401 	case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
402 		desc = "target no connection";
403 		break;
404 	case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
405 		desc = "target xfer count mismatch";
406 		break;
407 	case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
408 		desc = "target data offset error";
409 		break;
410 	case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
411 		desc = "target too much write data";
412 		break;
413 	case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
414 		desc = "target iu too short";
415 		break;
416 	case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
417 		desc = "target ack nak timeout";
418 		break;
419 	case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
420 		desc = "target nak received";
421 		break;
422 
423 /****************************************************************************
424 *  Serial Attached SCSI values
425 ****************************************************************************/
426 
427 	case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
428 		desc = "smp request failed";
429 		break;
430 	case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
431 		desc = "smp data overrun";
432 		break;
433 
434 /****************************************************************************
435 *  Diagnostic Buffer Post / Diagnostic Release values
436 ****************************************************************************/
437 
438 	case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
439 		desc = "diagnostic released";
440 		break;
441 	default:
442 		break;
443 	}
444 
445 	if (!desc)
446 		return;
447 
448 	switch (request_hdr->Function) {
449 	case MPI2_FUNCTION_CONFIG:
450 		frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
451 		func_str = "config_page";
452 		break;
453 	case MPI2_FUNCTION_SCSI_TASK_MGMT:
454 		frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
455 		func_str = "task_mgmt";
456 		break;
457 	case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
458 		frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
459 		func_str = "sas_iounit_ctl";
460 		break;
461 	case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
462 		frame_sz = sizeof(Mpi2SepRequest_t);
463 		func_str = "enclosure";
464 		break;
465 	case MPI2_FUNCTION_IOC_INIT:
466 		frame_sz = sizeof(Mpi2IOCInitRequest_t);
467 		func_str = "ioc_init";
468 		break;
469 	case MPI2_FUNCTION_PORT_ENABLE:
470 		frame_sz = sizeof(Mpi2PortEnableRequest_t);
471 		func_str = "port_enable";
472 		break;
473 	case MPI2_FUNCTION_SMP_PASSTHROUGH:
474 		frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
475 		func_str = "smp_passthru";
476 		break;
477 	default:
478 		frame_sz = 32;
479 		func_str = "unknown";
480 		break;
481 	}
482 
483 	printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
484 	    " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
485 
486 	_debug_dump_mf(request_hdr, frame_sz/4);
487 }
488 
489 /**
490  * _base_display_event_data - verbose translation of firmware asyn events
491  * @ioc: per adapter object
492  * @mpi_reply: reply mf payload returned from firmware
493  *
494  * Return nothing.
495  */
496 static void
_base_display_event_data(struct MPT2SAS_ADAPTER * ioc,Mpi2EventNotificationReply_t * mpi_reply)497 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
498     Mpi2EventNotificationReply_t *mpi_reply)
499 {
500 	char *desc = NULL;
501 	u16 event;
502 
503 	if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
504 		return;
505 
506 	event = le16_to_cpu(mpi_reply->Event);
507 
508 	switch (event) {
509 	case MPI2_EVENT_LOG_DATA:
510 		desc = "Log Data";
511 		break;
512 	case MPI2_EVENT_STATE_CHANGE:
513 		desc = "Status Change";
514 		break;
515 	case MPI2_EVENT_HARD_RESET_RECEIVED:
516 		desc = "Hard Reset Received";
517 		break;
518 	case MPI2_EVENT_EVENT_CHANGE:
519 		desc = "Event Change";
520 		break;
521 	case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
522 		desc = "Device Status Change";
523 		break;
524 	case MPI2_EVENT_IR_OPERATION_STATUS:
525 		desc = "IR Operation Status";
526 		break;
527 	case MPI2_EVENT_SAS_DISCOVERY:
528 	{
529 		Mpi2EventDataSasDiscovery_t *event_data =
530 		    (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
531 		printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
532 		    (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
533 		    "start" : "stop");
534 		if (event_data->DiscoveryStatus)
535 			printk("discovery_status(0x%08x)",
536 			    le32_to_cpu(event_data->DiscoveryStatus));
537 		printk("\n");
538 		return;
539 	}
540 	case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
541 		desc = "SAS Broadcast Primitive";
542 		break;
543 	case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
544 		desc = "SAS Init Device Status Change";
545 		break;
546 	case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
547 		desc = "SAS Init Table Overflow";
548 		break;
549 	case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
550 		desc = "SAS Topology Change List";
551 		break;
552 	case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
553 		desc = "SAS Enclosure Device Status Change";
554 		break;
555 	case MPI2_EVENT_IR_VOLUME:
556 		desc = "IR Volume";
557 		break;
558 	case MPI2_EVENT_IR_PHYSICAL_DISK:
559 		desc = "IR Physical Disk";
560 		break;
561 	case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
562 		desc = "IR Configuration Change List";
563 		break;
564 	case MPI2_EVENT_LOG_ENTRY_ADDED:
565 		desc = "Log Entry Added";
566 		break;
567 	}
568 
569 	if (!desc)
570 		return;
571 
572 	printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
573 }
574 #endif
575 
576 /**
577  * _base_sas_log_info - verbose translation of firmware log info
578  * @ioc: per adapter object
579  * @log_info: log info
580  *
581  * Return nothing.
582  */
583 static void
_base_sas_log_info(struct MPT2SAS_ADAPTER * ioc,u32 log_info)584 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
585 {
586 	union loginfo_type {
587 		u32	loginfo;
588 		struct {
589 			u32	subcode:16;
590 			u32	code:8;
591 			u32	originator:4;
592 			u32	bus_type:4;
593 		} dw;
594 	};
595 	union loginfo_type sas_loginfo;
596 	char *originator_str = NULL;
597 
598 	sas_loginfo.loginfo = log_info;
599 	if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
600 		return;
601 
602 	/* each nexus loss loginfo */
603 	if (log_info == 0x31170000)
604 		return;
605 
606 	/* eat the loginfos associated with task aborts */
607 	if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
608 	    0x31140000 || log_info == 0x31130000))
609 		return;
610 
611 	switch (sas_loginfo.dw.originator) {
612 	case 0:
613 		originator_str = "IOP";
614 		break;
615 	case 1:
616 		originator_str = "PL";
617 		break;
618 	case 2:
619 		originator_str = "IR";
620 		break;
621 	}
622 
623 	printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
624 	    "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
625 	     originator_str, sas_loginfo.dw.code,
626 	     sas_loginfo.dw.subcode);
627 }
628 
629 /**
630  * _base_display_reply_info -
631  * @ioc: per adapter object
632  * @smid: system request message index
633  * @msix_index: MSIX table index supplied by the OS
634  * @reply: reply message frame(lower 32bit addr)
635  *
636  * Return nothing.
637  */
638 static void
_base_display_reply_info(struct MPT2SAS_ADAPTER * ioc,u16 smid,u8 msix_index,u32 reply)639 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
640     u32 reply)
641 {
642 	MPI2DefaultReply_t *mpi_reply;
643 	u16 ioc_status;
644 
645 	mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
646 	ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
647 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
648 	if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
649 	    (ioc->logging_level & MPT_DEBUG_REPLY)) {
650 		_base_sas_ioc_info(ioc , mpi_reply,
651 		   mpt2sas_base_get_msg_frame(ioc, smid));
652 	}
653 #endif
654 	if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
655 		_base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
656 }
657 
658 /**
659  * mpt2sas_base_done - base internal command completion routine
660  * @ioc: per adapter object
661  * @smid: system request message index
662  * @msix_index: MSIX table index supplied by the OS
663  * @reply: reply message frame(lower 32bit addr)
664  *
665  * Return 1 meaning mf should be freed from _base_interrupt
666  *        0 means the mf is freed from this function.
667  */
668 u8
mpt2sas_base_done(struct MPT2SAS_ADAPTER * ioc,u16 smid,u8 msix_index,u32 reply)669 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
670     u32 reply)
671 {
672 	MPI2DefaultReply_t *mpi_reply;
673 
674 	mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
675 	if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
676 		return 1;
677 
678 	if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
679 		return 1;
680 
681 	ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
682 	if (mpi_reply) {
683 		ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
684 		memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
685 	}
686 	ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
687 	complete(&ioc->base_cmds.done);
688 	return 1;
689 }
690 
691 /**
692  * _base_async_event - main callback handler for firmware asyn events
693  * @ioc: per adapter object
694  * @msix_index: MSIX table index supplied by the OS
695  * @reply: reply message frame(lower 32bit addr)
696  *
697  * Return 1 meaning mf should be freed from _base_interrupt
698  *        0 means the mf is freed from this function.
699  */
700 static u8
_base_async_event(struct MPT2SAS_ADAPTER * ioc,u8 msix_index,u32 reply)701 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
702 {
703 	Mpi2EventNotificationReply_t *mpi_reply;
704 	Mpi2EventAckRequest_t *ack_request;
705 	u16 smid;
706 
707 	mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
708 	if (!mpi_reply)
709 		return 1;
710 	if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
711 		return 1;
712 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
713 	_base_display_event_data(ioc, mpi_reply);
714 #endif
715 	if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
716 		goto out;
717 	smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
718 	if (!smid) {
719 		printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
720 		    ioc->name, __func__);
721 		goto out;
722 	}
723 
724 	ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
725 	memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
726 	ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
727 	ack_request->Event = mpi_reply->Event;
728 	ack_request->EventContext = mpi_reply->EventContext;
729 	ack_request->VF_ID = 0;  /* TODO */
730 	ack_request->VP_ID = 0;
731 	mpt2sas_base_put_smid_default(ioc, smid);
732 
733  out:
734 
735 	/* scsih callback handler */
736 	mpt2sas_scsih_event_callback(ioc, msix_index, reply);
737 
738 	/* ctl callback handler */
739 	mpt2sas_ctl_event_callback(ioc, msix_index, reply);
740 
741 	return 1;
742 }
743 
744 /**
745  * _base_get_cb_idx - obtain the callback index
746  * @ioc: per adapter object
747  * @smid: system request message index
748  *
749  * Return callback index.
750  */
751 static u8
_base_get_cb_idx(struct MPT2SAS_ADAPTER * ioc,u16 smid)752 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
753 {
754 	int i;
755 	u8 cb_idx;
756 
757 	if (smid < ioc->hi_priority_smid) {
758 		i = smid - 1;
759 		cb_idx = ioc->scsi_lookup[i].cb_idx;
760 	} else if (smid < ioc->internal_smid) {
761 		i = smid - ioc->hi_priority_smid;
762 		cb_idx = ioc->hpr_lookup[i].cb_idx;
763 	} else if (smid <= ioc->hba_queue_depth) {
764 		i = smid - ioc->internal_smid;
765 		cb_idx = ioc->internal_lookup[i].cb_idx;
766 	} else
767 		cb_idx = 0xFF;
768 	return cb_idx;
769 }
770 
771 /**
772  * _base_mask_interrupts - disable interrupts
773  * @ioc: per adapter object
774  *
775  * Disabling ResetIRQ, Reply and Doorbell Interrupts
776  *
777  * Return nothing.
778  */
779 static void
_base_mask_interrupts(struct MPT2SAS_ADAPTER * ioc)780 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
781 {
782 	u32 him_register;
783 
784 	ioc->mask_interrupts = 1;
785 	him_register = readl(&ioc->chip->HostInterruptMask);
786 	him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
787 	writel(him_register, &ioc->chip->HostInterruptMask);
788 	readl(&ioc->chip->HostInterruptMask);
789 }
790 
791 /**
792  * _base_unmask_interrupts - enable interrupts
793  * @ioc: per adapter object
794  *
795  * Enabling only Reply Interrupts
796  *
797  * Return nothing.
798  */
799 static void
_base_unmask_interrupts(struct MPT2SAS_ADAPTER * ioc)800 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
801 {
802 	u32 him_register;
803 
804 	him_register = readl(&ioc->chip->HostInterruptMask);
805 	him_register &= ~MPI2_HIM_RIM;
806 	writel(him_register, &ioc->chip->HostInterruptMask);
807 	ioc->mask_interrupts = 0;
808 }
809 
810 union reply_descriptor {
811 	u64 word;
812 	struct {
813 		u32 low;
814 		u32 high;
815 	} u;
816 };
817 
818 /**
819  * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
820  * @irq: irq number (not used)
821  * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
822  * @r: pt_regs pointer (not used)
823  *
824  * Return IRQ_HANDLE if processed, else IRQ_NONE.
825  */
826 static irqreturn_t
_base_interrupt(int irq,void * bus_id)827 _base_interrupt(int irq, void *bus_id)
828 {
829 	union reply_descriptor rd;
830 	u32 completed_cmds;
831 	u8 request_desript_type;
832 	u16 smid;
833 	u8 cb_idx;
834 	u32 reply;
835 	u8 msix_index;
836 	struct MPT2SAS_ADAPTER *ioc = bus_id;
837 	Mpi2ReplyDescriptorsUnion_t *rpf;
838 	u8 rc;
839 
840 	if (ioc->mask_interrupts)
841 		return IRQ_NONE;
842 
843 	rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
844 	request_desript_type = rpf->Default.ReplyFlags
845 	     & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
846 	if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
847 		return IRQ_NONE;
848 
849 	completed_cmds = 0;
850 	cb_idx = 0xFF;
851 	do {
852 		rd.word = rpf->Words;
853 		if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
854 			goto out;
855 		reply = 0;
856 		cb_idx = 0xFF;
857 		smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
858 		msix_index = rpf->Default.MSIxIndex;
859 		if (request_desript_type ==
860 		    MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
861 			reply = le32_to_cpu
862 				(rpf->AddressReply.ReplyFrameAddress);
863 			if (reply > ioc->reply_dma_max_address ||
864 			    reply < ioc->reply_dma_min_address)
865 				reply = 0;
866 		} else if (request_desript_type ==
867 		    MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
868 			goto next;
869 		else if (request_desript_type ==
870 		    MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
871 			goto next;
872 		if (smid)
873 			cb_idx = _base_get_cb_idx(ioc, smid);
874 		if (smid && cb_idx != 0xFF) {
875 			rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
876 			    reply);
877 			if (reply)
878 				_base_display_reply_info(ioc, smid, msix_index,
879 				    reply);
880 			if (rc)
881 				mpt2sas_base_free_smid(ioc, smid);
882 		}
883 		if (!smid)
884 			_base_async_event(ioc, msix_index, reply);
885 
886 		/* reply free queue handling */
887 		if (reply) {
888 			ioc->reply_free_host_index =
889 			    (ioc->reply_free_host_index ==
890 			    (ioc->reply_free_queue_depth - 1)) ?
891 			    0 : ioc->reply_free_host_index + 1;
892 			ioc->reply_free[ioc->reply_free_host_index] =
893 			    cpu_to_le32(reply);
894 			wmb();
895 			writel(ioc->reply_free_host_index,
896 			    &ioc->chip->ReplyFreeHostIndex);
897 		}
898 
899  next:
900 
901 		rpf->Words = ULLONG_MAX;
902 		ioc->reply_post_host_index = (ioc->reply_post_host_index ==
903 		    (ioc->reply_post_queue_depth - 1)) ? 0 :
904 		    ioc->reply_post_host_index + 1;
905 		request_desript_type =
906 		    ioc->reply_post_free[ioc->reply_post_host_index].Default.
907 		    ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
908 		completed_cmds++;
909 		if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
910 			goto out;
911 		if (!ioc->reply_post_host_index)
912 			rpf = ioc->reply_post_free;
913 		else
914 			rpf++;
915 	} while (1);
916 
917  out:
918 
919 	if (!completed_cmds)
920 		return IRQ_NONE;
921 
922 	wmb();
923 	writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
924 	return IRQ_HANDLED;
925 }
926 
927 /**
928  * mpt2sas_base_release_callback_handler - clear interrupt callback handler
929  * @cb_idx: callback index
930  *
931  * Return nothing.
932  */
933 void
mpt2sas_base_release_callback_handler(u8 cb_idx)934 mpt2sas_base_release_callback_handler(u8 cb_idx)
935 {
936 	mpt_callbacks[cb_idx] = NULL;
937 }
938 
939 /**
940  * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
941  * @cb_func: callback function
942  *
943  * Returns cb_func.
944  */
945 u8
mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)946 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
947 {
948 	u8 cb_idx;
949 
950 	for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
951 		if (mpt_callbacks[cb_idx] == NULL)
952 			break;
953 
954 	mpt_callbacks[cb_idx] = cb_func;
955 	return cb_idx;
956 }
957 
958 /**
959  * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
960  *
961  * Return nothing.
962  */
963 void
mpt2sas_base_initialize_callback_handler(void)964 mpt2sas_base_initialize_callback_handler(void)
965 {
966 	u8 cb_idx;
967 
968 	for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
969 		mpt2sas_base_release_callback_handler(cb_idx);
970 }
971 
972 /**
973  * mpt2sas_base_build_zero_len_sge - build zero length sg entry
974  * @ioc: per adapter object
975  * @paddr: virtual address for SGE
976  *
977  * Create a zero length scatter gather entry to insure the IOCs hardware has
978  * something to use if the target device goes brain dead and tries
979  * to send data even when none is asked for.
980  *
981  * Return nothing.
982  */
983 void
mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER * ioc,void * paddr)984 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
985 {
986 	u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
987 	    MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
988 	    MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
989 	    MPI2_SGE_FLAGS_SHIFT);
990 	ioc->base_add_sg_single(paddr, flags_length, -1);
991 }
992 
993 /**
994  * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
995  * @paddr: virtual address for SGE
996  * @flags_length: SGE flags and data transfer length
997  * @dma_addr: Physical address
998  *
999  * Return nothing.
1000  */
1001 static void
_base_add_sg_single_32(void * paddr,u32 flags_length,dma_addr_t dma_addr)1002 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1003 {
1004 	Mpi2SGESimple32_t *sgel = paddr;
1005 
1006 	flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1007 	    MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1008 	sgel->FlagsLength = cpu_to_le32(flags_length);
1009 	sgel->Address = cpu_to_le32(dma_addr);
1010 }
1011 
1012 
1013 /**
1014  * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1015  * @paddr: virtual address for SGE
1016  * @flags_length: SGE flags and data transfer length
1017  * @dma_addr: Physical address
1018  *
1019  * Return nothing.
1020  */
1021 static void
_base_add_sg_single_64(void * paddr,u32 flags_length,dma_addr_t dma_addr)1022 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1023 {
1024 	Mpi2SGESimple64_t *sgel = paddr;
1025 
1026 	flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1027 	    MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1028 	sgel->FlagsLength = cpu_to_le32(flags_length);
1029 	sgel->Address = cpu_to_le64(dma_addr);
1030 }
1031 
1032 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1033 
1034 /**
1035  * _base_config_dma_addressing - set dma addressing
1036  * @ioc: per adapter object
1037  * @pdev: PCI device struct
1038  *
1039  * Returns 0 for success, non-zero for failure.
1040  */
1041 static int
_base_config_dma_addressing(struct MPT2SAS_ADAPTER * ioc,struct pci_dev * pdev)1042 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1043 {
1044 	struct sysinfo s;
1045 	char *desc = NULL;
1046 
1047 	if (sizeof(dma_addr_t) > 4) {
1048 		const uint64_t required_mask =
1049 		    dma_get_required_mask(&pdev->dev);
1050 		if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1051 		    DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1052 		    DMA_BIT_MASK(64))) {
1053 			ioc->base_add_sg_single = &_base_add_sg_single_64;
1054 			ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1055 			desc = "64";
1056 			goto out;
1057 		}
1058 	}
1059 
1060 	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1061 	    && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1062 		ioc->base_add_sg_single = &_base_add_sg_single_32;
1063 		ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1064 		desc = "32";
1065 	} else
1066 		return -ENODEV;
1067 
1068  out:
1069 	si_meminfo(&s);
1070 	printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1071 	    "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1072 
1073 	return 0;
1074 }
1075 
1076 /**
1077  * _base_save_msix_table - backup msix vector table
1078  * @ioc: per adapter object
1079  *
1080  * This address an errata where diag reset clears out the table
1081  */
1082 static void
_base_save_msix_table(struct MPT2SAS_ADAPTER * ioc)1083 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
1084 {
1085 	int i;
1086 
1087 	if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1088 		return;
1089 
1090 	for (i = 0; i < ioc->msix_vector_count; i++)
1091 		ioc->msix_table_backup[i] = ioc->msix_table[i];
1092 }
1093 
1094 /**
1095  * _base_restore_msix_table - this restores the msix vector table
1096  * @ioc: per adapter object
1097  *
1098  */
1099 static void
_base_restore_msix_table(struct MPT2SAS_ADAPTER * ioc)1100 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
1101 {
1102 	int i;
1103 
1104 	if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1105 		return;
1106 
1107 	for (i = 0; i < ioc->msix_vector_count; i++)
1108 		ioc->msix_table[i] = ioc->msix_table_backup[i];
1109 }
1110 
1111 /**
1112  * _base_check_enable_msix - checks MSIX capabable.
1113  * @ioc: per adapter object
1114  *
1115  * Check to see if card is capable of MSIX, and set number
1116  * of available msix vectors
1117  */
1118 static int
_base_check_enable_msix(struct MPT2SAS_ADAPTER * ioc)1119 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1120 {
1121 	int base;
1122 	u16 message_control;
1123 	u32 msix_table_offset;
1124 
1125 	base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1126 	if (!base) {
1127 		dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1128 		    "supported\n", ioc->name));
1129 		return -EINVAL;
1130 	}
1131 
1132 	/* get msix vector count */
1133 	pci_read_config_word(ioc->pdev, base + 2, &message_control);
1134 	ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1135 
1136 	/* get msix table  */
1137 	pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1138 	msix_table_offset &= 0xFFFFFFF8;
1139 	ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1140 
1141 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1142 	    "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1143 	    ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1144 	return 0;
1145 }
1146 
1147 /**
1148  * _base_disable_msix - disables msix
1149  * @ioc: per adapter object
1150  *
1151  */
1152 static void
_base_disable_msix(struct MPT2SAS_ADAPTER * ioc)1153 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1154 {
1155 	if (ioc->msix_enable) {
1156 		pci_disable_msix(ioc->pdev);
1157 		kfree(ioc->msix_table_backup);
1158 		ioc->msix_table_backup = NULL;
1159 		ioc->msix_enable = 0;
1160 	}
1161 }
1162 
1163 /**
1164  * _base_enable_msix - enables msix, failback to io_apic
1165  * @ioc: per adapter object
1166  *
1167  */
1168 static int
_base_enable_msix(struct MPT2SAS_ADAPTER * ioc)1169 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1170 {
1171 	struct msix_entry entries;
1172 	int r;
1173 	u8 try_msix = 0;
1174 
1175 	if (msix_disable == -1 || msix_disable == 0)
1176 		try_msix = 1;
1177 
1178 	if (!try_msix)
1179 		goto try_ioapic;
1180 
1181 	if (_base_check_enable_msix(ioc) != 0)
1182 		goto try_ioapic;
1183 
1184 	ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1185 	    sizeof(u32), GFP_KERNEL);
1186 	if (!ioc->msix_table_backup) {
1187 		dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1188 		    "msix_table_backup failed!!!\n", ioc->name));
1189 		goto try_ioapic;
1190 	}
1191 
1192 	memset(&entries, 0, sizeof(struct msix_entry));
1193 	r = pci_enable_msix(ioc->pdev, &entries, 1);
1194 	if (r) {
1195 		dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1196 		    "failed (r=%d) !!!\n", ioc->name, r));
1197 		goto try_ioapic;
1198 	}
1199 
1200 	r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1201 	    ioc->name, ioc);
1202 	if (r) {
1203 		dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1204 		    "interrupt %d !!!\n", ioc->name, entries.vector));
1205 		pci_disable_msix(ioc->pdev);
1206 		goto try_ioapic;
1207 	}
1208 
1209 	ioc->pci_irq = entries.vector;
1210 	ioc->msix_enable = 1;
1211 	return 0;
1212 
1213 /* failback to io_apic interrupt routing */
1214  try_ioapic:
1215 
1216 	r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1217 	    ioc->name, ioc);
1218 	if (r) {
1219 		printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1220 		    ioc->name, ioc->pdev->irq);
1221 		r = -EBUSY;
1222 		goto out_fail;
1223 	}
1224 
1225 	ioc->pci_irq = ioc->pdev->irq;
1226 	return 0;
1227 
1228  out_fail:
1229 	return r;
1230 }
1231 
1232 /**
1233  * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1234  * @ioc: per adapter object
1235  *
1236  * Returns 0 for success, non-zero for failure.
1237  */
1238 int
mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER * ioc)1239 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1240 {
1241 	struct pci_dev *pdev = ioc->pdev;
1242 	u32 memap_sz;
1243 	u32 pio_sz;
1244 	int i, r = 0;
1245 	u64 pio_chip = 0;
1246 	u64 chip_phys = 0;
1247 
1248 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1249 	    ioc->name, __func__));
1250 
1251 	ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1252 	if (pci_enable_device_mem(pdev)) {
1253 		printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1254 		    "failed\n", ioc->name);
1255 		return -ENODEV;
1256 	}
1257 
1258 
1259 	if (pci_request_selected_regions(pdev, ioc->bars,
1260 	    MPT2SAS_DRIVER_NAME)) {
1261 		printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1262 		    "failed\n", ioc->name);
1263 		r = -ENODEV;
1264 		goto out_fail;
1265 	}
1266 
1267 	/* AER (Advanced Error Reporting) hooks */
1268 	pci_enable_pcie_error_reporting(pdev);
1269 
1270 	pci_set_master(pdev);
1271 
1272 	if (_base_config_dma_addressing(ioc, pdev) != 0) {
1273 		printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1274 		    ioc->name, pci_name(pdev));
1275 		r = -ENODEV;
1276 		goto out_fail;
1277 	}
1278 
1279 	for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1280 		if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1281 			if (pio_sz)
1282 				continue;
1283 			pio_chip = (u64)pci_resource_start(pdev, i);
1284 			pio_sz = pci_resource_len(pdev, i);
1285 		} else {
1286 			if (memap_sz)
1287 				continue;
1288 			/* verify memory resource is valid before using */
1289 			if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1290 				ioc->chip_phys = pci_resource_start(pdev, i);
1291 				chip_phys = (u64)ioc->chip_phys;
1292 				memap_sz = pci_resource_len(pdev, i);
1293 				ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1294 				if (ioc->chip == NULL) {
1295 					printk(MPT2SAS_ERR_FMT "unable to map "
1296 					    "adapter memory!\n", ioc->name);
1297 					r = -EINVAL;
1298 					goto out_fail;
1299 				}
1300 			}
1301 		}
1302 	}
1303 
1304 	_base_mask_interrupts(ioc);
1305 	r = _base_enable_msix(ioc);
1306 	if (r)
1307 		goto out_fail;
1308 
1309 	printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1310 	    ioc->name,  ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1311 	    "IO-APIC enabled"), ioc->pci_irq);
1312 	printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1313 	    ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1314 	printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1315 	    ioc->name, (unsigned long long)pio_chip, pio_sz);
1316 
1317 	/* Save PCI configuration state for recovery from PCI AER/EEH errors */
1318 	pci_save_state(pdev);
1319 
1320 	return 0;
1321 
1322  out_fail:
1323 	if (ioc->chip_phys)
1324 		iounmap(ioc->chip);
1325 	ioc->chip_phys = 0;
1326 	ioc->pci_irq = -1;
1327 	pci_release_selected_regions(ioc->pdev, ioc->bars);
1328 	pci_disable_pcie_error_reporting(pdev);
1329 	pci_disable_device(pdev);
1330 	return r;
1331 }
1332 
1333 /**
1334  * mpt2sas_base_get_msg_frame - obtain request mf pointer
1335  * @ioc: per adapter object
1336  * @smid: system request message index(smid zero is invalid)
1337  *
1338  * Returns virt pointer to message frame.
1339  */
1340 void *
mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER * ioc,u16 smid)1341 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1342 {
1343 	return (void *)(ioc->request + (smid * ioc->request_sz));
1344 }
1345 
1346 /**
1347  * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1348  * @ioc: per adapter object
1349  * @smid: system request message index
1350  *
1351  * Returns virt pointer to sense buffer.
1352  */
1353 void *
mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER * ioc,u16 smid)1354 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1355 {
1356 	return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1357 }
1358 
1359 /**
1360  * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1361  * @ioc: per adapter object
1362  * @smid: system request message index
1363  *
1364  * Returns phys pointer to the low 32bit address of the sense buffer.
1365  */
1366 __le32
mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER * ioc,u16 smid)1367 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1368 {
1369 	return cpu_to_le32(ioc->sense_dma +
1370 			((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1371 }
1372 
1373 /**
1374  * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1375  * @ioc: per adapter object
1376  * @phys_addr: lower 32 physical addr of the reply
1377  *
1378  * Converts 32bit lower physical addr into a virt address.
1379  */
1380 void *
mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER * ioc,u32 phys_addr)1381 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1382 {
1383 	if (!phys_addr)
1384 		return NULL;
1385 	return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1386 }
1387 
1388 /**
1389  * mpt2sas_base_get_smid - obtain a free smid from internal queue
1390  * @ioc: per adapter object
1391  * @cb_idx: callback index
1392  *
1393  * Returns smid (zero is invalid)
1394  */
1395 u16
mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER * ioc,u8 cb_idx)1396 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1397 {
1398 	unsigned long flags;
1399 	struct request_tracker *request;
1400 	u16 smid;
1401 
1402 	spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1403 	if (list_empty(&ioc->internal_free_list)) {
1404 		spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1405 		printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1406 		    ioc->name, __func__);
1407 		return 0;
1408 	}
1409 
1410 	request = list_entry(ioc->internal_free_list.next,
1411 	    struct request_tracker, tracker_list);
1412 	request->cb_idx = cb_idx;
1413 	smid = request->smid;
1414 	list_del(&request->tracker_list);
1415 	spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1416 	return smid;
1417 }
1418 
1419 /**
1420  * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1421  * @ioc: per adapter object
1422  * @cb_idx: callback index
1423  * @scmd: pointer to scsi command object
1424  *
1425  * Returns smid (zero is invalid)
1426  */
1427 u16
mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER * ioc,u8 cb_idx,struct scsi_cmnd * scmd)1428 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1429     struct scsi_cmnd *scmd)
1430 {
1431 	unsigned long flags;
1432 	struct scsiio_tracker *request;
1433 	u16 smid;
1434 
1435 	spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1436 	if (list_empty(&ioc->free_list)) {
1437 		spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1438 		printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1439 		    ioc->name, __func__);
1440 		return 0;
1441 	}
1442 
1443 	request = list_entry(ioc->free_list.next,
1444 	    struct scsiio_tracker, tracker_list);
1445 	request->scmd = scmd;
1446 	request->cb_idx = cb_idx;
1447 	smid = request->smid;
1448 	list_del(&request->tracker_list);
1449 	spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1450 	return smid;
1451 }
1452 
1453 /**
1454  * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1455  * @ioc: per adapter object
1456  * @cb_idx: callback index
1457  *
1458  * Returns smid (zero is invalid)
1459  */
1460 u16
mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER * ioc,u8 cb_idx)1461 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1462 {
1463 	unsigned long flags;
1464 	struct request_tracker *request;
1465 	u16 smid;
1466 
1467 	spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1468 	if (list_empty(&ioc->hpr_free_list)) {
1469 		spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1470 		return 0;
1471 	}
1472 
1473 	request = list_entry(ioc->hpr_free_list.next,
1474 	    struct request_tracker, tracker_list);
1475 	request->cb_idx = cb_idx;
1476 	smid = request->smid;
1477 	list_del(&request->tracker_list);
1478 	spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1479 	return smid;
1480 }
1481 
1482 
1483 /**
1484  * mpt2sas_base_free_smid - put smid back on free_list
1485  * @ioc: per adapter object
1486  * @smid: system request message index
1487  *
1488  * Return nothing.
1489  */
1490 void
mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER * ioc,u16 smid)1491 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1492 {
1493 	unsigned long flags;
1494 	int i;
1495 	struct chain_tracker *chain_req, *next;
1496 
1497 	spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1498 	if (smid < ioc->hi_priority_smid) {
1499 		/* scsiio queue */
1500 		i = smid - 1;
1501 		if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1502 			list_for_each_entry_safe(chain_req, next,
1503 			    &ioc->scsi_lookup[i].chain_list, tracker_list) {
1504 				list_del_init(&chain_req->tracker_list);
1505 				list_add_tail(&chain_req->tracker_list,
1506 				    &ioc->free_chain_list);
1507 			}
1508 		}
1509 		ioc->scsi_lookup[i].cb_idx = 0xFF;
1510 		ioc->scsi_lookup[i].scmd = NULL;
1511 		list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1512 		    &ioc->free_list);
1513 		spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1514 
1515 		/*
1516 		 * See _wait_for_commands_to_complete() call with regards
1517 		 * to this code.
1518 		 */
1519 		if (ioc->shost_recovery && ioc->pending_io_count) {
1520 			if (ioc->pending_io_count == 1)
1521 				wake_up(&ioc->reset_wq);
1522 			ioc->pending_io_count--;
1523 		}
1524 		return;
1525 	} else if (smid < ioc->internal_smid) {
1526 		/* hi-priority */
1527 		i = smid - ioc->hi_priority_smid;
1528 		ioc->hpr_lookup[i].cb_idx = 0xFF;
1529 		list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1530 		    &ioc->hpr_free_list);
1531 	} else if (smid <= ioc->hba_queue_depth) {
1532 		/* internal queue */
1533 		i = smid - ioc->internal_smid;
1534 		ioc->internal_lookup[i].cb_idx = 0xFF;
1535 		list_add_tail(&ioc->internal_lookup[i].tracker_list,
1536 		    &ioc->internal_free_list);
1537 	}
1538 	spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1539 }
1540 
1541 /**
1542  * _base_writeq - 64 bit write to MMIO
1543  * @ioc: per adapter object
1544  * @b: data payload
1545  * @addr: address in MMIO space
1546  * @writeq_lock: spin lock
1547  *
1548  * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1549  * care of 32 bit environment where its not quarenteed to send the entire word
1550  * in one transfer.
1551  */
1552 #ifndef writeq
_base_writeq(__u64 b,volatile void __iomem * addr,spinlock_t * writeq_lock)1553 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1554     spinlock_t *writeq_lock)
1555 {
1556 	unsigned long flags;
1557 	__u64 data_out = cpu_to_le64(b);
1558 
1559 	spin_lock_irqsave(writeq_lock, flags);
1560 	writel((u32)(data_out), addr);
1561 	writel((u32)(data_out >> 32), (addr + 4));
1562 	spin_unlock_irqrestore(writeq_lock, flags);
1563 }
1564 #else
_base_writeq(__u64 b,volatile void __iomem * addr,spinlock_t * writeq_lock)1565 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1566     spinlock_t *writeq_lock)
1567 {
1568 	writeq(cpu_to_le64(b), addr);
1569 }
1570 #endif
1571 
1572 /**
1573  * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1574  * @ioc: per adapter object
1575  * @smid: system request message index
1576  * @handle: device handle
1577  *
1578  * Return nothing.
1579  */
1580 void
mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER * ioc,u16 smid,u16 handle)1581 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1582 {
1583 	Mpi2RequestDescriptorUnion_t descriptor;
1584 	u64 *request = (u64 *)&descriptor;
1585 
1586 
1587 	descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1588 	descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1589 	descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1590 	descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1591 	descriptor.SCSIIO.LMID = 0;
1592 	_base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1593 	    &ioc->scsi_lookup_lock);
1594 }
1595 
1596 
1597 /**
1598  * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1599  * @ioc: per adapter object
1600  * @smid: system request message index
1601  *
1602  * Return nothing.
1603  */
1604 void
mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER * ioc,u16 smid)1605 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1606 {
1607 	Mpi2RequestDescriptorUnion_t descriptor;
1608 	u64 *request = (u64 *)&descriptor;
1609 
1610 	descriptor.HighPriority.RequestFlags =
1611 	    MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1612 	descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1613 	descriptor.HighPriority.SMID = cpu_to_le16(smid);
1614 	descriptor.HighPriority.LMID = 0;
1615 	descriptor.HighPriority.Reserved1 = 0;
1616 	_base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1617 	    &ioc->scsi_lookup_lock);
1618 }
1619 
1620 /**
1621  * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1622  * @ioc: per adapter object
1623  * @smid: system request message index
1624  *
1625  * Return nothing.
1626  */
1627 void
mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER * ioc,u16 smid)1628 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1629 {
1630 	Mpi2RequestDescriptorUnion_t descriptor;
1631 	u64 *request = (u64 *)&descriptor;
1632 
1633 	descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1634 	descriptor.Default.MSIxIndex = 0; /* TODO */
1635 	descriptor.Default.SMID = cpu_to_le16(smid);
1636 	descriptor.Default.LMID = 0;
1637 	descriptor.Default.DescriptorTypeDependent = 0;
1638 	_base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1639 	    &ioc->scsi_lookup_lock);
1640 }
1641 
1642 /**
1643  * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1644  * @ioc: per adapter object
1645  * @smid: system request message index
1646  * @io_index: value used to track the IO
1647  *
1648  * Return nothing.
1649  */
1650 void
mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER * ioc,u16 smid,u16 io_index)1651 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1652     u16 io_index)
1653 {
1654 	Mpi2RequestDescriptorUnion_t descriptor;
1655 	u64 *request = (u64 *)&descriptor;
1656 
1657 	descriptor.SCSITarget.RequestFlags =
1658 	    MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1659 	descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1660 	descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1661 	descriptor.SCSITarget.LMID = 0;
1662 	descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1663 	_base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1664 	    &ioc->scsi_lookup_lock);
1665 }
1666 
1667 /**
1668  * _base_display_dell_branding - Disply branding string
1669  * @ioc: per adapter object
1670  *
1671  * Return nothing.
1672  */
1673 static void
_base_display_dell_branding(struct MPT2SAS_ADAPTER * ioc)1674 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1675 {
1676 	char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1677 
1678 	if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1679 		return;
1680 
1681 	memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1682 	switch (ioc->pdev->subsystem_device) {
1683 	case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1684 		strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1685 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1686 		break;
1687 	case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1688 		strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1689 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1690 		break;
1691 	case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1692 		strncpy(dell_branding,
1693 		    MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1694 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1695 		break;
1696 	case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1697 		strncpy(dell_branding,
1698 		    MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1699 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1700 		break;
1701 	case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1702 		strncpy(dell_branding,
1703 		    MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1704 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1705 		break;
1706 	case MPT2SAS_DELL_PERC_H200_SSDID:
1707 		strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1708 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1709 		break;
1710 	case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1711 		strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1712 		    MPT2SAS_DELL_BRANDING_SIZE - 1);
1713 		break;
1714 	default:
1715 		sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1716 		break;
1717 	}
1718 
1719 	printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1720 	    " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1721 	    ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1722 	    ioc->pdev->subsystem_device);
1723 }
1724 
1725 /**
1726  * _base_display_intel_branding - Display branding string
1727  * @ioc: per adapter object
1728  *
1729  * Return nothing.
1730  */
1731 static void
_base_display_intel_branding(struct MPT2SAS_ADAPTER * ioc)1732 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1733 {
1734 	if (ioc->pdev->subsystem_vendor == PCI_VENDOR_ID_INTEL &&
1735 	    ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008) {
1736 
1737 		switch (ioc->pdev->subsystem_device) {
1738 		case MPT2SAS_INTEL_RMS2LL080_SSDID:
1739 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1740 			    MPT2SAS_INTEL_RMS2LL080_BRANDING);
1741 			break;
1742 		case MPT2SAS_INTEL_RMS2LL040_SSDID:
1743 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1744 			    MPT2SAS_INTEL_RMS2LL040_BRANDING);
1745 			break;
1746 		}
1747 	}
1748 }
1749 
1750 /**
1751  * _base_display_hp_branding - Display branding string
1752  * @ioc: per adapter object
1753  *
1754  * Return nothing.
1755  */
1756 static void
_base_display_hp_branding(struct MPT2SAS_ADAPTER * ioc)1757 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
1758 {
1759 	if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
1760 		return;
1761 
1762 	switch (ioc->pdev->device) {
1763 	case MPI2_MFGPAGE_DEVID_SAS2004:
1764 		switch (ioc->pdev->subsystem_device) {
1765 		case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
1766 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1767 			    MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
1768 			break;
1769 		default:
1770 			break;
1771 		}
1772 	case MPI2_MFGPAGE_DEVID_SAS2308_2:
1773 		switch (ioc->pdev->subsystem_device) {
1774 		case MPT2SAS_HP_2_4_INTERNAL_SSDID:
1775 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1776 			    MPT2SAS_HP_2_4_INTERNAL_BRANDING);
1777 			break;
1778 		case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
1779 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1780 			    MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
1781 			break;
1782 		case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
1783 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1784 			    MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
1785 			break;
1786 		case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
1787 			printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1788 			    MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
1789 			break;
1790 		default:
1791 			break;
1792 		}
1793 	default:
1794 		break;
1795 	}
1796 }
1797 
1798 /**
1799  * _base_display_ioc_capabilities - Disply IOC's capabilities.
1800  * @ioc: per adapter object
1801  *
1802  * Return nothing.
1803  */
1804 static void
_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER * ioc)1805 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1806 {
1807 	int i = 0;
1808 	char desc[16];
1809 	u8 revision;
1810 	u32 iounit_pg1_flags;
1811 
1812 	pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1813 	strncpy(desc, ioc->manu_pg0.ChipName, 16);
1814 	printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1815 	   "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1816 	    ioc->name, desc,
1817 	   (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1818 	   (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1819 	   (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1820 	   ioc->facts.FWVersion.Word & 0x000000FF,
1821 	   revision,
1822 	   (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1823 	   (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1824 	   (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1825 	    ioc->bios_pg3.BiosVersion & 0x000000FF);
1826 
1827 	_base_display_dell_branding(ioc);
1828 	_base_display_intel_branding(ioc);
1829 	_base_display_hp_branding(ioc);
1830 
1831 	printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1832 
1833 	if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1834 		printk("Initiator");
1835 		i++;
1836 	}
1837 
1838 	if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1839 		printk("%sTarget", i ? "," : "");
1840 		i++;
1841 	}
1842 
1843 	i = 0;
1844 	printk("), ");
1845 	printk("Capabilities=(");
1846 
1847 	if (ioc->facts.IOCCapabilities &
1848 	    MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1849 		printk("Raid");
1850 		i++;
1851 	}
1852 
1853 	if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1854 		printk("%sTLR", i ? "," : "");
1855 		i++;
1856 	}
1857 
1858 	if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1859 		printk("%sMulticast", i ? "," : "");
1860 		i++;
1861 	}
1862 
1863 	if (ioc->facts.IOCCapabilities &
1864 	    MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1865 		printk("%sBIDI Target", i ? "," : "");
1866 		i++;
1867 	}
1868 
1869 	if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1870 		printk("%sEEDP", i ? "," : "");
1871 		i++;
1872 	}
1873 
1874 	if (ioc->facts.IOCCapabilities &
1875 	    MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1876 		printk("%sSnapshot Buffer", i ? "," : "");
1877 		i++;
1878 	}
1879 
1880 	if (ioc->facts.IOCCapabilities &
1881 	    MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1882 		printk("%sDiag Trace Buffer", i ? "," : "");
1883 		i++;
1884 	}
1885 
1886 	if (ioc->facts.IOCCapabilities &
1887 	    MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
1888 		printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
1889 		i++;
1890 	}
1891 
1892 	if (ioc->facts.IOCCapabilities &
1893 	    MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1894 		printk("%sTask Set Full", i ? "," : "");
1895 		i++;
1896 	}
1897 
1898 	iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1899 	if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1900 		printk("%sNCQ", i ? "," : "");
1901 		i++;
1902 	}
1903 
1904 	printk(")\n");
1905 }
1906 
1907 /**
1908  * _base_update_missing_delay - change the missing delay timers
1909  * @ioc: per adapter object
1910  * @device_missing_delay: amount of time till device is reported missing
1911  * @io_missing_delay: interval IO is returned when there is a missing device
1912  *
1913  * Return nothing.
1914  *
1915  * Passed on the command line, this function will modify the device missing
1916  * delay, as well as the io missing delay. This should be called at driver
1917  * load time.
1918  */
1919 static void
_base_update_missing_delay(struct MPT2SAS_ADAPTER * ioc,u16 device_missing_delay,u8 io_missing_delay)1920 _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
1921 	u16 device_missing_delay, u8 io_missing_delay)
1922 {
1923 	u16 dmd, dmd_new, dmd_orignal;
1924 	u8 io_missing_delay_original;
1925 	u16 sz;
1926 	Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
1927 	Mpi2ConfigReply_t mpi_reply;
1928 	u8 num_phys = 0;
1929 	u16 ioc_status;
1930 
1931 	mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
1932 	if (!num_phys)
1933 		return;
1934 
1935 	sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
1936 	    sizeof(Mpi2SasIOUnit1PhyData_t));
1937 	sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
1938 	if (!sas_iounit_pg1) {
1939 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1940 		    ioc->name, __FILE__, __LINE__, __func__);
1941 		goto out;
1942 	}
1943 	if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
1944 	    sas_iounit_pg1, sz))) {
1945 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1946 		    ioc->name, __FILE__, __LINE__, __func__);
1947 		goto out;
1948 	}
1949 	ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
1950 	    MPI2_IOCSTATUS_MASK;
1951 	if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
1952 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1953 		    ioc->name, __FILE__, __LINE__, __func__);
1954 		goto out;
1955 	}
1956 
1957 	/* device missing delay */
1958 	dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
1959 	if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
1960 		dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
1961 	else
1962 		dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
1963 	dmd_orignal = dmd;
1964 	if (device_missing_delay > 0x7F) {
1965 		dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
1966 		    device_missing_delay;
1967 		dmd = dmd / 16;
1968 		dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
1969 	} else
1970 		dmd = device_missing_delay;
1971 	sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
1972 
1973 	/* io missing delay */
1974 	io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
1975 	sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
1976 
1977 	if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
1978 	    sz)) {
1979 		if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
1980 			dmd_new = (dmd &
1981 			    MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
1982 		else
1983 			dmd_new =
1984 		    dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
1985 		printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
1986 		    "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
1987 		printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
1988 		    "new(%d)\n", ioc->name, io_missing_delay_original,
1989 		    io_missing_delay);
1990 		ioc->device_missing_delay = dmd_new;
1991 		ioc->io_missing_delay = io_missing_delay;
1992 	}
1993 
1994 out:
1995 	kfree(sas_iounit_pg1);
1996 }
1997 
1998 /**
1999  * _base_static_config_pages - static start of day config pages
2000  * @ioc: per adapter object
2001  *
2002  * Return nothing.
2003  */
2004 static void
_base_static_config_pages(struct MPT2SAS_ADAPTER * ioc)2005 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2006 {
2007 	Mpi2ConfigReply_t mpi_reply;
2008 	u32 iounit_pg1_flags;
2009 
2010 	mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2011 	if (ioc->ir_firmware)
2012 		mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2013 		    &ioc->manu_pg10);
2014 	mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2015 	mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2016 	mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2017 	mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2018 	mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2019 	_base_display_ioc_capabilities(ioc);
2020 
2021 	/*
2022 	 * Enable task_set_full handling in iounit_pg1 when the
2023 	 * facts capabilities indicate that its supported.
2024 	 */
2025 	iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2026 	if ((ioc->facts.IOCCapabilities &
2027 	    MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2028 		iounit_pg1_flags &=
2029 		    ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2030 	else
2031 		iounit_pg1_flags |=
2032 		    MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2033 	ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2034 	mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2035 
2036 }
2037 
2038 /**
2039  * _base_release_memory_pools - release memory
2040  * @ioc: per adapter object
2041  *
2042  * Free memory allocated from _base_allocate_memory_pools.
2043  *
2044  * Return nothing.
2045  */
2046 static void
_base_release_memory_pools(struct MPT2SAS_ADAPTER * ioc)2047 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2048 {
2049 	int i;
2050 
2051 	dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2052 	    __func__));
2053 
2054 	if (ioc->request) {
2055 		pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2056 		    ioc->request,  ioc->request_dma);
2057 		dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2058 		    ": free\n", ioc->name, ioc->request));
2059 		ioc->request = NULL;
2060 	}
2061 
2062 	if (ioc->sense) {
2063 		pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2064 		if (ioc->sense_dma_pool)
2065 			pci_pool_destroy(ioc->sense_dma_pool);
2066 		dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2067 		    ": free\n", ioc->name, ioc->sense));
2068 		ioc->sense = NULL;
2069 	}
2070 
2071 	if (ioc->reply) {
2072 		pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2073 		if (ioc->reply_dma_pool)
2074 			pci_pool_destroy(ioc->reply_dma_pool);
2075 		dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2076 		     ": free\n", ioc->name, ioc->reply));
2077 		ioc->reply = NULL;
2078 	}
2079 
2080 	if (ioc->reply_free) {
2081 		pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2082 		    ioc->reply_free_dma);
2083 		if (ioc->reply_free_dma_pool)
2084 			pci_pool_destroy(ioc->reply_free_dma_pool);
2085 		dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2086 		    "(0x%p): free\n", ioc->name, ioc->reply_free));
2087 		ioc->reply_free = NULL;
2088 	}
2089 
2090 	if (ioc->reply_post_free) {
2091 		pci_pool_free(ioc->reply_post_free_dma_pool,
2092 		    ioc->reply_post_free, ioc->reply_post_free_dma);
2093 		if (ioc->reply_post_free_dma_pool)
2094 			pci_pool_destroy(ioc->reply_post_free_dma_pool);
2095 		dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2096 		    "reply_post_free_pool(0x%p): free\n", ioc->name,
2097 		    ioc->reply_post_free));
2098 		ioc->reply_post_free = NULL;
2099 	}
2100 
2101 	if (ioc->config_page) {
2102 		dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2103 		    "config_page(0x%p): free\n", ioc->name,
2104 		    ioc->config_page));
2105 		pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2106 		    ioc->config_page, ioc->config_page_dma);
2107 	}
2108 
2109 	if (ioc->scsi_lookup) {
2110 		free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2111 		ioc->scsi_lookup = NULL;
2112 	}
2113 	kfree(ioc->hpr_lookup);
2114 	kfree(ioc->internal_lookup);
2115 	if (ioc->chain_lookup) {
2116 		for (i = 0; i < ioc->chain_depth; i++) {
2117 			if (ioc->chain_lookup[i].chain_buffer)
2118 				pci_pool_free(ioc->chain_dma_pool,
2119 				    ioc->chain_lookup[i].chain_buffer,
2120 				    ioc->chain_lookup[i].chain_buffer_dma);
2121 		}
2122 		if (ioc->chain_dma_pool)
2123 			pci_pool_destroy(ioc->chain_dma_pool);
2124 	}
2125 	if (ioc->chain_lookup) {
2126 		free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2127 		ioc->chain_lookup = NULL;
2128 	}
2129 }
2130 
2131 
2132 /**
2133  * _base_allocate_memory_pools - allocate start of day memory pools
2134  * @ioc: per adapter object
2135  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2136  *
2137  * Returns 0 success, anything else error
2138  */
2139 static int
_base_allocate_memory_pools(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)2140 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc,  int sleep_flag)
2141 {
2142 	Mpi2IOCFactsReply_t *facts;
2143 	u32 queue_size, queue_diff;
2144 	u16 max_sge_elements;
2145 	u16 num_of_reply_frames;
2146 	u16 chains_needed_per_io;
2147 	u32 sz, total_sz;
2148 	u32 retry_sz;
2149 	u16 max_request_credit;
2150 	int i;
2151 
2152 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2153 	    __func__));
2154 
2155 	retry_sz = 0;
2156 	facts = &ioc->facts;
2157 
2158 	/* command line tunables  for max sgl entries */
2159 	if (max_sgl_entries != -1) {
2160 		ioc->shost->sg_tablesize = (max_sgl_entries <
2161 		    MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2162 		    MPT2SAS_SG_DEPTH;
2163 	} else {
2164 		ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2165 	}
2166 
2167 	/* command line tunables  for max controller queue depth */
2168 	if (max_queue_depth != -1)
2169 		max_request_credit = (max_queue_depth < facts->RequestCredit)
2170 		    ? max_queue_depth : facts->RequestCredit;
2171 	else
2172 		max_request_credit = facts->RequestCredit;
2173 
2174 	ioc->hba_queue_depth = max_request_credit;
2175 	ioc->hi_priority_depth = facts->HighPriorityCredit;
2176 	ioc->internal_depth = ioc->hi_priority_depth + 5;
2177 
2178 	/* request frame size */
2179 	ioc->request_sz = facts->IOCRequestFrameSize * 4;
2180 
2181 	/* reply frame size */
2182 	ioc->reply_sz = facts->ReplyFrameSize * 4;
2183 
2184  retry_allocation:
2185 	total_sz = 0;
2186 	/* calculate number of sg elements left over in the 1st frame */
2187 	max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2188 	    sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2189 	ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2190 
2191 	/* now do the same for a chain buffer */
2192 	max_sge_elements = ioc->request_sz - ioc->sge_size;
2193 	ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2194 
2195 	ioc->chain_offset_value_for_main_message =
2196 	    ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2197 	     (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2198 
2199 	/*
2200 	 *  MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2201 	 */
2202 	chains_needed_per_io = ((ioc->shost->sg_tablesize -
2203 	   ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2204 	    + 1;
2205 	if (chains_needed_per_io > facts->MaxChainDepth) {
2206 		chains_needed_per_io = facts->MaxChainDepth;
2207 		ioc->shost->sg_tablesize = min_t(u16,
2208 		ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2209 		* chains_needed_per_io), ioc->shost->sg_tablesize);
2210 	}
2211 	ioc->chains_needed_per_io = chains_needed_per_io;
2212 
2213 	/* reply free queue sizing - taking into account for events */
2214 	num_of_reply_frames = ioc->hba_queue_depth + 32;
2215 
2216 	/* number of replies frames can't be a multiple of 16 */
2217 	/* decrease number of reply frames by 1 */
2218 	if (!(num_of_reply_frames % 16))
2219 		num_of_reply_frames--;
2220 
2221 	/* calculate number of reply free queue entries
2222 	 *  (must be multiple of 16)
2223 	 */
2224 
2225 	/* (we know reply_free_queue_depth is not a multiple of 16) */
2226 	queue_size = num_of_reply_frames;
2227 	queue_size += 16 - (queue_size % 16);
2228 	ioc->reply_free_queue_depth = queue_size;
2229 
2230 	/* reply descriptor post queue sizing */
2231 	/* this size should be the number of request frames + number of reply
2232 	 * frames
2233 	 */
2234 
2235 	queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2236 	/* round up to 16 byte boundary */
2237 	if (queue_size % 16)
2238 		queue_size += 16 - (queue_size % 16);
2239 
2240 	/* check against IOC maximum reply post queue depth */
2241 	if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2242 		queue_diff = queue_size -
2243 		    facts->MaxReplyDescriptorPostQueueDepth;
2244 
2245 		/* round queue_diff up to multiple of 16 */
2246 		if (queue_diff % 16)
2247 			queue_diff += 16 - (queue_diff % 16);
2248 
2249 		/* adjust hba_queue_depth, reply_free_queue_depth,
2250 		 * and queue_size
2251 		 */
2252 		ioc->hba_queue_depth -= (queue_diff / 2);
2253 		ioc->reply_free_queue_depth -= (queue_diff / 2);
2254 		queue_size = facts->MaxReplyDescriptorPostQueueDepth;
2255 	}
2256 	ioc->reply_post_queue_depth = queue_size;
2257 
2258 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2259 	    "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2260 	    "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2261 	    ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2262 	    ioc->chains_needed_per_io));
2263 
2264 	ioc->scsiio_depth = ioc->hba_queue_depth -
2265 	    ioc->hi_priority_depth - ioc->internal_depth;
2266 
2267 	/* set the scsi host can_queue depth
2268 	 * with some internal commands that could be outstanding
2269 	 */
2270 	ioc->shost->can_queue = ioc->scsiio_depth - (2);
2271 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2272 	    "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2273 
2274 	/* contiguous pool for request and chains, 16 byte align, one extra "
2275 	 * "frame for smid=0
2276 	 */
2277 	ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2278 	sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2279 
2280 	/* hi-priority queue */
2281 	sz += (ioc->hi_priority_depth * ioc->request_sz);
2282 
2283 	/* internal queue */
2284 	sz += (ioc->internal_depth * ioc->request_sz);
2285 
2286 	ioc->request_dma_sz = sz;
2287 	ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2288 	if (!ioc->request) {
2289 		printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2290 		    "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2291 		    "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2292 		    ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2293 		if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2294 			goto out;
2295 		retry_sz += 64;
2296 		ioc->hba_queue_depth = max_request_credit - retry_sz;
2297 		goto retry_allocation;
2298 	}
2299 
2300 	if (retry_sz)
2301 		printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2302 		    "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2303 		    "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2304 		    ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2305 
2306 
2307 	/* hi-priority queue */
2308 	ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2309 	    ioc->request_sz);
2310 	ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2311 	    ioc->request_sz);
2312 
2313 	/* internal queue */
2314 	ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2315 	    ioc->request_sz);
2316 	ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2317 	    ioc->request_sz);
2318 
2319 
2320 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2321 	    "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2322 	    ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2323 	    (ioc->hba_queue_depth * ioc->request_sz)/1024));
2324 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2325 	    ioc->name, (unsigned long long) ioc->request_dma));
2326 	total_sz += sz;
2327 
2328 	sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2329 	ioc->scsi_lookup_pages = get_order(sz);
2330 	ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2331 	    GFP_KERNEL, ioc->scsi_lookup_pages);
2332 	if (!ioc->scsi_lookup) {
2333 		printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2334 		    "sz(%d)\n", ioc->name, (int)sz);
2335 		goto out;
2336 	}
2337 
2338 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2339 	    "depth(%d)\n", ioc->name, ioc->request,
2340 	    ioc->scsiio_depth));
2341 
2342 	/* loop till the allocation succeeds */
2343 	do {
2344 		sz = ioc->chain_depth * sizeof(struct chain_tracker);
2345 		ioc->chain_pages = get_order(sz);
2346 		ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2347 		    GFP_KERNEL, ioc->chain_pages);
2348 		if (ioc->chain_lookup == NULL)
2349 			ioc->chain_depth -= 100;
2350 	} while (ioc->chain_lookup == NULL);
2351 	ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2352 	    ioc->request_sz, 16, 0);
2353 	if (!ioc->chain_dma_pool) {
2354 		printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2355 		    "failed\n", ioc->name);
2356 		goto out;
2357 	}
2358 	for (i = 0; i < ioc->chain_depth; i++) {
2359 		ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2360 		    ioc->chain_dma_pool , GFP_KERNEL,
2361 		    &ioc->chain_lookup[i].chain_buffer_dma);
2362 		if (!ioc->chain_lookup[i].chain_buffer) {
2363 			ioc->chain_depth = i;
2364 			goto chain_done;
2365 		}
2366 		total_sz += ioc->request_sz;
2367 	}
2368 chain_done:
2369 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2370 	    "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2371 	    ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2372 	    ioc->request_sz))/1024));
2373 
2374 	/* initialize hi-priority queue smid's */
2375 	ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2376 	    sizeof(struct request_tracker), GFP_KERNEL);
2377 	if (!ioc->hpr_lookup) {
2378 		printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2379 		    ioc->name);
2380 		goto out;
2381 	}
2382 	ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2383 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2384 	    "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2385 	    ioc->hi_priority_depth, ioc->hi_priority_smid));
2386 
2387 	/* initialize internal queue smid's */
2388 	ioc->internal_lookup = kcalloc(ioc->internal_depth,
2389 	    sizeof(struct request_tracker), GFP_KERNEL);
2390 	if (!ioc->internal_lookup) {
2391 		printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2392 		    ioc->name);
2393 		goto out;
2394 	}
2395 	ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2396 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2397 	    "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2398 	     ioc->internal_depth, ioc->internal_smid));
2399 
2400 	/* sense buffers, 4 byte align */
2401 	sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2402 	ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2403 	    0);
2404 	if (!ioc->sense_dma_pool) {
2405 		printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2406 		    ioc->name);
2407 		goto out;
2408 	}
2409 	ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2410 	    &ioc->sense_dma);
2411 	if (!ioc->sense) {
2412 		printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2413 		    ioc->name);
2414 		goto out;
2415 	}
2416 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2417 	    "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2418 	    "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2419 	    SCSI_SENSE_BUFFERSIZE, sz/1024));
2420 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2421 	    ioc->name, (unsigned long long)ioc->sense_dma));
2422 	total_sz += sz;
2423 
2424 	/* reply pool, 4 byte align */
2425 	sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2426 	ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2427 	    0);
2428 	if (!ioc->reply_dma_pool) {
2429 		printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2430 		    ioc->name);
2431 		goto out;
2432 	}
2433 	ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2434 	    &ioc->reply_dma);
2435 	if (!ioc->reply) {
2436 		printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2437 		    ioc->name);
2438 		goto out;
2439 	}
2440 	ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2441 	ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2442 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2443 	    "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2444 	    ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2445 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2446 	    ioc->name, (unsigned long long)ioc->reply_dma));
2447 	total_sz += sz;
2448 
2449 	/* reply free queue, 16 byte align */
2450 	sz = ioc->reply_free_queue_depth * 4;
2451 	ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2452 	    ioc->pdev, sz, 16, 0);
2453 	if (!ioc->reply_free_dma_pool) {
2454 		printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2455 		    "failed\n", ioc->name);
2456 		goto out;
2457 	}
2458 	ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2459 	    &ioc->reply_free_dma);
2460 	if (!ioc->reply_free) {
2461 		printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2462 		    "failed\n", ioc->name);
2463 		goto out;
2464 	}
2465 	memset(ioc->reply_free, 0, sz);
2466 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2467 	    "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2468 	    ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2469 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2470 	    "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2471 	total_sz += sz;
2472 
2473 	/* reply post queue, 16 byte align */
2474 	sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
2475 	ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2476 	    ioc->pdev, sz, 16, 0);
2477 	if (!ioc->reply_post_free_dma_pool) {
2478 		printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2479 		    "failed\n", ioc->name);
2480 		goto out;
2481 	}
2482 	ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2483 	    GFP_KERNEL, &ioc->reply_post_free_dma);
2484 	if (!ioc->reply_post_free) {
2485 		printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2486 		    "failed\n", ioc->name);
2487 		goto out;
2488 	}
2489 	memset(ioc->reply_post_free, 0, sz);
2490 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2491 	    "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2492 	    ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2493 	    sz/1024));
2494 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2495 	    "(0x%llx)\n", ioc->name, (unsigned long long)
2496 	    ioc->reply_post_free_dma));
2497 	total_sz += sz;
2498 
2499 	ioc->config_page_sz = 512;
2500 	ioc->config_page = pci_alloc_consistent(ioc->pdev,
2501 	    ioc->config_page_sz, &ioc->config_page_dma);
2502 	if (!ioc->config_page) {
2503 		printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2504 		    "failed\n", ioc->name);
2505 		goto out;
2506 	}
2507 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2508 	    "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2509 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2510 	    "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2511 	total_sz += ioc->config_page_sz;
2512 
2513 	printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2514 	    ioc->name, total_sz/1024);
2515 	printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2516 	    "Max Controller Queue Depth(%d)\n",
2517 	    ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2518 	printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2519 	    ioc->name, ioc->shost->sg_tablesize);
2520 	return 0;
2521 
2522  out:
2523 	return -ENOMEM;
2524 }
2525 
2526 
2527 /**
2528  * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2529  * @ioc: Pointer to MPT_ADAPTER structure
2530  * @cooked: Request raw or cooked IOC state
2531  *
2532  * Returns all IOC Doorbell register bits if cooked==0, else just the
2533  * Doorbell bits in MPI_IOC_STATE_MASK.
2534  */
2535 u32
mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER * ioc,int cooked)2536 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2537 {
2538 	u32 s, sc;
2539 
2540 	s = readl(&ioc->chip->Doorbell);
2541 	sc = s & MPI2_IOC_STATE_MASK;
2542 	return cooked ? sc : s;
2543 }
2544 
2545 /**
2546  * _base_wait_on_iocstate - waiting on a particular ioc state
2547  * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2548  * @timeout: timeout in second
2549  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2550  *
2551  * Returns 0 for success, non-zero for failure.
2552  */
2553 static int
_base_wait_on_iocstate(struct MPT2SAS_ADAPTER * ioc,u32 ioc_state,int timeout,int sleep_flag)2554 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2555     int sleep_flag)
2556 {
2557 	u32 count, cntdn;
2558 	u32 current_state;
2559 
2560 	count = 0;
2561 	cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2562 	do {
2563 		current_state = mpt2sas_base_get_iocstate(ioc, 1);
2564 		if (current_state == ioc_state)
2565 			return 0;
2566 		if (count && current_state == MPI2_IOC_STATE_FAULT)
2567 			break;
2568 		if (sleep_flag == CAN_SLEEP)
2569 			msleep(1);
2570 		else
2571 			udelay(500);
2572 		count++;
2573 	} while (--cntdn);
2574 
2575 	return current_state;
2576 }
2577 
2578 /**
2579  * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2580  * a write to the doorbell)
2581  * @ioc: per adapter object
2582  * @timeout: timeout in second
2583  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2584  *
2585  * Returns 0 for success, non-zero for failure.
2586  *
2587  * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2588  */
2589 static int
_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER * ioc,int timeout,int sleep_flag)2590 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2591     int sleep_flag)
2592 {
2593 	u32 cntdn, count;
2594 	u32 int_status;
2595 
2596 	count = 0;
2597 	cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2598 	do {
2599 		int_status = readl(&ioc->chip->HostInterruptStatus);
2600 		if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2601 			dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2602 			    "successful count(%d), timeout(%d)\n", ioc->name,
2603 			    __func__, count, timeout));
2604 			return 0;
2605 		}
2606 		if (sleep_flag == CAN_SLEEP)
2607 			msleep(1);
2608 		else
2609 			udelay(500);
2610 		count++;
2611 	} while (--cntdn);
2612 
2613 	printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2614 	    "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2615 	return -EFAULT;
2616 }
2617 
2618 /**
2619  * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2620  * @ioc: per adapter object
2621  * @timeout: timeout in second
2622  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2623  *
2624  * Returns 0 for success, non-zero for failure.
2625  *
2626  * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2627  * doorbell.
2628  */
2629 static int
_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER * ioc,int timeout,int sleep_flag)2630 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2631     int sleep_flag)
2632 {
2633 	u32 cntdn, count;
2634 	u32 int_status;
2635 	u32 doorbell;
2636 
2637 	count = 0;
2638 	cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2639 	do {
2640 		int_status = readl(&ioc->chip->HostInterruptStatus);
2641 		if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2642 			dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2643 			    "successful count(%d), timeout(%d)\n", ioc->name,
2644 			    __func__, count, timeout));
2645 			return 0;
2646 		} else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2647 			doorbell = readl(&ioc->chip->Doorbell);
2648 			if ((doorbell & MPI2_IOC_STATE_MASK) ==
2649 			    MPI2_IOC_STATE_FAULT) {
2650 				mpt2sas_base_fault_info(ioc , doorbell);
2651 				return -EFAULT;
2652 			}
2653 		} else if (int_status == 0xFFFFFFFF)
2654 			goto out;
2655 
2656 		if (sleep_flag == CAN_SLEEP)
2657 			msleep(1);
2658 		else
2659 			udelay(500);
2660 		count++;
2661 	} while (--cntdn);
2662 
2663  out:
2664 	printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2665 	    "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2666 	return -EFAULT;
2667 }
2668 
2669 /**
2670  * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2671  * @ioc: per adapter object
2672  * @timeout: timeout in second
2673  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2674  *
2675  * Returns 0 for success, non-zero for failure.
2676  *
2677  */
2678 static int
_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER * ioc,int timeout,int sleep_flag)2679 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2680     int sleep_flag)
2681 {
2682 	u32 cntdn, count;
2683 	u32 doorbell_reg;
2684 
2685 	count = 0;
2686 	cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2687 	do {
2688 		doorbell_reg = readl(&ioc->chip->Doorbell);
2689 		if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2690 			dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2691 			    "successful count(%d), timeout(%d)\n", ioc->name,
2692 			    __func__, count, timeout));
2693 			return 0;
2694 		}
2695 		if (sleep_flag == CAN_SLEEP)
2696 			msleep(1);
2697 		else
2698 			udelay(500);
2699 		count++;
2700 	} while (--cntdn);
2701 
2702 	printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2703 	    "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2704 	return -EFAULT;
2705 }
2706 
2707 /**
2708  * _base_send_ioc_reset - send doorbell reset
2709  * @ioc: per adapter object
2710  * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2711  * @timeout: timeout in second
2712  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2713  *
2714  * Returns 0 for success, non-zero for failure.
2715  */
2716 static int
_base_send_ioc_reset(struct MPT2SAS_ADAPTER * ioc,u8 reset_type,int timeout,int sleep_flag)2717 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2718     int sleep_flag)
2719 {
2720 	u32 ioc_state;
2721 	int r = 0;
2722 
2723 	if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2724 		printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2725 		    ioc->name, __func__);
2726 		return -EFAULT;
2727 	}
2728 
2729 	if (!(ioc->facts.IOCCapabilities &
2730 	   MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2731 		return -EFAULT;
2732 
2733 	printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2734 
2735 	writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2736 	    &ioc->chip->Doorbell);
2737 	if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2738 		r = -EFAULT;
2739 		goto out;
2740 	}
2741 	ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2742 	    timeout, sleep_flag);
2743 	if (ioc_state) {
2744 		printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2745 		    " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2746 		r = -EFAULT;
2747 		goto out;
2748 	}
2749  out:
2750 	printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2751 	    ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2752 	return r;
2753 }
2754 
2755 /**
2756  * _base_handshake_req_reply_wait - send request thru doorbell interface
2757  * @ioc: per adapter object
2758  * @request_bytes: request length
2759  * @request: pointer having request payload
2760  * @reply_bytes: reply length
2761  * @reply: pointer to reply payload
2762  * @timeout: timeout in second
2763  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2764  *
2765  * Returns 0 for success, non-zero for failure.
2766  */
2767 static int
_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER * ioc,int request_bytes,u32 * request,int reply_bytes,u16 * reply,int timeout,int sleep_flag)2768 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2769     u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2770 {
2771 	MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2772 	int i;
2773 	u8 failed;
2774 	u16 dummy;
2775 	u32 *mfp;
2776 
2777 	/* make sure doorbell is not in use */
2778 	if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2779 		printk(MPT2SAS_ERR_FMT "doorbell is in use "
2780 		    " (line=%d)\n", ioc->name, __LINE__);
2781 		return -EFAULT;
2782 	}
2783 
2784 	/* clear pending doorbell interrupts from previous state changes */
2785 	if (readl(&ioc->chip->HostInterruptStatus) &
2786 	    MPI2_HIS_IOC2SYS_DB_STATUS)
2787 		writel(0, &ioc->chip->HostInterruptStatus);
2788 
2789 	/* send message to ioc */
2790 	writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2791 	    ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2792 	    &ioc->chip->Doorbell);
2793 
2794 	if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2795 		printk(MPT2SAS_ERR_FMT "doorbell handshake "
2796 		   "int failed (line=%d)\n", ioc->name, __LINE__);
2797 		return -EFAULT;
2798 	}
2799 	writel(0, &ioc->chip->HostInterruptStatus);
2800 
2801 	if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2802 		printk(MPT2SAS_ERR_FMT "doorbell handshake "
2803 		    "ack failed (line=%d)\n", ioc->name, __LINE__);
2804 		return -EFAULT;
2805 	}
2806 
2807 	/* send message 32-bits at a time */
2808 	for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2809 		writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2810 		if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2811 			failed = 1;
2812 	}
2813 
2814 	if (failed) {
2815 		printk(MPT2SAS_ERR_FMT "doorbell handshake "
2816 		    "sending request failed (line=%d)\n", ioc->name, __LINE__);
2817 		return -EFAULT;
2818 	}
2819 
2820 	/* now wait for the reply */
2821 	if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2822 		printk(MPT2SAS_ERR_FMT "doorbell handshake "
2823 		   "int failed (line=%d)\n", ioc->name, __LINE__);
2824 		return -EFAULT;
2825 	}
2826 
2827 	/* read the first two 16-bits, it gives the total length of the reply */
2828 	reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2829 	    & MPI2_DOORBELL_DATA_MASK);
2830 	writel(0, &ioc->chip->HostInterruptStatus);
2831 	if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2832 		printk(MPT2SAS_ERR_FMT "doorbell handshake "
2833 		   "int failed (line=%d)\n", ioc->name, __LINE__);
2834 		return -EFAULT;
2835 	}
2836 	reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2837 	    & MPI2_DOORBELL_DATA_MASK);
2838 	writel(0, &ioc->chip->HostInterruptStatus);
2839 
2840 	for (i = 2; i < default_reply->MsgLength * 2; i++)  {
2841 		if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2842 			printk(MPT2SAS_ERR_FMT "doorbell "
2843 			    "handshake int failed (line=%d)\n", ioc->name,
2844 			    __LINE__);
2845 			return -EFAULT;
2846 		}
2847 		if (i >=  reply_bytes/2) /* overflow case */
2848 			dummy = readl(&ioc->chip->Doorbell);
2849 		else
2850 			reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2851 			    & MPI2_DOORBELL_DATA_MASK);
2852 		writel(0, &ioc->chip->HostInterruptStatus);
2853 	}
2854 
2855 	_base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2856 	if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2857 		dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2858 		    " (line=%d)\n", ioc->name, __LINE__));
2859 	}
2860 	writel(0, &ioc->chip->HostInterruptStatus);
2861 
2862 	if (ioc->logging_level & MPT_DEBUG_INIT) {
2863 		mfp = (u32 *)reply;
2864 		printk(KERN_INFO "\toffset:data\n");
2865 		for (i = 0; i < reply_bytes/4; i++)
2866 			printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
2867 			    le32_to_cpu(mfp[i]));
2868 	}
2869 	return 0;
2870 }
2871 
2872 /**
2873  * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2874  * @ioc: per adapter object
2875  * @mpi_reply: the reply payload from FW
2876  * @mpi_request: the request payload sent to FW
2877  *
2878  * The SAS IO Unit Control Request message allows the host to perform low-level
2879  * operations, such as resets on the PHYs of the IO Unit, also allows the host
2880  * to obtain the IOC assigned device handles for a device if it has other
2881  * identifying information about the device, in addition allows the host to
2882  * remove IOC resources associated with the device.
2883  *
2884  * Returns 0 for success, non-zero for failure.
2885  */
2886 int
mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER * ioc,Mpi2SasIoUnitControlReply_t * mpi_reply,Mpi2SasIoUnitControlRequest_t * mpi_request)2887 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2888     Mpi2SasIoUnitControlReply_t *mpi_reply,
2889     Mpi2SasIoUnitControlRequest_t *mpi_request)
2890 {
2891 	u16 smid;
2892 	u32 ioc_state;
2893 	unsigned long timeleft;
2894 	u8 issue_reset;
2895 	int rc;
2896 	void *request;
2897 	u16 wait_state_count;
2898 
2899 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2900 	    __func__));
2901 
2902 	mutex_lock(&ioc->base_cmds.mutex);
2903 
2904 	if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2905 		printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2906 		    ioc->name, __func__);
2907 		rc = -EAGAIN;
2908 		goto out;
2909 	}
2910 
2911 	wait_state_count = 0;
2912 	ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2913 	while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2914 		if (wait_state_count++ == 10) {
2915 			printk(MPT2SAS_ERR_FMT
2916 			    "%s: failed due to ioc not operational\n",
2917 			    ioc->name, __func__);
2918 			rc = -EFAULT;
2919 			goto out;
2920 		}
2921 		ssleep(1);
2922 		ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2923 		printk(MPT2SAS_INFO_FMT "%s: waiting for "
2924 		    "operational state(count=%d)\n", ioc->name,
2925 		    __func__, wait_state_count);
2926 	}
2927 
2928 	smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2929 	if (!smid) {
2930 		printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2931 		    ioc->name, __func__);
2932 		rc = -EAGAIN;
2933 		goto out;
2934 	}
2935 
2936 	rc = 0;
2937 	ioc->base_cmds.status = MPT2_CMD_PENDING;
2938 	request = mpt2sas_base_get_msg_frame(ioc, smid);
2939 	ioc->base_cmds.smid = smid;
2940 	memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2941 	if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2942 	    mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2943 		ioc->ioc_link_reset_in_progress = 1;
2944 	mpt2sas_base_put_smid_default(ioc, smid);
2945 	init_completion(&ioc->base_cmds.done);
2946 	timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2947 	    msecs_to_jiffies(10000));
2948 	if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2949 	    mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2950 	    ioc->ioc_link_reset_in_progress)
2951 		ioc->ioc_link_reset_in_progress = 0;
2952 	if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2953 		printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2954 		    ioc->name, __func__);
2955 		_debug_dump_mf(mpi_request,
2956 		    sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2957 		if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2958 			issue_reset = 1;
2959 		goto issue_host_reset;
2960 	}
2961 	if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2962 		memcpy(mpi_reply, ioc->base_cmds.reply,
2963 		    sizeof(Mpi2SasIoUnitControlReply_t));
2964 	else
2965 		memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2966 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2967 	goto out;
2968 
2969  issue_host_reset:
2970 	if (issue_reset)
2971 		mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2972 		    FORCE_BIG_HAMMER);
2973 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2974 	rc = -EFAULT;
2975  out:
2976 	mutex_unlock(&ioc->base_cmds.mutex);
2977 	return rc;
2978 }
2979 
2980 
2981 /**
2982  * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2983  * @ioc: per adapter object
2984  * @mpi_reply: the reply payload from FW
2985  * @mpi_request: the request payload sent to FW
2986  *
2987  * The SCSI Enclosure Processor request message causes the IOC to
2988  * communicate with SES devices to control LED status signals.
2989  *
2990  * Returns 0 for success, non-zero for failure.
2991  */
2992 int
mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER * ioc,Mpi2SepReply_t * mpi_reply,Mpi2SepRequest_t * mpi_request)2993 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2994     Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2995 {
2996 	u16 smid;
2997 	u32 ioc_state;
2998 	unsigned long timeleft;
2999 	u8 issue_reset;
3000 	int rc;
3001 	void *request;
3002 	u16 wait_state_count;
3003 
3004 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3005 	    __func__));
3006 
3007 	mutex_lock(&ioc->base_cmds.mutex);
3008 
3009 	if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3010 		printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3011 		    ioc->name, __func__);
3012 		rc = -EAGAIN;
3013 		goto out;
3014 	}
3015 
3016 	wait_state_count = 0;
3017 	ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3018 	while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3019 		if (wait_state_count++ == 10) {
3020 			printk(MPT2SAS_ERR_FMT
3021 			    "%s: failed due to ioc not operational\n",
3022 			    ioc->name, __func__);
3023 			rc = -EFAULT;
3024 			goto out;
3025 		}
3026 		ssleep(1);
3027 		ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3028 		printk(MPT2SAS_INFO_FMT "%s: waiting for "
3029 		    "operational state(count=%d)\n", ioc->name,
3030 		    __func__, wait_state_count);
3031 	}
3032 
3033 	smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3034 	if (!smid) {
3035 		printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3036 		    ioc->name, __func__);
3037 		rc = -EAGAIN;
3038 		goto out;
3039 	}
3040 
3041 	rc = 0;
3042 	ioc->base_cmds.status = MPT2_CMD_PENDING;
3043 	request = mpt2sas_base_get_msg_frame(ioc, smid);
3044 	ioc->base_cmds.smid = smid;
3045 	memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3046 	mpt2sas_base_put_smid_default(ioc, smid);
3047 	init_completion(&ioc->base_cmds.done);
3048 	timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3049 	    msecs_to_jiffies(10000));
3050 	if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3051 		printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3052 		    ioc->name, __func__);
3053 		_debug_dump_mf(mpi_request,
3054 		    sizeof(Mpi2SepRequest_t)/4);
3055 		if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3056 			issue_reset = 1;
3057 		goto issue_host_reset;
3058 	}
3059 	if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3060 		memcpy(mpi_reply, ioc->base_cmds.reply,
3061 		    sizeof(Mpi2SepReply_t));
3062 	else
3063 		memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3064 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3065 	goto out;
3066 
3067  issue_host_reset:
3068 	if (issue_reset)
3069 		mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3070 		    FORCE_BIG_HAMMER);
3071 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3072 	rc = -EFAULT;
3073  out:
3074 	mutex_unlock(&ioc->base_cmds.mutex);
3075 	return rc;
3076 }
3077 
3078 /**
3079  * _base_get_port_facts - obtain port facts reply and save in ioc
3080  * @ioc: per adapter object
3081  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3082  *
3083  * Returns 0 for success, non-zero for failure.
3084  */
3085 static int
_base_get_port_facts(struct MPT2SAS_ADAPTER * ioc,int port,int sleep_flag)3086 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3087 {
3088 	Mpi2PortFactsRequest_t mpi_request;
3089 	Mpi2PortFactsReply_t mpi_reply, *pfacts;
3090 	int mpi_reply_sz, mpi_request_sz, r;
3091 
3092 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3093 	    __func__));
3094 
3095 	mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3096 	mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3097 	memset(&mpi_request, 0, mpi_request_sz);
3098 	mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3099 	mpi_request.PortNumber = port;
3100 	r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3101 	    (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3102 
3103 	if (r != 0) {
3104 		printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3105 		    ioc->name, __func__, r);
3106 		return r;
3107 	}
3108 
3109 	pfacts = &ioc->pfacts[port];
3110 	memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
3111 	pfacts->PortNumber = mpi_reply.PortNumber;
3112 	pfacts->VP_ID = mpi_reply.VP_ID;
3113 	pfacts->VF_ID = mpi_reply.VF_ID;
3114 	pfacts->MaxPostedCmdBuffers =
3115 	    le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3116 
3117 	return 0;
3118 }
3119 
3120 /**
3121  * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3122  * @ioc: per adapter object
3123  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3124  *
3125  * Returns 0 for success, non-zero for failure.
3126  */
3127 static int
_base_get_ioc_facts(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3128 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3129 {
3130 	Mpi2IOCFactsRequest_t mpi_request;
3131 	Mpi2IOCFactsReply_t mpi_reply, *facts;
3132 	int mpi_reply_sz, mpi_request_sz, r;
3133 
3134 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3135 	    __func__));
3136 
3137 	mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3138 	mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3139 	memset(&mpi_request, 0, mpi_request_sz);
3140 	mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3141 	r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3142 	    (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3143 
3144 	if (r != 0) {
3145 		printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3146 		    ioc->name, __func__, r);
3147 		return r;
3148 	}
3149 
3150 	facts = &ioc->facts;
3151 	memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
3152 	facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3153 	facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3154 	facts->VP_ID = mpi_reply.VP_ID;
3155 	facts->VF_ID = mpi_reply.VF_ID;
3156 	facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3157 	facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3158 	facts->WhoInit = mpi_reply.WhoInit;
3159 	facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3160 	facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3161 	facts->MaxReplyDescriptorPostQueueDepth =
3162 	    le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3163 	facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3164 	facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3165 	if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3166 		ioc->ir_firmware = 1;
3167 	facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3168 	facts->IOCRequestFrameSize =
3169 	    le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3170 	facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3171 	facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3172 	ioc->shost->max_id = -1;
3173 	facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3174 	facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3175 	facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3176 	facts->HighPriorityCredit =
3177 	    le16_to_cpu(mpi_reply.HighPriorityCredit);
3178 	facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3179 	facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3180 
3181 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3182 	    "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3183 	    facts->MaxChainDepth));
3184 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3185 	    "reply frame size(%d)\n", ioc->name,
3186 	    facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3187 	return 0;
3188 }
3189 
3190 /**
3191  * _base_send_ioc_init - send ioc_init to firmware
3192  * @ioc: per adapter object
3193  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3194  *
3195  * Returns 0 for success, non-zero for failure.
3196  */
3197 static int
_base_send_ioc_init(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3198 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3199 {
3200 	Mpi2IOCInitRequest_t mpi_request;
3201 	Mpi2IOCInitReply_t mpi_reply;
3202 	int r;
3203 	struct timeval current_time;
3204 	u16 ioc_status;
3205 
3206 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3207 	    __func__));
3208 
3209 	memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3210 	mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3211 	mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3212 	mpi_request.VF_ID = 0; /* TODO */
3213 	mpi_request.VP_ID = 0;
3214 	mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3215 	mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3216 
3217 	/* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
3218 	 * removed and made reserved.  For those with older firmware will need
3219 	 * this fix. It was decided that the Reply and Request frame sizes are
3220 	 * the same.
3221 	 */
3222 	if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
3223 		mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
3224 /*		mpi_request.SystemReplyFrameSize =
3225  *		 cpu_to_le16(ioc->reply_sz);
3226  */
3227 	}
3228 
3229 	mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3230 	mpi_request.ReplyDescriptorPostQueueDepth =
3231 	    cpu_to_le16(ioc->reply_post_queue_depth);
3232 	mpi_request.ReplyFreeQueueDepth =
3233 	    cpu_to_le16(ioc->reply_free_queue_depth);
3234 
3235 #if BITS_PER_LONG > 32
3236 	mpi_request.SenseBufferAddressHigh =
3237 	    cpu_to_le32(ioc->sense_dma >> 32);
3238 	mpi_request.SystemReplyAddressHigh =
3239 	    cpu_to_le32(ioc->reply_dma >> 32);
3240 	mpi_request.SystemRequestFrameBaseAddress =
3241 	    cpu_to_le64(ioc->request_dma);
3242 	mpi_request.ReplyFreeQueueAddress =
3243 	    cpu_to_le64(ioc->reply_free_dma);
3244 	mpi_request.ReplyDescriptorPostQueueAddress =
3245 	    cpu_to_le64(ioc->reply_post_free_dma);
3246 #else
3247 	mpi_request.SystemRequestFrameBaseAddress =
3248 	    cpu_to_le32(ioc->request_dma);
3249 	mpi_request.ReplyFreeQueueAddress =
3250 	    cpu_to_le32(ioc->reply_free_dma);
3251 	mpi_request.ReplyDescriptorPostQueueAddress =
3252 	    cpu_to_le32(ioc->reply_post_free_dma);
3253 #endif
3254 
3255 	/* This time stamp specifies number of milliseconds
3256 	 * since epoch ~ midnight January 1, 1970.
3257 	 */
3258 	do_gettimeofday(&current_time);
3259 	mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3260 	    (current_time.tv_usec / 1000));
3261 
3262 	if (ioc->logging_level & MPT_DEBUG_INIT) {
3263 		u32 *mfp;
3264 		int i;
3265 
3266 		mfp = (u32 *)&mpi_request;
3267 		printk(KERN_INFO "\toffset:data\n");
3268 		for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3269 			printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3270 			    le32_to_cpu(mfp[i]));
3271 	}
3272 
3273 	r = _base_handshake_req_reply_wait(ioc,
3274 	    sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3275 	    sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3276 	    sleep_flag);
3277 
3278 	if (r != 0) {
3279 		printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3280 		    ioc->name, __func__, r);
3281 		return r;
3282 	}
3283 
3284 	ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3285 	if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3286 	    mpi_reply.IOCLogInfo) {
3287 		printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3288 		r = -EIO;
3289 	}
3290 
3291 	return 0;
3292 }
3293 
3294 /**
3295  * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3296  * @ioc: per adapter object
3297  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3298  *
3299  * Returns 0 for success, non-zero for failure.
3300  */
3301 static int
_base_send_port_enable(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3302 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3303 {
3304 	Mpi2PortEnableRequest_t *mpi_request;
3305 	u32 ioc_state;
3306 	unsigned long timeleft;
3307 	int r = 0;
3308 	u16 smid;
3309 
3310 	printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3311 
3312 	if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3313 		printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3314 		    ioc->name, __func__);
3315 		return -EAGAIN;
3316 	}
3317 
3318 	smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3319 	if (!smid) {
3320 		printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3321 		    ioc->name, __func__);
3322 		return -EAGAIN;
3323 	}
3324 
3325 	ioc->base_cmds.status = MPT2_CMD_PENDING;
3326 	mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3327 	ioc->base_cmds.smid = smid;
3328 	memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3329 	mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3330 	mpi_request->VF_ID = 0; /* TODO */
3331 	mpi_request->VP_ID = 0;
3332 
3333 	mpt2sas_base_put_smid_default(ioc, smid);
3334 	init_completion(&ioc->base_cmds.done);
3335 	timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3336 	    300*HZ);
3337 	if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3338 		printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3339 		    ioc->name, __func__);
3340 		_debug_dump_mf(mpi_request,
3341 		    sizeof(Mpi2PortEnableRequest_t)/4);
3342 		if (ioc->base_cmds.status & MPT2_CMD_RESET)
3343 			r = -EFAULT;
3344 		else
3345 			r = -ETIME;
3346 		goto out;
3347 	} else
3348 		dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3349 		    ioc->name, __func__));
3350 
3351 	ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3352 	    60, sleep_flag);
3353 	if (ioc_state) {
3354 		printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3355 		    " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3356 		r = -EFAULT;
3357 	}
3358  out:
3359 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3360 	printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3361 	    ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3362 	return r;
3363 }
3364 
3365 /**
3366  * _base_unmask_events - turn on notification for this event
3367  * @ioc: per adapter object
3368  * @event: firmware event
3369  *
3370  * The mask is stored in ioc->event_masks.
3371  */
3372 static void
_base_unmask_events(struct MPT2SAS_ADAPTER * ioc,u16 event)3373 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3374 {
3375 	u32 desired_event;
3376 
3377 	if (event >= 128)
3378 		return;
3379 
3380 	desired_event = (1 << (event % 32));
3381 
3382 	if (event < 32)
3383 		ioc->event_masks[0] &= ~desired_event;
3384 	else if (event < 64)
3385 		ioc->event_masks[1] &= ~desired_event;
3386 	else if (event < 96)
3387 		ioc->event_masks[2] &= ~desired_event;
3388 	else if (event < 128)
3389 		ioc->event_masks[3] &= ~desired_event;
3390 }
3391 
3392 /**
3393  * _base_event_notification - send event notification
3394  * @ioc: per adapter object
3395  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3396  *
3397  * Returns 0 for success, non-zero for failure.
3398  */
3399 static int
_base_event_notification(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3400 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3401 {
3402 	Mpi2EventNotificationRequest_t *mpi_request;
3403 	unsigned long timeleft;
3404 	u16 smid;
3405 	int r = 0;
3406 	int i;
3407 
3408 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3409 	    __func__));
3410 
3411 	if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3412 		printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3413 		    ioc->name, __func__);
3414 		return -EAGAIN;
3415 	}
3416 
3417 	smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3418 	if (!smid) {
3419 		printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3420 		    ioc->name, __func__);
3421 		return -EAGAIN;
3422 	}
3423 	ioc->base_cmds.status = MPT2_CMD_PENDING;
3424 	mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3425 	ioc->base_cmds.smid = smid;
3426 	memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3427 	mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3428 	mpi_request->VF_ID = 0; /* TODO */
3429 	mpi_request->VP_ID = 0;
3430 	for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3431 		mpi_request->EventMasks[i] =
3432 		    cpu_to_le32(ioc->event_masks[i]);
3433 	mpt2sas_base_put_smid_default(ioc, smid);
3434 	init_completion(&ioc->base_cmds.done);
3435 	timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3436 	if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3437 		printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3438 		    ioc->name, __func__);
3439 		_debug_dump_mf(mpi_request,
3440 		    sizeof(Mpi2EventNotificationRequest_t)/4);
3441 		if (ioc->base_cmds.status & MPT2_CMD_RESET)
3442 			r = -EFAULT;
3443 		else
3444 			r = -ETIME;
3445 	} else
3446 		dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3447 		    ioc->name, __func__));
3448 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3449 	return r;
3450 }
3451 
3452 /**
3453  * mpt2sas_base_validate_event_type - validating event types
3454  * @ioc: per adapter object
3455  * @event: firmware event
3456  *
3457  * This will turn on firmware event notification when application
3458  * ask for that event. We don't mask events that are already enabled.
3459  */
3460 void
mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER * ioc,u32 * event_type)3461 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3462 {
3463 	int i, j;
3464 	u32 event_mask, desired_event;
3465 	u8 send_update_to_fw;
3466 
3467 	for (i = 0, send_update_to_fw = 0; i <
3468 	    MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3469 		event_mask = ~event_type[i];
3470 		desired_event = 1;
3471 		for (j = 0; j < 32; j++) {
3472 			if (!(event_mask & desired_event) &&
3473 			    (ioc->event_masks[i] & desired_event)) {
3474 				ioc->event_masks[i] &= ~desired_event;
3475 				send_update_to_fw = 1;
3476 			}
3477 			desired_event = (desired_event << 1);
3478 		}
3479 	}
3480 
3481 	if (!send_update_to_fw)
3482 		return;
3483 
3484 	mutex_lock(&ioc->base_cmds.mutex);
3485 	_base_event_notification(ioc, CAN_SLEEP);
3486 	mutex_unlock(&ioc->base_cmds.mutex);
3487 }
3488 
3489 /**
3490  * _base_diag_reset - the "big hammer" start of day reset
3491  * @ioc: per adapter object
3492  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3493  *
3494  * Returns 0 for success, non-zero for failure.
3495  */
3496 static int
_base_diag_reset(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3497 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3498 {
3499 	u32 host_diagnostic;
3500 	u32 ioc_state;
3501 	u32 count;
3502 	u32 hcb_size;
3503 
3504 	printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3505 
3506 	_base_save_msix_table(ioc);
3507 
3508 	drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3509 	    ioc->name));
3510 
3511 	count = 0;
3512 	do {
3513 		/* Write magic sequence to WriteSequence register
3514 		 * Loop until in diagnostic mode
3515 		 */
3516 		drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3517 		    "sequence\n", ioc->name));
3518 		writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3519 		writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3520 		writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3521 		writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3522 		writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3523 		writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3524 		writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3525 
3526 		/* wait 100 msec */
3527 		if (sleep_flag == CAN_SLEEP)
3528 			msleep(100);
3529 		else
3530 			mdelay(100);
3531 
3532 		if (count++ > 20)
3533 			goto out;
3534 
3535 		host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3536 		drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3537 		    "sequence: count(%d), host_diagnostic(0x%08x)\n",
3538 		    ioc->name, count, host_diagnostic));
3539 
3540 	} while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3541 
3542 	hcb_size = readl(&ioc->chip->HCBSize);
3543 
3544 	drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3545 	    ioc->name));
3546 	writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3547 	     &ioc->chip->HostDiagnostic);
3548 
3549 	/* don't access any registers for 50 milliseconds */
3550 	msleep(50);
3551 
3552 	/* 300 second max wait */
3553 	for (count = 0; count < 3000000 ; count++) {
3554 
3555 		host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3556 
3557 		if (host_diagnostic == 0xFFFFFFFF)
3558 			goto out;
3559 		if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3560 			break;
3561 
3562 		/* wait 100 msec */
3563 		if (sleep_flag == CAN_SLEEP)
3564 			msleep(1);
3565 		else
3566 			mdelay(1);
3567 	}
3568 
3569 	if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3570 
3571 		drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3572 		    "assuming the HCB Address points to good F/W\n",
3573 		    ioc->name));
3574 		host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3575 		host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3576 		writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3577 
3578 		drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3579 		    "re-enable the HCDW\n", ioc->name));
3580 		writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3581 		    &ioc->chip->HCBSize);
3582 	}
3583 
3584 	drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3585 	    ioc->name));
3586 	writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3587 	    &ioc->chip->HostDiagnostic);
3588 
3589 	drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3590 	    "diagnostic register\n", ioc->name));
3591 	writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3592 
3593 	drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3594 	    "READY state\n", ioc->name));
3595 	ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3596 	    sleep_flag);
3597 	if (ioc_state) {
3598 		printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3599 		    " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3600 		goto out;
3601 	}
3602 
3603 	_base_restore_msix_table(ioc);
3604 	printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3605 	return 0;
3606 
3607  out:
3608 	printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3609 	return -EFAULT;
3610 }
3611 
3612 /**
3613  * _base_make_ioc_ready - put controller in READY state
3614  * @ioc: per adapter object
3615  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3616  * @type: FORCE_BIG_HAMMER or SOFT_RESET
3617  *
3618  * Returns 0 for success, non-zero for failure.
3619  */
3620 static int
_base_make_ioc_ready(struct MPT2SAS_ADAPTER * ioc,int sleep_flag,enum reset_type type)3621 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3622     enum reset_type type)
3623 {
3624 	u32 ioc_state;
3625 	int rc;
3626 
3627 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3628 	    __func__));
3629 
3630 	if (ioc->pci_error_recovery)
3631 		return 0;
3632 
3633 	ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3634 	dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3635 	    ioc->name, __func__, ioc_state));
3636 
3637 	if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3638 		return 0;
3639 
3640 	if (ioc_state & MPI2_DOORBELL_USED) {
3641 		dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
3642 		    "active!\n", ioc->name));
3643 		goto issue_diag_reset;
3644 	}
3645 
3646 	if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3647 		mpt2sas_base_fault_info(ioc, ioc_state &
3648 		    MPI2_DOORBELL_DATA_MASK);
3649 		goto issue_diag_reset;
3650 	}
3651 
3652 	if (type == FORCE_BIG_HAMMER)
3653 		goto issue_diag_reset;
3654 
3655 	if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3656 		if (!(_base_send_ioc_reset(ioc,
3657 		    MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
3658 			ioc->ioc_reset_count++;
3659 			return 0;
3660 	}
3661 
3662  issue_diag_reset:
3663 	rc = _base_diag_reset(ioc, CAN_SLEEP);
3664 	ioc->ioc_reset_count++;
3665 	return rc;
3666 }
3667 
3668 /**
3669  * _base_make_ioc_operational - put controller in OPERATIONAL state
3670  * @ioc: per adapter object
3671  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3672  *
3673  * Returns 0 for success, non-zero for failure.
3674  */
3675 static int
_base_make_ioc_operational(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3676 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3677 {
3678 	int r, i;
3679 	unsigned long	flags;
3680 	u32 reply_address;
3681 	u16 smid;
3682 	struct _tr_list *delayed_tr, *delayed_tr_next;
3683 
3684 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3685 	    __func__));
3686 
3687 	/* clean the delayed target reset list */
3688 	list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3689 	    &ioc->delayed_tr_list, list) {
3690 		list_del(&delayed_tr->list);
3691 		kfree(delayed_tr);
3692 	}
3693 
3694 	list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3695 	    &ioc->delayed_tr_volume_list, list) {
3696 		list_del(&delayed_tr->list);
3697 		kfree(delayed_tr);
3698 	}
3699 
3700 	/* initialize the scsi lookup free list */
3701 	spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3702 	INIT_LIST_HEAD(&ioc->free_list);
3703 	smid = 1;
3704 	for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3705 		INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
3706 		ioc->scsi_lookup[i].cb_idx = 0xFF;
3707 		ioc->scsi_lookup[i].smid = smid;
3708 		ioc->scsi_lookup[i].scmd = NULL;
3709 		list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3710 		    &ioc->free_list);
3711 	}
3712 
3713 	/* hi-priority queue */
3714 	INIT_LIST_HEAD(&ioc->hpr_free_list);
3715 	smid = ioc->hi_priority_smid;
3716 	for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3717 		ioc->hpr_lookup[i].cb_idx = 0xFF;
3718 		ioc->hpr_lookup[i].smid = smid;
3719 		list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3720 		    &ioc->hpr_free_list);
3721 	}
3722 
3723 	/* internal queue */
3724 	INIT_LIST_HEAD(&ioc->internal_free_list);
3725 	smid = ioc->internal_smid;
3726 	for (i = 0; i < ioc->internal_depth; i++, smid++) {
3727 		ioc->internal_lookup[i].cb_idx = 0xFF;
3728 		ioc->internal_lookup[i].smid = smid;
3729 		list_add_tail(&ioc->internal_lookup[i].tracker_list,
3730 		    &ioc->internal_free_list);
3731 	}
3732 
3733 	/* chain pool */
3734 	INIT_LIST_HEAD(&ioc->free_chain_list);
3735 	for (i = 0; i < ioc->chain_depth; i++)
3736 		list_add_tail(&ioc->chain_lookup[i].tracker_list,
3737 		    &ioc->free_chain_list);
3738 
3739 	spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3740 
3741 	/* initialize Reply Free Queue */
3742 	for (i = 0, reply_address = (u32)ioc->reply_dma ;
3743 	    i < ioc->reply_free_queue_depth ; i++, reply_address +=
3744 	    ioc->reply_sz)
3745 		ioc->reply_free[i] = cpu_to_le32(reply_address);
3746 
3747 	/* initialize Reply Post Free Queue */
3748 	for (i = 0; i < ioc->reply_post_queue_depth; i++)
3749 		ioc->reply_post_free[i].Words = ULLONG_MAX;
3750 
3751 	r = _base_send_ioc_init(ioc, sleep_flag);
3752 	if (r)
3753 		return r;
3754 
3755 	/* initialize the index's */
3756 	ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3757 	ioc->reply_post_host_index = 0;
3758 	writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3759 	writel(0, &ioc->chip->ReplyPostHostIndex);
3760 
3761 	_base_unmask_interrupts(ioc);
3762 	r = _base_event_notification(ioc, sleep_flag);
3763 	if (r)
3764 		return r;
3765 
3766 	if (sleep_flag == CAN_SLEEP)
3767 		_base_static_config_pages(ioc);
3768 
3769 	if (ioc->wait_for_port_enable_to_complete) {
3770 		if (diag_buffer_enable != 0)
3771 			mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3772 		if (disable_discovery > 0)
3773 			return r;
3774 	}
3775 
3776 	r = _base_send_port_enable(ioc, sleep_flag);
3777 	if (r)
3778 		return r;
3779 
3780 	return r;
3781 }
3782 
3783 /**
3784  * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3785  * @ioc: per adapter object
3786  *
3787  * Return nothing.
3788  */
3789 void
mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER * ioc)3790 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3791 {
3792 	struct pci_dev *pdev = ioc->pdev;
3793 
3794 	dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3795 	    __func__));
3796 
3797 	_base_mask_interrupts(ioc);
3798 	ioc->shost_recovery = 1;
3799 	_base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3800 	ioc->shost_recovery = 0;
3801 	if (ioc->pci_irq) {
3802 		synchronize_irq(pdev->irq);
3803 		free_irq(ioc->pci_irq, ioc);
3804 	}
3805 	_base_disable_msix(ioc);
3806 	if (ioc->chip_phys)
3807 		iounmap(ioc->chip);
3808 	ioc->pci_irq = -1;
3809 	ioc->chip_phys = 0;
3810 	pci_release_selected_regions(ioc->pdev, ioc->bars);
3811 	pci_disable_pcie_error_reporting(pdev);
3812 	pci_disable_device(pdev);
3813 	return;
3814 }
3815 
3816 /**
3817  * mpt2sas_base_attach - attach controller instance
3818  * @ioc: per adapter object
3819  *
3820  * Returns 0 for success, non-zero for failure.
3821  */
3822 int
mpt2sas_base_attach(struct MPT2SAS_ADAPTER * ioc)3823 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3824 {
3825 	int r, i;
3826 
3827 	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3828 	    __func__));
3829 
3830 	r = mpt2sas_base_map_resources(ioc);
3831 	if (r)
3832 		return r;
3833 
3834 	pci_set_drvdata(ioc->pdev, ioc->shost);
3835 	r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3836 	if (r)
3837 		goto out_free_resources;
3838 
3839 	r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3840 	if (r)
3841 		goto out_free_resources;
3842 
3843 	ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3844 	    sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3845 	if (!ioc->pfacts) {
3846 		r = -ENOMEM;
3847 		goto out_free_resources;
3848 	}
3849 
3850 	for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3851 		r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3852 		if (r)
3853 			goto out_free_resources;
3854 	}
3855 
3856 	r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3857 	if (r)
3858 		goto out_free_resources;
3859 
3860 	init_waitqueue_head(&ioc->reset_wq);
3861 
3862 	/* allocate memory pd handle bitmask list */
3863 	ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
3864 	if (ioc->facts.MaxDevHandle % 8)
3865 		ioc->pd_handles_sz++;
3866 	ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
3867 	    GFP_KERNEL);
3868 	if (!ioc->pd_handles) {
3869 		r = -ENOMEM;
3870 		goto out_free_resources;
3871 	}
3872 
3873 	ioc->fwfault_debug = mpt2sas_fwfault_debug;
3874 
3875 	/* base internal command bits */
3876 	mutex_init(&ioc->base_cmds.mutex);
3877 	ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3878 	ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3879 
3880 	/* transport internal command bits */
3881 	ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3882 	ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3883 	mutex_init(&ioc->transport_cmds.mutex);
3884 
3885 	/* scsih internal command bits */
3886 	ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3887 	ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3888 	mutex_init(&ioc->scsih_cmds.mutex);
3889 
3890 	/* task management internal command bits */
3891 	ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3892 	ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3893 	mutex_init(&ioc->tm_cmds.mutex);
3894 
3895 	/* config page internal command bits */
3896 	ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3897 	ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3898 	mutex_init(&ioc->config_cmds.mutex);
3899 
3900 	/* ctl module internal command bits */
3901 	ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3902 	ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
3903 	ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3904 	mutex_init(&ioc->ctl_cmds.mutex);
3905 
3906 	if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
3907 	    !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
3908 	    !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
3909 	    !ioc->ctl_cmds.sense) {
3910 		r = -ENOMEM;
3911 		goto out_free_resources;
3912 	}
3913 
3914 	if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
3915 	    !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
3916 	    !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
3917 		r = -ENOMEM;
3918 		goto out_free_resources;
3919 	}
3920 
3921 	init_completion(&ioc->shost_recovery_done);
3922 
3923 	for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3924 		ioc->event_masks[i] = -1;
3925 
3926 	/* here we enable the events we care about */
3927 	_base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3928 	_base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3929 	_base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3930 	_base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3931 	_base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3932 	_base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3933 	_base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3934 	_base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3935 	_base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3936 	_base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3937 	r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3938 	if (r)
3939 		goto out_free_resources;
3940 
3941 	if (missing_delay[0] != -1 && missing_delay[1] != -1)
3942 		_base_update_missing_delay(ioc, missing_delay[0],
3943 		    missing_delay[1]);
3944 
3945 	mpt2sas_base_start_watchdog(ioc);
3946 	return 0;
3947 
3948  out_free_resources:
3949 
3950 	ioc->remove_host = 1;
3951 	mpt2sas_base_free_resources(ioc);
3952 	_base_release_memory_pools(ioc);
3953 	pci_set_drvdata(ioc->pdev, NULL);
3954 	kfree(ioc->pd_handles);
3955 	kfree(ioc->tm_cmds.reply);
3956 	kfree(ioc->transport_cmds.reply);
3957 	kfree(ioc->scsih_cmds.reply);
3958 	kfree(ioc->config_cmds.reply);
3959 	kfree(ioc->base_cmds.reply);
3960 	kfree(ioc->ctl_cmds.reply);
3961 	kfree(ioc->ctl_cmds.sense);
3962 	kfree(ioc->pfacts);
3963 	ioc->ctl_cmds.reply = NULL;
3964 	ioc->base_cmds.reply = NULL;
3965 	ioc->tm_cmds.reply = NULL;
3966 	ioc->scsih_cmds.reply = NULL;
3967 	ioc->transport_cmds.reply = NULL;
3968 	ioc->config_cmds.reply = NULL;
3969 	ioc->pfacts = NULL;
3970 	return r;
3971 }
3972 
3973 
3974 /**
3975  * mpt2sas_base_detach - remove controller instance
3976  * @ioc: per adapter object
3977  *
3978  * Return nothing.
3979  */
3980 void
mpt2sas_base_detach(struct MPT2SAS_ADAPTER * ioc)3981 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3982 {
3983 
3984 	dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3985 	    __func__));
3986 
3987 	mpt2sas_base_stop_watchdog(ioc);
3988 	mpt2sas_base_free_resources(ioc);
3989 	_base_release_memory_pools(ioc);
3990 	pci_set_drvdata(ioc->pdev, NULL);
3991 	kfree(ioc->pd_handles);
3992 	kfree(ioc->pfacts);
3993 	kfree(ioc->ctl_cmds.reply);
3994 	kfree(ioc->ctl_cmds.sense);
3995 	kfree(ioc->base_cmds.reply);
3996 	kfree(ioc->tm_cmds.reply);
3997 	kfree(ioc->transport_cmds.reply);
3998 	kfree(ioc->scsih_cmds.reply);
3999 	kfree(ioc->config_cmds.reply);
4000 }
4001 
4002 /**
4003  * _base_reset_handler - reset callback handler (for base)
4004  * @ioc: per adapter object
4005  * @reset_phase: phase
4006  *
4007  * The handler for doing any required cleanup or initialization.
4008  *
4009  * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4010  * MPT2_IOC_DONE_RESET
4011  *
4012  * Return nothing.
4013  */
4014 static void
_base_reset_handler(struct MPT2SAS_ADAPTER * ioc,int reset_phase)4015 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4016 {
4017 	mpt2sas_scsih_reset_handler(ioc, reset_phase);
4018 	mpt2sas_ctl_reset_handler(ioc, reset_phase);
4019 	switch (reset_phase) {
4020 	case MPT2_IOC_PRE_RESET:
4021 		dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4022 		    "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4023 		break;
4024 	case MPT2_IOC_AFTER_RESET:
4025 		dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4026 		    "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4027 		if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4028 			ioc->transport_cmds.status |= MPT2_CMD_RESET;
4029 			mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4030 			complete(&ioc->transport_cmds.done);
4031 		}
4032 		if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4033 			ioc->base_cmds.status |= MPT2_CMD_RESET;
4034 			mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4035 			complete(&ioc->base_cmds.done);
4036 		}
4037 		if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4038 			ioc->config_cmds.status |= MPT2_CMD_RESET;
4039 			mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4040 			ioc->config_cmds.smid = USHRT_MAX;
4041 			complete(&ioc->config_cmds.done);
4042 		}
4043 		break;
4044 	case MPT2_IOC_DONE_RESET:
4045 		dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4046 		    "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4047 		break;
4048 	}
4049 }
4050 
4051 /**
4052  * _wait_for_commands_to_complete - reset controller
4053  * @ioc: Pointer to MPT_ADAPTER structure
4054  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4055  *
4056  * This function waiting(3s) for all pending commands to complete
4057  * prior to putting controller in reset.
4058  */
4059 static void
_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)4060 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4061 {
4062 	u32 ioc_state;
4063 	unsigned long flags;
4064 	u16 i;
4065 
4066 	ioc->pending_io_count = 0;
4067 	if (sleep_flag != CAN_SLEEP)
4068 		return;
4069 
4070 	ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4071 	if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4072 		return;
4073 
4074 	/* pending command count */
4075 	spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4076 	for (i = 0; i < ioc->scsiio_depth; i++)
4077 		if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4078 			ioc->pending_io_count++;
4079 	spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4080 
4081 	if (!ioc->pending_io_count)
4082 		return;
4083 
4084 	/* wait for pending commands to complete */
4085 	wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4086 }
4087 
4088 /**
4089  * mpt2sas_base_hard_reset_handler - reset controller
4090  * @ioc: Pointer to MPT_ADAPTER structure
4091  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4092  * @type: FORCE_BIG_HAMMER or SOFT_RESET
4093  *
4094  * Returns 0 for success, non-zero for failure.
4095  */
4096 int
mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER * ioc,int sleep_flag,enum reset_type type)4097 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4098     enum reset_type type)
4099 {
4100 	int r;
4101 	unsigned long flags;
4102 	u8 pe_complete = ioc->wait_for_port_enable_to_complete;
4103 
4104 	dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4105 	    __func__));
4106 
4107 	if (ioc->pci_error_recovery) {
4108 		printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4109 		    ioc->name, __func__);
4110 		r = 0;
4111 		goto out;
4112 	}
4113 
4114 	if (mpt2sas_fwfault_debug)
4115 		mpt2sas_halt_firmware(ioc);
4116 
4117 	/* TODO - What we really should be doing is pulling
4118 	 * out all the code associated with NO_SLEEP; its never used.
4119 	 * That is legacy code from mpt fusion driver, ported over.
4120 	 * I will leave this BUG_ON here for now till its been resolved.
4121 	 */
4122 	BUG_ON(sleep_flag == NO_SLEEP);
4123 
4124 	/* wait for an active reset in progress to complete */
4125 	if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4126 		do {
4127 			ssleep(1);
4128 		} while (ioc->shost_recovery == 1);
4129 		dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4130 		    __func__));
4131 		return ioc->ioc_reset_in_progress_status;
4132 	}
4133 
4134 	spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4135 	ioc->shost_recovery = 1;
4136 	spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4137 
4138 	_base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4139 	_wait_for_commands_to_complete(ioc, sleep_flag);
4140 	_base_mask_interrupts(ioc);
4141 	r = _base_make_ioc_ready(ioc, sleep_flag, type);
4142 	if (r)
4143 		goto out;
4144 	_base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4145 
4146 	/* If this hard reset is called while port enable is active, then
4147 	 * there is no reason to call make_ioc_operational
4148 	 */
4149 	if (pe_complete) {
4150 		r = -EFAULT;
4151 		goto out;
4152 	}
4153 	r = _base_make_ioc_operational(ioc, sleep_flag);
4154 	if (!r)
4155 		_base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4156  out:
4157 	dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4158 	    ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4159 
4160 	spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4161 	ioc->ioc_reset_in_progress_status = r;
4162 	ioc->shost_recovery = 0;
4163 	complete(&ioc->shost_recovery_done);
4164 	spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4165 	mutex_unlock(&ioc->reset_in_progress_mutex);
4166 
4167 	dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4168 	    __func__));
4169 	return r;
4170 }
4171