1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2010 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/kernel.h>
46 #include <linux/module.h>
47 #include <linux/errno.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/types.h>
51 #include <linux/pci.h>
52 #include <linux/kdev_t.h>
53 #include <linux/blkdev.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/sort.h>
58 #include <linux/io.h>
59 #include <linux/time.h>
60 #include <linux/kthread.h>
61 #include <linux/aer.h>
62
63 #include "mpt2sas_base.h"
64
65 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
66
67 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68
69 #define MAX_HBA_QUEUE_DEPTH 30000
70 #define MAX_CHAIN_DEPTH 100000
71 static int max_queue_depth = -1;
72 module_param(max_queue_depth, int, 0);
73 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
74
75 static int max_sgl_entries = -1;
76 module_param(max_sgl_entries, int, 0);
77 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
78
79 static int msix_disable = -1;
80 module_param(msix_disable, int, 0);
81 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
82
83 static int mpt2sas_fwfault_debug;
84 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
85 "and halt firmware - (default=0)");
86
87 static int disable_discovery = -1;
88 module_param(disable_discovery, int, 0);
89 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
90
91 /**
92 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
93 *
94 */
95 static int
_scsih_set_fwfault_debug(const char * val,struct kernel_param * kp)96 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
97 {
98 int ret = param_set_int(val, kp);
99 struct MPT2SAS_ADAPTER *ioc;
100
101 if (ret)
102 return ret;
103
104 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
105 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
106 ioc->fwfault_debug = mpt2sas_fwfault_debug;
107 return 0;
108 }
109
110 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
111 param_get_int, &mpt2sas_fwfault_debug, 0644);
112
113 /**
114 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
115 * @arg: input argument, used to derive ioc
116 *
117 * Return 0 if controller is removed from pci subsystem.
118 * Return -1 for other case.
119 */
mpt2sas_remove_dead_ioc_func(void * arg)120 static int mpt2sas_remove_dead_ioc_func(void *arg)
121 {
122 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
123 struct pci_dev *pdev;
124
125 if ((ioc == NULL))
126 return -1;
127
128 pdev = ioc->pdev;
129 if ((pdev == NULL))
130 return -1;
131 pci_stop_and_remove_bus_device(pdev);
132 return 0;
133 }
134
135
136 /**
137 * _base_fault_reset_work - workq handling ioc fault conditions
138 * @work: input argument, used to derive ioc
139 * Context: sleep.
140 *
141 * Return nothing.
142 */
143 static void
_base_fault_reset_work(struct work_struct * work)144 _base_fault_reset_work(struct work_struct *work)
145 {
146 struct MPT2SAS_ADAPTER *ioc =
147 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
148 unsigned long flags;
149 u32 doorbell;
150 int rc;
151 struct task_struct *p;
152
153 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
154 if (ioc->shost_recovery)
155 goto rearm_timer;
156 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
157
158 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
159 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
160 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
161 ioc->name, __func__);
162
163 /*
164 * Call _scsih_flush_pending_cmds callback so that we flush all
165 * pending commands back to OS. This call is required to aovid
166 * deadlock at block layer. Dead IOC will fail to do diag reset,
167 * and this call is safe since dead ioc will never return any
168 * command back from HW.
169 */
170 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
171 /*
172 * Set remove_host flag early since kernel thread will
173 * take some time to execute.
174 */
175 ioc->remove_host = 1;
176 /*Remove the Dead Host */
177 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
178 "mpt2sas_dead_ioc_%d", ioc->id);
179 if (IS_ERR(p)) {
180 printk(MPT2SAS_ERR_FMT
181 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
182 ioc->name, __func__);
183 } else {
184 printk(MPT2SAS_ERR_FMT
185 "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
186 ioc->name, __func__);
187 }
188
189 return; /* don't rearm timer */
190 }
191
192 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
193 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
194 FORCE_BIG_HAMMER);
195 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
196 __func__, (rc == 0) ? "success" : "failed");
197 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
198 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
199 mpt2sas_base_fault_info(ioc, doorbell &
200 MPI2_DOORBELL_DATA_MASK);
201 }
202
203 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
204 rearm_timer:
205 if (ioc->fault_reset_work_q)
206 queue_delayed_work(ioc->fault_reset_work_q,
207 &ioc->fault_reset_work,
208 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
209 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
210 }
211
212 /**
213 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
214 * @ioc: per adapter object
215 * Context: sleep.
216 *
217 * Return nothing.
218 */
219 void
mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER * ioc)220 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
221 {
222 unsigned long flags;
223
224 if (ioc->fault_reset_work_q)
225 return;
226
227 /* initialize fault polling */
228 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
229 snprintf(ioc->fault_reset_work_q_name,
230 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
231 ioc->fault_reset_work_q =
232 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
233 if (!ioc->fault_reset_work_q) {
234 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
235 ioc->name, __func__, __LINE__);
236 return;
237 }
238 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
239 if (ioc->fault_reset_work_q)
240 queue_delayed_work(ioc->fault_reset_work_q,
241 &ioc->fault_reset_work,
242 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
243 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
244 }
245
246 /**
247 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
248 * @ioc: per adapter object
249 * Context: sleep.
250 *
251 * Return nothing.
252 */
253 void
mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER * ioc)254 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
255 {
256 unsigned long flags;
257 struct workqueue_struct *wq;
258
259 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
260 wq = ioc->fault_reset_work_q;
261 ioc->fault_reset_work_q = NULL;
262 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
263 if (wq) {
264 if (!cancel_delayed_work(&ioc->fault_reset_work))
265 flush_workqueue(wq);
266 destroy_workqueue(wq);
267 }
268 }
269
270 /**
271 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
272 * @ioc: per adapter object
273 * @fault_code: fault code
274 *
275 * Return nothing.
276 */
277 void
mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER * ioc,u16 fault_code)278 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
279 {
280 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
281 ioc->name, fault_code);
282 }
283
284 /**
285 * mpt2sas_halt_firmware - halt's mpt controller firmware
286 * @ioc: per adapter object
287 *
288 * For debugging timeout related issues. Writing 0xCOFFEE00
289 * to the doorbell register will halt controller firmware. With
290 * the purpose to stop both driver and firmware, the enduser can
291 * obtain a ring buffer from controller UART.
292 */
293 void
mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER * ioc)294 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
295 {
296 u32 doorbell;
297
298 if (!ioc->fwfault_debug)
299 return;
300
301 dump_stack();
302
303 doorbell = readl(&ioc->chip->Doorbell);
304 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
305 mpt2sas_base_fault_info(ioc , doorbell);
306 else {
307 writel(0xC0FFEE00, &ioc->chip->Doorbell);
308 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
309 "timeout\n", ioc->name);
310 }
311
312 panic("panic in %s\n", __func__);
313 }
314
315 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
316 /**
317 * _base_sas_ioc_info - verbose translation of the ioc status
318 * @ioc: per adapter object
319 * @mpi_reply: reply mf payload returned from firmware
320 * @request_hdr: request mf
321 *
322 * Return nothing.
323 */
324 static void
_base_sas_ioc_info(struct MPT2SAS_ADAPTER * ioc,MPI2DefaultReply_t * mpi_reply,MPI2RequestHeader_t * request_hdr)325 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
326 MPI2RequestHeader_t *request_hdr)
327 {
328 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
329 MPI2_IOCSTATUS_MASK;
330 char *desc = NULL;
331 u16 frame_sz;
332 char *func_str = NULL;
333
334 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
335 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
336 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
337 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
338 return;
339
340 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
341 return;
342
343 switch (ioc_status) {
344
345 /****************************************************************************
346 * Common IOCStatus values for all replies
347 ****************************************************************************/
348
349 case MPI2_IOCSTATUS_INVALID_FUNCTION:
350 desc = "invalid function";
351 break;
352 case MPI2_IOCSTATUS_BUSY:
353 desc = "busy";
354 break;
355 case MPI2_IOCSTATUS_INVALID_SGL:
356 desc = "invalid sgl";
357 break;
358 case MPI2_IOCSTATUS_INTERNAL_ERROR:
359 desc = "internal error";
360 break;
361 case MPI2_IOCSTATUS_INVALID_VPID:
362 desc = "invalid vpid";
363 break;
364 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
365 desc = "insufficient resources";
366 break;
367 case MPI2_IOCSTATUS_INVALID_FIELD:
368 desc = "invalid field";
369 break;
370 case MPI2_IOCSTATUS_INVALID_STATE:
371 desc = "invalid state";
372 break;
373 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
374 desc = "op state not supported";
375 break;
376
377 /****************************************************************************
378 * Config IOCStatus values
379 ****************************************************************************/
380
381 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
382 desc = "config invalid action";
383 break;
384 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
385 desc = "config invalid type";
386 break;
387 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
388 desc = "config invalid page";
389 break;
390 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
391 desc = "config invalid data";
392 break;
393 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
394 desc = "config no defaults";
395 break;
396 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
397 desc = "config cant commit";
398 break;
399
400 /****************************************************************************
401 * SCSI IO Reply
402 ****************************************************************************/
403
404 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
405 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
406 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
407 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
408 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
409 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
410 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
411 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
412 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
413 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
414 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
415 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
416 break;
417
418 /****************************************************************************
419 * For use by SCSI Initiator and SCSI Target end-to-end data protection
420 ****************************************************************************/
421
422 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
423 desc = "eedp guard error";
424 break;
425 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
426 desc = "eedp ref tag error";
427 break;
428 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
429 desc = "eedp app tag error";
430 break;
431
432 /****************************************************************************
433 * SCSI Target values
434 ****************************************************************************/
435
436 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
437 desc = "target invalid io index";
438 break;
439 case MPI2_IOCSTATUS_TARGET_ABORTED:
440 desc = "target aborted";
441 break;
442 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
443 desc = "target no conn retryable";
444 break;
445 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
446 desc = "target no connection";
447 break;
448 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
449 desc = "target xfer count mismatch";
450 break;
451 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
452 desc = "target data offset error";
453 break;
454 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
455 desc = "target too much write data";
456 break;
457 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
458 desc = "target iu too short";
459 break;
460 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
461 desc = "target ack nak timeout";
462 break;
463 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
464 desc = "target nak received";
465 break;
466
467 /****************************************************************************
468 * Serial Attached SCSI values
469 ****************************************************************************/
470
471 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
472 desc = "smp request failed";
473 break;
474 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
475 desc = "smp data overrun";
476 break;
477
478 /****************************************************************************
479 * Diagnostic Buffer Post / Diagnostic Release values
480 ****************************************************************************/
481
482 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
483 desc = "diagnostic released";
484 break;
485 default:
486 break;
487 }
488
489 if (!desc)
490 return;
491
492 switch (request_hdr->Function) {
493 case MPI2_FUNCTION_CONFIG:
494 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
495 func_str = "config_page";
496 break;
497 case MPI2_FUNCTION_SCSI_TASK_MGMT:
498 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
499 func_str = "task_mgmt";
500 break;
501 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
502 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
503 func_str = "sas_iounit_ctl";
504 break;
505 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
506 frame_sz = sizeof(Mpi2SepRequest_t);
507 func_str = "enclosure";
508 break;
509 case MPI2_FUNCTION_IOC_INIT:
510 frame_sz = sizeof(Mpi2IOCInitRequest_t);
511 func_str = "ioc_init";
512 break;
513 case MPI2_FUNCTION_PORT_ENABLE:
514 frame_sz = sizeof(Mpi2PortEnableRequest_t);
515 func_str = "port_enable";
516 break;
517 case MPI2_FUNCTION_SMP_PASSTHROUGH:
518 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
519 func_str = "smp_passthru";
520 break;
521 default:
522 frame_sz = 32;
523 func_str = "unknown";
524 break;
525 }
526
527 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
528 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
529
530 _debug_dump_mf(request_hdr, frame_sz/4);
531 }
532
533 /**
534 * _base_display_event_data - verbose translation of firmware asyn events
535 * @ioc: per adapter object
536 * @mpi_reply: reply mf payload returned from firmware
537 *
538 * Return nothing.
539 */
540 static void
_base_display_event_data(struct MPT2SAS_ADAPTER * ioc,Mpi2EventNotificationReply_t * mpi_reply)541 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
542 Mpi2EventNotificationReply_t *mpi_reply)
543 {
544 char *desc = NULL;
545 u16 event;
546
547 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
548 return;
549
550 event = le16_to_cpu(mpi_reply->Event);
551
552 switch (event) {
553 case MPI2_EVENT_LOG_DATA:
554 desc = "Log Data";
555 break;
556 case MPI2_EVENT_STATE_CHANGE:
557 desc = "Status Change";
558 break;
559 case MPI2_EVENT_HARD_RESET_RECEIVED:
560 desc = "Hard Reset Received";
561 break;
562 case MPI2_EVENT_EVENT_CHANGE:
563 desc = "Event Change";
564 break;
565 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
566 desc = "Device Status Change";
567 break;
568 case MPI2_EVENT_IR_OPERATION_STATUS:
569 if (!ioc->hide_ir_msg)
570 desc = "IR Operation Status";
571 break;
572 case MPI2_EVENT_SAS_DISCOVERY:
573 {
574 Mpi2EventDataSasDiscovery_t *event_data =
575 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
576 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
577 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
578 "start" : "stop");
579 if (event_data->DiscoveryStatus)
580 printk("discovery_status(0x%08x)",
581 le32_to_cpu(event_data->DiscoveryStatus));
582 printk("\n");
583 return;
584 }
585 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
586 desc = "SAS Broadcast Primitive";
587 break;
588 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
589 desc = "SAS Init Device Status Change";
590 break;
591 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
592 desc = "SAS Init Table Overflow";
593 break;
594 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
595 desc = "SAS Topology Change List";
596 break;
597 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
598 desc = "SAS Enclosure Device Status Change";
599 break;
600 case MPI2_EVENT_IR_VOLUME:
601 if (!ioc->hide_ir_msg)
602 desc = "IR Volume";
603 break;
604 case MPI2_EVENT_IR_PHYSICAL_DISK:
605 if (!ioc->hide_ir_msg)
606 desc = "IR Physical Disk";
607 break;
608 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
609 if (!ioc->hide_ir_msg)
610 desc = "IR Configuration Change List";
611 break;
612 case MPI2_EVENT_LOG_ENTRY_ADDED:
613 if (!ioc->hide_ir_msg)
614 desc = "Log Entry Added";
615 break;
616 }
617
618 if (!desc)
619 return;
620
621 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
622 }
623 #endif
624
625 /**
626 * _base_sas_log_info - verbose translation of firmware log info
627 * @ioc: per adapter object
628 * @log_info: log info
629 *
630 * Return nothing.
631 */
632 static void
_base_sas_log_info(struct MPT2SAS_ADAPTER * ioc,u32 log_info)633 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
634 {
635 union loginfo_type {
636 u32 loginfo;
637 struct {
638 u32 subcode:16;
639 u32 code:8;
640 u32 originator:4;
641 u32 bus_type:4;
642 } dw;
643 };
644 union loginfo_type sas_loginfo;
645 char *originator_str = NULL;
646
647 sas_loginfo.loginfo = log_info;
648 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
649 return;
650
651 /* each nexus loss loginfo */
652 if (log_info == 0x31170000)
653 return;
654
655 /* eat the loginfos associated with task aborts */
656 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
657 0x31140000 || log_info == 0x31130000))
658 return;
659
660 switch (sas_loginfo.dw.originator) {
661 case 0:
662 originator_str = "IOP";
663 break;
664 case 1:
665 originator_str = "PL";
666 break;
667 case 2:
668 if (!ioc->hide_ir_msg)
669 originator_str = "IR";
670 else
671 originator_str = "WarpDrive";
672 break;
673 }
674
675 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
676 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
677 originator_str, sas_loginfo.dw.code,
678 sas_loginfo.dw.subcode);
679 }
680
681 /**
682 * _base_display_reply_info -
683 * @ioc: per adapter object
684 * @smid: system request message index
685 * @msix_index: MSIX table index supplied by the OS
686 * @reply: reply message frame(lower 32bit addr)
687 *
688 * Return nothing.
689 */
690 static void
_base_display_reply_info(struct MPT2SAS_ADAPTER * ioc,u16 smid,u8 msix_index,u32 reply)691 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
692 u32 reply)
693 {
694 MPI2DefaultReply_t *mpi_reply;
695 u16 ioc_status;
696
697 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
698 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
699 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
700 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
701 (ioc->logging_level & MPT_DEBUG_REPLY)) {
702 _base_sas_ioc_info(ioc , mpi_reply,
703 mpt2sas_base_get_msg_frame(ioc, smid));
704 }
705 #endif
706 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
707 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
708 }
709
710 /**
711 * mpt2sas_base_done - base internal command completion routine
712 * @ioc: per adapter object
713 * @smid: system request message index
714 * @msix_index: MSIX table index supplied by the OS
715 * @reply: reply message frame(lower 32bit addr)
716 *
717 * Return 1 meaning mf should be freed from _base_interrupt
718 * 0 means the mf is freed from this function.
719 */
720 u8
mpt2sas_base_done(struct MPT2SAS_ADAPTER * ioc,u16 smid,u8 msix_index,u32 reply)721 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
722 u32 reply)
723 {
724 MPI2DefaultReply_t *mpi_reply;
725
726 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
727 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
728 return 1;
729
730 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
731 return 1;
732
733 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
734 if (mpi_reply) {
735 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
736 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
737 }
738 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
739
740 complete(&ioc->base_cmds.done);
741 return 1;
742 }
743
744 /**
745 * _base_async_event - main callback handler for firmware asyn events
746 * @ioc: per adapter object
747 * @msix_index: MSIX table index supplied by the OS
748 * @reply: reply message frame(lower 32bit addr)
749 *
750 * Return 1 meaning mf should be freed from _base_interrupt
751 * 0 means the mf is freed from this function.
752 */
753 static u8
_base_async_event(struct MPT2SAS_ADAPTER * ioc,u8 msix_index,u32 reply)754 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
755 {
756 Mpi2EventNotificationReply_t *mpi_reply;
757 Mpi2EventAckRequest_t *ack_request;
758 u16 smid;
759
760 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
761 if (!mpi_reply)
762 return 1;
763 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
764 return 1;
765 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
766 _base_display_event_data(ioc, mpi_reply);
767 #endif
768 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
769 goto out;
770 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
771 if (!smid) {
772 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
773 ioc->name, __func__);
774 goto out;
775 }
776
777 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
778 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
779 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
780 ack_request->Event = mpi_reply->Event;
781 ack_request->EventContext = mpi_reply->EventContext;
782 ack_request->VF_ID = 0; /* TODO */
783 ack_request->VP_ID = 0;
784 mpt2sas_base_put_smid_default(ioc, smid);
785
786 out:
787
788 /* scsih callback handler */
789 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
790
791 /* ctl callback handler */
792 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
793
794 return 1;
795 }
796
797 /**
798 * _base_get_cb_idx - obtain the callback index
799 * @ioc: per adapter object
800 * @smid: system request message index
801 *
802 * Return callback index.
803 */
804 static u8
_base_get_cb_idx(struct MPT2SAS_ADAPTER * ioc,u16 smid)805 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
806 {
807 int i;
808 u8 cb_idx;
809
810 if (smid < ioc->hi_priority_smid) {
811 i = smid - 1;
812 cb_idx = ioc->scsi_lookup[i].cb_idx;
813 } else if (smid < ioc->internal_smid) {
814 i = smid - ioc->hi_priority_smid;
815 cb_idx = ioc->hpr_lookup[i].cb_idx;
816 } else if (smid <= ioc->hba_queue_depth) {
817 i = smid - ioc->internal_smid;
818 cb_idx = ioc->internal_lookup[i].cb_idx;
819 } else
820 cb_idx = 0xFF;
821 return cb_idx;
822 }
823
824 /**
825 * _base_mask_interrupts - disable interrupts
826 * @ioc: per adapter object
827 *
828 * Disabling ResetIRQ, Reply and Doorbell Interrupts
829 *
830 * Return nothing.
831 */
832 static void
_base_mask_interrupts(struct MPT2SAS_ADAPTER * ioc)833 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
834 {
835 u32 him_register;
836
837 ioc->mask_interrupts = 1;
838 him_register = readl(&ioc->chip->HostInterruptMask);
839 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
840 writel(him_register, &ioc->chip->HostInterruptMask);
841 readl(&ioc->chip->HostInterruptMask);
842 }
843
844 /**
845 * _base_unmask_interrupts - enable interrupts
846 * @ioc: per adapter object
847 *
848 * Enabling only Reply Interrupts
849 *
850 * Return nothing.
851 */
852 static void
_base_unmask_interrupts(struct MPT2SAS_ADAPTER * ioc)853 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
854 {
855 u32 him_register;
856
857 him_register = readl(&ioc->chip->HostInterruptMask);
858 him_register &= ~MPI2_HIM_RIM;
859 writel(him_register, &ioc->chip->HostInterruptMask);
860 ioc->mask_interrupts = 0;
861 }
862
863 union reply_descriptor {
864 u64 word;
865 struct {
866 u32 low;
867 u32 high;
868 } u;
869 };
870
871 /**
872 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
873 * @irq: irq number (not used)
874 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
875 * @r: pt_regs pointer (not used)
876 *
877 * Return IRQ_HANDLE if processed, else IRQ_NONE.
878 */
879 static irqreturn_t
_base_interrupt(int irq,void * bus_id)880 _base_interrupt(int irq, void *bus_id)
881 {
882 struct adapter_reply_queue *reply_q = bus_id;
883 union reply_descriptor rd;
884 u32 completed_cmds;
885 u8 request_desript_type;
886 u16 smid;
887 u8 cb_idx;
888 u32 reply;
889 u8 msix_index = reply_q->msix_index;
890 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
891 Mpi2ReplyDescriptorsUnion_t *rpf;
892 u8 rc;
893
894 if (ioc->mask_interrupts)
895 return IRQ_NONE;
896
897 if (!atomic_add_unless(&reply_q->busy, 1, 1))
898 return IRQ_NONE;
899
900 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
901 request_desript_type = rpf->Default.ReplyFlags
902 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
903 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
904 atomic_dec(&reply_q->busy);
905 return IRQ_NONE;
906 }
907
908 completed_cmds = 0;
909 cb_idx = 0xFF;
910 do {
911 rd.word = le64_to_cpu(rpf->Words);
912 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
913 goto out;
914 reply = 0;
915 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
916 if (request_desript_type ==
917 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
918 reply = le32_to_cpu
919 (rpf->AddressReply.ReplyFrameAddress);
920 if (reply > ioc->reply_dma_max_address ||
921 reply < ioc->reply_dma_min_address)
922 reply = 0;
923 } else if (request_desript_type ==
924 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
925 goto next;
926 else if (request_desript_type ==
927 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
928 goto next;
929 if (smid)
930 cb_idx = _base_get_cb_idx(ioc, smid);
931 if (smid && cb_idx != 0xFF) {
932 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
933 reply);
934 if (reply)
935 _base_display_reply_info(ioc, smid, msix_index,
936 reply);
937 if (rc)
938 mpt2sas_base_free_smid(ioc, smid);
939 }
940 if (!smid)
941 _base_async_event(ioc, msix_index, reply);
942
943 /* reply free queue handling */
944 if (reply) {
945 ioc->reply_free_host_index =
946 (ioc->reply_free_host_index ==
947 (ioc->reply_free_queue_depth - 1)) ?
948 0 : ioc->reply_free_host_index + 1;
949 ioc->reply_free[ioc->reply_free_host_index] =
950 cpu_to_le32(reply);
951 wmb();
952 writel(ioc->reply_free_host_index,
953 &ioc->chip->ReplyFreeHostIndex);
954 }
955
956 next:
957
958 rpf->Words = cpu_to_le64(ULLONG_MAX);
959 reply_q->reply_post_host_index =
960 (reply_q->reply_post_host_index ==
961 (ioc->reply_post_queue_depth - 1)) ? 0 :
962 reply_q->reply_post_host_index + 1;
963 request_desript_type =
964 reply_q->reply_post_free[reply_q->reply_post_host_index].
965 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
966 completed_cmds++;
967 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
968 goto out;
969 if (!reply_q->reply_post_host_index)
970 rpf = reply_q->reply_post_free;
971 else
972 rpf++;
973 } while (1);
974
975 out:
976
977 if (!completed_cmds) {
978 atomic_dec(&reply_q->busy);
979 return IRQ_NONE;
980 }
981 wmb();
982 if (ioc->is_warpdrive) {
983 writel(reply_q->reply_post_host_index,
984 ioc->reply_post_host_index[msix_index]);
985 atomic_dec(&reply_q->busy);
986 return IRQ_HANDLED;
987 }
988 writel(reply_q->reply_post_host_index | (msix_index <<
989 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
990 atomic_dec(&reply_q->busy);
991 return IRQ_HANDLED;
992 }
993
994 /**
995 * _base_is_controller_msix_enabled - is controller support muli-reply queues
996 * @ioc: per adapter object
997 *
998 */
999 static inline int
_base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER * ioc)1000 _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
1001 {
1002 return (ioc->facts.IOCCapabilities &
1003 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1004 }
1005
1006 /**
1007 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
1008 * @ioc: per adapter object
1009 * Context: ISR conext
1010 *
1011 * Called when a Task Management request has completed. We want
1012 * to flush the other reply queues so all the outstanding IO has been
1013 * completed back to OS before we process the TM completetion.
1014 *
1015 * Return nothing.
1016 */
1017 void
mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER * ioc)1018 mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1019 {
1020 struct adapter_reply_queue *reply_q;
1021
1022 /* If MSIX capability is turned off
1023 * then multi-queues are not enabled
1024 */
1025 if (!_base_is_controller_msix_enabled(ioc))
1026 return;
1027
1028 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1029 if (ioc->shost_recovery)
1030 return;
1031 /* TMs are on msix_index == 0 */
1032 if (reply_q->msix_index == 0)
1033 continue;
1034 _base_interrupt(reply_q->vector, (void *)reply_q);
1035 }
1036 }
1037
1038 /**
1039 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
1040 * @cb_idx: callback index
1041 *
1042 * Return nothing.
1043 */
1044 void
mpt2sas_base_release_callback_handler(u8 cb_idx)1045 mpt2sas_base_release_callback_handler(u8 cb_idx)
1046 {
1047 mpt_callbacks[cb_idx] = NULL;
1048 }
1049
1050 /**
1051 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
1052 * @cb_func: callback function
1053 *
1054 * Returns cb_func.
1055 */
1056 u8
mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)1057 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1058 {
1059 u8 cb_idx;
1060
1061 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1062 if (mpt_callbacks[cb_idx] == NULL)
1063 break;
1064
1065 mpt_callbacks[cb_idx] = cb_func;
1066 return cb_idx;
1067 }
1068
1069 /**
1070 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
1071 *
1072 * Return nothing.
1073 */
1074 void
mpt2sas_base_initialize_callback_handler(void)1075 mpt2sas_base_initialize_callback_handler(void)
1076 {
1077 u8 cb_idx;
1078
1079 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1080 mpt2sas_base_release_callback_handler(cb_idx);
1081 }
1082
1083 /**
1084 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
1085 * @ioc: per adapter object
1086 * @paddr: virtual address for SGE
1087 *
1088 * Create a zero length scatter gather entry to insure the IOCs hardware has
1089 * something to use if the target device goes brain dead and tries
1090 * to send data even when none is asked for.
1091 *
1092 * Return nothing.
1093 */
1094 void
mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER * ioc,void * paddr)1095 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1096 {
1097 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1098 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1099 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1100 MPI2_SGE_FLAGS_SHIFT);
1101 ioc->base_add_sg_single(paddr, flags_length, -1);
1102 }
1103
1104 /**
1105 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1106 * @paddr: virtual address for SGE
1107 * @flags_length: SGE flags and data transfer length
1108 * @dma_addr: Physical address
1109 *
1110 * Return nothing.
1111 */
1112 static void
_base_add_sg_single_32(void * paddr,u32 flags_length,dma_addr_t dma_addr)1113 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1114 {
1115 Mpi2SGESimple32_t *sgel = paddr;
1116
1117 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1118 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1119 sgel->FlagsLength = cpu_to_le32(flags_length);
1120 sgel->Address = cpu_to_le32(dma_addr);
1121 }
1122
1123
1124 /**
1125 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1126 * @paddr: virtual address for SGE
1127 * @flags_length: SGE flags and data transfer length
1128 * @dma_addr: Physical address
1129 *
1130 * Return nothing.
1131 */
1132 static void
_base_add_sg_single_64(void * paddr,u32 flags_length,dma_addr_t dma_addr)1133 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1134 {
1135 Mpi2SGESimple64_t *sgel = paddr;
1136
1137 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1138 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1139 sgel->FlagsLength = cpu_to_le32(flags_length);
1140 sgel->Address = cpu_to_le64(dma_addr);
1141 }
1142
1143 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1144
1145 /**
1146 * _base_config_dma_addressing - set dma addressing
1147 * @ioc: per adapter object
1148 * @pdev: PCI device struct
1149 *
1150 * Returns 0 for success, non-zero for failure.
1151 */
1152 static int
_base_config_dma_addressing(struct MPT2SAS_ADAPTER * ioc,struct pci_dev * pdev)1153 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1154 {
1155 struct sysinfo s;
1156 char *desc = NULL;
1157
1158 if (sizeof(dma_addr_t) > 4) {
1159 const uint64_t required_mask =
1160 dma_get_required_mask(&pdev->dev);
1161 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1162 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1163 DMA_BIT_MASK(64))) {
1164 ioc->base_add_sg_single = &_base_add_sg_single_64;
1165 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1166 desc = "64";
1167 goto out;
1168 }
1169 }
1170
1171 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1172 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1173 ioc->base_add_sg_single = &_base_add_sg_single_32;
1174 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1175 desc = "32";
1176 } else
1177 return -ENODEV;
1178
1179 out:
1180 si_meminfo(&s);
1181 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1182 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1183
1184 return 0;
1185 }
1186
1187 /**
1188 * _base_check_enable_msix - checks MSIX capabable.
1189 * @ioc: per adapter object
1190 *
1191 * Check to see if card is capable of MSIX, and set number
1192 * of available msix vectors
1193 */
1194 static int
_base_check_enable_msix(struct MPT2SAS_ADAPTER * ioc)1195 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1196 {
1197 int base;
1198 u16 message_control;
1199
1200
1201 /* Check whether controller SAS2008 B0 controller,
1202 if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
1203 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1204 ioc->pdev->revision == 0x01) {
1205 return -EINVAL;
1206 }
1207
1208 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1209 if (!base) {
1210 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1211 "supported\n", ioc->name));
1212 return -EINVAL;
1213 }
1214
1215 /* get msix vector count */
1216 /* NUMA_IO not supported for older controllers */
1217 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1218 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1219 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1220 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1221 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1222 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1223 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1224 ioc->msix_vector_count = 1;
1225 else {
1226 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1227 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1228 }
1229 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1230 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1231
1232 return 0;
1233 }
1234
1235 /**
1236 * _base_free_irq - free irq
1237 * @ioc: per adapter object
1238 *
1239 * Freeing respective reply_queue from the list.
1240 */
1241 static void
_base_free_irq(struct MPT2SAS_ADAPTER * ioc)1242 _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1243 {
1244 struct adapter_reply_queue *reply_q, *next;
1245
1246 if (list_empty(&ioc->reply_queue_list))
1247 return;
1248
1249 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1250 list_del(&reply_q->list);
1251 synchronize_irq(reply_q->vector);
1252 free_irq(reply_q->vector, reply_q);
1253 kfree(reply_q);
1254 }
1255 }
1256
1257 /**
1258 * _base_request_irq - request irq
1259 * @ioc: per adapter object
1260 * @index: msix index into vector table
1261 * @vector: irq vector
1262 *
1263 * Inserting respective reply_queue into the list.
1264 */
1265 static int
_base_request_irq(struct MPT2SAS_ADAPTER * ioc,u8 index,u32 vector)1266 _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1267 {
1268 struct adapter_reply_queue *reply_q;
1269 int r;
1270
1271 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1272 if (!reply_q) {
1273 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
1274 ioc->name, (int)sizeof(struct adapter_reply_queue));
1275 return -ENOMEM;
1276 }
1277 reply_q->ioc = ioc;
1278 reply_q->msix_index = index;
1279 reply_q->vector = vector;
1280 atomic_set(&reply_q->busy, 0);
1281 if (ioc->msix_enable)
1282 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1283 MPT2SAS_DRIVER_NAME, ioc->id, index);
1284 else
1285 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1286 MPT2SAS_DRIVER_NAME, ioc->id);
1287 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1288 reply_q);
1289 if (r) {
1290 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1291 reply_q->name, vector);
1292 kfree(reply_q);
1293 return -EBUSY;
1294 }
1295
1296 INIT_LIST_HEAD(&reply_q->list);
1297 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1298 return 0;
1299 }
1300
1301 /**
1302 * _base_assign_reply_queues - assigning msix index for each cpu
1303 * @ioc: per adapter object
1304 *
1305 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1306 *
1307 * It would nice if we could call irq_set_affinity, however it is not
1308 * an exported symbol
1309 */
1310 static void
_base_assign_reply_queues(struct MPT2SAS_ADAPTER * ioc)1311 _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1312 {
1313 struct adapter_reply_queue *reply_q;
1314 int cpu_id;
1315 int cpu_grouping, loop, grouping, grouping_mod;
1316
1317 if (!_base_is_controller_msix_enabled(ioc))
1318 return;
1319
1320 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1321 /* when there are more cpus than available msix vectors,
1322 * then group cpus togeather on same irq
1323 */
1324 if (ioc->cpu_count > ioc->msix_vector_count) {
1325 grouping = ioc->cpu_count / ioc->msix_vector_count;
1326 grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
1327 if (grouping < 2 || (grouping == 2 && !grouping_mod))
1328 cpu_grouping = 2;
1329 else if (grouping < 4 || (grouping == 4 && !grouping_mod))
1330 cpu_grouping = 4;
1331 else if (grouping < 8 || (grouping == 8 && !grouping_mod))
1332 cpu_grouping = 8;
1333 else
1334 cpu_grouping = 16;
1335 } else
1336 cpu_grouping = 0;
1337
1338 loop = 0;
1339 reply_q = list_entry(ioc->reply_queue_list.next,
1340 struct adapter_reply_queue, list);
1341 for_each_online_cpu(cpu_id) {
1342 if (!cpu_grouping) {
1343 ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
1344 reply_q = list_entry(reply_q->list.next,
1345 struct adapter_reply_queue, list);
1346 } else {
1347 if (loop < cpu_grouping) {
1348 ioc->cpu_msix_table[cpu_id] =
1349 reply_q->msix_index;
1350 loop++;
1351 } else {
1352 reply_q = list_entry(reply_q->list.next,
1353 struct adapter_reply_queue, list);
1354 ioc->cpu_msix_table[cpu_id] =
1355 reply_q->msix_index;
1356 loop = 1;
1357 }
1358 }
1359 }
1360 }
1361
1362 /**
1363 * _base_disable_msix - disables msix
1364 * @ioc: per adapter object
1365 *
1366 */
1367 static void
_base_disable_msix(struct MPT2SAS_ADAPTER * ioc)1368 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1369 {
1370 if (ioc->msix_enable) {
1371 pci_disable_msix(ioc->pdev);
1372 ioc->msix_enable = 0;
1373 }
1374 }
1375
1376 /**
1377 * _base_enable_msix - enables msix, failback to io_apic
1378 * @ioc: per adapter object
1379 *
1380 */
1381 static int
_base_enable_msix(struct MPT2SAS_ADAPTER * ioc)1382 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1383 {
1384 struct msix_entry *entries, *a;
1385 int r;
1386 int i;
1387 u8 try_msix = 0;
1388
1389 INIT_LIST_HEAD(&ioc->reply_queue_list);
1390
1391 if (msix_disable == -1 || msix_disable == 0)
1392 try_msix = 1;
1393
1394 if (!try_msix)
1395 goto try_ioapic;
1396
1397 if (_base_check_enable_msix(ioc) != 0)
1398 goto try_ioapic;
1399
1400 ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1401 ioc->msix_vector_count);
1402
1403 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1404 GFP_KERNEL);
1405 if (!entries) {
1406 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1407 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1408 __LINE__, __func__));
1409 goto try_ioapic;
1410 }
1411
1412 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1413 a->entry = i;
1414
1415 r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
1416 if (r) {
1417 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1418 "failed (r=%d) !!!\n", ioc->name, r));
1419 kfree(entries);
1420 goto try_ioapic;
1421 }
1422
1423 ioc->msix_enable = 1;
1424 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1425 r = _base_request_irq(ioc, i, a->vector);
1426 if (r) {
1427 _base_free_irq(ioc);
1428 _base_disable_msix(ioc);
1429 kfree(entries);
1430 goto try_ioapic;
1431 }
1432 }
1433
1434 kfree(entries);
1435 return 0;
1436
1437 /* failback to io_apic interrupt routing */
1438 try_ioapic:
1439
1440 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1441
1442 return r;
1443 }
1444
1445 /**
1446 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1447 * @ioc: per adapter object
1448 *
1449 * Returns 0 for success, non-zero for failure.
1450 */
1451 int
mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER * ioc)1452 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1453 {
1454 struct pci_dev *pdev = ioc->pdev;
1455 u32 memap_sz;
1456 u32 pio_sz;
1457 int i, r = 0;
1458 u64 pio_chip = 0;
1459 u64 chip_phys = 0;
1460 struct adapter_reply_queue *reply_q;
1461
1462 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1463 ioc->name, __func__));
1464
1465 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1466 if (pci_enable_device_mem(pdev)) {
1467 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1468 "failed\n", ioc->name);
1469 return -ENODEV;
1470 }
1471
1472
1473 if (pci_request_selected_regions(pdev, ioc->bars,
1474 MPT2SAS_DRIVER_NAME)) {
1475 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1476 "failed\n", ioc->name);
1477 r = -ENODEV;
1478 goto out_fail;
1479 }
1480
1481 /* AER (Advanced Error Reporting) hooks */
1482 pci_enable_pcie_error_reporting(pdev);
1483
1484 pci_set_master(pdev);
1485
1486 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1487 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1488 ioc->name, pci_name(pdev));
1489 r = -ENODEV;
1490 goto out_fail;
1491 }
1492
1493 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1494 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1495 if (pio_sz)
1496 continue;
1497 pio_chip = (u64)pci_resource_start(pdev, i);
1498 pio_sz = pci_resource_len(pdev, i);
1499 } else {
1500 if (memap_sz)
1501 continue;
1502 /* verify memory resource is valid before using */
1503 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1504 ioc->chip_phys = pci_resource_start(pdev, i);
1505 chip_phys = (u64)ioc->chip_phys;
1506 memap_sz = pci_resource_len(pdev, i);
1507 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1508 if (ioc->chip == NULL) {
1509 printk(MPT2SAS_ERR_FMT "unable to map "
1510 "adapter memory!\n", ioc->name);
1511 r = -EINVAL;
1512 goto out_fail;
1513 }
1514 }
1515 }
1516 }
1517
1518 _base_mask_interrupts(ioc);
1519 r = _base_enable_msix(ioc);
1520 if (r)
1521 goto out_fail;
1522
1523 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1524 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1525 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1526 "IO-APIC enabled"), reply_q->vector);
1527
1528 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1529 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1530 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1531 ioc->name, (unsigned long long)pio_chip, pio_sz);
1532
1533 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1534 pci_save_state(pdev);
1535
1536 return 0;
1537
1538 out_fail:
1539 if (ioc->chip_phys)
1540 iounmap(ioc->chip);
1541 ioc->chip_phys = 0;
1542 pci_release_selected_regions(ioc->pdev, ioc->bars);
1543 pci_disable_pcie_error_reporting(pdev);
1544 pci_disable_device(pdev);
1545 return r;
1546 }
1547
1548 /**
1549 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1550 * @ioc: per adapter object
1551 * @smid: system request message index(smid zero is invalid)
1552 *
1553 * Returns virt pointer to message frame.
1554 */
1555 void *
mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER * ioc,u16 smid)1556 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1557 {
1558 return (void *)(ioc->request + (smid * ioc->request_sz));
1559 }
1560
1561 /**
1562 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1563 * @ioc: per adapter object
1564 * @smid: system request message index
1565 *
1566 * Returns virt pointer to sense buffer.
1567 */
1568 void *
mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER * ioc,u16 smid)1569 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1570 {
1571 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1572 }
1573
1574 /**
1575 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1576 * @ioc: per adapter object
1577 * @smid: system request message index
1578 *
1579 * Returns phys pointer to the low 32bit address of the sense buffer.
1580 */
1581 __le32
mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER * ioc,u16 smid)1582 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1583 {
1584 return cpu_to_le32(ioc->sense_dma +
1585 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1586 }
1587
1588 /**
1589 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1590 * @ioc: per adapter object
1591 * @phys_addr: lower 32 physical addr of the reply
1592 *
1593 * Converts 32bit lower physical addr into a virt address.
1594 */
1595 void *
mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER * ioc,u32 phys_addr)1596 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1597 {
1598 if (!phys_addr)
1599 return NULL;
1600 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1601 }
1602
1603 /**
1604 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1605 * @ioc: per adapter object
1606 * @cb_idx: callback index
1607 *
1608 * Returns smid (zero is invalid)
1609 */
1610 u16
mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER * ioc,u8 cb_idx)1611 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1612 {
1613 unsigned long flags;
1614 struct request_tracker *request;
1615 u16 smid;
1616
1617 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1618 if (list_empty(&ioc->internal_free_list)) {
1619 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1620 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1621 ioc->name, __func__);
1622 return 0;
1623 }
1624
1625 request = list_entry(ioc->internal_free_list.next,
1626 struct request_tracker, tracker_list);
1627 request->cb_idx = cb_idx;
1628 smid = request->smid;
1629 list_del(&request->tracker_list);
1630 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1631 return smid;
1632 }
1633
1634 /**
1635 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1636 * @ioc: per adapter object
1637 * @cb_idx: callback index
1638 * @scmd: pointer to scsi command object
1639 *
1640 * Returns smid (zero is invalid)
1641 */
1642 u16
mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER * ioc,u8 cb_idx,struct scsi_cmnd * scmd)1643 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1644 struct scsi_cmnd *scmd)
1645 {
1646 unsigned long flags;
1647 struct scsiio_tracker *request;
1648 u16 smid;
1649
1650 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1651 if (list_empty(&ioc->free_list)) {
1652 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1653 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1654 ioc->name, __func__);
1655 return 0;
1656 }
1657
1658 request = list_entry(ioc->free_list.next,
1659 struct scsiio_tracker, tracker_list);
1660 request->scmd = scmd;
1661 request->cb_idx = cb_idx;
1662 smid = request->smid;
1663 list_del(&request->tracker_list);
1664 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1665 return smid;
1666 }
1667
1668 /**
1669 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1670 * @ioc: per adapter object
1671 * @cb_idx: callback index
1672 *
1673 * Returns smid (zero is invalid)
1674 */
1675 u16
mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER * ioc,u8 cb_idx)1676 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1677 {
1678 unsigned long flags;
1679 struct request_tracker *request;
1680 u16 smid;
1681
1682 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1683 if (list_empty(&ioc->hpr_free_list)) {
1684 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1685 return 0;
1686 }
1687
1688 request = list_entry(ioc->hpr_free_list.next,
1689 struct request_tracker, tracker_list);
1690 request->cb_idx = cb_idx;
1691 smid = request->smid;
1692 list_del(&request->tracker_list);
1693 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1694 return smid;
1695 }
1696
1697
1698 /**
1699 * mpt2sas_base_free_smid - put smid back on free_list
1700 * @ioc: per adapter object
1701 * @smid: system request message index
1702 *
1703 * Return nothing.
1704 */
1705 void
mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER * ioc,u16 smid)1706 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1707 {
1708 unsigned long flags;
1709 int i;
1710 struct chain_tracker *chain_req, *next;
1711
1712 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1713 if (smid < ioc->hi_priority_smid) {
1714 /* scsiio queue */
1715 i = smid - 1;
1716 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1717 list_for_each_entry_safe(chain_req, next,
1718 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1719 list_del_init(&chain_req->tracker_list);
1720 list_add_tail(&chain_req->tracker_list,
1721 &ioc->free_chain_list);
1722 }
1723 }
1724 ioc->scsi_lookup[i].cb_idx = 0xFF;
1725 ioc->scsi_lookup[i].scmd = NULL;
1726 ioc->scsi_lookup[i].direct_io = 0;
1727 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1728 &ioc->free_list);
1729 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1730
1731 /*
1732 * See _wait_for_commands_to_complete() call with regards
1733 * to this code.
1734 */
1735 if (ioc->shost_recovery && ioc->pending_io_count) {
1736 if (ioc->pending_io_count == 1)
1737 wake_up(&ioc->reset_wq);
1738 ioc->pending_io_count--;
1739 }
1740 return;
1741 } else if (smid < ioc->internal_smid) {
1742 /* hi-priority */
1743 i = smid - ioc->hi_priority_smid;
1744 ioc->hpr_lookup[i].cb_idx = 0xFF;
1745 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1746 &ioc->hpr_free_list);
1747 } else if (smid <= ioc->hba_queue_depth) {
1748 /* internal queue */
1749 i = smid - ioc->internal_smid;
1750 ioc->internal_lookup[i].cb_idx = 0xFF;
1751 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1752 &ioc->internal_free_list);
1753 }
1754 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1755 }
1756
1757 /**
1758 * _base_writeq - 64 bit write to MMIO
1759 * @ioc: per adapter object
1760 * @b: data payload
1761 * @addr: address in MMIO space
1762 * @writeq_lock: spin lock
1763 *
1764 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1765 * care of 32 bit environment where its not quarenteed to send the entire word
1766 * in one transfer.
1767 */
1768 #ifndef writeq
_base_writeq(__u64 b,volatile void __iomem * addr,spinlock_t * writeq_lock)1769 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1770 spinlock_t *writeq_lock)
1771 {
1772 unsigned long flags;
1773 __u64 data_out = cpu_to_le64(b);
1774
1775 spin_lock_irqsave(writeq_lock, flags);
1776 writel((u32)(data_out), addr);
1777 writel((u32)(data_out >> 32), (addr + 4));
1778 spin_unlock_irqrestore(writeq_lock, flags);
1779 }
1780 #else
_base_writeq(__u64 b,volatile void __iomem * addr,spinlock_t * writeq_lock)1781 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1782 spinlock_t *writeq_lock)
1783 {
1784 writeq(cpu_to_le64(b), addr);
1785 }
1786 #endif
1787
1788 static inline u8
_base_get_msix_index(struct MPT2SAS_ADAPTER * ioc)1789 _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1790 {
1791 return ioc->cpu_msix_table[raw_smp_processor_id()];
1792 }
1793
1794 /**
1795 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1796 * @ioc: per adapter object
1797 * @smid: system request message index
1798 * @handle: device handle
1799 *
1800 * Return nothing.
1801 */
1802 void
mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER * ioc,u16 smid,u16 handle)1803 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1804 {
1805 Mpi2RequestDescriptorUnion_t descriptor;
1806 u64 *request = (u64 *)&descriptor;
1807
1808
1809 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1810 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1811 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1812 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1813 descriptor.SCSIIO.LMID = 0;
1814 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1815 &ioc->scsi_lookup_lock);
1816 }
1817
1818
1819 /**
1820 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1821 * @ioc: per adapter object
1822 * @smid: system request message index
1823 *
1824 * Return nothing.
1825 */
1826 void
mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER * ioc,u16 smid)1827 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1828 {
1829 Mpi2RequestDescriptorUnion_t descriptor;
1830 u64 *request = (u64 *)&descriptor;
1831
1832 descriptor.HighPriority.RequestFlags =
1833 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1834 descriptor.HighPriority.MSIxIndex = 0;
1835 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1836 descriptor.HighPriority.LMID = 0;
1837 descriptor.HighPriority.Reserved1 = 0;
1838 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1839 &ioc->scsi_lookup_lock);
1840 }
1841
1842 /**
1843 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1844 * @ioc: per adapter object
1845 * @smid: system request message index
1846 *
1847 * Return nothing.
1848 */
1849 void
mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER * ioc,u16 smid)1850 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1851 {
1852 Mpi2RequestDescriptorUnion_t descriptor;
1853 u64 *request = (u64 *)&descriptor;
1854
1855 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1856 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1857 descriptor.Default.SMID = cpu_to_le16(smid);
1858 descriptor.Default.LMID = 0;
1859 descriptor.Default.DescriptorTypeDependent = 0;
1860 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1861 &ioc->scsi_lookup_lock);
1862 }
1863
1864 /**
1865 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1866 * @ioc: per adapter object
1867 * @smid: system request message index
1868 * @io_index: value used to track the IO
1869 *
1870 * Return nothing.
1871 */
1872 void
mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER * ioc,u16 smid,u16 io_index)1873 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1874 u16 io_index)
1875 {
1876 Mpi2RequestDescriptorUnion_t descriptor;
1877 u64 *request = (u64 *)&descriptor;
1878
1879 descriptor.SCSITarget.RequestFlags =
1880 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1881 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1882 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1883 descriptor.SCSITarget.LMID = 0;
1884 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1885 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1886 &ioc->scsi_lookup_lock);
1887 }
1888
1889 /**
1890 * _base_display_dell_branding - Disply branding string
1891 * @ioc: per adapter object
1892 *
1893 * Return nothing.
1894 */
1895 static void
_base_display_dell_branding(struct MPT2SAS_ADAPTER * ioc)1896 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1897 {
1898 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1899
1900 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1901 return;
1902
1903 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1904 switch (ioc->pdev->subsystem_device) {
1905 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1906 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1907 MPT2SAS_DELL_BRANDING_SIZE - 1);
1908 break;
1909 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1910 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1911 MPT2SAS_DELL_BRANDING_SIZE - 1);
1912 break;
1913 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1914 strncpy(dell_branding,
1915 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1916 MPT2SAS_DELL_BRANDING_SIZE - 1);
1917 break;
1918 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1919 strncpy(dell_branding,
1920 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1921 MPT2SAS_DELL_BRANDING_SIZE - 1);
1922 break;
1923 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1924 strncpy(dell_branding,
1925 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1926 MPT2SAS_DELL_BRANDING_SIZE - 1);
1927 break;
1928 case MPT2SAS_DELL_PERC_H200_SSDID:
1929 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1930 MPT2SAS_DELL_BRANDING_SIZE - 1);
1931 break;
1932 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1933 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1934 MPT2SAS_DELL_BRANDING_SIZE - 1);
1935 break;
1936 default:
1937 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1938 break;
1939 }
1940
1941 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1942 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1943 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1944 ioc->pdev->subsystem_device);
1945 }
1946
1947 /**
1948 * _base_display_intel_branding - Display branding string
1949 * @ioc: per adapter object
1950 *
1951 * Return nothing.
1952 */
1953 static void
_base_display_intel_branding(struct MPT2SAS_ADAPTER * ioc)1954 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1955 {
1956 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1957 return;
1958
1959 switch (ioc->pdev->device) {
1960 case MPI2_MFGPAGE_DEVID_SAS2008:
1961 switch (ioc->pdev->subsystem_device) {
1962 case MPT2SAS_INTEL_RMS2LL080_SSDID:
1963 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1964 MPT2SAS_INTEL_RMS2LL080_BRANDING);
1965 break;
1966 case MPT2SAS_INTEL_RMS2LL040_SSDID:
1967 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1968 MPT2SAS_INTEL_RMS2LL040_BRANDING);
1969 break;
1970 case MPT2SAS_INTEL_RAMSDALE_SSDID:
1971 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1972 MPT2SAS_INTEL_RAMSDALE_BRANDING);
1973 break;
1974 default:
1975 break;
1976 }
1977 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1978 switch (ioc->pdev->subsystem_device) {
1979 case MPT2SAS_INTEL_RS25GB008_SSDID:
1980 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1981 MPT2SAS_INTEL_RS25GB008_BRANDING);
1982 break;
1983 case MPT2SAS_INTEL_RMS25JB080_SSDID:
1984 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1985 MPT2SAS_INTEL_RMS25JB080_BRANDING);
1986 break;
1987 case MPT2SAS_INTEL_RMS25JB040_SSDID:
1988 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1989 MPT2SAS_INTEL_RMS25JB040_BRANDING);
1990 break;
1991 case MPT2SAS_INTEL_RMS25KB080_SSDID:
1992 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1993 MPT2SAS_INTEL_RMS25KB080_BRANDING);
1994 break;
1995 case MPT2SAS_INTEL_RMS25KB040_SSDID:
1996 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1997 MPT2SAS_INTEL_RMS25KB040_BRANDING);
1998 break;
1999 default:
2000 break;
2001 }
2002 default:
2003 break;
2004 }
2005 }
2006
2007 /**
2008 * _base_display_hp_branding - Display branding string
2009 * @ioc: per adapter object
2010 *
2011 * Return nothing.
2012 */
2013 static void
_base_display_hp_branding(struct MPT2SAS_ADAPTER * ioc)2014 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
2015 {
2016 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
2017 return;
2018
2019 switch (ioc->pdev->device) {
2020 case MPI2_MFGPAGE_DEVID_SAS2004:
2021 switch (ioc->pdev->subsystem_device) {
2022 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2023 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2024 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2025 break;
2026 default:
2027 break;
2028 }
2029 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2030 switch (ioc->pdev->subsystem_device) {
2031 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2032 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2033 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2034 break;
2035 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2036 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2037 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2038 break;
2039 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2040 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2041 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2042 break;
2043 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2044 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2045 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2046 break;
2047 default:
2048 break;
2049 }
2050 default:
2051 break;
2052 }
2053 }
2054
2055 /**
2056 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2057 * @ioc: per adapter object
2058 *
2059 * Return nothing.
2060 */
2061 static void
_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER * ioc)2062 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
2063 {
2064 int i = 0;
2065 char desc[16];
2066 u32 iounit_pg1_flags;
2067 u32 bios_version;
2068
2069 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2070 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2071 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
2072 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2073 ioc->name, desc,
2074 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2075 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2076 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2077 ioc->facts.FWVersion.Word & 0x000000FF,
2078 ioc->pdev->revision,
2079 (bios_version & 0xFF000000) >> 24,
2080 (bios_version & 0x00FF0000) >> 16,
2081 (bios_version & 0x0000FF00) >> 8,
2082 bios_version & 0x000000FF);
2083
2084 _base_display_dell_branding(ioc);
2085 _base_display_intel_branding(ioc);
2086 _base_display_hp_branding(ioc);
2087
2088 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2089
2090 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2091 printk("Initiator");
2092 i++;
2093 }
2094
2095 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2096 printk("%sTarget", i ? "," : "");
2097 i++;
2098 }
2099
2100 i = 0;
2101 printk("), ");
2102 printk("Capabilities=(");
2103
2104 if (!ioc->hide_ir_msg) {
2105 if (ioc->facts.IOCCapabilities &
2106 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2107 printk("Raid");
2108 i++;
2109 }
2110 }
2111
2112 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2113 printk("%sTLR", i ? "," : "");
2114 i++;
2115 }
2116
2117 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2118 printk("%sMulticast", i ? "," : "");
2119 i++;
2120 }
2121
2122 if (ioc->facts.IOCCapabilities &
2123 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2124 printk("%sBIDI Target", i ? "," : "");
2125 i++;
2126 }
2127
2128 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2129 printk("%sEEDP", i ? "," : "");
2130 i++;
2131 }
2132
2133 if (ioc->facts.IOCCapabilities &
2134 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2135 printk("%sSnapshot Buffer", i ? "," : "");
2136 i++;
2137 }
2138
2139 if (ioc->facts.IOCCapabilities &
2140 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2141 printk("%sDiag Trace Buffer", i ? "," : "");
2142 i++;
2143 }
2144
2145 if (ioc->facts.IOCCapabilities &
2146 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2147 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
2148 i++;
2149 }
2150
2151 if (ioc->facts.IOCCapabilities &
2152 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2153 printk("%sTask Set Full", i ? "," : "");
2154 i++;
2155 }
2156
2157 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2158 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2159 printk("%sNCQ", i ? "," : "");
2160 i++;
2161 }
2162
2163 printk(")\n");
2164 }
2165
2166 /**
2167 * mpt2sas_base_update_missing_delay - change the missing delay timers
2168 * @ioc: per adapter object
2169 * @device_missing_delay: amount of time till device is reported missing
2170 * @io_missing_delay: interval IO is returned when there is a missing device
2171 *
2172 * Return nothing.
2173 *
2174 * Passed on the command line, this function will modify the device missing
2175 * delay, as well as the io missing delay. This should be called at driver
2176 * load time.
2177 */
2178 void
mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER * ioc,u16 device_missing_delay,u8 io_missing_delay)2179 mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2180 u16 device_missing_delay, u8 io_missing_delay)
2181 {
2182 u16 dmd, dmd_new, dmd_orignal;
2183 u8 io_missing_delay_original;
2184 u16 sz;
2185 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2186 Mpi2ConfigReply_t mpi_reply;
2187 u8 num_phys = 0;
2188 u16 ioc_status;
2189
2190 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2191 if (!num_phys)
2192 return;
2193
2194 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2195 sizeof(Mpi2SasIOUnit1PhyData_t));
2196 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2197 if (!sas_iounit_pg1) {
2198 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2199 ioc->name, __FILE__, __LINE__, __func__);
2200 goto out;
2201 }
2202 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2203 sas_iounit_pg1, sz))) {
2204 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2205 ioc->name, __FILE__, __LINE__, __func__);
2206 goto out;
2207 }
2208 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2209 MPI2_IOCSTATUS_MASK;
2210 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2211 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2212 ioc->name, __FILE__, __LINE__, __func__);
2213 goto out;
2214 }
2215
2216 /* device missing delay */
2217 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2218 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2219 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2220 else
2221 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2222 dmd_orignal = dmd;
2223 if (device_missing_delay > 0x7F) {
2224 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2225 device_missing_delay;
2226 dmd = dmd / 16;
2227 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2228 } else
2229 dmd = device_missing_delay;
2230 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2231
2232 /* io missing delay */
2233 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2234 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2235
2236 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2237 sz)) {
2238 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2239 dmd_new = (dmd &
2240 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2241 else
2242 dmd_new =
2243 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2244 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2245 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2246 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2247 "new(%d)\n", ioc->name, io_missing_delay_original,
2248 io_missing_delay);
2249 ioc->device_missing_delay = dmd_new;
2250 ioc->io_missing_delay = io_missing_delay;
2251 }
2252
2253 out:
2254 kfree(sas_iounit_pg1);
2255 }
2256
2257 /**
2258 * _base_static_config_pages - static start of day config pages
2259 * @ioc: per adapter object
2260 *
2261 * Return nothing.
2262 */
2263 static void
_base_static_config_pages(struct MPT2SAS_ADAPTER * ioc)2264 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2265 {
2266 Mpi2ConfigReply_t mpi_reply;
2267 u32 iounit_pg1_flags;
2268
2269 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2270 if (ioc->ir_firmware)
2271 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2272 &ioc->manu_pg10);
2273 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2274 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2275 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2276 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2277 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2278 _base_display_ioc_capabilities(ioc);
2279
2280 /*
2281 * Enable task_set_full handling in iounit_pg1 when the
2282 * facts capabilities indicate that its supported.
2283 */
2284 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2285 if ((ioc->facts.IOCCapabilities &
2286 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2287 iounit_pg1_flags &=
2288 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2289 else
2290 iounit_pg1_flags |=
2291 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2292 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2293 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2294
2295 }
2296
2297 /**
2298 * _base_release_memory_pools - release memory
2299 * @ioc: per adapter object
2300 *
2301 * Free memory allocated from _base_allocate_memory_pools.
2302 *
2303 * Return nothing.
2304 */
2305 static void
_base_release_memory_pools(struct MPT2SAS_ADAPTER * ioc)2306 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2307 {
2308 int i;
2309
2310 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2311 __func__));
2312
2313 if (ioc->request) {
2314 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2315 ioc->request, ioc->request_dma);
2316 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2317 ": free\n", ioc->name, ioc->request));
2318 ioc->request = NULL;
2319 }
2320
2321 if (ioc->sense) {
2322 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2323 if (ioc->sense_dma_pool)
2324 pci_pool_destroy(ioc->sense_dma_pool);
2325 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2326 ": free\n", ioc->name, ioc->sense));
2327 ioc->sense = NULL;
2328 }
2329
2330 if (ioc->reply) {
2331 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2332 if (ioc->reply_dma_pool)
2333 pci_pool_destroy(ioc->reply_dma_pool);
2334 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2335 ": free\n", ioc->name, ioc->reply));
2336 ioc->reply = NULL;
2337 }
2338
2339 if (ioc->reply_free) {
2340 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2341 ioc->reply_free_dma);
2342 if (ioc->reply_free_dma_pool)
2343 pci_pool_destroy(ioc->reply_free_dma_pool);
2344 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2345 "(0x%p): free\n", ioc->name, ioc->reply_free));
2346 ioc->reply_free = NULL;
2347 }
2348
2349 if (ioc->reply_post_free) {
2350 pci_pool_free(ioc->reply_post_free_dma_pool,
2351 ioc->reply_post_free, ioc->reply_post_free_dma);
2352 if (ioc->reply_post_free_dma_pool)
2353 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2354 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2355 "reply_post_free_pool(0x%p): free\n", ioc->name,
2356 ioc->reply_post_free));
2357 ioc->reply_post_free = NULL;
2358 }
2359
2360 if (ioc->config_page) {
2361 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2362 "config_page(0x%p): free\n", ioc->name,
2363 ioc->config_page));
2364 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2365 ioc->config_page, ioc->config_page_dma);
2366 }
2367
2368 if (ioc->scsi_lookup) {
2369 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2370 ioc->scsi_lookup = NULL;
2371 }
2372 kfree(ioc->hpr_lookup);
2373 kfree(ioc->internal_lookup);
2374 if (ioc->chain_lookup) {
2375 for (i = 0; i < ioc->chain_depth; i++) {
2376 if (ioc->chain_lookup[i].chain_buffer)
2377 pci_pool_free(ioc->chain_dma_pool,
2378 ioc->chain_lookup[i].chain_buffer,
2379 ioc->chain_lookup[i].chain_buffer_dma);
2380 }
2381 if (ioc->chain_dma_pool)
2382 pci_pool_destroy(ioc->chain_dma_pool);
2383 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2384 ioc->chain_lookup = NULL;
2385 }
2386 }
2387
2388
2389 /**
2390 * _base_allocate_memory_pools - allocate start of day memory pools
2391 * @ioc: per adapter object
2392 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2393 *
2394 * Returns 0 success, anything else error
2395 */
2396 static int
_base_allocate_memory_pools(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)2397 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2398 {
2399 struct mpt2sas_facts *facts;
2400 u16 max_sge_elements;
2401 u16 chains_needed_per_io;
2402 u32 sz, total_sz, reply_post_free_sz;
2403 u32 retry_sz;
2404 u16 max_request_credit;
2405 int i;
2406
2407 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2408 __func__));
2409
2410 retry_sz = 0;
2411 facts = &ioc->facts;
2412
2413 /* command line tunables for max sgl entries */
2414 if (max_sgl_entries != -1) {
2415 ioc->shost->sg_tablesize = (max_sgl_entries <
2416 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2417 MPT2SAS_SG_DEPTH;
2418 } else {
2419 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2420 }
2421
2422 /* command line tunables for max controller queue depth */
2423 if (max_queue_depth != -1 && max_queue_depth != 0) {
2424 max_request_credit = min_t(u16, max_queue_depth +
2425 ioc->hi_priority_depth + ioc->internal_depth,
2426 facts->RequestCredit);
2427 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
2428 max_request_credit = MAX_HBA_QUEUE_DEPTH;
2429 } else
2430 max_request_credit = min_t(u16, facts->RequestCredit,
2431 MAX_HBA_QUEUE_DEPTH);
2432
2433 ioc->hba_queue_depth = max_request_credit;
2434 ioc->hi_priority_depth = facts->HighPriorityCredit;
2435 ioc->internal_depth = ioc->hi_priority_depth + 5;
2436
2437 /* request frame size */
2438 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2439
2440 /* reply frame size */
2441 ioc->reply_sz = facts->ReplyFrameSize * 4;
2442
2443 retry_allocation:
2444 total_sz = 0;
2445 /* calculate number of sg elements left over in the 1st frame */
2446 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2447 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2448 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2449
2450 /* now do the same for a chain buffer */
2451 max_sge_elements = ioc->request_sz - ioc->sge_size;
2452 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2453
2454 ioc->chain_offset_value_for_main_message =
2455 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2456 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2457
2458 /*
2459 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2460 */
2461 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2462 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2463 + 1;
2464 if (chains_needed_per_io > facts->MaxChainDepth) {
2465 chains_needed_per_io = facts->MaxChainDepth;
2466 ioc->shost->sg_tablesize = min_t(u16,
2467 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2468 * chains_needed_per_io), ioc->shost->sg_tablesize);
2469 }
2470 ioc->chains_needed_per_io = chains_needed_per_io;
2471
2472 /* reply free queue sizing - taking into account for 64 FW events */
2473 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2474
2475 /* align the reply post queue on the next 16 count boundary */
2476 if (!ioc->reply_free_queue_depth % 16)
2477 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
2478 else
2479 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
2480 32 - (ioc->reply_free_queue_depth % 16);
2481 if (ioc->reply_post_queue_depth >
2482 facts->MaxReplyDescriptorPostQueueDepth) {
2483 ioc->reply_post_queue_depth = min_t(u16,
2484 (facts->MaxReplyDescriptorPostQueueDepth -
2485 (facts->MaxReplyDescriptorPostQueueDepth % 16)),
2486 (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
2487 ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
2488 ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
2489 }
2490
2491
2492 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2493 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2494 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2495 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2496 ioc->chains_needed_per_io));
2497
2498 ioc->scsiio_depth = ioc->hba_queue_depth -
2499 ioc->hi_priority_depth - ioc->internal_depth;
2500
2501 /* set the scsi host can_queue depth
2502 * with some internal commands that could be outstanding
2503 */
2504 ioc->shost->can_queue = ioc->scsiio_depth;
2505 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2506 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2507
2508 /* contiguous pool for request and chains, 16 byte align, one extra "
2509 * "frame for smid=0
2510 */
2511 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2512 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2513
2514 /* hi-priority queue */
2515 sz += (ioc->hi_priority_depth * ioc->request_sz);
2516
2517 /* internal queue */
2518 sz += (ioc->internal_depth * ioc->request_sz);
2519
2520 ioc->request_dma_sz = sz;
2521 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2522 if (!ioc->request) {
2523 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2524 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2525 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2526 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2527 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2528 goto out;
2529 retry_sz += 64;
2530 ioc->hba_queue_depth = max_request_credit - retry_sz;
2531 goto retry_allocation;
2532 }
2533
2534 if (retry_sz)
2535 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2536 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2537 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2538 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2539
2540
2541 /* hi-priority queue */
2542 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2543 ioc->request_sz);
2544 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2545 ioc->request_sz);
2546
2547 /* internal queue */
2548 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2549 ioc->request_sz);
2550 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2551 ioc->request_sz);
2552
2553
2554 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2555 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2556 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2557 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2558 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2559 ioc->name, (unsigned long long) ioc->request_dma));
2560 total_sz += sz;
2561
2562 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2563 ioc->scsi_lookup_pages = get_order(sz);
2564 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2565 GFP_KERNEL, ioc->scsi_lookup_pages);
2566 if (!ioc->scsi_lookup) {
2567 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2568 "sz(%d)\n", ioc->name, (int)sz);
2569 goto out;
2570 }
2571
2572 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2573 "depth(%d)\n", ioc->name, ioc->request,
2574 ioc->scsiio_depth));
2575
2576 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
2577 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2578 ioc->chain_pages = get_order(sz);
2579
2580 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2581 GFP_KERNEL, ioc->chain_pages);
2582 if (!ioc->chain_lookup) {
2583 printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
2584 "sz(%d)\n", ioc->name, (int)sz);
2585 goto out;
2586 }
2587 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2588 ioc->request_sz, 16, 0);
2589 if (!ioc->chain_dma_pool) {
2590 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2591 "failed\n", ioc->name);
2592 goto out;
2593 }
2594 for (i = 0; i < ioc->chain_depth; i++) {
2595 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2596 ioc->chain_dma_pool , GFP_KERNEL,
2597 &ioc->chain_lookup[i].chain_buffer_dma);
2598 if (!ioc->chain_lookup[i].chain_buffer) {
2599 ioc->chain_depth = i;
2600 goto chain_done;
2601 }
2602 total_sz += ioc->request_sz;
2603 }
2604 chain_done:
2605 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2606 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2607 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2608 ioc->request_sz))/1024));
2609
2610 /* initialize hi-priority queue smid's */
2611 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2612 sizeof(struct request_tracker), GFP_KERNEL);
2613 if (!ioc->hpr_lookup) {
2614 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2615 ioc->name);
2616 goto out;
2617 }
2618 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2619 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2620 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2621 ioc->hi_priority_depth, ioc->hi_priority_smid));
2622
2623 /* initialize internal queue smid's */
2624 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2625 sizeof(struct request_tracker), GFP_KERNEL);
2626 if (!ioc->internal_lookup) {
2627 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2628 ioc->name);
2629 goto out;
2630 }
2631 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2632 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2633 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2634 ioc->internal_depth, ioc->internal_smid));
2635
2636 /* sense buffers, 4 byte align */
2637 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2638 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2639 0);
2640 if (!ioc->sense_dma_pool) {
2641 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2642 ioc->name);
2643 goto out;
2644 }
2645 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2646 &ioc->sense_dma);
2647 if (!ioc->sense) {
2648 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2649 ioc->name);
2650 goto out;
2651 }
2652 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2653 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2654 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2655 SCSI_SENSE_BUFFERSIZE, sz/1024));
2656 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2657 ioc->name, (unsigned long long)ioc->sense_dma));
2658 total_sz += sz;
2659
2660 /* reply pool, 4 byte align */
2661 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2662 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2663 0);
2664 if (!ioc->reply_dma_pool) {
2665 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2666 ioc->name);
2667 goto out;
2668 }
2669 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2670 &ioc->reply_dma);
2671 if (!ioc->reply) {
2672 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2673 ioc->name);
2674 goto out;
2675 }
2676 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2677 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2678 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2679 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2680 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2681 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2682 ioc->name, (unsigned long long)ioc->reply_dma));
2683 total_sz += sz;
2684
2685 /* reply free queue, 16 byte align */
2686 sz = ioc->reply_free_queue_depth * 4;
2687 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2688 ioc->pdev, sz, 16, 0);
2689 if (!ioc->reply_free_dma_pool) {
2690 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2691 "failed\n", ioc->name);
2692 goto out;
2693 }
2694 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2695 &ioc->reply_free_dma);
2696 if (!ioc->reply_free) {
2697 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2698 "failed\n", ioc->name);
2699 goto out;
2700 }
2701 memset(ioc->reply_free, 0, sz);
2702 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2703 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2704 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2705 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2706 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2707 total_sz += sz;
2708
2709 /* reply post queue, 16 byte align */
2710 reply_post_free_sz = ioc->reply_post_queue_depth *
2711 sizeof(Mpi2DefaultReplyDescriptor_t);
2712 if (_base_is_controller_msix_enabled(ioc))
2713 sz = reply_post_free_sz * ioc->reply_queue_count;
2714 else
2715 sz = reply_post_free_sz;
2716 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2717 ioc->pdev, sz, 16, 0);
2718 if (!ioc->reply_post_free_dma_pool) {
2719 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2720 "failed\n", ioc->name);
2721 goto out;
2722 }
2723 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2724 GFP_KERNEL, &ioc->reply_post_free_dma);
2725 if (!ioc->reply_post_free) {
2726 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2727 "failed\n", ioc->name);
2728 goto out;
2729 }
2730 memset(ioc->reply_post_free, 0, sz);
2731 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2732 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2733 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2734 sz/1024));
2735 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2736 "(0x%llx)\n", ioc->name, (unsigned long long)
2737 ioc->reply_post_free_dma));
2738 total_sz += sz;
2739
2740 ioc->config_page_sz = 512;
2741 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2742 ioc->config_page_sz, &ioc->config_page_dma);
2743 if (!ioc->config_page) {
2744 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2745 "failed\n", ioc->name);
2746 goto out;
2747 }
2748 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2749 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2750 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2751 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2752 total_sz += ioc->config_page_sz;
2753
2754 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2755 ioc->name, total_sz/1024);
2756 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2757 "Max Controller Queue Depth(%d)\n",
2758 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2759 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2760 ioc->name, ioc->shost->sg_tablesize);
2761 return 0;
2762
2763 out:
2764 return -ENOMEM;
2765 }
2766
2767
2768 /**
2769 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2770 * @ioc: Pointer to MPT_ADAPTER structure
2771 * @cooked: Request raw or cooked IOC state
2772 *
2773 * Returns all IOC Doorbell register bits if cooked==0, else just the
2774 * Doorbell bits in MPI_IOC_STATE_MASK.
2775 */
2776 u32
mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER * ioc,int cooked)2777 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2778 {
2779 u32 s, sc;
2780
2781 s = readl(&ioc->chip->Doorbell);
2782 sc = s & MPI2_IOC_STATE_MASK;
2783 return cooked ? sc : s;
2784 }
2785
2786 /**
2787 * _base_wait_on_iocstate - waiting on a particular ioc state
2788 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2789 * @timeout: timeout in second
2790 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2791 *
2792 * Returns 0 for success, non-zero for failure.
2793 */
2794 static int
_base_wait_on_iocstate(struct MPT2SAS_ADAPTER * ioc,u32 ioc_state,int timeout,int sleep_flag)2795 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2796 int sleep_flag)
2797 {
2798 u32 count, cntdn;
2799 u32 current_state;
2800
2801 count = 0;
2802 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2803 do {
2804 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2805 if (current_state == ioc_state)
2806 return 0;
2807 if (count && current_state == MPI2_IOC_STATE_FAULT)
2808 break;
2809 if (sleep_flag == CAN_SLEEP)
2810 msleep(1);
2811 else
2812 udelay(500);
2813 count++;
2814 } while (--cntdn);
2815
2816 return current_state;
2817 }
2818
2819 /**
2820 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2821 * a write to the doorbell)
2822 * @ioc: per adapter object
2823 * @timeout: timeout in second
2824 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2825 *
2826 * Returns 0 for success, non-zero for failure.
2827 *
2828 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2829 */
2830 static int
_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER * ioc,int timeout,int sleep_flag)2831 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2832 int sleep_flag)
2833 {
2834 u32 cntdn, count;
2835 u32 int_status;
2836
2837 count = 0;
2838 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2839 do {
2840 int_status = readl(&ioc->chip->HostInterruptStatus);
2841 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2842 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2843 "successful count(%d), timeout(%d)\n", ioc->name,
2844 __func__, count, timeout));
2845 return 0;
2846 }
2847 if (sleep_flag == CAN_SLEEP)
2848 msleep(1);
2849 else
2850 udelay(500);
2851 count++;
2852 } while (--cntdn);
2853
2854 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2855 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2856 return -EFAULT;
2857 }
2858
2859 /**
2860 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2861 * @ioc: per adapter object
2862 * @timeout: timeout in second
2863 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2864 *
2865 * Returns 0 for success, non-zero for failure.
2866 *
2867 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2868 * doorbell.
2869 */
2870 static int
_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER * ioc,int timeout,int sleep_flag)2871 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2872 int sleep_flag)
2873 {
2874 u32 cntdn, count;
2875 u32 int_status;
2876 u32 doorbell;
2877
2878 count = 0;
2879 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2880 do {
2881 int_status = readl(&ioc->chip->HostInterruptStatus);
2882 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2883 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2884 "successful count(%d), timeout(%d)\n", ioc->name,
2885 __func__, count, timeout));
2886 return 0;
2887 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2888 doorbell = readl(&ioc->chip->Doorbell);
2889 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2890 MPI2_IOC_STATE_FAULT) {
2891 mpt2sas_base_fault_info(ioc , doorbell);
2892 return -EFAULT;
2893 }
2894 } else if (int_status == 0xFFFFFFFF)
2895 goto out;
2896
2897 if (sleep_flag == CAN_SLEEP)
2898 msleep(1);
2899 else
2900 udelay(500);
2901 count++;
2902 } while (--cntdn);
2903
2904 out:
2905 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2906 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2907 return -EFAULT;
2908 }
2909
2910 /**
2911 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2912 * @ioc: per adapter object
2913 * @timeout: timeout in second
2914 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2915 *
2916 * Returns 0 for success, non-zero for failure.
2917 *
2918 */
2919 static int
_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER * ioc,int timeout,int sleep_flag)2920 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2921 int sleep_flag)
2922 {
2923 u32 cntdn, count;
2924 u32 doorbell_reg;
2925
2926 count = 0;
2927 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2928 do {
2929 doorbell_reg = readl(&ioc->chip->Doorbell);
2930 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2931 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2932 "successful count(%d), timeout(%d)\n", ioc->name,
2933 __func__, count, timeout));
2934 return 0;
2935 }
2936 if (sleep_flag == CAN_SLEEP)
2937 msleep(1);
2938 else
2939 udelay(500);
2940 count++;
2941 } while (--cntdn);
2942
2943 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2944 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2945 return -EFAULT;
2946 }
2947
2948 /**
2949 * _base_send_ioc_reset - send doorbell reset
2950 * @ioc: per adapter object
2951 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2952 * @timeout: timeout in second
2953 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2954 *
2955 * Returns 0 for success, non-zero for failure.
2956 */
2957 static int
_base_send_ioc_reset(struct MPT2SAS_ADAPTER * ioc,u8 reset_type,int timeout,int sleep_flag)2958 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2959 int sleep_flag)
2960 {
2961 u32 ioc_state;
2962 int r = 0;
2963
2964 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2965 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2966 ioc->name, __func__);
2967 return -EFAULT;
2968 }
2969
2970 if (!(ioc->facts.IOCCapabilities &
2971 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2972 return -EFAULT;
2973
2974 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2975
2976 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2977 &ioc->chip->Doorbell);
2978 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2979 r = -EFAULT;
2980 goto out;
2981 }
2982 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2983 timeout, sleep_flag);
2984 if (ioc_state) {
2985 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2986 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2987 r = -EFAULT;
2988 goto out;
2989 }
2990 out:
2991 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2992 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2993 return r;
2994 }
2995
2996 /**
2997 * _base_handshake_req_reply_wait - send request thru doorbell interface
2998 * @ioc: per adapter object
2999 * @request_bytes: request length
3000 * @request: pointer having request payload
3001 * @reply_bytes: reply length
3002 * @reply: pointer to reply payload
3003 * @timeout: timeout in second
3004 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3005 *
3006 * Returns 0 for success, non-zero for failure.
3007 */
3008 static int
_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER * ioc,int request_bytes,u32 * request,int reply_bytes,u16 * reply,int timeout,int sleep_flag)3009 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
3010 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3011 {
3012 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3013 int i;
3014 u8 failed;
3015 u16 dummy;
3016 __le32 *mfp;
3017
3018 /* make sure doorbell is not in use */
3019 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3020 printk(MPT2SAS_ERR_FMT "doorbell is in use "
3021 " (line=%d)\n", ioc->name, __LINE__);
3022 return -EFAULT;
3023 }
3024
3025 /* clear pending doorbell interrupts from previous state changes */
3026 if (readl(&ioc->chip->HostInterruptStatus) &
3027 MPI2_HIS_IOC2SYS_DB_STATUS)
3028 writel(0, &ioc->chip->HostInterruptStatus);
3029
3030 /* send message to ioc */
3031 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3032 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3033 &ioc->chip->Doorbell);
3034
3035 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3036 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3037 "int failed (line=%d)\n", ioc->name, __LINE__);
3038 return -EFAULT;
3039 }
3040 writel(0, &ioc->chip->HostInterruptStatus);
3041
3042 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3043 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3044 "ack failed (line=%d)\n", ioc->name, __LINE__);
3045 return -EFAULT;
3046 }
3047
3048 /* send message 32-bits at a time */
3049 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3050 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3051 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3052 failed = 1;
3053 }
3054
3055 if (failed) {
3056 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3057 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3058 return -EFAULT;
3059 }
3060
3061 /* now wait for the reply */
3062 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3063 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3064 "int failed (line=%d)\n", ioc->name, __LINE__);
3065 return -EFAULT;
3066 }
3067
3068 /* read the first two 16-bits, it gives the total length of the reply */
3069 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3070 & MPI2_DOORBELL_DATA_MASK);
3071 writel(0, &ioc->chip->HostInterruptStatus);
3072 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3073 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3074 "int failed (line=%d)\n", ioc->name, __LINE__);
3075 return -EFAULT;
3076 }
3077 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3078 & MPI2_DOORBELL_DATA_MASK);
3079 writel(0, &ioc->chip->HostInterruptStatus);
3080
3081 for (i = 2; i < default_reply->MsgLength * 2; i++) {
3082 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3083 printk(MPT2SAS_ERR_FMT "doorbell "
3084 "handshake int failed (line=%d)\n", ioc->name,
3085 __LINE__);
3086 return -EFAULT;
3087 }
3088 if (i >= reply_bytes/2) /* overflow case */
3089 dummy = readl(&ioc->chip->Doorbell);
3090 else
3091 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3092 & MPI2_DOORBELL_DATA_MASK);
3093 writel(0, &ioc->chip->HostInterruptStatus);
3094 }
3095
3096 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3097 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3098 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3099 " (line=%d)\n", ioc->name, __LINE__));
3100 }
3101 writel(0, &ioc->chip->HostInterruptStatus);
3102
3103 if (ioc->logging_level & MPT_DEBUG_INIT) {
3104 mfp = (__le32 *)reply;
3105 printk(KERN_INFO "\toffset:data\n");
3106 for (i = 0; i < reply_bytes/4; i++)
3107 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3108 le32_to_cpu(mfp[i]));
3109 }
3110 return 0;
3111 }
3112
3113 /**
3114 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
3115 * @ioc: per adapter object
3116 * @mpi_reply: the reply payload from FW
3117 * @mpi_request: the request payload sent to FW
3118 *
3119 * The SAS IO Unit Control Request message allows the host to perform low-level
3120 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3121 * to obtain the IOC assigned device handles for a device if it has other
3122 * identifying information about the device, in addition allows the host to
3123 * remove IOC resources associated with the device.
3124 *
3125 * Returns 0 for success, non-zero for failure.
3126 */
3127 int
mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER * ioc,Mpi2SasIoUnitControlReply_t * mpi_reply,Mpi2SasIoUnitControlRequest_t * mpi_request)3128 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3129 Mpi2SasIoUnitControlReply_t *mpi_reply,
3130 Mpi2SasIoUnitControlRequest_t *mpi_request)
3131 {
3132 u16 smid;
3133 u32 ioc_state;
3134 unsigned long timeleft;
3135 u8 issue_reset;
3136 int rc;
3137 void *request;
3138 u16 wait_state_count;
3139
3140 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3141 __func__));
3142
3143 mutex_lock(&ioc->base_cmds.mutex);
3144
3145 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3146 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3147 ioc->name, __func__);
3148 rc = -EAGAIN;
3149 goto out;
3150 }
3151
3152 wait_state_count = 0;
3153 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3154 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3155 if (wait_state_count++ == 10) {
3156 printk(MPT2SAS_ERR_FMT
3157 "%s: failed due to ioc not operational\n",
3158 ioc->name, __func__);
3159 rc = -EFAULT;
3160 goto out;
3161 }
3162 ssleep(1);
3163 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3164 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3165 "operational state(count=%d)\n", ioc->name,
3166 __func__, wait_state_count);
3167 }
3168
3169 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3170 if (!smid) {
3171 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3172 ioc->name, __func__);
3173 rc = -EAGAIN;
3174 goto out;
3175 }
3176
3177 rc = 0;
3178 ioc->base_cmds.status = MPT2_CMD_PENDING;
3179 request = mpt2sas_base_get_msg_frame(ioc, smid);
3180 ioc->base_cmds.smid = smid;
3181 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3182 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3183 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3184 ioc->ioc_link_reset_in_progress = 1;
3185 init_completion(&ioc->base_cmds.done);
3186 mpt2sas_base_put_smid_default(ioc, smid);
3187 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3188 msecs_to_jiffies(10000));
3189 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3190 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3191 ioc->ioc_link_reset_in_progress)
3192 ioc->ioc_link_reset_in_progress = 0;
3193 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3194 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3195 ioc->name, __func__);
3196 _debug_dump_mf(mpi_request,
3197 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3198 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3199 issue_reset = 1;
3200 goto issue_host_reset;
3201 }
3202 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3203 memcpy(mpi_reply, ioc->base_cmds.reply,
3204 sizeof(Mpi2SasIoUnitControlReply_t));
3205 else
3206 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3207 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3208 goto out;
3209
3210 issue_host_reset:
3211 if (issue_reset)
3212 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3213 FORCE_BIG_HAMMER);
3214 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3215 rc = -EFAULT;
3216 out:
3217 mutex_unlock(&ioc->base_cmds.mutex);
3218 return rc;
3219 }
3220
3221
3222 /**
3223 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3224 * @ioc: per adapter object
3225 * @mpi_reply: the reply payload from FW
3226 * @mpi_request: the request payload sent to FW
3227 *
3228 * The SCSI Enclosure Processor request message causes the IOC to
3229 * communicate with SES devices to control LED status signals.
3230 *
3231 * Returns 0 for success, non-zero for failure.
3232 */
3233 int
mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER * ioc,Mpi2SepReply_t * mpi_reply,Mpi2SepRequest_t * mpi_request)3234 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3235 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3236 {
3237 u16 smid;
3238 u32 ioc_state;
3239 unsigned long timeleft;
3240 u8 issue_reset;
3241 int rc;
3242 void *request;
3243 u16 wait_state_count;
3244
3245 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3246 __func__));
3247
3248 mutex_lock(&ioc->base_cmds.mutex);
3249
3250 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3251 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3252 ioc->name, __func__);
3253 rc = -EAGAIN;
3254 goto out;
3255 }
3256
3257 wait_state_count = 0;
3258 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3259 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3260 if (wait_state_count++ == 10) {
3261 printk(MPT2SAS_ERR_FMT
3262 "%s: failed due to ioc not operational\n",
3263 ioc->name, __func__);
3264 rc = -EFAULT;
3265 goto out;
3266 }
3267 ssleep(1);
3268 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3269 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3270 "operational state(count=%d)\n", ioc->name,
3271 __func__, wait_state_count);
3272 }
3273
3274 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3275 if (!smid) {
3276 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3277 ioc->name, __func__);
3278 rc = -EAGAIN;
3279 goto out;
3280 }
3281
3282 rc = 0;
3283 ioc->base_cmds.status = MPT2_CMD_PENDING;
3284 request = mpt2sas_base_get_msg_frame(ioc, smid);
3285 ioc->base_cmds.smid = smid;
3286 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3287 init_completion(&ioc->base_cmds.done);
3288 mpt2sas_base_put_smid_default(ioc, smid);
3289 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3290 msecs_to_jiffies(10000));
3291 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3292 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3293 ioc->name, __func__);
3294 _debug_dump_mf(mpi_request,
3295 sizeof(Mpi2SepRequest_t)/4);
3296 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3297 issue_reset = 1;
3298 goto issue_host_reset;
3299 }
3300 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3301 memcpy(mpi_reply, ioc->base_cmds.reply,
3302 sizeof(Mpi2SepReply_t));
3303 else
3304 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3305 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3306 goto out;
3307
3308 issue_host_reset:
3309 if (issue_reset)
3310 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3311 FORCE_BIG_HAMMER);
3312 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3313 rc = -EFAULT;
3314 out:
3315 mutex_unlock(&ioc->base_cmds.mutex);
3316 return rc;
3317 }
3318
3319 /**
3320 * _base_get_port_facts - obtain port facts reply and save in ioc
3321 * @ioc: per adapter object
3322 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3323 *
3324 * Returns 0 for success, non-zero for failure.
3325 */
3326 static int
_base_get_port_facts(struct MPT2SAS_ADAPTER * ioc,int port,int sleep_flag)3327 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3328 {
3329 Mpi2PortFactsRequest_t mpi_request;
3330 Mpi2PortFactsReply_t mpi_reply;
3331 struct mpt2sas_port_facts *pfacts;
3332 int mpi_reply_sz, mpi_request_sz, r;
3333
3334 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3335 __func__));
3336
3337 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3338 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3339 memset(&mpi_request, 0, mpi_request_sz);
3340 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3341 mpi_request.PortNumber = port;
3342 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3343 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3344
3345 if (r != 0) {
3346 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3347 ioc->name, __func__, r);
3348 return r;
3349 }
3350
3351 pfacts = &ioc->pfacts[port];
3352 memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
3353 pfacts->PortNumber = mpi_reply.PortNumber;
3354 pfacts->VP_ID = mpi_reply.VP_ID;
3355 pfacts->VF_ID = mpi_reply.VF_ID;
3356 pfacts->MaxPostedCmdBuffers =
3357 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3358
3359 return 0;
3360 }
3361
3362 /**
3363 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3364 * @ioc: per adapter object
3365 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3366 *
3367 * Returns 0 for success, non-zero for failure.
3368 */
3369 static int
_base_get_ioc_facts(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3370 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3371 {
3372 Mpi2IOCFactsRequest_t mpi_request;
3373 Mpi2IOCFactsReply_t mpi_reply;
3374 struct mpt2sas_facts *facts;
3375 int mpi_reply_sz, mpi_request_sz, r;
3376
3377 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3378 __func__));
3379
3380 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3381 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3382 memset(&mpi_request, 0, mpi_request_sz);
3383 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3384 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3385 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3386
3387 if (r != 0) {
3388 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3389 ioc->name, __func__, r);
3390 return r;
3391 }
3392
3393 facts = &ioc->facts;
3394 memset(facts, 0, sizeof(struct mpt2sas_facts));
3395 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3396 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3397 facts->VP_ID = mpi_reply.VP_ID;
3398 facts->VF_ID = mpi_reply.VF_ID;
3399 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3400 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3401 facts->WhoInit = mpi_reply.WhoInit;
3402 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3403 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
3404 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3405 facts->MaxReplyDescriptorPostQueueDepth =
3406 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3407 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3408 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3409 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3410 ioc->ir_firmware = 1;
3411 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3412 facts->IOCRequestFrameSize =
3413 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3414 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3415 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3416 ioc->shost->max_id = -1;
3417 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3418 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3419 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3420 facts->HighPriorityCredit =
3421 le16_to_cpu(mpi_reply.HighPriorityCredit);
3422 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3423 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3424
3425 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3426 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3427 facts->MaxChainDepth));
3428 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3429 "reply frame size(%d)\n", ioc->name,
3430 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3431 return 0;
3432 }
3433
3434 /**
3435 * _base_send_ioc_init - send ioc_init to firmware
3436 * @ioc: per adapter object
3437 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3438 *
3439 * Returns 0 for success, non-zero for failure.
3440 */
3441 static int
_base_send_ioc_init(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3442 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3443 {
3444 Mpi2IOCInitRequest_t mpi_request;
3445 Mpi2IOCInitReply_t mpi_reply;
3446 int r;
3447 struct timeval current_time;
3448 u16 ioc_status;
3449
3450 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3451 __func__));
3452
3453 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3454 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3455 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3456 mpi_request.VF_ID = 0; /* TODO */
3457 mpi_request.VP_ID = 0;
3458 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3459 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3460
3461 if (_base_is_controller_msix_enabled(ioc))
3462 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3463 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3464 mpi_request.ReplyDescriptorPostQueueDepth =
3465 cpu_to_le16(ioc->reply_post_queue_depth);
3466 mpi_request.ReplyFreeQueueDepth =
3467 cpu_to_le16(ioc->reply_free_queue_depth);
3468
3469 mpi_request.SenseBufferAddressHigh =
3470 cpu_to_le32((u64)ioc->sense_dma >> 32);
3471 mpi_request.SystemReplyAddressHigh =
3472 cpu_to_le32((u64)ioc->reply_dma >> 32);
3473 mpi_request.SystemRequestFrameBaseAddress =
3474 cpu_to_le64((u64)ioc->request_dma);
3475 mpi_request.ReplyFreeQueueAddress =
3476 cpu_to_le64((u64)ioc->reply_free_dma);
3477 mpi_request.ReplyDescriptorPostQueueAddress =
3478 cpu_to_le64((u64)ioc->reply_post_free_dma);
3479
3480
3481 /* This time stamp specifies number of milliseconds
3482 * since epoch ~ midnight January 1, 1970.
3483 */
3484 do_gettimeofday(¤t_time);
3485 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3486 (current_time.tv_usec / 1000));
3487
3488 if (ioc->logging_level & MPT_DEBUG_INIT) {
3489 __le32 *mfp;
3490 int i;
3491
3492 mfp = (__le32 *)&mpi_request;
3493 printk(KERN_INFO "\toffset:data\n");
3494 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3495 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3496 le32_to_cpu(mfp[i]));
3497 }
3498
3499 r = _base_handshake_req_reply_wait(ioc,
3500 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3501 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3502 sleep_flag);
3503
3504 if (r != 0) {
3505 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3506 ioc->name, __func__, r);
3507 return r;
3508 }
3509
3510 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3511 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3512 mpi_reply.IOCLogInfo) {
3513 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3514 r = -EIO;
3515 }
3516
3517 return 0;
3518 }
3519
3520 /**
3521 * mpt2sas_port_enable_done - command completion routine for port enable
3522 * @ioc: per adapter object
3523 * @smid: system request message index
3524 * @msix_index: MSIX table index supplied by the OS
3525 * @reply: reply message frame(lower 32bit addr)
3526 *
3527 * Return 1 meaning mf should be freed from _base_interrupt
3528 * 0 means the mf is freed from this function.
3529 */
3530 u8
mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER * ioc,u16 smid,u8 msix_index,u32 reply)3531 mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
3532 u32 reply)
3533 {
3534 MPI2DefaultReply_t *mpi_reply;
3535 u16 ioc_status;
3536
3537 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
3538 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
3539 return 1;
3540
3541 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
3542 return 1;
3543
3544 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
3545 if (mpi_reply) {
3546 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
3547 memcpy(ioc->port_enable_cmds.reply, mpi_reply,
3548 mpi_reply->MsgLength*4);
3549 }
3550 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
3551
3552 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3553
3554 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
3555 ioc->port_enable_failed = 1;
3556
3557 if (ioc->is_driver_loading) {
3558 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
3559 mpt2sas_port_enable_complete(ioc);
3560 return 1;
3561 } else {
3562 ioc->start_scan_failed = ioc_status;
3563 ioc->start_scan = 0;
3564 return 1;
3565 }
3566 }
3567 complete(&ioc->port_enable_cmds.done);
3568 return 1;
3569 }
3570
3571
3572 /**
3573 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3574 * @ioc: per adapter object
3575 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3576 *
3577 * Returns 0 for success, non-zero for failure.
3578 */
3579 static int
_base_send_port_enable(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3580 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3581 {
3582 Mpi2PortEnableRequest_t *mpi_request;
3583 Mpi2PortEnableReply_t *mpi_reply;
3584 unsigned long timeleft;
3585 int r = 0;
3586 u16 smid;
3587 u16 ioc_status;
3588
3589 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3590
3591 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3592 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3593 ioc->name, __func__);
3594 return -EAGAIN;
3595 }
3596
3597 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3598 if (!smid) {
3599 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3600 ioc->name, __func__);
3601 return -EAGAIN;
3602 }
3603
3604 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3605 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3606 ioc->port_enable_cmds.smid = smid;
3607 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3608 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3609
3610 init_completion(&ioc->port_enable_cmds.done);
3611 mpt2sas_base_put_smid_default(ioc, smid);
3612 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
3613 300*HZ);
3614 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
3615 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3616 ioc->name, __func__);
3617 _debug_dump_mf(mpi_request,
3618 sizeof(Mpi2PortEnableRequest_t)/4);
3619 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
3620 r = -EFAULT;
3621 else
3622 r = -ETIME;
3623 goto out;
3624 }
3625 mpi_reply = ioc->port_enable_cmds.reply;
3626
3627 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3628 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3629 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
3630 ioc->name, __func__, ioc_status);
3631 r = -EFAULT;
3632 goto out;
3633 }
3634 out:
3635 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
3636 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
3637 "SUCCESS" : "FAILED"));
3638 return r;
3639 }
3640
3641 /**
3642 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
3643 * @ioc: per adapter object
3644 *
3645 * Returns 0 for success, non-zero for failure.
3646 */
3647 int
mpt2sas_port_enable(struct MPT2SAS_ADAPTER * ioc)3648 mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
3649 {
3650 Mpi2PortEnableRequest_t *mpi_request;
3651 u16 smid;
3652
3653 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3654
3655 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3656 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3657 ioc->name, __func__);
3658 return -EAGAIN;
3659 }
3660
3661 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3662 if (!smid) {
3663 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3664 ioc->name, __func__);
3665 return -EAGAIN;
3666 }
3667
3668 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3669 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3670 ioc->port_enable_cmds.smid = smid;
3671 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3672 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3673
3674 mpt2sas_base_put_smid_default(ioc, smid);
3675 return 0;
3676 }
3677
3678 /**
3679 * _base_determine_wait_on_discovery - desposition
3680 * @ioc: per adapter object
3681 *
3682 * Decide whether to wait on discovery to complete. Used to either
3683 * locate boot device, or report volumes ahead of physical devices.
3684 *
3685 * Returns 1 for wait, 0 for don't wait
3686 */
3687 static int
_base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER * ioc)3688 _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
3689 {
3690 /* We wait for discovery to complete if IR firmware is loaded.
3691 * The sas topology events arrive before PD events, so we need time to
3692 * turn on the bit in ioc->pd_handles to indicate PD
3693 * Also, it maybe required to report Volumes ahead of physical
3694 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
3695 */
3696 if (ioc->ir_firmware)
3697 return 1;
3698
3699 /* if no Bios, then we don't need to wait */
3700 if (!ioc->bios_pg3.BiosVersion)
3701 return 0;
3702
3703 /* Bios is present, then we drop down here.
3704 *
3705 * If there any entries in the Bios Page 2, then we wait
3706 * for discovery to complete.
3707 */
3708
3709 /* Current Boot Device */
3710 if ((ioc->bios_pg2.CurrentBootDeviceForm &
3711 MPI2_BIOSPAGE2_FORM_MASK) ==
3712 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3713 /* Request Boot Device */
3714 (ioc->bios_pg2.ReqBootDeviceForm &
3715 MPI2_BIOSPAGE2_FORM_MASK) ==
3716 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3717 /* Alternate Request Boot Device */
3718 (ioc->bios_pg2.ReqAltBootDeviceForm &
3719 MPI2_BIOSPAGE2_FORM_MASK) ==
3720 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
3721 return 0;
3722
3723 return 1;
3724 }
3725
3726
3727 /**
3728 * _base_unmask_events - turn on notification for this event
3729 * @ioc: per adapter object
3730 * @event: firmware event
3731 *
3732 * The mask is stored in ioc->event_masks.
3733 */
3734 static void
_base_unmask_events(struct MPT2SAS_ADAPTER * ioc,u16 event)3735 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3736 {
3737 u32 desired_event;
3738
3739 if (event >= 128)
3740 return;
3741
3742 desired_event = (1 << (event % 32));
3743
3744 if (event < 32)
3745 ioc->event_masks[0] &= ~desired_event;
3746 else if (event < 64)
3747 ioc->event_masks[1] &= ~desired_event;
3748 else if (event < 96)
3749 ioc->event_masks[2] &= ~desired_event;
3750 else if (event < 128)
3751 ioc->event_masks[3] &= ~desired_event;
3752 }
3753
3754 /**
3755 * _base_event_notification - send event notification
3756 * @ioc: per adapter object
3757 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3758 *
3759 * Returns 0 for success, non-zero for failure.
3760 */
3761 static int
_base_event_notification(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3762 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3763 {
3764 Mpi2EventNotificationRequest_t *mpi_request;
3765 unsigned long timeleft;
3766 u16 smid;
3767 int r = 0;
3768 int i;
3769
3770 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3771 __func__));
3772
3773 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3774 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3775 ioc->name, __func__);
3776 return -EAGAIN;
3777 }
3778
3779 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3780 if (!smid) {
3781 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3782 ioc->name, __func__);
3783 return -EAGAIN;
3784 }
3785 ioc->base_cmds.status = MPT2_CMD_PENDING;
3786 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3787 ioc->base_cmds.smid = smid;
3788 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3789 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3790 mpi_request->VF_ID = 0; /* TODO */
3791 mpi_request->VP_ID = 0;
3792 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3793 mpi_request->EventMasks[i] =
3794 cpu_to_le32(ioc->event_masks[i]);
3795 init_completion(&ioc->base_cmds.done);
3796 mpt2sas_base_put_smid_default(ioc, smid);
3797 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3798 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3799 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3800 ioc->name, __func__);
3801 _debug_dump_mf(mpi_request,
3802 sizeof(Mpi2EventNotificationRequest_t)/4);
3803 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3804 r = -EFAULT;
3805 else
3806 r = -ETIME;
3807 } else
3808 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3809 ioc->name, __func__));
3810 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3811 return r;
3812 }
3813
3814 /**
3815 * mpt2sas_base_validate_event_type - validating event types
3816 * @ioc: per adapter object
3817 * @event: firmware event
3818 *
3819 * This will turn on firmware event notification when application
3820 * ask for that event. We don't mask events that are already enabled.
3821 */
3822 void
mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER * ioc,u32 * event_type)3823 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3824 {
3825 int i, j;
3826 u32 event_mask, desired_event;
3827 u8 send_update_to_fw;
3828
3829 for (i = 0, send_update_to_fw = 0; i <
3830 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3831 event_mask = ~event_type[i];
3832 desired_event = 1;
3833 for (j = 0; j < 32; j++) {
3834 if (!(event_mask & desired_event) &&
3835 (ioc->event_masks[i] & desired_event)) {
3836 ioc->event_masks[i] &= ~desired_event;
3837 send_update_to_fw = 1;
3838 }
3839 desired_event = (desired_event << 1);
3840 }
3841 }
3842
3843 if (!send_update_to_fw)
3844 return;
3845
3846 mutex_lock(&ioc->base_cmds.mutex);
3847 _base_event_notification(ioc, CAN_SLEEP);
3848 mutex_unlock(&ioc->base_cmds.mutex);
3849 }
3850
3851 /**
3852 * _base_diag_reset - the "big hammer" start of day reset
3853 * @ioc: per adapter object
3854 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3855 *
3856 * Returns 0 for success, non-zero for failure.
3857 */
3858 static int
_base_diag_reset(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)3859 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3860 {
3861 u32 host_diagnostic;
3862 u32 ioc_state;
3863 u32 count;
3864 u32 hcb_size;
3865
3866 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3867 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3868 ioc->name));
3869
3870 count = 0;
3871 do {
3872 /* Write magic sequence to WriteSequence register
3873 * Loop until in diagnostic mode
3874 */
3875 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3876 "sequence\n", ioc->name));
3877 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3878 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3879 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3880 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3881 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3882 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3883 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3884
3885 /* wait 100 msec */
3886 if (sleep_flag == CAN_SLEEP)
3887 msleep(100);
3888 else
3889 mdelay(100);
3890
3891 if (count++ > 20)
3892 goto out;
3893
3894 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3895 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3896 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3897 ioc->name, count, host_diagnostic));
3898
3899 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3900
3901 hcb_size = readl(&ioc->chip->HCBSize);
3902
3903 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3904 ioc->name));
3905 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3906 &ioc->chip->HostDiagnostic);
3907
3908 /* don't access any registers for 50 milliseconds */
3909 msleep(50);
3910
3911 /* 300 second max wait */
3912 for (count = 0; count < 3000000 ; count++) {
3913
3914 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3915
3916 if (host_diagnostic == 0xFFFFFFFF)
3917 goto out;
3918 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3919 break;
3920
3921 /* wait 100 msec */
3922 if (sleep_flag == CAN_SLEEP)
3923 msleep(1);
3924 else
3925 mdelay(1);
3926 }
3927
3928 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3929
3930 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3931 "assuming the HCB Address points to good F/W\n",
3932 ioc->name));
3933 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3934 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3935 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3936
3937 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3938 "re-enable the HCDW\n", ioc->name));
3939 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3940 &ioc->chip->HCBSize);
3941 }
3942
3943 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3944 ioc->name));
3945 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3946 &ioc->chip->HostDiagnostic);
3947
3948 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3949 "diagnostic register\n", ioc->name));
3950 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3951
3952 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3953 "READY state\n", ioc->name));
3954 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3955 sleep_flag);
3956 if (ioc_state) {
3957 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3958 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3959 goto out;
3960 }
3961
3962 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3963 return 0;
3964
3965 out:
3966 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3967 return -EFAULT;
3968 }
3969
3970 /**
3971 * _base_make_ioc_ready - put controller in READY state
3972 * @ioc: per adapter object
3973 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3974 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3975 *
3976 * Returns 0 for success, non-zero for failure.
3977 */
3978 static int
_base_make_ioc_ready(struct MPT2SAS_ADAPTER * ioc,int sleep_flag,enum reset_type type)3979 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3980 enum reset_type type)
3981 {
3982 u32 ioc_state;
3983 int rc;
3984
3985 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3986 __func__));
3987
3988 if (ioc->pci_error_recovery)
3989 return 0;
3990
3991 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3992 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3993 ioc->name, __func__, ioc_state));
3994
3995 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3996 return 0;
3997
3998 if (ioc_state & MPI2_DOORBELL_USED) {
3999 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
4000 "active!\n", ioc->name));
4001 goto issue_diag_reset;
4002 }
4003
4004 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4005 mpt2sas_base_fault_info(ioc, ioc_state &
4006 MPI2_DOORBELL_DATA_MASK);
4007 goto issue_diag_reset;
4008 }
4009
4010 if (type == FORCE_BIG_HAMMER)
4011 goto issue_diag_reset;
4012
4013 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4014 if (!(_base_send_ioc_reset(ioc,
4015 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4016 ioc->ioc_reset_count++;
4017 return 0;
4018 }
4019
4020 issue_diag_reset:
4021 rc = _base_diag_reset(ioc, CAN_SLEEP);
4022 ioc->ioc_reset_count++;
4023 return rc;
4024 }
4025
4026 /**
4027 * _base_make_ioc_operational - put controller in OPERATIONAL state
4028 * @ioc: per adapter object
4029 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4030 *
4031 * Returns 0 for success, non-zero for failure.
4032 */
4033 static int
_base_make_ioc_operational(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)4034 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4035 {
4036 int r, i;
4037 unsigned long flags;
4038 u32 reply_address;
4039 u16 smid;
4040 struct _tr_list *delayed_tr, *delayed_tr_next;
4041 u8 hide_flag;
4042 struct adapter_reply_queue *reply_q;
4043 long reply_post_free;
4044 u32 reply_post_free_sz;
4045
4046 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4047 __func__));
4048
4049 /* clean the delayed target reset list */
4050 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4051 &ioc->delayed_tr_list, list) {
4052 list_del(&delayed_tr->list);
4053 kfree(delayed_tr);
4054 }
4055
4056 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4057 &ioc->delayed_tr_volume_list, list) {
4058 list_del(&delayed_tr->list);
4059 kfree(delayed_tr);
4060 }
4061
4062 /* initialize the scsi lookup free list */
4063 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4064 INIT_LIST_HEAD(&ioc->free_list);
4065 smid = 1;
4066 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4067 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4068 ioc->scsi_lookup[i].cb_idx = 0xFF;
4069 ioc->scsi_lookup[i].smid = smid;
4070 ioc->scsi_lookup[i].scmd = NULL;
4071 ioc->scsi_lookup[i].direct_io = 0;
4072 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4073 &ioc->free_list);
4074 }
4075
4076 /* hi-priority queue */
4077 INIT_LIST_HEAD(&ioc->hpr_free_list);
4078 smid = ioc->hi_priority_smid;
4079 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4080 ioc->hpr_lookup[i].cb_idx = 0xFF;
4081 ioc->hpr_lookup[i].smid = smid;
4082 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4083 &ioc->hpr_free_list);
4084 }
4085
4086 /* internal queue */
4087 INIT_LIST_HEAD(&ioc->internal_free_list);
4088 smid = ioc->internal_smid;
4089 for (i = 0; i < ioc->internal_depth; i++, smid++) {
4090 ioc->internal_lookup[i].cb_idx = 0xFF;
4091 ioc->internal_lookup[i].smid = smid;
4092 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4093 &ioc->internal_free_list);
4094 }
4095
4096 /* chain pool */
4097 INIT_LIST_HEAD(&ioc->free_chain_list);
4098 for (i = 0; i < ioc->chain_depth; i++)
4099 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4100 &ioc->free_chain_list);
4101
4102 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4103
4104 /* initialize Reply Free Queue */
4105 for (i = 0, reply_address = (u32)ioc->reply_dma ;
4106 i < ioc->reply_free_queue_depth ; i++, reply_address +=
4107 ioc->reply_sz)
4108 ioc->reply_free[i] = cpu_to_le32(reply_address);
4109
4110 /* initialize reply queues */
4111 if (ioc->is_driver_loading)
4112 _base_assign_reply_queues(ioc);
4113
4114 /* initialize Reply Post Free Queue */
4115 reply_post_free = (long)ioc->reply_post_free;
4116 reply_post_free_sz = ioc->reply_post_queue_depth *
4117 sizeof(Mpi2DefaultReplyDescriptor_t);
4118 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4119 reply_q->reply_post_host_index = 0;
4120 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
4121 reply_post_free;
4122 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4123 reply_q->reply_post_free[i].Words =
4124 cpu_to_le64(ULLONG_MAX);
4125 if (!_base_is_controller_msix_enabled(ioc))
4126 goto skip_init_reply_post_free_queue;
4127 reply_post_free += reply_post_free_sz;
4128 }
4129 skip_init_reply_post_free_queue:
4130
4131 r = _base_send_ioc_init(ioc, sleep_flag);
4132 if (r)
4133 return r;
4134
4135 /* initialize reply free host index */
4136 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4137 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4138
4139 /* initialize reply post host index */
4140 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4141 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
4142 &ioc->chip->ReplyPostHostIndex);
4143 if (!_base_is_controller_msix_enabled(ioc))
4144 goto skip_init_reply_post_host_index;
4145 }
4146
4147 skip_init_reply_post_host_index:
4148
4149 _base_unmask_interrupts(ioc);
4150
4151 r = _base_event_notification(ioc, sleep_flag);
4152 if (r)
4153 return r;
4154
4155 if (sleep_flag == CAN_SLEEP)
4156 _base_static_config_pages(ioc);
4157
4158
4159 if (ioc->is_driver_loading) {
4160 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
4161 == 0x80) {
4162 hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
4163 MFG_PAGE10_HIDE_SSDS_MASK);
4164 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
4165 ioc->mfg_pg10_hide_flag = hide_flag;
4166 }
4167 ioc->wait_for_discovery_to_complete =
4168 _base_determine_wait_on_discovery(ioc);
4169 return r; /* scan_start and scan_finished support */
4170 }
4171 r = _base_send_port_enable(ioc, sleep_flag);
4172 if (r)
4173 return r;
4174
4175 return r;
4176 }
4177
4178 /**
4179 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
4180 * @ioc: per adapter object
4181 *
4182 * Return nothing.
4183 */
4184 void
mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER * ioc)4185 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4186 {
4187 struct pci_dev *pdev = ioc->pdev;
4188
4189 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4190 __func__));
4191
4192 _base_mask_interrupts(ioc);
4193 ioc->shost_recovery = 1;
4194 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4195 ioc->shost_recovery = 0;
4196 _base_free_irq(ioc);
4197 _base_disable_msix(ioc);
4198 if (ioc->chip_phys)
4199 iounmap(ioc->chip);
4200 ioc->chip_phys = 0;
4201 pci_release_selected_regions(ioc->pdev, ioc->bars);
4202 pci_disable_pcie_error_reporting(pdev);
4203 pci_disable_device(pdev);
4204 return;
4205 }
4206
4207 /**
4208 * mpt2sas_base_attach - attach controller instance
4209 * @ioc: per adapter object
4210 *
4211 * Returns 0 for success, non-zero for failure.
4212 */
4213 int
mpt2sas_base_attach(struct MPT2SAS_ADAPTER * ioc)4214 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4215 {
4216 int r, i;
4217 int cpu_id, last_cpu_id = 0;
4218
4219 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4220 __func__));
4221
4222 /* setup cpu_msix_table */
4223 ioc->cpu_count = num_online_cpus();
4224 for_each_online_cpu(cpu_id)
4225 last_cpu_id = cpu_id;
4226 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4227 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4228 ioc->reply_queue_count = 1;
4229 if (!ioc->cpu_msix_table) {
4230 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4231 "cpu_msix_table failed!!!\n", ioc->name));
4232 r = -ENOMEM;
4233 goto out_free_resources;
4234 }
4235
4236 if (ioc->is_warpdrive) {
4237 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4238 sizeof(resource_size_t *), GFP_KERNEL);
4239 if (!ioc->reply_post_host_index) {
4240 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4241 "for cpu_msix_table failed!!!\n", ioc->name));
4242 r = -ENOMEM;
4243 goto out_free_resources;
4244 }
4245 }
4246
4247 r = mpt2sas_base_map_resources(ioc);
4248 if (r)
4249 goto out_free_resources;
4250
4251 if (ioc->is_warpdrive) {
4252 ioc->reply_post_host_index[0] =
4253 (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
4254
4255 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4256 ioc->reply_post_host_index[i] = (resource_size_t *)
4257 ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4258 * 4)));
4259 }
4260
4261 pci_set_drvdata(ioc->pdev, ioc->shost);
4262 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4263 if (r)
4264 goto out_free_resources;
4265
4266 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4267 if (r)
4268 goto out_free_resources;
4269
4270 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4271 sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
4272 if (!ioc->pfacts) {
4273 r = -ENOMEM;
4274 goto out_free_resources;
4275 }
4276
4277 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4278 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4279 if (r)
4280 goto out_free_resources;
4281 }
4282
4283 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4284 if (r)
4285 goto out_free_resources;
4286
4287 init_waitqueue_head(&ioc->reset_wq);
4288
4289 /* allocate memory pd handle bitmask list */
4290 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4291 if (ioc->facts.MaxDevHandle % 8)
4292 ioc->pd_handles_sz++;
4293 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4294 GFP_KERNEL);
4295 if (!ioc->pd_handles) {
4296 r = -ENOMEM;
4297 goto out_free_resources;
4298 }
4299
4300 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4301
4302 /* base internal command bits */
4303 mutex_init(&ioc->base_cmds.mutex);
4304 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4305 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4306
4307 /* port_enable command bits */
4308 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4309 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
4310
4311 /* transport internal command bits */
4312 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4313 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4314 mutex_init(&ioc->transport_cmds.mutex);
4315
4316 /* scsih internal command bits */
4317 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4318 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4319 mutex_init(&ioc->scsih_cmds.mutex);
4320
4321 /* task management internal command bits */
4322 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4323 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4324 mutex_init(&ioc->tm_cmds.mutex);
4325
4326 /* config page internal command bits */
4327 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4328 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4329 mutex_init(&ioc->config_cmds.mutex);
4330
4331 /* ctl module internal command bits */
4332 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4333 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4334 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4335 mutex_init(&ioc->ctl_cmds.mutex);
4336
4337 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4338 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4339 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4340 !ioc->ctl_cmds.sense) {
4341 r = -ENOMEM;
4342 goto out_free_resources;
4343 }
4344
4345 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4346 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4347 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4348 r = -ENOMEM;
4349 goto out_free_resources;
4350 }
4351
4352 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4353 ioc->event_masks[i] = -1;
4354
4355 /* here we enable the events we care about */
4356 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4357 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4358 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4359 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4360 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4361 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4362 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4363 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4364 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4365 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4366 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4367 if (r)
4368 goto out_free_resources;
4369
4370
4371 return 0;
4372
4373 out_free_resources:
4374
4375 ioc->remove_host = 1;
4376 mpt2sas_base_free_resources(ioc);
4377 _base_release_memory_pools(ioc);
4378 pci_set_drvdata(ioc->pdev, NULL);
4379 kfree(ioc->cpu_msix_table);
4380 if (ioc->is_warpdrive)
4381 kfree(ioc->reply_post_host_index);
4382 kfree(ioc->pd_handles);
4383 kfree(ioc->tm_cmds.reply);
4384 kfree(ioc->transport_cmds.reply);
4385 kfree(ioc->scsih_cmds.reply);
4386 kfree(ioc->config_cmds.reply);
4387 kfree(ioc->base_cmds.reply);
4388 kfree(ioc->port_enable_cmds.reply);
4389 kfree(ioc->ctl_cmds.reply);
4390 kfree(ioc->ctl_cmds.sense);
4391 kfree(ioc->pfacts);
4392 ioc->ctl_cmds.reply = NULL;
4393 ioc->base_cmds.reply = NULL;
4394 ioc->tm_cmds.reply = NULL;
4395 ioc->scsih_cmds.reply = NULL;
4396 ioc->transport_cmds.reply = NULL;
4397 ioc->config_cmds.reply = NULL;
4398 ioc->pfacts = NULL;
4399 return r;
4400 }
4401
4402
4403 /**
4404 * mpt2sas_base_detach - remove controller instance
4405 * @ioc: per adapter object
4406 *
4407 * Return nothing.
4408 */
4409 void
mpt2sas_base_detach(struct MPT2SAS_ADAPTER * ioc)4410 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4411 {
4412
4413 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4414 __func__));
4415
4416 mpt2sas_base_stop_watchdog(ioc);
4417 mpt2sas_base_free_resources(ioc);
4418 _base_release_memory_pools(ioc);
4419 pci_set_drvdata(ioc->pdev, NULL);
4420 kfree(ioc->cpu_msix_table);
4421 if (ioc->is_warpdrive)
4422 kfree(ioc->reply_post_host_index);
4423 kfree(ioc->pd_handles);
4424 kfree(ioc->pfacts);
4425 kfree(ioc->ctl_cmds.reply);
4426 kfree(ioc->ctl_cmds.sense);
4427 kfree(ioc->base_cmds.reply);
4428 kfree(ioc->port_enable_cmds.reply);
4429 kfree(ioc->tm_cmds.reply);
4430 kfree(ioc->transport_cmds.reply);
4431 kfree(ioc->scsih_cmds.reply);
4432 kfree(ioc->config_cmds.reply);
4433 }
4434
4435 /**
4436 * _base_reset_handler - reset callback handler (for base)
4437 * @ioc: per adapter object
4438 * @reset_phase: phase
4439 *
4440 * The handler for doing any required cleanup or initialization.
4441 *
4442 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4443 * MPT2_IOC_DONE_RESET
4444 *
4445 * Return nothing.
4446 */
4447 static void
_base_reset_handler(struct MPT2SAS_ADAPTER * ioc,int reset_phase)4448 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4449 {
4450 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4451 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4452 switch (reset_phase) {
4453 case MPT2_IOC_PRE_RESET:
4454 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4455 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4456 break;
4457 case MPT2_IOC_AFTER_RESET:
4458 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4459 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4460 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4461 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4462 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4463 complete(&ioc->transport_cmds.done);
4464 }
4465 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4466 ioc->base_cmds.status |= MPT2_CMD_RESET;
4467 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4468 complete(&ioc->base_cmds.done);
4469 }
4470 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
4471 ioc->port_enable_failed = 1;
4472 ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
4473 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
4474 if (ioc->is_driver_loading) {
4475 ioc->start_scan_failed =
4476 MPI2_IOCSTATUS_INTERNAL_ERROR;
4477 ioc->start_scan = 0;
4478 ioc->port_enable_cmds.status =
4479 MPT2_CMD_NOT_USED;
4480 } else
4481 complete(&ioc->port_enable_cmds.done);
4482
4483 }
4484 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4485 ioc->config_cmds.status |= MPT2_CMD_RESET;
4486 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4487 ioc->config_cmds.smid = USHRT_MAX;
4488 complete(&ioc->config_cmds.done);
4489 }
4490 break;
4491 case MPT2_IOC_DONE_RESET:
4492 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4493 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4494 break;
4495 }
4496 }
4497
4498 /**
4499 * _wait_for_commands_to_complete - reset controller
4500 * @ioc: Pointer to MPT_ADAPTER structure
4501 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4502 *
4503 * This function waiting(3s) for all pending commands to complete
4504 * prior to putting controller in reset.
4505 */
4506 static void
_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER * ioc,int sleep_flag)4507 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4508 {
4509 u32 ioc_state;
4510 unsigned long flags;
4511 u16 i;
4512
4513 ioc->pending_io_count = 0;
4514 if (sleep_flag != CAN_SLEEP)
4515 return;
4516
4517 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4518 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4519 return;
4520
4521 /* pending command count */
4522 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4523 for (i = 0; i < ioc->scsiio_depth; i++)
4524 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4525 ioc->pending_io_count++;
4526 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4527
4528 if (!ioc->pending_io_count)
4529 return;
4530
4531 /* wait for pending commands to complete */
4532 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4533 }
4534
4535 /**
4536 * mpt2sas_base_hard_reset_handler - reset controller
4537 * @ioc: Pointer to MPT_ADAPTER structure
4538 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4539 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4540 *
4541 * Returns 0 for success, non-zero for failure.
4542 */
4543 int
mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER * ioc,int sleep_flag,enum reset_type type)4544 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4545 enum reset_type type)
4546 {
4547 int r;
4548 unsigned long flags;
4549
4550 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4551 __func__));
4552
4553 if (ioc->pci_error_recovery) {
4554 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4555 ioc->name, __func__);
4556 r = 0;
4557 goto out_unlocked;
4558 }
4559
4560 if (mpt2sas_fwfault_debug)
4561 mpt2sas_halt_firmware(ioc);
4562
4563 /* TODO - What we really should be doing is pulling
4564 * out all the code associated with NO_SLEEP; its never used.
4565 * That is legacy code from mpt fusion driver, ported over.
4566 * I will leave this BUG_ON here for now till its been resolved.
4567 */
4568 BUG_ON(sleep_flag == NO_SLEEP);
4569
4570 /* wait for an active reset in progress to complete */
4571 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4572 do {
4573 ssleep(1);
4574 } while (ioc->shost_recovery == 1);
4575 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4576 __func__));
4577 return ioc->ioc_reset_in_progress_status;
4578 }
4579
4580 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4581 ioc->shost_recovery = 1;
4582 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4583
4584 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4585 _wait_for_commands_to_complete(ioc, sleep_flag);
4586 _base_mask_interrupts(ioc);
4587 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4588 if (r)
4589 goto out;
4590 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4591
4592 /* If this hard reset is called while port enable is active, then
4593 * there is no reason to call make_ioc_operational
4594 */
4595 if (ioc->is_driver_loading && ioc->port_enable_failed) {
4596 ioc->remove_host = 1;
4597 r = -EFAULT;
4598 goto out;
4599 }
4600 r = _base_make_ioc_operational(ioc, sleep_flag);
4601 if (!r)
4602 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4603 out:
4604 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4605 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4606
4607 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4608 ioc->ioc_reset_in_progress_status = r;
4609 ioc->shost_recovery = 0;
4610 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4611 mutex_unlock(&ioc->reset_in_progress_mutex);
4612
4613 out_unlocked:
4614 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4615 __func__));
4616 return r;
4617 }
4618