1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * AMD MP2 PCIe communication driver
4  * Copyright 2020-2021 Advanced Micro Devices, Inc.
5  * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
6  *	    Sandeep Singh <Sandeep.singh@amd.com>
7  *	    Basavaraj Natikar <Basavaraj.Natikar@amd.com>
8  */
9 
10 #ifndef PCIE_MP2_AMD_H
11 #define PCIE_MP2_AMD_H
12 
13 #include <linux/pci.h>
14 #include "amd_sfh_hid.h"
15 
16 #define PCI_DEVICE_ID_AMD_MP2	0x15E4
17 
18 #define ENABLE_SENSOR		1
19 #define DISABLE_SENSOR		2
20 #define STOP_ALL_SENSORS	8
21 
22 /* MP2 C2P Message Registers */
23 #define AMD_C2P_MSG0	0x10500
24 #define AMD_C2P_MSG1	0x10504
25 #define AMD_C2P_MSG2	0x10508
26 
27 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
28 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
29 
30 /* MP2 P2C Message Registers */
31 #define AMD_P2C_MSG3	0x1068C /* Supported Sensors info */
32 
33 #define V2_STATUS	0x2
34 
35 #define SENSOR_ENABLED     4
36 #define SENSOR_DISABLED    5
37 
38 #define HPD_IDX		16
39 
40 #define AMD_SFH_IDLE_LOOP	200
41 
42 #define SENSOR_DISCOVERY_STATUS_MASK		GENMASK(5, 3)
43 #define SENSOR_DISCOVERY_STATUS_SHIFT		3
44 
45 /* SFH Command register */
46 union sfh_cmd_base {
47 	u32 ul;
48 	struct {
49 		u32 cmd_id : 8;
50 		u32 sensor_id : 8;
51 		u32 period : 16;
52 	} s;
53 	struct {
54 		u32 cmd_id : 4;
55 		u32 intr_disable : 1;
56 		u32 rsvd1 : 3;
57 		u32 length : 7;
58 		u32 mem_type : 1;
59 		u32 sensor_id : 8;
60 		u32 period : 8;
61 	} cmd_v2;
62 };
63 
64 union cmd_response {
65 	u32 resp;
66 	struct {
67 		u32 status	: 2;
68 		u32 out_in_c2p	: 1;
69 		u32 rsvd1	: 1;
70 		u32 response	: 4;
71 		u32 sub_cmd	: 8;
72 		u32 sensor_id	: 6;
73 		u32 rsvd2	: 10;
74 	} response_v2;
75 };
76 
77 union sfh_cmd_param {
78 	u32 ul;
79 	struct {
80 		u32 buf_layout : 2;
81 		u32 buf_length : 6;
82 		u32 rsvd : 24;
83 	} s;
84 };
85 
86 struct sfh_cmd_reg {
87 	union sfh_cmd_base cmd_base;
88 	union sfh_cmd_param cmd_param;
89 	phys_addr_t phys_addr;
90 };
91 
92 enum sensor_idx {
93 	accel_idx = 0,
94 	gyro_idx = 1,
95 	mag_idx = 2,
96 	als_idx = 19
97 };
98 
99 struct amd_mp2_dev {
100 	struct pci_dev *pdev;
101 	struct amdtp_cl_data *cl_data;
102 	void __iomem *mmio;
103 	const struct amd_mp2_ops *mp2_ops;
104 	struct amd_input_data in_data;
105 	/* mp2 active control status */
106 	u32 mp2_acs;
107 };
108 
109 struct amd_mp2_sensor_info {
110 	u8 sensor_idx;
111 	u32 period;
112 	dma_addr_t dma_address;
113 };
114 
115 enum mem_use_type {
116 	USE_DRAM,
117 	USE_C2P_REG,
118 };
119 
120 struct hpd_status {
121 	union {
122 		struct {
123 			u32 human_presence_report : 4;
124 			u32 human_presence_actual : 4;
125 			u32 probablity		  : 8;
126 			u32 object_distance       : 16;
127 		} shpd;
128 		u32 val;
129 	};
130 };
131 
132 void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
133 void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx);
134 void amd_stop_all_sensors(struct amd_mp2_dev *privdata);
135 int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id);
136 int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata);
137 int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata);
138 u32 amd_sfh_wait_for_response(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
139 void amd_mp2_suspend(struct amd_mp2_dev *mp2);
140 void amd_mp2_resume(struct amd_mp2_dev *mp2);
141 const char *get_sensor_name(int idx);
142 
143 struct amd_mp2_ops {
144 	 void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
145 	 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
146 	 void (*stop_all)(struct amd_mp2_dev *privdata);
147 	 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
148 	 void (*clear_intr)(struct amd_mp2_dev *privdata);
149 	 int (*init_intr)(struct amd_mp2_dev *privdata);
150 	 int (*discovery_status)(struct amd_mp2_dev *privdata);
151 };
152 #endif
153