1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "mod_info_packet.h"
27 #include "core_types.h"
28 #include "dc_types.h"
29 #include "mod_shared.h"
30 #include "mod_freesync.h"
31 #include "dc.h"
32
33 enum vsc_packet_revision {
34 vsc_packet_undefined = 0,
35 //01h = VSC SDP supports only 3D stereo.
36 vsc_packet_rev1 = 1,
37 //02h = 3D stereo + PSR.
38 vsc_packet_rev2 = 2,
39 //03h = 3D stereo + PSR2.
40 vsc_packet_rev3 = 3,
41 //04h = 3D stereo + PSR/PSR2 + Y-coordinate.
42 vsc_packet_rev4 = 4,
43 //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format
44 vsc_packet_rev5 = 5,
45 };
46
47 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81
48 #define HF_VSIF_VERSION 1
49
50 // VTEM Byte Offset
51 #define VTEM_PB0 0
52 #define VTEM_PB1 1
53 #define VTEM_PB2 2
54 #define VTEM_PB3 3
55 #define VTEM_PB4 4
56 #define VTEM_PB5 5
57 #define VTEM_PB6 6
58
59 #define VTEM_MD0 7
60 #define VTEM_MD1 8
61 #define VTEM_MD2 9
62 #define VTEM_MD3 10
63
64
65 // VTEM Byte Masks
66 //PB0
67 #define MASK_VTEM_PB0__RESERVED0 0x01
68 #define MASK_VTEM_PB0__SYNC 0x02
69 #define MASK_VTEM_PB0__VFR 0x04
70 #define MASK_VTEM_PB0__AFR 0x08
71 #define MASK_VTEM_PB0__DS_TYPE 0x30
72 //0: Periodic pseudo-static EM Data Set
73 //1: Periodic dynamic EM Data Set
74 //2: Unique EM Data Set
75 //3: Reserved
76 #define MASK_VTEM_PB0__END 0x40
77 #define MASK_VTEM_PB0__NEW 0x80
78
79 //PB1
80 #define MASK_VTEM_PB1__RESERVED1 0xFF
81
82 //PB2
83 #define MASK_VTEM_PB2__ORGANIZATION_ID 0xFF
84 //0: This is a Vendor Specific EM Data Set
85 //1: This EM Data Set is defined by This Specification (HDMI 2.1 r102.clean)
86 //2: This EM Data Set is defined by CTA-861-G
87 //3: This EM Data Set is defined by VESA
88 //PB3
89 #define MASK_VTEM_PB3__DATA_SET_TAG_MSB 0xFF
90 //PB4
91 #define MASK_VTEM_PB4__DATA_SET_TAG_LSB 0xFF
92 //PB5
93 #define MASK_VTEM_PB5__DATA_SET_LENGTH_MSB 0xFF
94 //PB6
95 #define MASK_VTEM_PB6__DATA_SET_LENGTH_LSB 0xFF
96
97
98
99 //PB7-27 (20 bytes):
100 //PB7 = MD0
101 #define MASK_VTEM_MD0__VRR_EN 0x01
102 #define MASK_VTEM_MD0__M_CONST 0x02
103 #define MASK_VTEM_MD0__QMS_EN 0x04
104 #define MASK_VTEM_MD0__RESERVED2 0x08
105 #define MASK_VTEM_MD0__FVA_FACTOR_M1 0xF0
106
107 //MD1
108 #define MASK_VTEM_MD1__BASE_VFRONT 0xFF
109
110 //MD2
111 #define MASK_VTEM_MD2__BASE_REFRESH_RATE_98 0x03
112 #define MASK_VTEM_MD2__RB 0x04
113 #define MASK_VTEM_MD2__NEXT_TFR 0xF8
114
115 //MD3
116 #define MASK_VTEM_MD3__BASE_REFRESH_RATE_07 0xFF
117
118 enum ColorimetryRGBDP {
119 ColorimetryRGB_DP_sRGB = 0,
120 ColorimetryRGB_DP_AdobeRGB = 3,
121 ColorimetryRGB_DP_P3 = 4,
122 ColorimetryRGB_DP_CustomColorProfile = 5,
123 ColorimetryRGB_DP_ITU_R_BT2020RGB = 6,
124 };
125 enum ColorimetryYCCDP {
126 ColorimetryYCC_DP_ITU601 = 0,
127 ColorimetryYCC_DP_ITU709 = 1,
128 ColorimetryYCC_DP_AdobeYCC = 5,
129 ColorimetryYCC_DP_ITU2020YCC = 6,
130 ColorimetryYCC_DP_ITU2020YCbCr = 7,
131 };
132
mod_build_vsc_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet,enum dc_color_space cs)133 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
134 struct dc_info_packet *info_packet,
135 enum dc_color_space cs)
136 {
137 unsigned int vsc_packet_revision = vsc_packet_undefined;
138 unsigned int i;
139 unsigned int pixelEncoding = 0;
140 unsigned int colorimetryFormat = 0;
141 bool stereo3dSupport = false;
142
143 if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {
144 vsc_packet_revision = vsc_packet_rev1;
145 stereo3dSupport = true;
146 }
147
148 /* VSC packet set to 4 for PSR-SU, or 2 for PSR1 */
149 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
150 vsc_packet_revision = vsc_packet_rev4;
151 else if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1)
152 vsc_packet_revision = vsc_packet_rev2;
153
154 /* Update to revision 5 for extended colorimetry support */
155 if (stream->use_vsc_sdp_for_colorimetry)
156 vsc_packet_revision = vsc_packet_rev5;
157
158 /* VSC packet not needed based on the features
159 * supported by this DP display
160 */
161 if (vsc_packet_revision == vsc_packet_undefined)
162 return;
163
164 if (vsc_packet_revision == vsc_packet_rev4) {
165 /* Secondary-data Packet ID = 0*/
166 info_packet->hb0 = 0x00;
167 /* 07h - Packet Type Value indicating Video
168 * Stream Configuration packet
169 */
170 info_packet->hb1 = 0x07;
171 /* 04h = VSC SDP supporting 3D stereo + PSR/PSR2 + Y-coordinate
172 * (applies to eDP v1.4 or higher).
173 */
174 info_packet->hb2 = 0x04;
175 /* 0Eh = VSC SDP supporting 3D stereo + PSR2
176 * (HB2 = 04h), with Y-coordinate of first scan
177 * line of the SU region
178 */
179 info_packet->hb3 = 0x0E;
180
181 for (i = 0; i < 28; i++)
182 info_packet->sb[i] = 0;
183
184 info_packet->valid = true;
185 }
186
187 if (vsc_packet_revision == vsc_packet_rev2) {
188 /* Secondary-data Packet ID = 0*/
189 info_packet->hb0 = 0x00;
190 /* 07h - Packet Type Value indicating Video
191 * Stream Configuration packet
192 */
193 info_packet->hb1 = 0x07;
194 /* 02h = VSC SDP supporting 3D stereo and PSR
195 * (applies to eDP v1.3 or higher).
196 */
197 info_packet->hb2 = 0x02;
198 /* 08h = VSC packet supporting 3D stereo + PSR
199 * (HB2 = 02h).
200 */
201 info_packet->hb3 = 0x08;
202
203 for (i = 0; i < 28; i++)
204 info_packet->sb[i] = 0;
205
206 info_packet->valid = true;
207 }
208
209 if (vsc_packet_revision == vsc_packet_rev1) {
210
211 info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0
212 info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet
213 info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only
214 info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h).
215
216 info_packet->valid = true;
217 }
218
219 if (stereo3dSupport) {
220 /* ==============================================================================================================|
221 * A. STEREO 3D
222 * ==============================================================================================================|
223 * VSC Payload (1 byte) From DP1.2 spec
224 *
225 * Bits 3:0 (Stereo Interface Method Code) | Bits 7:4 (Stereo Interface Method Specific Parameter)
226 * -----------------------------------------------------------------------------------------------------
227 * 0 = Non Stereo Video | Must be set to 0x0
228 * -----------------------------------------------------------------------------------------------------
229 * 1 = Frame/Field Sequential | 0x0: L + R view indication based on MISC1 bit 2:1
230 * | 0x1: Right when Stereo Signal = 1
231 * | 0x2: Left when Stereo Signal = 1
232 * | (others reserved)
233 * -----------------------------------------------------------------------------------------------------
234 * 2 = Stacked Frame | 0x0: Left view is on top and right view on bottom
235 * | (others reserved)
236 * -----------------------------------------------------------------------------------------------------
237 * 3 = Pixel Interleaved | 0x0: horiz interleaved, right view pixels on even lines
238 * | 0x1: horiz interleaved, right view pixels on odd lines
239 * | 0x2: checker board, start with left view pixel
240 * | 0x3: vertical interleaved, start with left view pixels
241 * | 0x4: vertical interleaved, start with right view pixels
242 * | (others reserved)
243 * -----------------------------------------------------------------------------------------------------
244 * 4 = Side-by-side | 0x0: left half represents left eye view
245 * | 0x1: left half represents right eye view
246 */
247 switch (stream->timing.timing_3d_format) {
248 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
249 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
250 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
251 case TIMING_3D_FORMAT_TB_SW_PACKED:
252 info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom.
253 break;
254 case TIMING_3D_FORMAT_DP_HDMI_INBAND_FA:
255 case TIMING_3D_FORMAT_INBAND_FA:
256 info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1
257 break;
258 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
259 case TIMING_3D_FORMAT_SBS_SW_PACKED:
260 info_packet->sb[0] = 0x04; // Side-by-side
261 break;
262 default:
263 info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0.
264 break;
265 }
266
267 }
268
269 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication.
270 * Added in DP1.3, a DP Source device is allowed to indicate the pixel encoding/colorimetry
271 * format to the DP Sink device with VSC SDP only when the DP Sink device supports it
272 * (i.e., VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST
273 * register (DPCD Address 02210h, bit 3) is set to 1).
274 * (Requires VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit set to 1 in DPCD 02210h. This
275 * DPCD register is exposed in the new Extended Receiver Capability field for DPCD Rev. 1.4
276 * (and higher). When MISC1. bit 6. is Set to 1, a Source device uses a VSC SDP to indicate
277 * the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and
278 * MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").)
279 */
280 if (vsc_packet_revision == vsc_packet_rev5) {
281 /* Secondary-data Packet ID = 0 */
282 info_packet->hb0 = 0x00;
283 /* 07h - Packet Type Value indicating Video Stream Configuration packet */
284 info_packet->hb1 = 0x07;
285 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication. */
286 info_packet->hb2 = 0x05;
287 /* 13h = VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/Colorimetry Format indication (HB2 = 05h). */
288 info_packet->hb3 = 0x13;
289
290 info_packet->valid = true;
291
292 /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs
293 * Data Bytes DB 18~16
294 * Bits 3:0 (Colorimetry Format) | Bits 7:4 (Pixel Encoding)
295 * ----------------------------------------------------------------------------------------------------
296 * 0x0 = sRGB | 0 = RGB
297 * 0x1 = RGB Wide Gamut Fixed Point
298 * 0x2 = RGB Wide Gamut Floating Point
299 * 0x3 = AdobeRGB
300 * 0x4 = DCI-P3
301 * 0x5 = CustomColorProfile
302 * (others reserved)
303 * ----------------------------------------------------------------------------------------------------
304 * 0x0 = ITU-R BT.601 | 1 = YCbCr444
305 * 0x1 = ITU-R BT.709
306 * 0x2 = xvYCC601
307 * 0x3 = xvYCC709
308 * 0x4 = sYCC601
309 * 0x5 = AdobeYCC601
310 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
311 * 0x7 = ITU-R BT.2020 Y'C'bC'r
312 * (others reserved)
313 * ----------------------------------------------------------------------------------------------------
314 * 0x0 = ITU-R BT.601 | 2 = YCbCr422
315 * 0x1 = ITU-R BT.709
316 * 0x2 = xvYCC601
317 * 0x3 = xvYCC709
318 * 0x4 = sYCC601
319 * 0x5 = AdobeYCC601
320 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
321 * 0x7 = ITU-R BT.2020 Y'C'bC'r
322 * (others reserved)
323 * ----------------------------------------------------------------------------------------------------
324 * 0x0 = ITU-R BT.601 | 3 = YCbCr420
325 * 0x1 = ITU-R BT.709
326 * 0x2 = xvYCC601
327 * 0x3 = xvYCC709
328 * 0x4 = sYCC601
329 * 0x5 = AdobeYCC601
330 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
331 * 0x7 = ITU-R BT.2020 Y'C'bC'r
332 * (others reserved)
333 * ----------------------------------------------------------------------------------------------------
334 * 0x0 =DICOM Part14 Grayscale | 4 = Yonly
335 * Display Function
336 * (others reserved)
337 */
338
339 /* Set Pixel Encoding */
340 switch (stream->timing.pixel_encoding) {
341 case PIXEL_ENCODING_RGB:
342 pixelEncoding = 0x0; /* RGB = 0h */
343 break;
344 case PIXEL_ENCODING_YCBCR444:
345 pixelEncoding = 0x1; /* YCbCr444 = 1h */
346 break;
347 case PIXEL_ENCODING_YCBCR422:
348 pixelEncoding = 0x2; /* YCbCr422 = 2h */
349 break;
350 case PIXEL_ENCODING_YCBCR420:
351 pixelEncoding = 0x3; /* YCbCr420 = 3h */
352 break;
353 default:
354 pixelEncoding = 0x0; /* default RGB = 0h */
355 break;
356 }
357
358 /* Set Colorimetry format based on pixel encoding */
359 switch (stream->timing.pixel_encoding) {
360 case PIXEL_ENCODING_RGB:
361 if ((cs == COLOR_SPACE_SRGB) ||
362 (cs == COLOR_SPACE_SRGB_LIMITED))
363 colorimetryFormat = ColorimetryRGB_DP_sRGB;
364 else if (cs == COLOR_SPACE_ADOBERGB)
365 colorimetryFormat = ColorimetryRGB_DP_AdobeRGB;
366 else if ((cs == COLOR_SPACE_2020_RGB_FULLRANGE) ||
367 (cs == COLOR_SPACE_2020_RGB_LIMITEDRANGE))
368 colorimetryFormat = ColorimetryRGB_DP_ITU_R_BT2020RGB;
369 break;
370
371 case PIXEL_ENCODING_YCBCR444:
372 case PIXEL_ENCODING_YCBCR422:
373 case PIXEL_ENCODING_YCBCR420:
374 /* Note: xvYCC probably not supported correctly here on DP since colorspace translation
375 * loses distinction between BT601 vs xvYCC601 in translation
376 */
377 if (cs == COLOR_SPACE_YCBCR601)
378 colorimetryFormat = ColorimetryYCC_DP_ITU601;
379 else if (cs == COLOR_SPACE_YCBCR709)
380 colorimetryFormat = ColorimetryYCC_DP_ITU709;
381 else if (cs == COLOR_SPACE_ADOBERGB)
382 colorimetryFormat = ColorimetryYCC_DP_AdobeYCC;
383 else if (cs == COLOR_SPACE_2020_YCBCR)
384 colorimetryFormat = ColorimetryYCC_DP_ITU2020YCbCr;
385 break;
386
387 default:
388 colorimetryFormat = ColorimetryRGB_DP_sRGB;
389 break;
390 }
391
392 info_packet->sb[16] = (pixelEncoding << 4) | colorimetryFormat;
393
394 /* Set color depth */
395 switch (stream->timing.display_color_depth) {
396 case COLOR_DEPTH_666:
397 /* NOTE: This is actually not valid for YCbCr pixel encoding to have 6 bpc
398 * as of DP1.4 spec, but value of 0 probably reserved here for potential future use.
399 */
400 info_packet->sb[17] = 0;
401 break;
402 case COLOR_DEPTH_888:
403 info_packet->sb[17] = 1;
404 break;
405 case COLOR_DEPTH_101010:
406 info_packet->sb[17] = 2;
407 break;
408 case COLOR_DEPTH_121212:
409 info_packet->sb[17] = 3;
410 break;
411 /*case COLOR_DEPTH_141414: -- NO SUCH FORMAT IN DP SPEC */
412 case COLOR_DEPTH_161616:
413 info_packet->sb[17] = 4;
414 break;
415 default:
416 info_packet->sb[17] = 0;
417 break;
418 }
419
420 /* all YCbCr are always limited range */
421 if ((cs == COLOR_SPACE_SRGB_LIMITED) ||
422 (cs == COLOR_SPACE_2020_RGB_LIMITEDRANGE) ||
423 (pixelEncoding != 0x0)) {
424 info_packet->sb[17] |= 0x80; /* DB17 bit 7 set to 1 for CEA timing. */
425 }
426
427 /* Content Type (Bits 2:0)
428 * 0 = Not defined.
429 * 1 = Graphics.
430 * 2 = Photo.
431 * 3 = Video.
432 * 4 = Game.
433 */
434 info_packet->sb[18] = 0;
435 }
436 }
437
438 /**
439 * mod_build_hf_vsif_infopacket - Prepare HDMI Vendor Specific info frame.
440 * Follows HDMI Spec to build up Vendor Specific info frame
441 *
442 * @stream: contains data we may need to construct VSIF (i.e. timing_3d_format, etc.)
443 * @info_packet: output structure where to store VSIF
444 */
mod_build_hf_vsif_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet)445 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
446 struct dc_info_packet *info_packet)
447 {
448 unsigned int length = 5;
449 bool hdmi_vic_mode = false;
450 uint8_t checksum = 0;
451 uint32_t i = 0;
452 enum dc_timing_3d_format format;
453
454 info_packet->valid = false;
455 format = stream->timing.timing_3d_format;
456 if (stream->view_format == VIEW_3D_FORMAT_NONE)
457 format = TIMING_3D_FORMAT_NONE;
458
459 if (stream->timing.hdmi_vic != 0
460 && stream->timing.h_total >= 3840
461 && stream->timing.v_total >= 2160
462 && format == TIMING_3D_FORMAT_NONE)
463 hdmi_vic_mode = true;
464
465 if ((format == TIMING_3D_FORMAT_NONE) && !hdmi_vic_mode)
466 return;
467
468 info_packet->sb[1] = 0x03;
469 info_packet->sb[2] = 0x0C;
470 info_packet->sb[3] = 0x00;
471
472 if (format != TIMING_3D_FORMAT_NONE)
473 info_packet->sb[4] = (2 << 5);
474
475 else if (hdmi_vic_mode)
476 info_packet->sb[4] = (1 << 5);
477
478 switch (format) {
479 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
480 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
481 info_packet->sb[5] = (0x0 << 4);
482 break;
483
484 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
485 case TIMING_3D_FORMAT_SBS_SW_PACKED:
486 info_packet->sb[5] = (0x8 << 4);
487 length = 6;
488 break;
489
490 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
491 case TIMING_3D_FORMAT_TB_SW_PACKED:
492 info_packet->sb[5] = (0x6 << 4);
493 break;
494
495 default:
496 break;
497 }
498
499 if (hdmi_vic_mode)
500 info_packet->sb[5] = stream->timing.hdmi_vic;
501
502 info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR;
503 info_packet->hb1 = 0x01;
504 info_packet->hb2 = (uint8_t) (length);
505
506 checksum += info_packet->hb0;
507 checksum += info_packet->hb1;
508 checksum += info_packet->hb2;
509
510 for (i = 1; i <= length; i++)
511 checksum += info_packet->sb[i];
512
513 info_packet->sb[0] = (uint8_t) (0x100 - checksum);
514
515 info_packet->valid = true;
516 }
517
518