1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Kernel-based Virtual Machine driver for Linux
4 *
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
7 *
8 * MMU support
9 *
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 *
13 * Authors:
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
16 */
17
18 #include "irq.h"
19 #include "ioapic.h"
20 #include "mmu.h"
21 #include "mmu_internal.h"
22 #include "tdp_mmu.h"
23 #include "x86.h"
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
26 #include "cpuid.h"
27 #include "spte.h"
28
29 #include <linux/kvm_host.h>
30 #include <linux/types.h>
31 #include <linux/string.h>
32 #include <linux/mm.h>
33 #include <linux/highmem.h>
34 #include <linux/moduleparam.h>
35 #include <linux/export.h>
36 #include <linux/swap.h>
37 #include <linux/hugetlb.h>
38 #include <linux/compiler.h>
39 #include <linux/srcu.h>
40 #include <linux/slab.h>
41 #include <linux/sched/signal.h>
42 #include <linux/uaccess.h>
43 #include <linux/hash.h>
44 #include <linux/kern_levels.h>
45 #include <linux/kthread.h>
46
47 #include <asm/page.h>
48 #include <asm/memtype.h>
49 #include <asm/cmpxchg.h>
50 #include <asm/io.h>
51 #include <asm/set_memory.h>
52 #include <asm/vmx.h>
53 #include <asm/kvm_page_track.h>
54 #include "trace.h"
55
56 extern bool itlb_multihit_kvm_mitigation;
57
58 int __read_mostly nx_huge_pages = -1;
59 static uint __read_mostly nx_huge_pages_recovery_period_ms;
60 #ifdef CONFIG_PREEMPT_RT
61 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
62 static uint __read_mostly nx_huge_pages_recovery_ratio = 0;
63 #else
64 static uint __read_mostly nx_huge_pages_recovery_ratio = 60;
65 #endif
66
67 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp);
68 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp);
69
70 static const struct kernel_param_ops nx_huge_pages_ops = {
71 .set = set_nx_huge_pages,
72 .get = param_get_bool,
73 };
74
75 static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = {
76 .set = set_nx_huge_pages_recovery_param,
77 .get = param_get_uint,
78 };
79
80 module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644);
81 __MODULE_PARM_TYPE(nx_huge_pages, "bool");
82 module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops,
83 &nx_huge_pages_recovery_ratio, 0644);
84 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint");
85 module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops,
86 &nx_huge_pages_recovery_period_ms, 0644);
87 __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint");
88
89 static bool __read_mostly force_flush_and_sync_on_reuse;
90 module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
91
92 /*
93 * When setting this variable to true it enables Two-Dimensional-Paging
94 * where the hardware walks 2 page tables:
95 * 1. the guest-virtual to guest-physical
96 * 2. while doing 1. it walks guest-physical to host-physical
97 * If the hardware supports that we don't need to do shadow paging.
98 */
99 bool tdp_enabled = false;
100
101 static int max_huge_page_level __read_mostly;
102 static int tdp_root_level __read_mostly;
103 static int max_tdp_level __read_mostly;
104
105 #ifdef MMU_DEBUG
106 bool dbg = 0;
107 module_param(dbg, bool, 0644);
108 #endif
109
110 #define PTE_PREFETCH_NUM 8
111
112 #include <trace/events/kvm.h>
113
114 /* make pte_list_desc fit well in cache lines */
115 #define PTE_LIST_EXT 14
116
117 /*
118 * Slight optimization of cacheline layout, by putting `more' and `spte_count'
119 * at the start; then accessing it will only use one single cacheline for
120 * either full (entries==PTE_LIST_EXT) case or entries<=6.
121 */
122 struct pte_list_desc {
123 struct pte_list_desc *more;
124 /*
125 * Stores number of entries stored in the pte_list_desc. No need to be
126 * u64 but just for easier alignment. When PTE_LIST_EXT, means full.
127 */
128 u64 spte_count;
129 u64 *sptes[PTE_LIST_EXT];
130 };
131
132 struct kvm_shadow_walk_iterator {
133 u64 addr;
134 hpa_t shadow_addr;
135 u64 *sptep;
136 int level;
137 unsigned index;
138 };
139
140 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
141 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
142 (_root), (_addr)); \
143 shadow_walk_okay(&(_walker)); \
144 shadow_walk_next(&(_walker)))
145
146 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
147 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
148 shadow_walk_okay(&(_walker)); \
149 shadow_walk_next(&(_walker)))
150
151 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
152 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
153 shadow_walk_okay(&(_walker)) && \
154 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
155 __shadow_walk_next(&(_walker), spte))
156
157 static struct kmem_cache *pte_list_desc_cache;
158 struct kmem_cache *mmu_page_header_cache;
159 static struct percpu_counter kvm_total_used_mmu_pages;
160
161 static void mmu_spte_set(u64 *sptep, u64 spte);
162
163 struct kvm_mmu_role_regs {
164 const unsigned long cr0;
165 const unsigned long cr4;
166 const u64 efer;
167 };
168
169 #define CREATE_TRACE_POINTS
170 #include "mmutrace.h"
171
172 /*
173 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
174 * reading from the role_regs. Once the root_role is constructed, it becomes
175 * the single source of truth for the MMU's state.
176 */
177 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
178 static inline bool __maybe_unused \
179 ____is_##reg##_##name(const struct kvm_mmu_role_regs *regs) \
180 { \
181 return !!(regs->reg & flag); \
182 }
183 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);
184 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);
185 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE);
186 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
187 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
188 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP);
189 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE);
190 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57);
191 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX);
192 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA);
193
194 /*
195 * The MMU itself (with a valid role) is the single source of truth for the
196 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
197 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
198 * and the vCPU may be incorrect/irrelevant.
199 */
200 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
201 static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \
202 { \
203 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
204 }
205 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
206 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse);
207 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
208 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap);
209 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke);
210 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57);
211 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
212 BUILD_MMU_ROLE_ACCESSOR(ext, efer, lma);
213
is_cr0_pg(struct kvm_mmu * mmu)214 static inline bool is_cr0_pg(struct kvm_mmu *mmu)
215 {
216 return mmu->cpu_role.base.level > 0;
217 }
218
is_cr4_pae(struct kvm_mmu * mmu)219 static inline bool is_cr4_pae(struct kvm_mmu *mmu)
220 {
221 return !mmu->cpu_role.base.has_4_byte_gpte;
222 }
223
vcpu_to_role_regs(struct kvm_vcpu * vcpu)224 static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu)
225 {
226 struct kvm_mmu_role_regs regs = {
227 .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),
228 .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS),
229 .efer = vcpu->arch.efer,
230 };
231
232 return regs;
233 }
234
kvm_available_flush_tlb_with_range(void)235 static inline bool kvm_available_flush_tlb_with_range(void)
236 {
237 return kvm_x86_ops.tlb_remote_flush_with_range;
238 }
239
kvm_flush_remote_tlbs_with_range(struct kvm * kvm,struct kvm_tlb_range * range)240 static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm,
241 struct kvm_tlb_range *range)
242 {
243 int ret = -ENOTSUPP;
244
245 if (range && kvm_x86_ops.tlb_remote_flush_with_range)
246 ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range);
247
248 if (ret)
249 kvm_flush_remote_tlbs(kvm);
250 }
251
kvm_flush_remote_tlbs_with_address(struct kvm * kvm,u64 start_gfn,u64 pages)252 void kvm_flush_remote_tlbs_with_address(struct kvm *kvm,
253 u64 start_gfn, u64 pages)
254 {
255 struct kvm_tlb_range range;
256
257 range.start_gfn = start_gfn;
258 range.pages = pages;
259
260 kvm_flush_remote_tlbs_with_range(kvm, &range);
261 }
262
mark_mmio_spte(struct kvm_vcpu * vcpu,u64 * sptep,u64 gfn,unsigned int access)263 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
264 unsigned int access)
265 {
266 u64 spte = make_mmio_spte(vcpu, gfn, access);
267
268 trace_mark_mmio_spte(sptep, gfn, spte);
269 mmu_spte_set(sptep, spte);
270 }
271
get_mmio_spte_gfn(u64 spte)272 static gfn_t get_mmio_spte_gfn(u64 spte)
273 {
274 u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask;
275
276 gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)
277 & shadow_nonpresent_or_rsvd_mask;
278
279 return gpa >> PAGE_SHIFT;
280 }
281
get_mmio_spte_access(u64 spte)282 static unsigned get_mmio_spte_access(u64 spte)
283 {
284 return spte & shadow_mmio_access_mask;
285 }
286
check_mmio_spte(struct kvm_vcpu * vcpu,u64 spte)287 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
288 {
289 u64 kvm_gen, spte_gen, gen;
290
291 gen = kvm_vcpu_memslots(vcpu)->generation;
292 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
293 return false;
294
295 kvm_gen = gen & MMIO_SPTE_GEN_MASK;
296 spte_gen = get_mmio_spte_generation(spte);
297
298 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
299 return likely(kvm_gen == spte_gen);
300 }
301
is_cpuid_PSE36(void)302 static int is_cpuid_PSE36(void)
303 {
304 return 1;
305 }
306
307 #ifdef CONFIG_X86_64
__set_spte(u64 * sptep,u64 spte)308 static void __set_spte(u64 *sptep, u64 spte)
309 {
310 WRITE_ONCE(*sptep, spte);
311 }
312
__update_clear_spte_fast(u64 * sptep,u64 spte)313 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
314 {
315 WRITE_ONCE(*sptep, spte);
316 }
317
__update_clear_spte_slow(u64 * sptep,u64 spte)318 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
319 {
320 return xchg(sptep, spte);
321 }
322
__get_spte_lockless(u64 * sptep)323 static u64 __get_spte_lockless(u64 *sptep)
324 {
325 return READ_ONCE(*sptep);
326 }
327 #else
328 union split_spte {
329 struct {
330 u32 spte_low;
331 u32 spte_high;
332 };
333 u64 spte;
334 };
335
count_spte_clear(u64 * sptep,u64 spte)336 static void count_spte_clear(u64 *sptep, u64 spte)
337 {
338 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
339
340 if (is_shadow_present_pte(spte))
341 return;
342
343 /* Ensure the spte is completely set before we increase the count */
344 smp_wmb();
345 sp->clear_spte_count++;
346 }
347
__set_spte(u64 * sptep,u64 spte)348 static void __set_spte(u64 *sptep, u64 spte)
349 {
350 union split_spte *ssptep, sspte;
351
352 ssptep = (union split_spte *)sptep;
353 sspte = (union split_spte)spte;
354
355 ssptep->spte_high = sspte.spte_high;
356
357 /*
358 * If we map the spte from nonpresent to present, We should store
359 * the high bits firstly, then set present bit, so cpu can not
360 * fetch this spte while we are setting the spte.
361 */
362 smp_wmb();
363
364 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
365 }
366
__update_clear_spte_fast(u64 * sptep,u64 spte)367 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
368 {
369 union split_spte *ssptep, sspte;
370
371 ssptep = (union split_spte *)sptep;
372 sspte = (union split_spte)spte;
373
374 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
375
376 /*
377 * If we map the spte from present to nonpresent, we should clear
378 * present bit firstly to avoid vcpu fetch the old high bits.
379 */
380 smp_wmb();
381
382 ssptep->spte_high = sspte.spte_high;
383 count_spte_clear(sptep, spte);
384 }
385
__update_clear_spte_slow(u64 * sptep,u64 spte)386 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
387 {
388 union split_spte *ssptep, sspte, orig;
389
390 ssptep = (union split_spte *)sptep;
391 sspte = (union split_spte)spte;
392
393 /* xchg acts as a barrier before the setting of the high bits */
394 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
395 orig.spte_high = ssptep->spte_high;
396 ssptep->spte_high = sspte.spte_high;
397 count_spte_clear(sptep, spte);
398
399 return orig.spte;
400 }
401
402 /*
403 * The idea using the light way get the spte on x86_32 guest is from
404 * gup_get_pte (mm/gup.c).
405 *
406 * An spte tlb flush may be pending, because kvm_set_pte_rmap
407 * coalesces them and we are running out of the MMU lock. Therefore
408 * we need to protect against in-progress updates of the spte.
409 *
410 * Reading the spte while an update is in progress may get the old value
411 * for the high part of the spte. The race is fine for a present->non-present
412 * change (because the high part of the spte is ignored for non-present spte),
413 * but for a present->present change we must reread the spte.
414 *
415 * All such changes are done in two steps (present->non-present and
416 * non-present->present), hence it is enough to count the number of
417 * present->non-present updates: if it changed while reading the spte,
418 * we might have hit the race. This is done using clear_spte_count.
419 */
__get_spte_lockless(u64 * sptep)420 static u64 __get_spte_lockless(u64 *sptep)
421 {
422 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
423 union split_spte spte, *orig = (union split_spte *)sptep;
424 int count;
425
426 retry:
427 count = sp->clear_spte_count;
428 smp_rmb();
429
430 spte.spte_low = orig->spte_low;
431 smp_rmb();
432
433 spte.spte_high = orig->spte_high;
434 smp_rmb();
435
436 if (unlikely(spte.spte_low != orig->spte_low ||
437 count != sp->clear_spte_count))
438 goto retry;
439
440 return spte.spte;
441 }
442 #endif
443
444 /* Rules for using mmu_spte_set:
445 * Set the sptep from nonpresent to present.
446 * Note: the sptep being assigned *must* be either not present
447 * or in a state where the hardware will not attempt to update
448 * the spte.
449 */
mmu_spte_set(u64 * sptep,u64 new_spte)450 static void mmu_spte_set(u64 *sptep, u64 new_spte)
451 {
452 WARN_ON(is_shadow_present_pte(*sptep));
453 __set_spte(sptep, new_spte);
454 }
455
456 /*
457 * Update the SPTE (excluding the PFN), but do not track changes in its
458 * accessed/dirty status.
459 */
mmu_spte_update_no_track(u64 * sptep,u64 new_spte)460 static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte)
461 {
462 u64 old_spte = *sptep;
463
464 WARN_ON(!is_shadow_present_pte(new_spte));
465 check_spte_writable_invariants(new_spte);
466
467 if (!is_shadow_present_pte(old_spte)) {
468 mmu_spte_set(sptep, new_spte);
469 return old_spte;
470 }
471
472 if (!spte_has_volatile_bits(old_spte))
473 __update_clear_spte_fast(sptep, new_spte);
474 else
475 old_spte = __update_clear_spte_slow(sptep, new_spte);
476
477 WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));
478
479 return old_spte;
480 }
481
482 /* Rules for using mmu_spte_update:
483 * Update the state bits, it means the mapped pfn is not changed.
484 *
485 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
486 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
487 * spte, even though the writable spte might be cached on a CPU's TLB.
488 *
489 * Returns true if the TLB needs to be flushed
490 */
mmu_spte_update(u64 * sptep,u64 new_spte)491 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
492 {
493 bool flush = false;
494 u64 old_spte = mmu_spte_update_no_track(sptep, new_spte);
495
496 if (!is_shadow_present_pte(old_spte))
497 return false;
498
499 /*
500 * For the spte updated out of mmu-lock is safe, since
501 * we always atomically update it, see the comments in
502 * spte_has_volatile_bits().
503 */
504 if (is_mmu_writable_spte(old_spte) &&
505 !is_writable_pte(new_spte))
506 flush = true;
507
508 /*
509 * Flush TLB when accessed/dirty states are changed in the page tables,
510 * to guarantee consistency between TLB and page tables.
511 */
512
513 if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) {
514 flush = true;
515 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
516 }
517
518 if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) {
519 flush = true;
520 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
521 }
522
523 return flush;
524 }
525
526 /*
527 * Rules for using mmu_spte_clear_track_bits:
528 * It sets the sptep from present to nonpresent, and track the
529 * state bits, it is used to clear the last level sptep.
530 * Returns the old PTE.
531 */
mmu_spte_clear_track_bits(struct kvm * kvm,u64 * sptep)532 static u64 mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep)
533 {
534 kvm_pfn_t pfn;
535 u64 old_spte = *sptep;
536 int level = sptep_to_sp(sptep)->role.level;
537 struct page *page;
538
539 if (!is_shadow_present_pte(old_spte) ||
540 !spte_has_volatile_bits(old_spte))
541 __update_clear_spte_fast(sptep, 0ull);
542 else
543 old_spte = __update_clear_spte_slow(sptep, 0ull);
544
545 if (!is_shadow_present_pte(old_spte))
546 return old_spte;
547
548 kvm_update_page_stats(kvm, level, -1);
549
550 pfn = spte_to_pfn(old_spte);
551
552 /*
553 * KVM doesn't hold a reference to any pages mapped into the guest, and
554 * instead uses the mmu_notifier to ensure that KVM unmaps any pages
555 * before they are reclaimed. Sanity check that, if the pfn is backed
556 * by a refcounted page, the refcount is elevated.
557 */
558 page = kvm_pfn_to_refcounted_page(pfn);
559 WARN_ON(page && !page_count(page));
560
561 if (is_accessed_spte(old_spte))
562 kvm_set_pfn_accessed(pfn);
563
564 if (is_dirty_spte(old_spte))
565 kvm_set_pfn_dirty(pfn);
566
567 return old_spte;
568 }
569
570 /*
571 * Rules for using mmu_spte_clear_no_track:
572 * Directly clear spte without caring the state bits of sptep,
573 * it is used to set the upper level spte.
574 */
mmu_spte_clear_no_track(u64 * sptep)575 static void mmu_spte_clear_no_track(u64 *sptep)
576 {
577 __update_clear_spte_fast(sptep, 0ull);
578 }
579
mmu_spte_get_lockless(u64 * sptep)580 static u64 mmu_spte_get_lockless(u64 *sptep)
581 {
582 return __get_spte_lockless(sptep);
583 }
584
585 /* Returns the Accessed status of the PTE and resets it at the same time. */
mmu_spte_age(u64 * sptep)586 static bool mmu_spte_age(u64 *sptep)
587 {
588 u64 spte = mmu_spte_get_lockless(sptep);
589
590 if (!is_accessed_spte(spte))
591 return false;
592
593 if (spte_ad_enabled(spte)) {
594 clear_bit((ffs(shadow_accessed_mask) - 1),
595 (unsigned long *)sptep);
596 } else {
597 /*
598 * Capture the dirty status of the page, so that it doesn't get
599 * lost when the SPTE is marked for access tracking.
600 */
601 if (is_writable_pte(spte))
602 kvm_set_pfn_dirty(spte_to_pfn(spte));
603
604 spte = mark_spte_for_access_track(spte);
605 mmu_spte_update_no_track(sptep, spte);
606 }
607
608 return true;
609 }
610
walk_shadow_page_lockless_begin(struct kvm_vcpu * vcpu)611 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
612 {
613 if (is_tdp_mmu(vcpu->arch.mmu)) {
614 kvm_tdp_mmu_walk_lockless_begin();
615 } else {
616 /*
617 * Prevent page table teardown by making any free-er wait during
618 * kvm_flush_remote_tlbs() IPI to all active vcpus.
619 */
620 local_irq_disable();
621
622 /*
623 * Make sure a following spte read is not reordered ahead of the write
624 * to vcpu->mode.
625 */
626 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES);
627 }
628 }
629
walk_shadow_page_lockless_end(struct kvm_vcpu * vcpu)630 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
631 {
632 if (is_tdp_mmu(vcpu->arch.mmu)) {
633 kvm_tdp_mmu_walk_lockless_end();
634 } else {
635 /*
636 * Make sure the write to vcpu->mode is not reordered in front of
637 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
638 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
639 */
640 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
641 local_irq_enable();
642 }
643 }
644
mmu_topup_memory_caches(struct kvm_vcpu * vcpu,bool maybe_indirect)645 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect)
646 {
647 int r;
648
649 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
650 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
651 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);
652 if (r)
653 return r;
654 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache,
655 PT64_ROOT_MAX_LEVEL);
656 if (r)
657 return r;
658 if (maybe_indirect) {
659 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadowed_info_cache,
660 PT64_ROOT_MAX_LEVEL);
661 if (r)
662 return r;
663 }
664 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
665 PT64_ROOT_MAX_LEVEL);
666 }
667
mmu_free_memory_caches(struct kvm_vcpu * vcpu)668 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
669 {
670 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache);
671 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache);
672 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadowed_info_cache);
673 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
674 }
675
mmu_free_pte_list_desc(struct pte_list_desc * pte_list_desc)676 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
677 {
678 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
679 }
680
681 static bool sp_has_gptes(struct kvm_mmu_page *sp);
682
kvm_mmu_page_get_gfn(struct kvm_mmu_page * sp,int index)683 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
684 {
685 if (sp->role.passthrough)
686 return sp->gfn;
687
688 if (!sp->role.direct)
689 return sp->shadowed_translation[index] >> PAGE_SHIFT;
690
691 return sp->gfn + (index << ((sp->role.level - 1) * SPTE_LEVEL_BITS));
692 }
693
694 /*
695 * For leaf SPTEs, fetch the *guest* access permissions being shadowed. Note
696 * that the SPTE itself may have a more constrained access permissions that
697 * what the guest enforces. For example, a guest may create an executable
698 * huge PTE but KVM may disallow execution to mitigate iTLB multihit.
699 */
kvm_mmu_page_get_access(struct kvm_mmu_page * sp,int index)700 static u32 kvm_mmu_page_get_access(struct kvm_mmu_page *sp, int index)
701 {
702 if (sp_has_gptes(sp))
703 return sp->shadowed_translation[index] & ACC_ALL;
704
705 /*
706 * For direct MMUs (e.g. TDP or non-paging guests) or passthrough SPs,
707 * KVM is not shadowing any guest page tables, so the "guest access
708 * permissions" are just ACC_ALL.
709 *
710 * For direct SPs in indirect MMUs (shadow paging), i.e. when KVM
711 * is shadowing a guest huge page with small pages, the guest access
712 * permissions being shadowed are the access permissions of the huge
713 * page.
714 *
715 * In both cases, sp->role.access contains the correct access bits.
716 */
717 return sp->role.access;
718 }
719
kvm_mmu_page_set_translation(struct kvm_mmu_page * sp,int index,gfn_t gfn,unsigned int access)720 static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index,
721 gfn_t gfn, unsigned int access)
722 {
723 if (sp_has_gptes(sp)) {
724 sp->shadowed_translation[index] = (gfn << PAGE_SHIFT) | access;
725 return;
726 }
727
728 WARN_ONCE(access != kvm_mmu_page_get_access(sp, index),
729 "access mismatch under %s page %llx (expected %u, got %u)\n",
730 sp->role.passthrough ? "passthrough" : "direct",
731 sp->gfn, kvm_mmu_page_get_access(sp, index), access);
732
733 WARN_ONCE(gfn != kvm_mmu_page_get_gfn(sp, index),
734 "gfn mismatch under %s page %llx (expected %llx, got %llx)\n",
735 sp->role.passthrough ? "passthrough" : "direct",
736 sp->gfn, kvm_mmu_page_get_gfn(sp, index), gfn);
737 }
738
kvm_mmu_page_set_access(struct kvm_mmu_page * sp,int index,unsigned int access)739 static void kvm_mmu_page_set_access(struct kvm_mmu_page *sp, int index,
740 unsigned int access)
741 {
742 gfn_t gfn = kvm_mmu_page_get_gfn(sp, index);
743
744 kvm_mmu_page_set_translation(sp, index, gfn, access);
745 }
746
747 /*
748 * Return the pointer to the large page information for a given gfn,
749 * handling slots that are not large page aligned.
750 */
lpage_info_slot(gfn_t gfn,const struct kvm_memory_slot * slot,int level)751 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
752 const struct kvm_memory_slot *slot, int level)
753 {
754 unsigned long idx;
755
756 idx = gfn_to_index(gfn, slot->base_gfn, level);
757 return &slot->arch.lpage_info[level - 2][idx];
758 }
759
update_gfn_disallow_lpage_count(const struct kvm_memory_slot * slot,gfn_t gfn,int count)760 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot,
761 gfn_t gfn, int count)
762 {
763 struct kvm_lpage_info *linfo;
764 int i;
765
766 for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
767 linfo = lpage_info_slot(gfn, slot, i);
768 linfo->disallow_lpage += count;
769 WARN_ON(linfo->disallow_lpage < 0);
770 }
771 }
772
kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot * slot,gfn_t gfn)773 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
774 {
775 update_gfn_disallow_lpage_count(slot, gfn, 1);
776 }
777
kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot * slot,gfn_t gfn)778 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
779 {
780 update_gfn_disallow_lpage_count(slot, gfn, -1);
781 }
782
account_shadowed(struct kvm * kvm,struct kvm_mmu_page * sp)783 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
784 {
785 struct kvm_memslots *slots;
786 struct kvm_memory_slot *slot;
787 gfn_t gfn;
788
789 kvm->arch.indirect_shadow_pages++;
790 gfn = sp->gfn;
791 slots = kvm_memslots_for_spte_role(kvm, sp->role);
792 slot = __gfn_to_memslot(slots, gfn);
793
794 /* the non-leaf shadow pages are keeping readonly. */
795 if (sp->role.level > PG_LEVEL_4K)
796 return kvm_slot_page_track_add_page(kvm, slot, gfn,
797 KVM_PAGE_TRACK_WRITE);
798
799 kvm_mmu_gfn_disallow_lpage(slot, gfn);
800
801 if (kvm_mmu_slot_gfn_write_protect(kvm, slot, gfn, PG_LEVEL_4K))
802 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
803 }
804
account_huge_nx_page(struct kvm * kvm,struct kvm_mmu_page * sp)805 void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
806 {
807 if (sp->lpage_disallowed)
808 return;
809
810 ++kvm->stat.nx_lpage_splits;
811 list_add_tail(&sp->lpage_disallowed_link,
812 &kvm->arch.lpage_disallowed_mmu_pages);
813 sp->lpage_disallowed = true;
814 }
815
unaccount_shadowed(struct kvm * kvm,struct kvm_mmu_page * sp)816 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
817 {
818 struct kvm_memslots *slots;
819 struct kvm_memory_slot *slot;
820 gfn_t gfn;
821
822 kvm->arch.indirect_shadow_pages--;
823 gfn = sp->gfn;
824 slots = kvm_memslots_for_spte_role(kvm, sp->role);
825 slot = __gfn_to_memslot(slots, gfn);
826 if (sp->role.level > PG_LEVEL_4K)
827 return kvm_slot_page_track_remove_page(kvm, slot, gfn,
828 KVM_PAGE_TRACK_WRITE);
829
830 kvm_mmu_gfn_allow_lpage(slot, gfn);
831 }
832
unaccount_huge_nx_page(struct kvm * kvm,struct kvm_mmu_page * sp)833 void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
834 {
835 --kvm->stat.nx_lpage_splits;
836 sp->lpage_disallowed = false;
837 list_del(&sp->lpage_disallowed_link);
838 }
839
840 static struct kvm_memory_slot *
gfn_to_memslot_dirty_bitmap(struct kvm_vcpu * vcpu,gfn_t gfn,bool no_dirty_log)841 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
842 bool no_dirty_log)
843 {
844 struct kvm_memory_slot *slot;
845
846 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
847 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
848 return NULL;
849 if (no_dirty_log && kvm_slot_dirty_track_enabled(slot))
850 return NULL;
851
852 return slot;
853 }
854
855 /*
856 * About rmap_head encoding:
857 *
858 * If the bit zero of rmap_head->val is clear, then it points to the only spte
859 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
860 * pte_list_desc containing more mappings.
861 */
862
863 /*
864 * Returns the number of pointers in the rmap chain, not counting the new one.
865 */
pte_list_add(struct kvm_mmu_memory_cache * cache,u64 * spte,struct kvm_rmap_head * rmap_head)866 static int pte_list_add(struct kvm_mmu_memory_cache *cache, u64 *spte,
867 struct kvm_rmap_head *rmap_head)
868 {
869 struct pte_list_desc *desc;
870 int count = 0;
871
872 if (!rmap_head->val) {
873 rmap_printk("%p %llx 0->1\n", spte, *spte);
874 rmap_head->val = (unsigned long)spte;
875 } else if (!(rmap_head->val & 1)) {
876 rmap_printk("%p %llx 1->many\n", spte, *spte);
877 desc = kvm_mmu_memory_cache_alloc(cache);
878 desc->sptes[0] = (u64 *)rmap_head->val;
879 desc->sptes[1] = spte;
880 desc->spte_count = 2;
881 rmap_head->val = (unsigned long)desc | 1;
882 ++count;
883 } else {
884 rmap_printk("%p %llx many->many\n", spte, *spte);
885 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
886 while (desc->spte_count == PTE_LIST_EXT) {
887 count += PTE_LIST_EXT;
888 if (!desc->more) {
889 desc->more = kvm_mmu_memory_cache_alloc(cache);
890 desc = desc->more;
891 desc->spte_count = 0;
892 break;
893 }
894 desc = desc->more;
895 }
896 count += desc->spte_count;
897 desc->sptes[desc->spte_count++] = spte;
898 }
899 return count;
900 }
901
902 static void
pte_list_desc_remove_entry(struct kvm_rmap_head * rmap_head,struct pte_list_desc * desc,int i,struct pte_list_desc * prev_desc)903 pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,
904 struct pte_list_desc *desc, int i,
905 struct pte_list_desc *prev_desc)
906 {
907 int j = desc->spte_count - 1;
908
909 desc->sptes[i] = desc->sptes[j];
910 desc->sptes[j] = NULL;
911 desc->spte_count--;
912 if (desc->spte_count)
913 return;
914 if (!prev_desc && !desc->more)
915 rmap_head->val = 0;
916 else
917 if (prev_desc)
918 prev_desc->more = desc->more;
919 else
920 rmap_head->val = (unsigned long)desc->more | 1;
921 mmu_free_pte_list_desc(desc);
922 }
923
pte_list_remove(u64 * spte,struct kvm_rmap_head * rmap_head)924 static void pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)
925 {
926 struct pte_list_desc *desc;
927 struct pte_list_desc *prev_desc;
928 int i;
929
930 if (!rmap_head->val) {
931 pr_err("%s: %p 0->BUG\n", __func__, spte);
932 BUG();
933 } else if (!(rmap_head->val & 1)) {
934 rmap_printk("%p 1->0\n", spte);
935 if ((u64 *)rmap_head->val != spte) {
936 pr_err("%s: %p 1->BUG\n", __func__, spte);
937 BUG();
938 }
939 rmap_head->val = 0;
940 } else {
941 rmap_printk("%p many->many\n", spte);
942 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
943 prev_desc = NULL;
944 while (desc) {
945 for (i = 0; i < desc->spte_count; ++i) {
946 if (desc->sptes[i] == spte) {
947 pte_list_desc_remove_entry(rmap_head,
948 desc, i, prev_desc);
949 return;
950 }
951 }
952 prev_desc = desc;
953 desc = desc->more;
954 }
955 pr_err("%s: %p many->many\n", __func__, spte);
956 BUG();
957 }
958 }
959
kvm_zap_one_rmap_spte(struct kvm * kvm,struct kvm_rmap_head * rmap_head,u64 * sptep)960 static void kvm_zap_one_rmap_spte(struct kvm *kvm,
961 struct kvm_rmap_head *rmap_head, u64 *sptep)
962 {
963 mmu_spte_clear_track_bits(kvm, sptep);
964 pte_list_remove(sptep, rmap_head);
965 }
966
967 /* Return true if at least one SPTE was zapped, false otherwise */
kvm_zap_all_rmap_sptes(struct kvm * kvm,struct kvm_rmap_head * rmap_head)968 static bool kvm_zap_all_rmap_sptes(struct kvm *kvm,
969 struct kvm_rmap_head *rmap_head)
970 {
971 struct pte_list_desc *desc, *next;
972 int i;
973
974 if (!rmap_head->val)
975 return false;
976
977 if (!(rmap_head->val & 1)) {
978 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val);
979 goto out;
980 }
981
982 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
983
984 for (; desc; desc = next) {
985 for (i = 0; i < desc->spte_count; i++)
986 mmu_spte_clear_track_bits(kvm, desc->sptes[i]);
987 next = desc->more;
988 mmu_free_pte_list_desc(desc);
989 }
990 out:
991 /* rmap_head is meaningless now, remember to reset it */
992 rmap_head->val = 0;
993 return true;
994 }
995
pte_list_count(struct kvm_rmap_head * rmap_head)996 unsigned int pte_list_count(struct kvm_rmap_head *rmap_head)
997 {
998 struct pte_list_desc *desc;
999 unsigned int count = 0;
1000
1001 if (!rmap_head->val)
1002 return 0;
1003 else if (!(rmap_head->val & 1))
1004 return 1;
1005
1006 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1007
1008 while (desc) {
1009 count += desc->spte_count;
1010 desc = desc->more;
1011 }
1012
1013 return count;
1014 }
1015
gfn_to_rmap(gfn_t gfn,int level,const struct kvm_memory_slot * slot)1016 static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level,
1017 const struct kvm_memory_slot *slot)
1018 {
1019 unsigned long idx;
1020
1021 idx = gfn_to_index(gfn, slot->base_gfn, level);
1022 return &slot->arch.rmap[level - PG_LEVEL_4K][idx];
1023 }
1024
rmap_can_add(struct kvm_vcpu * vcpu)1025 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1026 {
1027 struct kvm_mmu_memory_cache *mc;
1028
1029 mc = &vcpu->arch.mmu_pte_list_desc_cache;
1030 return kvm_mmu_memory_cache_nr_free_objects(mc);
1031 }
1032
rmap_remove(struct kvm * kvm,u64 * spte)1033 static void rmap_remove(struct kvm *kvm, u64 *spte)
1034 {
1035 struct kvm_memslots *slots;
1036 struct kvm_memory_slot *slot;
1037 struct kvm_mmu_page *sp;
1038 gfn_t gfn;
1039 struct kvm_rmap_head *rmap_head;
1040
1041 sp = sptep_to_sp(spte);
1042 gfn = kvm_mmu_page_get_gfn(sp, spte_index(spte));
1043
1044 /*
1045 * Unlike rmap_add, rmap_remove does not run in the context of a vCPU
1046 * so we have to determine which memslots to use based on context
1047 * information in sp->role.
1048 */
1049 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1050
1051 slot = __gfn_to_memslot(slots, gfn);
1052 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1053
1054 pte_list_remove(spte, rmap_head);
1055 }
1056
1057 /*
1058 * Used by the following functions to iterate through the sptes linked by a
1059 * rmap. All fields are private and not assumed to be used outside.
1060 */
1061 struct rmap_iterator {
1062 /* private fields */
1063 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1064 int pos; /* index of the sptep */
1065 };
1066
1067 /*
1068 * Iteration must be started by this function. This should also be used after
1069 * removing/dropping sptes from the rmap link because in such cases the
1070 * information in the iterator may not be valid.
1071 *
1072 * Returns sptep if found, NULL otherwise.
1073 */
rmap_get_first(struct kvm_rmap_head * rmap_head,struct rmap_iterator * iter)1074 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1075 struct rmap_iterator *iter)
1076 {
1077 u64 *sptep;
1078
1079 if (!rmap_head->val)
1080 return NULL;
1081
1082 if (!(rmap_head->val & 1)) {
1083 iter->desc = NULL;
1084 sptep = (u64 *)rmap_head->val;
1085 goto out;
1086 }
1087
1088 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1089 iter->pos = 0;
1090 sptep = iter->desc->sptes[iter->pos];
1091 out:
1092 BUG_ON(!is_shadow_present_pte(*sptep));
1093 return sptep;
1094 }
1095
1096 /*
1097 * Must be used with a valid iterator: e.g. after rmap_get_first().
1098 *
1099 * Returns sptep if found, NULL otherwise.
1100 */
rmap_get_next(struct rmap_iterator * iter)1101 static u64 *rmap_get_next(struct rmap_iterator *iter)
1102 {
1103 u64 *sptep;
1104
1105 if (iter->desc) {
1106 if (iter->pos < PTE_LIST_EXT - 1) {
1107 ++iter->pos;
1108 sptep = iter->desc->sptes[iter->pos];
1109 if (sptep)
1110 goto out;
1111 }
1112
1113 iter->desc = iter->desc->more;
1114
1115 if (iter->desc) {
1116 iter->pos = 0;
1117 /* desc->sptes[0] cannot be NULL */
1118 sptep = iter->desc->sptes[iter->pos];
1119 goto out;
1120 }
1121 }
1122
1123 return NULL;
1124 out:
1125 BUG_ON(!is_shadow_present_pte(*sptep));
1126 return sptep;
1127 }
1128
1129 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1130 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1131 _spte_; _spte_ = rmap_get_next(_iter_))
1132
drop_spte(struct kvm * kvm,u64 * sptep)1133 static void drop_spte(struct kvm *kvm, u64 *sptep)
1134 {
1135 u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep);
1136
1137 if (is_shadow_present_pte(old_spte))
1138 rmap_remove(kvm, sptep);
1139 }
1140
drop_large_spte(struct kvm * kvm,u64 * sptep,bool flush)1141 static void drop_large_spte(struct kvm *kvm, u64 *sptep, bool flush)
1142 {
1143 struct kvm_mmu_page *sp;
1144
1145 sp = sptep_to_sp(sptep);
1146 WARN_ON(sp->role.level == PG_LEVEL_4K);
1147
1148 drop_spte(kvm, sptep);
1149
1150 if (flush)
1151 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
1152 KVM_PAGES_PER_HPAGE(sp->role.level));
1153 }
1154
1155 /*
1156 * Write-protect on the specified @sptep, @pt_protect indicates whether
1157 * spte write-protection is caused by protecting shadow page table.
1158 *
1159 * Note: write protection is difference between dirty logging and spte
1160 * protection:
1161 * - for dirty logging, the spte can be set to writable at anytime if
1162 * its dirty bitmap is properly set.
1163 * - for spte protection, the spte can be writable only after unsync-ing
1164 * shadow page.
1165 *
1166 * Return true if tlb need be flushed.
1167 */
spte_write_protect(u64 * sptep,bool pt_protect)1168 static bool spte_write_protect(u64 *sptep, bool pt_protect)
1169 {
1170 u64 spte = *sptep;
1171
1172 if (!is_writable_pte(spte) &&
1173 !(pt_protect && is_mmu_writable_spte(spte)))
1174 return false;
1175
1176 rmap_printk("spte %p %llx\n", sptep, *sptep);
1177
1178 if (pt_protect)
1179 spte &= ~shadow_mmu_writable_mask;
1180 spte = spte & ~PT_WRITABLE_MASK;
1181
1182 return mmu_spte_update(sptep, spte);
1183 }
1184
rmap_write_protect(struct kvm_rmap_head * rmap_head,bool pt_protect)1185 static bool rmap_write_protect(struct kvm_rmap_head *rmap_head,
1186 bool pt_protect)
1187 {
1188 u64 *sptep;
1189 struct rmap_iterator iter;
1190 bool flush = false;
1191
1192 for_each_rmap_spte(rmap_head, &iter, sptep)
1193 flush |= spte_write_protect(sptep, pt_protect);
1194
1195 return flush;
1196 }
1197
spte_clear_dirty(u64 * sptep)1198 static bool spte_clear_dirty(u64 *sptep)
1199 {
1200 u64 spte = *sptep;
1201
1202 rmap_printk("spte %p %llx\n", sptep, *sptep);
1203
1204 MMU_WARN_ON(!spte_ad_enabled(spte));
1205 spte &= ~shadow_dirty_mask;
1206 return mmu_spte_update(sptep, spte);
1207 }
1208
spte_wrprot_for_clear_dirty(u64 * sptep)1209 static bool spte_wrprot_for_clear_dirty(u64 *sptep)
1210 {
1211 bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT,
1212 (unsigned long *)sptep);
1213 if (was_writable && !spte_ad_enabled(*sptep))
1214 kvm_set_pfn_dirty(spte_to_pfn(*sptep));
1215
1216 return was_writable;
1217 }
1218
1219 /*
1220 * Gets the GFN ready for another round of dirty logging by clearing the
1221 * - D bit on ad-enabled SPTEs, and
1222 * - W bit on ad-disabled SPTEs.
1223 * Returns true iff any D or W bits were cleared.
1224 */
__rmap_clear_dirty(struct kvm * kvm,struct kvm_rmap_head * rmap_head,const struct kvm_memory_slot * slot)1225 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1226 const struct kvm_memory_slot *slot)
1227 {
1228 u64 *sptep;
1229 struct rmap_iterator iter;
1230 bool flush = false;
1231
1232 for_each_rmap_spte(rmap_head, &iter, sptep)
1233 if (spte_ad_need_write_protect(*sptep))
1234 flush |= spte_wrprot_for_clear_dirty(sptep);
1235 else
1236 flush |= spte_clear_dirty(sptep);
1237
1238 return flush;
1239 }
1240
1241 /**
1242 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1243 * @kvm: kvm instance
1244 * @slot: slot to protect
1245 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1246 * @mask: indicates which pages we should protect
1247 *
1248 * Used when we do not need to care about huge page mappings.
1249 */
kvm_mmu_write_protect_pt_masked(struct kvm * kvm,struct kvm_memory_slot * slot,gfn_t gfn_offset,unsigned long mask)1250 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1251 struct kvm_memory_slot *slot,
1252 gfn_t gfn_offset, unsigned long mask)
1253 {
1254 struct kvm_rmap_head *rmap_head;
1255
1256 if (is_tdp_mmu_enabled(kvm))
1257 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1258 slot->base_gfn + gfn_offset, mask, true);
1259
1260 if (!kvm_memslots_have_rmaps(kvm))
1261 return;
1262
1263 while (mask) {
1264 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1265 PG_LEVEL_4K, slot);
1266 rmap_write_protect(rmap_head, false);
1267
1268 /* clear the first set bit */
1269 mask &= mask - 1;
1270 }
1271 }
1272
1273 /**
1274 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1275 * protect the page if the D-bit isn't supported.
1276 * @kvm: kvm instance
1277 * @slot: slot to clear D-bit
1278 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1279 * @mask: indicates which pages we should clear D-bit
1280 *
1281 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1282 */
kvm_mmu_clear_dirty_pt_masked(struct kvm * kvm,struct kvm_memory_slot * slot,gfn_t gfn_offset,unsigned long mask)1283 static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1284 struct kvm_memory_slot *slot,
1285 gfn_t gfn_offset, unsigned long mask)
1286 {
1287 struct kvm_rmap_head *rmap_head;
1288
1289 if (is_tdp_mmu_enabled(kvm))
1290 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1291 slot->base_gfn + gfn_offset, mask, false);
1292
1293 if (!kvm_memslots_have_rmaps(kvm))
1294 return;
1295
1296 while (mask) {
1297 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1298 PG_LEVEL_4K, slot);
1299 __rmap_clear_dirty(kvm, rmap_head, slot);
1300
1301 /* clear the first set bit */
1302 mask &= mask - 1;
1303 }
1304 }
1305
1306 /**
1307 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1308 * PT level pages.
1309 *
1310 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1311 * enable dirty logging for them.
1312 *
1313 * We need to care about huge page mappings: e.g. during dirty logging we may
1314 * have such mappings.
1315 */
kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm * kvm,struct kvm_memory_slot * slot,gfn_t gfn_offset,unsigned long mask)1316 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1317 struct kvm_memory_slot *slot,
1318 gfn_t gfn_offset, unsigned long mask)
1319 {
1320 /*
1321 * Huge pages are NOT write protected when we start dirty logging in
1322 * initially-all-set mode; must write protect them here so that they
1323 * are split to 4K on the first write.
1324 *
1325 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1326 * of memslot has no such restriction, so the range can cross two large
1327 * pages.
1328 */
1329 if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
1330 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask);
1331 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask);
1332
1333 if (READ_ONCE(eager_page_split))
1334 kvm_mmu_try_split_huge_pages(kvm, slot, start, end, PG_LEVEL_4K);
1335
1336 kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M);
1337
1338 /* Cross two large pages? */
1339 if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) !=
1340 ALIGN(end << PAGE_SHIFT, PMD_SIZE))
1341 kvm_mmu_slot_gfn_write_protect(kvm, slot, end,
1342 PG_LEVEL_2M);
1343 }
1344
1345 /* Now handle 4K PTEs. */
1346 if (kvm_x86_ops.cpu_dirty_log_size)
1347 kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);
1348 else
1349 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1350 }
1351
kvm_cpu_dirty_log_size(void)1352 int kvm_cpu_dirty_log_size(void)
1353 {
1354 return kvm_x86_ops.cpu_dirty_log_size;
1355 }
1356
kvm_mmu_slot_gfn_write_protect(struct kvm * kvm,struct kvm_memory_slot * slot,u64 gfn,int min_level)1357 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1358 struct kvm_memory_slot *slot, u64 gfn,
1359 int min_level)
1360 {
1361 struct kvm_rmap_head *rmap_head;
1362 int i;
1363 bool write_protected = false;
1364
1365 if (kvm_memslots_have_rmaps(kvm)) {
1366 for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
1367 rmap_head = gfn_to_rmap(gfn, i, slot);
1368 write_protected |= rmap_write_protect(rmap_head, true);
1369 }
1370 }
1371
1372 if (is_tdp_mmu_enabled(kvm))
1373 write_protected |=
1374 kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level);
1375
1376 return write_protected;
1377 }
1378
kvm_vcpu_write_protect_gfn(struct kvm_vcpu * vcpu,u64 gfn)1379 static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn)
1380 {
1381 struct kvm_memory_slot *slot;
1382
1383 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1384 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K);
1385 }
1386
__kvm_zap_rmap(struct kvm * kvm,struct kvm_rmap_head * rmap_head,const struct kvm_memory_slot * slot)1387 static bool __kvm_zap_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1388 const struct kvm_memory_slot *slot)
1389 {
1390 return kvm_zap_all_rmap_sptes(kvm, rmap_head);
1391 }
1392
kvm_zap_rmap(struct kvm * kvm,struct kvm_rmap_head * rmap_head,struct kvm_memory_slot * slot,gfn_t gfn,int level,pte_t unused)1393 static bool kvm_zap_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1394 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1395 pte_t unused)
1396 {
1397 return __kvm_zap_rmap(kvm, rmap_head, slot);
1398 }
1399
kvm_set_pte_rmap(struct kvm * kvm,struct kvm_rmap_head * rmap_head,struct kvm_memory_slot * slot,gfn_t gfn,int level,pte_t pte)1400 static bool kvm_set_pte_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1401 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1402 pte_t pte)
1403 {
1404 u64 *sptep;
1405 struct rmap_iterator iter;
1406 bool need_flush = false;
1407 u64 new_spte;
1408 kvm_pfn_t new_pfn;
1409
1410 WARN_ON(pte_huge(pte));
1411 new_pfn = pte_pfn(pte);
1412
1413 restart:
1414 for_each_rmap_spte(rmap_head, &iter, sptep) {
1415 rmap_printk("spte %p %llx gfn %llx (%d)\n",
1416 sptep, *sptep, gfn, level);
1417
1418 need_flush = true;
1419
1420 if (pte_write(pte)) {
1421 kvm_zap_one_rmap_spte(kvm, rmap_head, sptep);
1422 goto restart;
1423 } else {
1424 new_spte = kvm_mmu_changed_pte_notifier_make_spte(
1425 *sptep, new_pfn);
1426
1427 mmu_spte_clear_track_bits(kvm, sptep);
1428 mmu_spte_set(sptep, new_spte);
1429 }
1430 }
1431
1432 if (need_flush && kvm_available_flush_tlb_with_range()) {
1433 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
1434 return false;
1435 }
1436
1437 return need_flush;
1438 }
1439
1440 struct slot_rmap_walk_iterator {
1441 /* input fields. */
1442 const struct kvm_memory_slot *slot;
1443 gfn_t start_gfn;
1444 gfn_t end_gfn;
1445 int start_level;
1446 int end_level;
1447
1448 /* output fields. */
1449 gfn_t gfn;
1450 struct kvm_rmap_head *rmap;
1451 int level;
1452
1453 /* private field. */
1454 struct kvm_rmap_head *end_rmap;
1455 };
1456
1457 static void
rmap_walk_init_level(struct slot_rmap_walk_iterator * iterator,int level)1458 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1459 {
1460 iterator->level = level;
1461 iterator->gfn = iterator->start_gfn;
1462 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot);
1463 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot);
1464 }
1465
1466 static void
slot_rmap_walk_init(struct slot_rmap_walk_iterator * iterator,const struct kvm_memory_slot * slot,int start_level,int end_level,gfn_t start_gfn,gfn_t end_gfn)1467 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1468 const struct kvm_memory_slot *slot, int start_level,
1469 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1470 {
1471 iterator->slot = slot;
1472 iterator->start_level = start_level;
1473 iterator->end_level = end_level;
1474 iterator->start_gfn = start_gfn;
1475 iterator->end_gfn = end_gfn;
1476
1477 rmap_walk_init_level(iterator, iterator->start_level);
1478 }
1479
slot_rmap_walk_okay(struct slot_rmap_walk_iterator * iterator)1480 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1481 {
1482 return !!iterator->rmap;
1483 }
1484
slot_rmap_walk_next(struct slot_rmap_walk_iterator * iterator)1485 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1486 {
1487 while (++iterator->rmap <= iterator->end_rmap) {
1488 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1489
1490 if (iterator->rmap->val)
1491 return;
1492 }
1493
1494 if (++iterator->level > iterator->end_level) {
1495 iterator->rmap = NULL;
1496 return;
1497 }
1498
1499 rmap_walk_init_level(iterator, iterator->level);
1500 }
1501
1502 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1503 _start_gfn, _end_gfn, _iter_) \
1504 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1505 _end_level_, _start_gfn, _end_gfn); \
1506 slot_rmap_walk_okay(_iter_); \
1507 slot_rmap_walk_next(_iter_))
1508
1509 typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1510 struct kvm_memory_slot *slot, gfn_t gfn,
1511 int level, pte_t pte);
1512
kvm_handle_gfn_range(struct kvm * kvm,struct kvm_gfn_range * range,rmap_handler_t handler)1513 static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm,
1514 struct kvm_gfn_range *range,
1515 rmap_handler_t handler)
1516 {
1517 struct slot_rmap_walk_iterator iterator;
1518 bool ret = false;
1519
1520 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
1521 range->start, range->end - 1, &iterator)
1522 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn,
1523 iterator.level, range->pte);
1524
1525 return ret;
1526 }
1527
kvm_unmap_gfn_range(struct kvm * kvm,struct kvm_gfn_range * range)1528 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
1529 {
1530 bool flush = false;
1531
1532 if (kvm_memslots_have_rmaps(kvm))
1533 flush = kvm_handle_gfn_range(kvm, range, kvm_zap_rmap);
1534
1535 if (is_tdp_mmu_enabled(kvm))
1536 flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush);
1537
1538 return flush;
1539 }
1540
kvm_set_spte_gfn(struct kvm * kvm,struct kvm_gfn_range * range)1541 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1542 {
1543 bool flush = false;
1544
1545 if (kvm_memslots_have_rmaps(kvm))
1546 flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmap);
1547
1548 if (is_tdp_mmu_enabled(kvm))
1549 flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range);
1550
1551 return flush;
1552 }
1553
kvm_age_rmap(struct kvm * kvm,struct kvm_rmap_head * rmap_head,struct kvm_memory_slot * slot,gfn_t gfn,int level,pte_t unused)1554 static bool kvm_age_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1555 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1556 pte_t unused)
1557 {
1558 u64 *sptep;
1559 struct rmap_iterator iter;
1560 int young = 0;
1561
1562 for_each_rmap_spte(rmap_head, &iter, sptep)
1563 young |= mmu_spte_age(sptep);
1564
1565 return young;
1566 }
1567
kvm_test_age_rmap(struct kvm * kvm,struct kvm_rmap_head * rmap_head,struct kvm_memory_slot * slot,gfn_t gfn,int level,pte_t unused)1568 static bool kvm_test_age_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1569 struct kvm_memory_slot *slot, gfn_t gfn,
1570 int level, pte_t unused)
1571 {
1572 u64 *sptep;
1573 struct rmap_iterator iter;
1574
1575 for_each_rmap_spte(rmap_head, &iter, sptep)
1576 if (is_accessed_spte(*sptep))
1577 return true;
1578 return false;
1579 }
1580
1581 #define RMAP_RECYCLE_THRESHOLD 1000
1582
__rmap_add(struct kvm * kvm,struct kvm_mmu_memory_cache * cache,const struct kvm_memory_slot * slot,u64 * spte,gfn_t gfn,unsigned int access)1583 static void __rmap_add(struct kvm *kvm,
1584 struct kvm_mmu_memory_cache *cache,
1585 const struct kvm_memory_slot *slot,
1586 u64 *spte, gfn_t gfn, unsigned int access)
1587 {
1588 struct kvm_mmu_page *sp;
1589 struct kvm_rmap_head *rmap_head;
1590 int rmap_count;
1591
1592 sp = sptep_to_sp(spte);
1593 kvm_mmu_page_set_translation(sp, spte_index(spte), gfn, access);
1594 kvm_update_page_stats(kvm, sp->role.level, 1);
1595
1596 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1597 rmap_count = pte_list_add(cache, spte, rmap_head);
1598
1599 if (rmap_count > kvm->stat.max_mmu_rmap_size)
1600 kvm->stat.max_mmu_rmap_size = rmap_count;
1601 if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
1602 kvm_zap_all_rmap_sptes(kvm, rmap_head);
1603 kvm_flush_remote_tlbs_with_address(
1604 kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level));
1605 }
1606 }
1607
rmap_add(struct kvm_vcpu * vcpu,const struct kvm_memory_slot * slot,u64 * spte,gfn_t gfn,unsigned int access)1608 static void rmap_add(struct kvm_vcpu *vcpu, const struct kvm_memory_slot *slot,
1609 u64 *spte, gfn_t gfn, unsigned int access)
1610 {
1611 struct kvm_mmu_memory_cache *cache = &vcpu->arch.mmu_pte_list_desc_cache;
1612
1613 __rmap_add(vcpu->kvm, cache, slot, spte, gfn, access);
1614 }
1615
kvm_age_gfn(struct kvm * kvm,struct kvm_gfn_range * range)1616 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1617 {
1618 bool young = false;
1619
1620 if (kvm_memslots_have_rmaps(kvm))
1621 young = kvm_handle_gfn_range(kvm, range, kvm_age_rmap);
1622
1623 if (is_tdp_mmu_enabled(kvm))
1624 young |= kvm_tdp_mmu_age_gfn_range(kvm, range);
1625
1626 return young;
1627 }
1628
kvm_test_age_gfn(struct kvm * kvm,struct kvm_gfn_range * range)1629 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1630 {
1631 bool young = false;
1632
1633 if (kvm_memslots_have_rmaps(kvm))
1634 young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmap);
1635
1636 if (is_tdp_mmu_enabled(kvm))
1637 young |= kvm_tdp_mmu_test_age_gfn(kvm, range);
1638
1639 return young;
1640 }
1641
1642 #ifdef MMU_DEBUG
is_empty_shadow_page(u64 * spt)1643 static int is_empty_shadow_page(u64 *spt)
1644 {
1645 u64 *pos;
1646 u64 *end;
1647
1648 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1649 if (is_shadow_present_pte(*pos)) {
1650 printk(KERN_ERR "%s: %p %llx\n", __func__,
1651 pos, *pos);
1652 return 0;
1653 }
1654 return 1;
1655 }
1656 #endif
1657
1658 /*
1659 * This value is the sum of all of the kvm instances's
1660 * kvm->arch.n_used_mmu_pages values. We need a global,
1661 * aggregate version in order to make the slab shrinker
1662 * faster
1663 */
kvm_mod_used_mmu_pages(struct kvm * kvm,long nr)1664 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr)
1665 {
1666 kvm->arch.n_used_mmu_pages += nr;
1667 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1668 }
1669
kvm_account_mmu_page(struct kvm * kvm,struct kvm_mmu_page * sp)1670 static void kvm_account_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1671 {
1672 kvm_mod_used_mmu_pages(kvm, +1);
1673 kvm_account_pgtable_pages((void *)sp->spt, +1);
1674 }
1675
kvm_unaccount_mmu_page(struct kvm * kvm,struct kvm_mmu_page * sp)1676 static void kvm_unaccount_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1677 {
1678 kvm_mod_used_mmu_pages(kvm, -1);
1679 kvm_account_pgtable_pages((void *)sp->spt, -1);
1680 }
1681
kvm_mmu_free_shadow_page(struct kvm_mmu_page * sp)1682 static void kvm_mmu_free_shadow_page(struct kvm_mmu_page *sp)
1683 {
1684 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1685 hlist_del(&sp->hash_link);
1686 list_del(&sp->link);
1687 free_page((unsigned long)sp->spt);
1688 if (!sp->role.direct)
1689 free_page((unsigned long)sp->shadowed_translation);
1690 kmem_cache_free(mmu_page_header_cache, sp);
1691 }
1692
kvm_page_table_hashfn(gfn_t gfn)1693 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1694 {
1695 return hash_64(gfn, KVM_MMU_HASH_SHIFT);
1696 }
1697
mmu_page_add_parent_pte(struct kvm_mmu_memory_cache * cache,struct kvm_mmu_page * sp,u64 * parent_pte)1698 static void mmu_page_add_parent_pte(struct kvm_mmu_memory_cache *cache,
1699 struct kvm_mmu_page *sp, u64 *parent_pte)
1700 {
1701 if (!parent_pte)
1702 return;
1703
1704 pte_list_add(cache, parent_pte, &sp->parent_ptes);
1705 }
1706
mmu_page_remove_parent_pte(struct kvm_mmu_page * sp,u64 * parent_pte)1707 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1708 u64 *parent_pte)
1709 {
1710 pte_list_remove(parent_pte, &sp->parent_ptes);
1711 }
1712
drop_parent_pte(struct kvm_mmu_page * sp,u64 * parent_pte)1713 static void drop_parent_pte(struct kvm_mmu_page *sp,
1714 u64 *parent_pte)
1715 {
1716 mmu_page_remove_parent_pte(sp, parent_pte);
1717 mmu_spte_clear_no_track(parent_pte);
1718 }
1719
1720 static void mark_unsync(u64 *spte);
kvm_mmu_mark_parents_unsync(struct kvm_mmu_page * sp)1721 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1722 {
1723 u64 *sptep;
1724 struct rmap_iterator iter;
1725
1726 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1727 mark_unsync(sptep);
1728 }
1729 }
1730
mark_unsync(u64 * spte)1731 static void mark_unsync(u64 *spte)
1732 {
1733 struct kvm_mmu_page *sp;
1734
1735 sp = sptep_to_sp(spte);
1736 if (__test_and_set_bit(spte_index(spte), sp->unsync_child_bitmap))
1737 return;
1738 if (sp->unsync_children++)
1739 return;
1740 kvm_mmu_mark_parents_unsync(sp);
1741 }
1742
nonpaging_sync_page(struct kvm_vcpu * vcpu,struct kvm_mmu_page * sp)1743 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1744 struct kvm_mmu_page *sp)
1745 {
1746 return -1;
1747 }
1748
1749 #define KVM_PAGE_ARRAY_NR 16
1750
1751 struct kvm_mmu_pages {
1752 struct mmu_page_and_offset {
1753 struct kvm_mmu_page *sp;
1754 unsigned int idx;
1755 } page[KVM_PAGE_ARRAY_NR];
1756 unsigned int nr;
1757 };
1758
mmu_pages_add(struct kvm_mmu_pages * pvec,struct kvm_mmu_page * sp,int idx)1759 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1760 int idx)
1761 {
1762 int i;
1763
1764 if (sp->unsync)
1765 for (i=0; i < pvec->nr; i++)
1766 if (pvec->page[i].sp == sp)
1767 return 0;
1768
1769 pvec->page[pvec->nr].sp = sp;
1770 pvec->page[pvec->nr].idx = idx;
1771 pvec->nr++;
1772 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1773 }
1774
clear_unsync_child_bit(struct kvm_mmu_page * sp,int idx)1775 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1776 {
1777 --sp->unsync_children;
1778 WARN_ON((int)sp->unsync_children < 0);
1779 __clear_bit(idx, sp->unsync_child_bitmap);
1780 }
1781
__mmu_unsync_walk(struct kvm_mmu_page * sp,struct kvm_mmu_pages * pvec)1782 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1783 struct kvm_mmu_pages *pvec)
1784 {
1785 int i, ret, nr_unsync_leaf = 0;
1786
1787 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1788 struct kvm_mmu_page *child;
1789 u64 ent = sp->spt[i];
1790
1791 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1792 clear_unsync_child_bit(sp, i);
1793 continue;
1794 }
1795
1796 child = to_shadow_page(ent & SPTE_BASE_ADDR_MASK);
1797
1798 if (child->unsync_children) {
1799 if (mmu_pages_add(pvec, child, i))
1800 return -ENOSPC;
1801
1802 ret = __mmu_unsync_walk(child, pvec);
1803 if (!ret) {
1804 clear_unsync_child_bit(sp, i);
1805 continue;
1806 } else if (ret > 0) {
1807 nr_unsync_leaf += ret;
1808 } else
1809 return ret;
1810 } else if (child->unsync) {
1811 nr_unsync_leaf++;
1812 if (mmu_pages_add(pvec, child, i))
1813 return -ENOSPC;
1814 } else
1815 clear_unsync_child_bit(sp, i);
1816 }
1817
1818 return nr_unsync_leaf;
1819 }
1820
1821 #define INVALID_INDEX (-1)
1822
mmu_unsync_walk(struct kvm_mmu_page * sp,struct kvm_mmu_pages * pvec)1823 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1824 struct kvm_mmu_pages *pvec)
1825 {
1826 pvec->nr = 0;
1827 if (!sp->unsync_children)
1828 return 0;
1829
1830 mmu_pages_add(pvec, sp, INVALID_INDEX);
1831 return __mmu_unsync_walk(sp, pvec);
1832 }
1833
kvm_unlink_unsync_page(struct kvm * kvm,struct kvm_mmu_page * sp)1834 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1835 {
1836 WARN_ON(!sp->unsync);
1837 trace_kvm_mmu_sync_page(sp);
1838 sp->unsync = 0;
1839 --kvm->stat.mmu_unsync;
1840 }
1841
1842 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1843 struct list_head *invalid_list);
1844 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1845 struct list_head *invalid_list);
1846
sp_has_gptes(struct kvm_mmu_page * sp)1847 static bool sp_has_gptes(struct kvm_mmu_page *sp)
1848 {
1849 if (sp->role.direct)
1850 return false;
1851
1852 if (sp->role.passthrough)
1853 return false;
1854
1855 return true;
1856 }
1857
1858 #define for_each_valid_sp(_kvm, _sp, _list) \
1859 hlist_for_each_entry(_sp, _list, hash_link) \
1860 if (is_obsolete_sp((_kvm), (_sp))) { \
1861 } else
1862
1863 #define for_each_gfn_valid_sp_with_gptes(_kvm, _sp, _gfn) \
1864 for_each_valid_sp(_kvm, _sp, \
1865 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1866 if ((_sp)->gfn != (_gfn) || !sp_has_gptes(_sp)) {} else
1867
kvm_sync_page(struct kvm_vcpu * vcpu,struct kvm_mmu_page * sp,struct list_head * invalid_list)1868 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1869 struct list_head *invalid_list)
1870 {
1871 int ret = vcpu->arch.mmu->sync_page(vcpu, sp);
1872
1873 if (ret < 0)
1874 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1875 return ret;
1876 }
1877
kvm_mmu_remote_flush_or_zap(struct kvm * kvm,struct list_head * invalid_list,bool remote_flush)1878 static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm,
1879 struct list_head *invalid_list,
1880 bool remote_flush)
1881 {
1882 if (!remote_flush && list_empty(invalid_list))
1883 return false;
1884
1885 if (!list_empty(invalid_list))
1886 kvm_mmu_commit_zap_page(kvm, invalid_list);
1887 else
1888 kvm_flush_remote_tlbs(kvm);
1889 return true;
1890 }
1891
is_obsolete_sp(struct kvm * kvm,struct kvm_mmu_page * sp)1892 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
1893 {
1894 if (sp->role.invalid)
1895 return true;
1896
1897 /* TDP MMU pages due not use the MMU generation. */
1898 return !sp->tdp_mmu_page &&
1899 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
1900 }
1901
1902 struct mmu_page_path {
1903 struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL];
1904 unsigned int idx[PT64_ROOT_MAX_LEVEL];
1905 };
1906
1907 #define for_each_sp(pvec, sp, parents, i) \
1908 for (i = mmu_pages_first(&pvec, &parents); \
1909 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1910 i = mmu_pages_next(&pvec, &parents, i))
1911
mmu_pages_next(struct kvm_mmu_pages * pvec,struct mmu_page_path * parents,int i)1912 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1913 struct mmu_page_path *parents,
1914 int i)
1915 {
1916 int n;
1917
1918 for (n = i+1; n < pvec->nr; n++) {
1919 struct kvm_mmu_page *sp = pvec->page[n].sp;
1920 unsigned idx = pvec->page[n].idx;
1921 int level = sp->role.level;
1922
1923 parents->idx[level-1] = idx;
1924 if (level == PG_LEVEL_4K)
1925 break;
1926
1927 parents->parent[level-2] = sp;
1928 }
1929
1930 return n;
1931 }
1932
mmu_pages_first(struct kvm_mmu_pages * pvec,struct mmu_page_path * parents)1933 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
1934 struct mmu_page_path *parents)
1935 {
1936 struct kvm_mmu_page *sp;
1937 int level;
1938
1939 if (pvec->nr == 0)
1940 return 0;
1941
1942 WARN_ON(pvec->page[0].idx != INVALID_INDEX);
1943
1944 sp = pvec->page[0].sp;
1945 level = sp->role.level;
1946 WARN_ON(level == PG_LEVEL_4K);
1947
1948 parents->parent[level-2] = sp;
1949
1950 /* Also set up a sentinel. Further entries in pvec are all
1951 * children of sp, so this element is never overwritten.
1952 */
1953 parents->parent[level-1] = NULL;
1954 return mmu_pages_next(pvec, parents, 0);
1955 }
1956
mmu_pages_clear_parents(struct mmu_page_path * parents)1957 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1958 {
1959 struct kvm_mmu_page *sp;
1960 unsigned int level = 0;
1961
1962 do {
1963 unsigned int idx = parents->idx[level];
1964 sp = parents->parent[level];
1965 if (!sp)
1966 return;
1967
1968 WARN_ON(idx == INVALID_INDEX);
1969 clear_unsync_child_bit(sp, idx);
1970 level++;
1971 } while (!sp->unsync_children);
1972 }
1973
mmu_sync_children(struct kvm_vcpu * vcpu,struct kvm_mmu_page * parent,bool can_yield)1974 static int mmu_sync_children(struct kvm_vcpu *vcpu,
1975 struct kvm_mmu_page *parent, bool can_yield)
1976 {
1977 int i;
1978 struct kvm_mmu_page *sp;
1979 struct mmu_page_path parents;
1980 struct kvm_mmu_pages pages;
1981 LIST_HEAD(invalid_list);
1982 bool flush = false;
1983
1984 while (mmu_unsync_walk(parent, &pages)) {
1985 bool protected = false;
1986
1987 for_each_sp(pages, sp, parents, i)
1988 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn);
1989
1990 if (protected) {
1991 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true);
1992 flush = false;
1993 }
1994
1995 for_each_sp(pages, sp, parents, i) {
1996 kvm_unlink_unsync_page(vcpu->kvm, sp);
1997 flush |= kvm_sync_page(vcpu, sp, &invalid_list) > 0;
1998 mmu_pages_clear_parents(&parents);
1999 }
2000 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) {
2001 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2002 if (!can_yield) {
2003 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2004 return -EINTR;
2005 }
2006
2007 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock);
2008 flush = false;
2009 }
2010 }
2011
2012 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2013 return 0;
2014 }
2015
__clear_sp_write_flooding_count(struct kvm_mmu_page * sp)2016 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2017 {
2018 atomic_set(&sp->write_flooding_count, 0);
2019 }
2020
clear_sp_write_flooding_count(u64 * spte)2021 static void clear_sp_write_flooding_count(u64 *spte)
2022 {
2023 __clear_sp_write_flooding_count(sptep_to_sp(spte));
2024 }
2025
2026 /*
2027 * The vCPU is required when finding indirect shadow pages; the shadow
2028 * page may already exist and syncing it needs the vCPU pointer in
2029 * order to read guest page tables. Direct shadow pages are never
2030 * unsync, thus @vcpu can be NULL if @role.direct is true.
2031 */
kvm_mmu_find_shadow_page(struct kvm * kvm,struct kvm_vcpu * vcpu,gfn_t gfn,struct hlist_head * sp_list,union kvm_mmu_page_role role)2032 static struct kvm_mmu_page *kvm_mmu_find_shadow_page(struct kvm *kvm,
2033 struct kvm_vcpu *vcpu,
2034 gfn_t gfn,
2035 struct hlist_head *sp_list,
2036 union kvm_mmu_page_role role)
2037 {
2038 struct kvm_mmu_page *sp;
2039 int ret;
2040 int collisions = 0;
2041 LIST_HEAD(invalid_list);
2042
2043 for_each_valid_sp(kvm, sp, sp_list) {
2044 if (sp->gfn != gfn) {
2045 collisions++;
2046 continue;
2047 }
2048
2049 if (sp->role.word != role.word) {
2050 /*
2051 * If the guest is creating an upper-level page, zap
2052 * unsync pages for the same gfn. While it's possible
2053 * the guest is using recursive page tables, in all
2054 * likelihood the guest has stopped using the unsync
2055 * page and is installing a completely unrelated page.
2056 * Unsync pages must not be left as is, because the new
2057 * upper-level page will be write-protected.
2058 */
2059 if (role.level > PG_LEVEL_4K && sp->unsync)
2060 kvm_mmu_prepare_zap_page(kvm, sp,
2061 &invalid_list);
2062 continue;
2063 }
2064
2065 /* unsync and write-flooding only apply to indirect SPs. */
2066 if (sp->role.direct)
2067 goto out;
2068
2069 if (sp->unsync) {
2070 if (KVM_BUG_ON(!vcpu, kvm))
2071 break;
2072
2073 /*
2074 * The page is good, but is stale. kvm_sync_page does
2075 * get the latest guest state, but (unlike mmu_unsync_children)
2076 * it doesn't write-protect the page or mark it synchronized!
2077 * This way the validity of the mapping is ensured, but the
2078 * overhead of write protection is not incurred until the
2079 * guest invalidates the TLB mapping. This allows multiple
2080 * SPs for a single gfn to be unsync.
2081 *
2082 * If the sync fails, the page is zapped. If so, break
2083 * in order to rebuild it.
2084 */
2085 ret = kvm_sync_page(vcpu, sp, &invalid_list);
2086 if (ret < 0)
2087 break;
2088
2089 WARN_ON(!list_empty(&invalid_list));
2090 if (ret > 0)
2091 kvm_flush_remote_tlbs(kvm);
2092 }
2093
2094 __clear_sp_write_flooding_count(sp);
2095
2096 goto out;
2097 }
2098
2099 sp = NULL;
2100 ++kvm->stat.mmu_cache_miss;
2101
2102 out:
2103 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2104
2105 if (collisions > kvm->stat.max_mmu_page_hash_collisions)
2106 kvm->stat.max_mmu_page_hash_collisions = collisions;
2107 return sp;
2108 }
2109
2110 /* Caches used when allocating a new shadow page. */
2111 struct shadow_page_caches {
2112 struct kvm_mmu_memory_cache *page_header_cache;
2113 struct kvm_mmu_memory_cache *shadow_page_cache;
2114 struct kvm_mmu_memory_cache *shadowed_info_cache;
2115 };
2116
kvm_mmu_alloc_shadow_page(struct kvm * kvm,struct shadow_page_caches * caches,gfn_t gfn,struct hlist_head * sp_list,union kvm_mmu_page_role role)2117 static struct kvm_mmu_page *kvm_mmu_alloc_shadow_page(struct kvm *kvm,
2118 struct shadow_page_caches *caches,
2119 gfn_t gfn,
2120 struct hlist_head *sp_list,
2121 union kvm_mmu_page_role role)
2122 {
2123 struct kvm_mmu_page *sp;
2124
2125 sp = kvm_mmu_memory_cache_alloc(caches->page_header_cache);
2126 sp->spt = kvm_mmu_memory_cache_alloc(caches->shadow_page_cache);
2127 if (!role.direct)
2128 sp->shadowed_translation = kvm_mmu_memory_cache_alloc(caches->shadowed_info_cache);
2129
2130 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
2131
2132 /*
2133 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
2134 * depends on valid pages being added to the head of the list. See
2135 * comments in kvm_zap_obsolete_pages().
2136 */
2137 sp->mmu_valid_gen = kvm->arch.mmu_valid_gen;
2138 list_add(&sp->link, &kvm->arch.active_mmu_pages);
2139 kvm_account_mmu_page(kvm, sp);
2140
2141 sp->gfn = gfn;
2142 sp->role = role;
2143 hlist_add_head(&sp->hash_link, sp_list);
2144 if (sp_has_gptes(sp))
2145 account_shadowed(kvm, sp);
2146
2147 return sp;
2148 }
2149
2150 /* Note, @vcpu may be NULL if @role.direct is true; see kvm_mmu_find_shadow_page. */
__kvm_mmu_get_shadow_page(struct kvm * kvm,struct kvm_vcpu * vcpu,struct shadow_page_caches * caches,gfn_t gfn,union kvm_mmu_page_role role)2151 static struct kvm_mmu_page *__kvm_mmu_get_shadow_page(struct kvm *kvm,
2152 struct kvm_vcpu *vcpu,
2153 struct shadow_page_caches *caches,
2154 gfn_t gfn,
2155 union kvm_mmu_page_role role)
2156 {
2157 struct hlist_head *sp_list;
2158 struct kvm_mmu_page *sp;
2159 bool created = false;
2160
2161 sp_list = &kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)];
2162
2163 sp = kvm_mmu_find_shadow_page(kvm, vcpu, gfn, sp_list, role);
2164 if (!sp) {
2165 created = true;
2166 sp = kvm_mmu_alloc_shadow_page(kvm, caches, gfn, sp_list, role);
2167 }
2168
2169 trace_kvm_mmu_get_page(sp, created);
2170 return sp;
2171 }
2172
kvm_mmu_get_shadow_page(struct kvm_vcpu * vcpu,gfn_t gfn,union kvm_mmu_page_role role)2173 static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
2174 gfn_t gfn,
2175 union kvm_mmu_page_role role)
2176 {
2177 struct shadow_page_caches caches = {
2178 .page_header_cache = &vcpu->arch.mmu_page_header_cache,
2179 .shadow_page_cache = &vcpu->arch.mmu_shadow_page_cache,
2180 .shadowed_info_cache = &vcpu->arch.mmu_shadowed_info_cache,
2181 };
2182
2183 return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
2184 }
2185
kvm_mmu_child_role(u64 * sptep,bool direct,unsigned int access)2186 static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
2187 unsigned int access)
2188 {
2189 struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
2190 union kvm_mmu_page_role role;
2191
2192 role = parent_sp->role;
2193 role.level--;
2194 role.access = access;
2195 role.direct = direct;
2196 role.passthrough = 0;
2197
2198 /*
2199 * If the guest has 4-byte PTEs then that means it's using 32-bit,
2200 * 2-level, non-PAE paging. KVM shadows such guests with PAE paging
2201 * (i.e. 8-byte PTEs). The difference in PTE size means that KVM must
2202 * shadow each guest page table with multiple shadow page tables, which
2203 * requires extra bookkeeping in the role.
2204 *
2205 * Specifically, to shadow the guest's page directory (which covers a
2206 * 4GiB address space), KVM uses 4 PAE page directories, each mapping
2207 * 1GiB of the address space. @role.quadrant encodes which quarter of
2208 * the address space each maps.
2209 *
2210 * To shadow the guest's page tables (which each map a 4MiB region), KVM
2211 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
2212 * @role.quadrant encodes which half of the region they map.
2213 *
2214 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
2215 * consumes bits 29:21. To consume bits 31:30, KVM's uses 4 shadow
2216 * PDPTEs; those 4 PAE page directories are pre-allocated and their
2217 * quadrant is assigned in mmu_alloc_root(). A 4-byte PTE consumes
2218 * bits 21:12, while an 8-byte PTE consumes bits 20:12. To consume
2219 * bit 21 in the PTE (the child here), KVM propagates that bit to the
2220 * quadrant, i.e. sets quadrant to '0' or '1'. The parent 8-byte PDE
2221 * covers bit 21 (see above), thus the quadrant is calculated from the
2222 * _least_ significant bit of the PDE index.
2223 */
2224 if (role.has_4_byte_gpte) {
2225 WARN_ON_ONCE(role.level != PG_LEVEL_4K);
2226 role.quadrant = spte_index(sptep) & 1;
2227 }
2228
2229 return role;
2230 }
2231
kvm_mmu_get_child_sp(struct kvm_vcpu * vcpu,u64 * sptep,gfn_t gfn,bool direct,unsigned int access)2232 static struct kvm_mmu_page *kvm_mmu_get_child_sp(struct kvm_vcpu *vcpu,
2233 u64 *sptep, gfn_t gfn,
2234 bool direct, unsigned int access)
2235 {
2236 union kvm_mmu_page_role role;
2237
2238 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
2239 return ERR_PTR(-EEXIST);
2240
2241 role = kvm_mmu_child_role(sptep, direct, access);
2242 return kvm_mmu_get_shadow_page(vcpu, gfn, role);
2243 }
2244
shadow_walk_init_using_root(struct kvm_shadow_walk_iterator * iterator,struct kvm_vcpu * vcpu,hpa_t root,u64 addr)2245 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator,
2246 struct kvm_vcpu *vcpu, hpa_t root,
2247 u64 addr)
2248 {
2249 iterator->addr = addr;
2250 iterator->shadow_addr = root;
2251 iterator->level = vcpu->arch.mmu->root_role.level;
2252
2253 if (iterator->level >= PT64_ROOT_4LEVEL &&
2254 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&
2255 !vcpu->arch.mmu->root_role.direct)
2256 iterator->level = PT32E_ROOT_LEVEL;
2257
2258 if (iterator->level == PT32E_ROOT_LEVEL) {
2259 /*
2260 * prev_root is currently only used for 64-bit hosts. So only
2261 * the active root_hpa is valid here.
2262 */
2263 BUG_ON(root != vcpu->arch.mmu->root.hpa);
2264
2265 iterator->shadow_addr
2266 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3];
2267 iterator->shadow_addr &= SPTE_BASE_ADDR_MASK;
2268 --iterator->level;
2269 if (!iterator->shadow_addr)
2270 iterator->level = 0;
2271 }
2272 }
2273
shadow_walk_init(struct kvm_shadow_walk_iterator * iterator,struct kvm_vcpu * vcpu,u64 addr)2274 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2275 struct kvm_vcpu *vcpu, u64 addr)
2276 {
2277 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa,
2278 addr);
2279 }
2280
shadow_walk_okay(struct kvm_shadow_walk_iterator * iterator)2281 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2282 {
2283 if (iterator->level < PG_LEVEL_4K)
2284 return false;
2285
2286 iterator->index = SPTE_INDEX(iterator->addr, iterator->level);
2287 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2288 return true;
2289 }
2290
__shadow_walk_next(struct kvm_shadow_walk_iterator * iterator,u64 spte)2291 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2292 u64 spte)
2293 {
2294 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) {
2295 iterator->level = 0;
2296 return;
2297 }
2298
2299 iterator->shadow_addr = spte & SPTE_BASE_ADDR_MASK;
2300 --iterator->level;
2301 }
2302
shadow_walk_next(struct kvm_shadow_walk_iterator * iterator)2303 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2304 {
2305 __shadow_walk_next(iterator, *iterator->sptep);
2306 }
2307
__link_shadow_page(struct kvm * kvm,struct kvm_mmu_memory_cache * cache,u64 * sptep,struct kvm_mmu_page * sp,bool flush)2308 static void __link_shadow_page(struct kvm *kvm,
2309 struct kvm_mmu_memory_cache *cache, u64 *sptep,
2310 struct kvm_mmu_page *sp, bool flush)
2311 {
2312 u64 spte;
2313
2314 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2315
2316 /*
2317 * If an SPTE is present already, it must be a leaf and therefore
2318 * a large one. Drop it, and flush the TLB if needed, before
2319 * installing sp.
2320 */
2321 if (is_shadow_present_pte(*sptep))
2322 drop_large_spte(kvm, sptep, flush);
2323
2324 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp));
2325
2326 mmu_spte_set(sptep, spte);
2327
2328 mmu_page_add_parent_pte(cache, sp, sptep);
2329
2330 if (sp->unsync_children || sp->unsync)
2331 mark_unsync(sptep);
2332 }
2333
link_shadow_page(struct kvm_vcpu * vcpu,u64 * sptep,struct kvm_mmu_page * sp)2334 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2335 struct kvm_mmu_page *sp)
2336 {
2337 __link_shadow_page(vcpu->kvm, &vcpu->arch.mmu_pte_list_desc_cache, sptep, sp, true);
2338 }
2339
validate_direct_spte(struct kvm_vcpu * vcpu,u64 * sptep,unsigned direct_access)2340 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2341 unsigned direct_access)
2342 {
2343 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2344 struct kvm_mmu_page *child;
2345
2346 /*
2347 * For the direct sp, if the guest pte's dirty bit
2348 * changed form clean to dirty, it will corrupt the
2349 * sp's access: allow writable in the read-only sp,
2350 * so we should update the spte at this point to get
2351 * a new sp with the correct access.
2352 */
2353 child = to_shadow_page(*sptep & SPTE_BASE_ADDR_MASK);
2354 if (child->role.access == direct_access)
2355 return;
2356
2357 drop_parent_pte(child, sptep);
2358 kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1);
2359 }
2360 }
2361
2362 /* Returns the number of zapped non-leaf child shadow pages. */
mmu_page_zap_pte(struct kvm * kvm,struct kvm_mmu_page * sp,u64 * spte,struct list_head * invalid_list)2363 static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2364 u64 *spte, struct list_head *invalid_list)
2365 {
2366 u64 pte;
2367 struct kvm_mmu_page *child;
2368
2369 pte = *spte;
2370 if (is_shadow_present_pte(pte)) {
2371 if (is_last_spte(pte, sp->role.level)) {
2372 drop_spte(kvm, spte);
2373 } else {
2374 child = to_shadow_page(pte & SPTE_BASE_ADDR_MASK);
2375 drop_parent_pte(child, spte);
2376
2377 /*
2378 * Recursively zap nested TDP SPs, parentless SPs are
2379 * unlikely to be used again in the near future. This
2380 * avoids retaining a large number of stale nested SPs.
2381 */
2382 if (tdp_enabled && invalid_list &&
2383 child->role.guest_mode && !child->parent_ptes.val)
2384 return kvm_mmu_prepare_zap_page(kvm, child,
2385 invalid_list);
2386 }
2387 } else if (is_mmio_spte(pte)) {
2388 mmu_spte_clear_no_track(spte);
2389 }
2390 return 0;
2391 }
2392
kvm_mmu_page_unlink_children(struct kvm * kvm,struct kvm_mmu_page * sp,struct list_head * invalid_list)2393 static int kvm_mmu_page_unlink_children(struct kvm *kvm,
2394 struct kvm_mmu_page *sp,
2395 struct list_head *invalid_list)
2396 {
2397 int zapped = 0;
2398 unsigned i;
2399
2400 for (i = 0; i < SPTE_ENT_PER_PAGE; ++i)
2401 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list);
2402
2403 return zapped;
2404 }
2405
kvm_mmu_unlink_parents(struct kvm_mmu_page * sp)2406 static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp)
2407 {
2408 u64 *sptep;
2409 struct rmap_iterator iter;
2410
2411 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2412 drop_parent_pte(sp, sptep);
2413 }
2414
mmu_zap_unsync_children(struct kvm * kvm,struct kvm_mmu_page * parent,struct list_head * invalid_list)2415 static int mmu_zap_unsync_children(struct kvm *kvm,
2416 struct kvm_mmu_page *parent,
2417 struct list_head *invalid_list)
2418 {
2419 int i, zapped = 0;
2420 struct mmu_page_path parents;
2421 struct kvm_mmu_pages pages;
2422
2423 if (parent->role.level == PG_LEVEL_4K)
2424 return 0;
2425
2426 while (mmu_unsync_walk(parent, &pages)) {
2427 struct kvm_mmu_page *sp;
2428
2429 for_each_sp(pages, sp, parents, i) {
2430 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2431 mmu_pages_clear_parents(&parents);
2432 zapped++;
2433 }
2434 }
2435
2436 return zapped;
2437 }
2438
__kvm_mmu_prepare_zap_page(struct kvm * kvm,struct kvm_mmu_page * sp,struct list_head * invalid_list,int * nr_zapped)2439 static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm,
2440 struct kvm_mmu_page *sp,
2441 struct list_head *invalid_list,
2442 int *nr_zapped)
2443 {
2444 bool list_unstable, zapped_root = false;
2445
2446 lockdep_assert_held_write(&kvm->mmu_lock);
2447 trace_kvm_mmu_prepare_zap_page(sp);
2448 ++kvm->stat.mmu_shadow_zapped;
2449 *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list);
2450 *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list);
2451 kvm_mmu_unlink_parents(sp);
2452
2453 /* Zapping children means active_mmu_pages has become unstable. */
2454 list_unstable = *nr_zapped;
2455
2456 if (!sp->role.invalid && sp_has_gptes(sp))
2457 unaccount_shadowed(kvm, sp);
2458
2459 if (sp->unsync)
2460 kvm_unlink_unsync_page(kvm, sp);
2461 if (!sp->root_count) {
2462 /* Count self */
2463 (*nr_zapped)++;
2464
2465 /*
2466 * Already invalid pages (previously active roots) are not on
2467 * the active page list. See list_del() in the "else" case of
2468 * !sp->root_count.
2469 */
2470 if (sp->role.invalid)
2471 list_add(&sp->link, invalid_list);
2472 else
2473 list_move(&sp->link, invalid_list);
2474 kvm_unaccount_mmu_page(kvm, sp);
2475 } else {
2476 /*
2477 * Remove the active root from the active page list, the root
2478 * will be explicitly freed when the root_count hits zero.
2479 */
2480 list_del(&sp->link);
2481
2482 /*
2483 * Obsolete pages cannot be used on any vCPUs, see the comment
2484 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2485 * treats invalid shadow pages as being obsolete.
2486 */
2487 zapped_root = !is_obsolete_sp(kvm, sp);
2488 }
2489
2490 if (sp->lpage_disallowed)
2491 unaccount_huge_nx_page(kvm, sp);
2492
2493 sp->role.invalid = 1;
2494
2495 /*
2496 * Make the request to free obsolete roots after marking the root
2497 * invalid, otherwise other vCPUs may not see it as invalid.
2498 */
2499 if (zapped_root)
2500 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
2501 return list_unstable;
2502 }
2503
kvm_mmu_prepare_zap_page(struct kvm * kvm,struct kvm_mmu_page * sp,struct list_head * invalid_list)2504 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2505 struct list_head *invalid_list)
2506 {
2507 int nr_zapped;
2508
2509 __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped);
2510 return nr_zapped;
2511 }
2512
kvm_mmu_commit_zap_page(struct kvm * kvm,struct list_head * invalid_list)2513 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2514 struct list_head *invalid_list)
2515 {
2516 struct kvm_mmu_page *sp, *nsp;
2517
2518 if (list_empty(invalid_list))
2519 return;
2520
2521 /*
2522 * We need to make sure everyone sees our modifications to
2523 * the page tables and see changes to vcpu->mode here. The barrier
2524 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2525 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2526 *
2527 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2528 * guest mode and/or lockless shadow page table walks.
2529 */
2530 kvm_flush_remote_tlbs(kvm);
2531
2532 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2533 WARN_ON(!sp->role.invalid || sp->root_count);
2534 kvm_mmu_free_shadow_page(sp);
2535 }
2536 }
2537
kvm_mmu_zap_oldest_mmu_pages(struct kvm * kvm,unsigned long nr_to_zap)2538 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm,
2539 unsigned long nr_to_zap)
2540 {
2541 unsigned long total_zapped = 0;
2542 struct kvm_mmu_page *sp, *tmp;
2543 LIST_HEAD(invalid_list);
2544 bool unstable;
2545 int nr_zapped;
2546
2547 if (list_empty(&kvm->arch.active_mmu_pages))
2548 return 0;
2549
2550 restart:
2551 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) {
2552 /*
2553 * Don't zap active root pages, the page itself can't be freed
2554 * and zapping it will just force vCPUs to realloc and reload.
2555 */
2556 if (sp->root_count)
2557 continue;
2558
2559 unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list,
2560 &nr_zapped);
2561 total_zapped += nr_zapped;
2562 if (total_zapped >= nr_to_zap)
2563 break;
2564
2565 if (unstable)
2566 goto restart;
2567 }
2568
2569 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2570
2571 kvm->stat.mmu_recycled += total_zapped;
2572 return total_zapped;
2573 }
2574
kvm_mmu_available_pages(struct kvm * kvm)2575 static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm)
2576 {
2577 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages)
2578 return kvm->arch.n_max_mmu_pages -
2579 kvm->arch.n_used_mmu_pages;
2580
2581 return 0;
2582 }
2583
make_mmu_pages_available(struct kvm_vcpu * vcpu)2584 static int make_mmu_pages_available(struct kvm_vcpu *vcpu)
2585 {
2586 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm);
2587
2588 if (likely(avail >= KVM_MIN_FREE_MMU_PAGES))
2589 return 0;
2590
2591 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail);
2592
2593 /*
2594 * Note, this check is intentionally soft, it only guarantees that one
2595 * page is available, while the caller may end up allocating as many as
2596 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2597 * exceeding the (arbitrary by default) limit will not harm the host,
2598 * being too aggressive may unnecessarily kill the guest, and getting an
2599 * exact count is far more trouble than it's worth, especially in the
2600 * page fault paths.
2601 */
2602 if (!kvm_mmu_available_pages(vcpu->kvm))
2603 return -ENOSPC;
2604 return 0;
2605 }
2606
2607 /*
2608 * Changing the number of mmu pages allocated to the vm
2609 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2610 */
kvm_mmu_change_mmu_pages(struct kvm * kvm,unsigned long goal_nr_mmu_pages)2611 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages)
2612 {
2613 write_lock(&kvm->mmu_lock);
2614
2615 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2616 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages -
2617 goal_nr_mmu_pages);
2618
2619 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2620 }
2621
2622 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2623
2624 write_unlock(&kvm->mmu_lock);
2625 }
2626
kvm_mmu_unprotect_page(struct kvm * kvm,gfn_t gfn)2627 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2628 {
2629 struct kvm_mmu_page *sp;
2630 LIST_HEAD(invalid_list);
2631 int r;
2632
2633 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2634 r = 0;
2635 write_lock(&kvm->mmu_lock);
2636 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2637 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2638 sp->role.word);
2639 r = 1;
2640 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2641 }
2642 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2643 write_unlock(&kvm->mmu_lock);
2644
2645 return r;
2646 }
2647
kvm_mmu_unprotect_page_virt(struct kvm_vcpu * vcpu,gva_t gva)2648 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2649 {
2650 gpa_t gpa;
2651 int r;
2652
2653 if (vcpu->arch.mmu->root_role.direct)
2654 return 0;
2655
2656 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2657
2658 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2659
2660 return r;
2661 }
2662
kvm_unsync_page(struct kvm * kvm,struct kvm_mmu_page * sp)2663 static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
2664 {
2665 trace_kvm_mmu_unsync_page(sp);
2666 ++kvm->stat.mmu_unsync;
2667 sp->unsync = 1;
2668
2669 kvm_mmu_mark_parents_unsync(sp);
2670 }
2671
2672 /*
2673 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2674 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2675 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2676 * be write-protected.
2677 */
mmu_try_to_unsync_pages(struct kvm * kvm,const struct kvm_memory_slot * slot,gfn_t gfn,bool can_unsync,bool prefetch)2678 int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot,
2679 gfn_t gfn, bool can_unsync, bool prefetch)
2680 {
2681 struct kvm_mmu_page *sp;
2682 bool locked = false;
2683
2684 /*
2685 * Force write-protection if the page is being tracked. Note, the page
2686 * track machinery is used to write-protect upper-level shadow pages,
2687 * i.e. this guards the role.level == 4K assertion below!
2688 */
2689 if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE))
2690 return -EPERM;
2691
2692 /*
2693 * The page is not write-tracked, mark existing shadow pages unsync
2694 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2695 * that case, KVM must complete emulation of the guest TLB flush before
2696 * allowing shadow pages to become unsync (writable by the guest).
2697 */
2698 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2699 if (!can_unsync)
2700 return -EPERM;
2701
2702 if (sp->unsync)
2703 continue;
2704
2705 if (prefetch)
2706 return -EEXIST;
2707
2708 /*
2709 * TDP MMU page faults require an additional spinlock as they
2710 * run with mmu_lock held for read, not write, and the unsync
2711 * logic is not thread safe. Take the spinklock regardless of
2712 * the MMU type to avoid extra conditionals/parameters, there's
2713 * no meaningful penalty if mmu_lock is held for write.
2714 */
2715 if (!locked) {
2716 locked = true;
2717 spin_lock(&kvm->arch.mmu_unsync_pages_lock);
2718
2719 /*
2720 * Recheck after taking the spinlock, a different vCPU
2721 * may have since marked the page unsync. A false
2722 * positive on the unprotected check above is not
2723 * possible as clearing sp->unsync _must_ hold mmu_lock
2724 * for write, i.e. unsync cannot transition from 0->1
2725 * while this CPU holds mmu_lock for read (or write).
2726 */
2727 if (READ_ONCE(sp->unsync))
2728 continue;
2729 }
2730
2731 WARN_ON(sp->role.level != PG_LEVEL_4K);
2732 kvm_unsync_page(kvm, sp);
2733 }
2734 if (locked)
2735 spin_unlock(&kvm->arch.mmu_unsync_pages_lock);
2736
2737 /*
2738 * We need to ensure that the marking of unsync pages is visible
2739 * before the SPTE is updated to allow writes because
2740 * kvm_mmu_sync_roots() checks the unsync flags without holding
2741 * the MMU lock and so can race with this. If the SPTE was updated
2742 * before the page had been marked as unsync-ed, something like the
2743 * following could happen:
2744 *
2745 * CPU 1 CPU 2
2746 * ---------------------------------------------------------------------
2747 * 1.2 Host updates SPTE
2748 * to be writable
2749 * 2.1 Guest writes a GPTE for GVA X.
2750 * (GPTE being in the guest page table shadowed
2751 * by the SP from CPU 1.)
2752 * This reads SPTE during the page table walk.
2753 * Since SPTE.W is read as 1, there is no
2754 * fault.
2755 *
2756 * 2.2 Guest issues TLB flush.
2757 * That causes a VM Exit.
2758 *
2759 * 2.3 Walking of unsync pages sees sp->unsync is
2760 * false and skips the page.
2761 *
2762 * 2.4 Guest accesses GVA X.
2763 * Since the mapping in the SP was not updated,
2764 * so the old mapping for GVA X incorrectly
2765 * gets used.
2766 * 1.1 Host marks SP
2767 * as unsync
2768 * (sp->unsync = true)
2769 *
2770 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2771 * the situation in 2.4 does not arise. It pairs with the read barrier
2772 * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3.
2773 */
2774 smp_wmb();
2775
2776 return 0;
2777 }
2778
mmu_set_spte(struct kvm_vcpu * vcpu,struct kvm_memory_slot * slot,u64 * sptep,unsigned int pte_access,gfn_t gfn,kvm_pfn_t pfn,struct kvm_page_fault * fault)2779 static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
2780 u64 *sptep, unsigned int pte_access, gfn_t gfn,
2781 kvm_pfn_t pfn, struct kvm_page_fault *fault)
2782 {
2783 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
2784 int level = sp->role.level;
2785 int was_rmapped = 0;
2786 int ret = RET_PF_FIXED;
2787 bool flush = false;
2788 bool wrprot;
2789 u64 spte;
2790
2791 /* Prefetching always gets a writable pfn. */
2792 bool host_writable = !fault || fault->map_writable;
2793 bool prefetch = !fault || fault->prefetch;
2794 bool write_fault = fault && fault->write;
2795
2796 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2797 *sptep, write_fault, gfn);
2798
2799 if (unlikely(is_noslot_pfn(pfn))) {
2800 vcpu->stat.pf_mmio_spte_created++;
2801 mark_mmio_spte(vcpu, sptep, gfn, pte_access);
2802 return RET_PF_EMULATE;
2803 }
2804
2805 if (is_shadow_present_pte(*sptep)) {
2806 /*
2807 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2808 * the parent of the now unreachable PTE.
2809 */
2810 if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) {
2811 struct kvm_mmu_page *child;
2812 u64 pte = *sptep;
2813
2814 child = to_shadow_page(pte & SPTE_BASE_ADDR_MASK);
2815 drop_parent_pte(child, sptep);
2816 flush = true;
2817 } else if (pfn != spte_to_pfn(*sptep)) {
2818 pgprintk("hfn old %llx new %llx\n",
2819 spte_to_pfn(*sptep), pfn);
2820 drop_spte(vcpu->kvm, sptep);
2821 flush = true;
2822 } else
2823 was_rmapped = 1;
2824 }
2825
2826 wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch,
2827 true, host_writable, &spte);
2828
2829 if (*sptep == spte) {
2830 ret = RET_PF_SPURIOUS;
2831 } else {
2832 flush |= mmu_spte_update(sptep, spte);
2833 trace_kvm_mmu_set_spte(level, gfn, sptep);
2834 }
2835
2836 if (wrprot) {
2837 if (write_fault)
2838 ret = RET_PF_EMULATE;
2839 }
2840
2841 if (flush)
2842 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn,
2843 KVM_PAGES_PER_HPAGE(level));
2844
2845 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2846
2847 if (!was_rmapped) {
2848 WARN_ON_ONCE(ret == RET_PF_SPURIOUS);
2849 rmap_add(vcpu, slot, sptep, gfn, pte_access);
2850 } else {
2851 /* Already rmapped but the pte_access bits may have changed. */
2852 kvm_mmu_page_set_access(sp, spte_index(sptep), pte_access);
2853 }
2854
2855 return ret;
2856 }
2857
direct_pte_prefetch_many(struct kvm_vcpu * vcpu,struct kvm_mmu_page * sp,u64 * start,u64 * end)2858 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2859 struct kvm_mmu_page *sp,
2860 u64 *start, u64 *end)
2861 {
2862 struct page *pages[PTE_PREFETCH_NUM];
2863 struct kvm_memory_slot *slot;
2864 unsigned int access = sp->role.access;
2865 int i, ret;
2866 gfn_t gfn;
2867
2868 gfn = kvm_mmu_page_get_gfn(sp, spte_index(start));
2869 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2870 if (!slot)
2871 return -1;
2872
2873 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2874 if (ret <= 0)
2875 return -1;
2876
2877 for (i = 0; i < ret; i++, gfn++, start++) {
2878 mmu_set_spte(vcpu, slot, start, access, gfn,
2879 page_to_pfn(pages[i]), NULL);
2880 put_page(pages[i]);
2881 }
2882
2883 return 0;
2884 }
2885
__direct_pte_prefetch(struct kvm_vcpu * vcpu,struct kvm_mmu_page * sp,u64 * sptep)2886 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2887 struct kvm_mmu_page *sp, u64 *sptep)
2888 {
2889 u64 *spte, *start = NULL;
2890 int i;
2891
2892 WARN_ON(!sp->role.direct);
2893
2894 i = spte_index(sptep) & ~(PTE_PREFETCH_NUM - 1);
2895 spte = sp->spt + i;
2896
2897 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2898 if (is_shadow_present_pte(*spte) || spte == sptep) {
2899 if (!start)
2900 continue;
2901 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2902 return;
2903 start = NULL;
2904 } else if (!start)
2905 start = spte;
2906 }
2907 if (start)
2908 direct_pte_prefetch_many(vcpu, sp, start, spte);
2909 }
2910
direct_pte_prefetch(struct kvm_vcpu * vcpu,u64 * sptep)2911 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2912 {
2913 struct kvm_mmu_page *sp;
2914
2915 sp = sptep_to_sp(sptep);
2916
2917 /*
2918 * Without accessed bits, there's no way to distinguish between
2919 * actually accessed translations and prefetched, so disable pte
2920 * prefetch if accessed bits aren't available.
2921 */
2922 if (sp_ad_disabled(sp))
2923 return;
2924
2925 if (sp->role.level > PG_LEVEL_4K)
2926 return;
2927
2928 /*
2929 * If addresses are being invalidated, skip prefetching to avoid
2930 * accidentally prefetching those addresses.
2931 */
2932 if (unlikely(vcpu->kvm->mmu_invalidate_in_progress))
2933 return;
2934
2935 __direct_pte_prefetch(vcpu, sp, sptep);
2936 }
2937
2938 /*
2939 * Lookup the mapping level for @gfn in the current mm.
2940 *
2941 * WARNING! Use of host_pfn_mapping_level() requires the caller and the end
2942 * consumer to be tied into KVM's handlers for MMU notifier events!
2943 *
2944 * There are several ways to safely use this helper:
2945 *
2946 * - Check mmu_invalidate_retry_hva() after grabbing the mapping level, before
2947 * consuming it. In this case, mmu_lock doesn't need to be held during the
2948 * lookup, but it does need to be held while checking the MMU notifier.
2949 *
2950 * - Hold mmu_lock AND ensure there is no in-progress MMU notifier invalidation
2951 * event for the hva. This can be done by explicit checking the MMU notifier
2952 * or by ensuring that KVM already has a valid mapping that covers the hva.
2953 *
2954 * - Do not use the result to install new mappings, e.g. use the host mapping
2955 * level only to decide whether or not to zap an entry. In this case, it's
2956 * not required to hold mmu_lock (though it's highly likely the caller will
2957 * want to hold mmu_lock anyways, e.g. to modify SPTEs).
2958 *
2959 * Note! The lookup can still race with modifications to host page tables, but
2960 * the above "rules" ensure KVM will not _consume_ the result of the walk if a
2961 * race with the primary MMU occurs.
2962 */
host_pfn_mapping_level(struct kvm * kvm,gfn_t gfn,const struct kvm_memory_slot * slot)2963 static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn,
2964 const struct kvm_memory_slot *slot)
2965 {
2966 int level = PG_LEVEL_4K;
2967 unsigned long hva;
2968 unsigned long flags;
2969 pgd_t pgd;
2970 p4d_t p4d;
2971 pud_t pud;
2972 pmd_t pmd;
2973
2974 /*
2975 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
2976 * is not solely for performance, it's also necessary to avoid the
2977 * "writable" check in __gfn_to_hva_many(), which will always fail on
2978 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
2979 * page fault steps have already verified the guest isn't writing a
2980 * read-only memslot.
2981 */
2982 hva = __gfn_to_hva_memslot(slot, gfn);
2983
2984 /*
2985 * Disable IRQs to prevent concurrent tear down of host page tables,
2986 * e.g. if the primary MMU promotes a P*D to a huge page and then frees
2987 * the original page table.
2988 */
2989 local_irq_save(flags);
2990
2991 /*
2992 * Read each entry once. As above, a non-leaf entry can be promoted to
2993 * a huge page _during_ this walk. Re-reading the entry could send the
2994 * walk into the weeks, e.g. p*d_large() returns false (sees the old
2995 * value) and then p*d_offset() walks into the target huge page instead
2996 * of the old page table (sees the new value).
2997 */
2998 pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
2999 if (pgd_none(pgd))
3000 goto out;
3001
3002 p4d = READ_ONCE(*p4d_offset(&pgd, hva));
3003 if (p4d_none(p4d) || !p4d_present(p4d))
3004 goto out;
3005
3006 pud = READ_ONCE(*pud_offset(&p4d, hva));
3007 if (pud_none(pud) || !pud_present(pud))
3008 goto out;
3009
3010 if (pud_large(pud)) {
3011 level = PG_LEVEL_1G;
3012 goto out;
3013 }
3014
3015 pmd = READ_ONCE(*pmd_offset(&pud, hva));
3016 if (pmd_none(pmd) || !pmd_present(pmd))
3017 goto out;
3018
3019 if (pmd_large(pmd))
3020 level = PG_LEVEL_2M;
3021
3022 out:
3023 local_irq_restore(flags);
3024 return level;
3025 }
3026
kvm_mmu_max_mapping_level(struct kvm * kvm,const struct kvm_memory_slot * slot,gfn_t gfn,int max_level)3027 int kvm_mmu_max_mapping_level(struct kvm *kvm,
3028 const struct kvm_memory_slot *slot, gfn_t gfn,
3029 int max_level)
3030 {
3031 struct kvm_lpage_info *linfo;
3032 int host_level;
3033
3034 max_level = min(max_level, max_huge_page_level);
3035 for ( ; max_level > PG_LEVEL_4K; max_level--) {
3036 linfo = lpage_info_slot(gfn, slot, max_level);
3037 if (!linfo->disallow_lpage)
3038 break;
3039 }
3040
3041 if (max_level == PG_LEVEL_4K)
3042 return PG_LEVEL_4K;
3043
3044 host_level = host_pfn_mapping_level(kvm, gfn, slot);
3045 return min(host_level, max_level);
3046 }
3047
kvm_mmu_hugepage_adjust(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)3048 void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3049 {
3050 struct kvm_memory_slot *slot = fault->slot;
3051 kvm_pfn_t mask;
3052
3053 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled;
3054
3055 if (unlikely(fault->max_level == PG_LEVEL_4K))
3056 return;
3057
3058 if (is_error_noslot_pfn(fault->pfn))
3059 return;
3060
3061 if (kvm_slot_dirty_track_enabled(slot))
3062 return;
3063
3064 /*
3065 * Enforce the iTLB multihit workaround after capturing the requested
3066 * level, which will be used to do precise, accurate accounting.
3067 */
3068 fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot,
3069 fault->gfn, fault->max_level);
3070 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed)
3071 return;
3072
3073 /*
3074 * mmu_invalidate_retry() was successful and mmu_lock is held, so
3075 * the pmd can't be split from under us.
3076 */
3077 fault->goal_level = fault->req_level;
3078 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1;
3079 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask));
3080 fault->pfn &= ~mask;
3081 }
3082
disallowed_hugepage_adjust(struct kvm_page_fault * fault,u64 spte,int cur_level)3083 void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level)
3084 {
3085 if (cur_level > PG_LEVEL_4K &&
3086 cur_level == fault->goal_level &&
3087 is_shadow_present_pte(spte) &&
3088 !is_large_pte(spte)) {
3089 /*
3090 * A small SPTE exists for this pfn, but FNAME(fetch)
3091 * and __direct_map would like to create a large PTE
3092 * instead: just force them to go down another level,
3093 * patching back for them into pfn the next 9 bits of
3094 * the address.
3095 */
3096 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) -
3097 KVM_PAGES_PER_HPAGE(cur_level - 1);
3098 fault->pfn |= fault->gfn & page_mask;
3099 fault->goal_level--;
3100 }
3101 }
3102
__direct_map(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)3103 static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3104 {
3105 struct kvm_shadow_walk_iterator it;
3106 struct kvm_mmu_page *sp;
3107 int ret;
3108 gfn_t base_gfn = fault->gfn;
3109
3110 kvm_mmu_hugepage_adjust(vcpu, fault);
3111
3112 trace_kvm_mmu_spte_requested(fault);
3113 for_each_shadow_entry(vcpu, fault->addr, it) {
3114 /*
3115 * We cannot overwrite existing page tables with an NX
3116 * large page, as the leaf could be executable.
3117 */
3118 if (fault->nx_huge_page_workaround_enabled)
3119 disallowed_hugepage_adjust(fault, *it.sptep, it.level);
3120
3121 base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1);
3122 if (it.level == fault->goal_level)
3123 break;
3124
3125 sp = kvm_mmu_get_child_sp(vcpu, it.sptep, base_gfn, true, ACC_ALL);
3126 if (sp == ERR_PTR(-EEXIST))
3127 continue;
3128
3129 link_shadow_page(vcpu, it.sptep, sp);
3130 if (fault->is_tdp && fault->huge_page_disallowed &&
3131 fault->req_level >= it.level)
3132 account_huge_nx_page(vcpu->kvm, sp);
3133 }
3134
3135 if (WARN_ON_ONCE(it.level != fault->goal_level))
3136 return -EFAULT;
3137
3138 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL,
3139 base_gfn, fault->pfn, fault);
3140 if (ret == RET_PF_SPURIOUS)
3141 return ret;
3142
3143 direct_pte_prefetch(vcpu, it.sptep);
3144 return ret;
3145 }
3146
kvm_send_hwpoison_signal(unsigned long address,struct task_struct * tsk)3147 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
3148 {
3149 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk);
3150 }
3151
kvm_handle_bad_page(struct kvm_vcpu * vcpu,gfn_t gfn,kvm_pfn_t pfn)3152 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn)
3153 {
3154 /*
3155 * Do not cache the mmio info caused by writing the readonly gfn
3156 * into the spte otherwise read access on readonly gfn also can
3157 * caused mmio page fault and treat it as mmio access.
3158 */
3159 if (pfn == KVM_PFN_ERR_RO_FAULT)
3160 return RET_PF_EMULATE;
3161
3162 if (pfn == KVM_PFN_ERR_HWPOISON) {
3163 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
3164 return RET_PF_RETRY;
3165 }
3166
3167 return -EFAULT;
3168 }
3169
handle_abnormal_pfn(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault,unsigned int access)3170 static int handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3171 unsigned int access)
3172 {
3173 /* The pfn is invalid, report the error! */
3174 if (unlikely(is_error_pfn(fault->pfn)))
3175 return kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn);
3176
3177 if (unlikely(!fault->slot)) {
3178 gva_t gva = fault->is_tdp ? 0 : fault->addr;
3179
3180 vcpu_cache_mmio_info(vcpu, gva, fault->gfn,
3181 access & shadow_mmio_access_mask);
3182 /*
3183 * If MMIO caching is disabled, emulate immediately without
3184 * touching the shadow page tables as attempting to install an
3185 * MMIO SPTE will just be an expensive nop. Do not cache MMIO
3186 * whose gfn is greater than host.MAXPHYADDR, any guest that
3187 * generates such gfns is running nested and is being tricked
3188 * by L0 userspace (you can observe gfn > L1.MAXPHYADDR if
3189 * and only if L1's MAXPHYADDR is inaccurate with respect to
3190 * the hardware's).
3191 */
3192 if (unlikely(!enable_mmio_caching) ||
3193 unlikely(fault->gfn > kvm_mmu_max_gfn()))
3194 return RET_PF_EMULATE;
3195 }
3196
3197 return RET_PF_CONTINUE;
3198 }
3199
page_fault_can_be_fast(struct kvm_page_fault * fault)3200 static bool page_fault_can_be_fast(struct kvm_page_fault *fault)
3201 {
3202 /*
3203 * Page faults with reserved bits set, i.e. faults on MMIO SPTEs, only
3204 * reach the common page fault handler if the SPTE has an invalid MMIO
3205 * generation number. Refreshing the MMIO generation needs to go down
3206 * the slow path. Note, EPT Misconfigs do NOT set the PRESENT flag!
3207 */
3208 if (fault->rsvd)
3209 return false;
3210
3211 /*
3212 * #PF can be fast if:
3213 *
3214 * 1. The shadow page table entry is not present and A/D bits are
3215 * disabled _by KVM_, which could mean that the fault is potentially
3216 * caused by access tracking (if enabled). If A/D bits are enabled
3217 * by KVM, but disabled by L1 for L2, KVM is forced to disable A/D
3218 * bits for L2 and employ access tracking, but the fast page fault
3219 * mechanism only supports direct MMUs.
3220 * 2. The shadow page table entry is present, the access is a write,
3221 * and no reserved bits are set (MMIO SPTEs cannot be "fixed"), i.e.
3222 * the fault was caused by a write-protection violation. If the
3223 * SPTE is MMU-writable (determined later), the fault can be fixed
3224 * by setting the Writable bit, which can be done out of mmu_lock.
3225 */
3226 if (!fault->present)
3227 return !kvm_ad_enabled();
3228
3229 /*
3230 * Note, instruction fetches and writes are mutually exclusive, ignore
3231 * the "exec" flag.
3232 */
3233 return fault->write;
3234 }
3235
3236 /*
3237 * Returns true if the SPTE was fixed successfully. Otherwise,
3238 * someone else modified the SPTE from its original value.
3239 */
3240 static bool
fast_pf_fix_direct_spte(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault,u64 * sptep,u64 old_spte,u64 new_spte)3241 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3242 u64 *sptep, u64 old_spte, u64 new_spte)
3243 {
3244 /*
3245 * Theoretically we could also set dirty bit (and flush TLB) here in
3246 * order to eliminate unnecessary PML logging. See comments in
3247 * set_spte. But fast_page_fault is very unlikely to happen with PML
3248 * enabled, so we do not do this. This might result in the same GPA
3249 * to be logged in PML buffer again when the write really happens, and
3250 * eventually to be called by mark_page_dirty twice. But it's also no
3251 * harm. This also avoids the TLB flush needed after setting dirty bit
3252 * so non-PML cases won't be impacted.
3253 *
3254 * Compare with set_spte where instead shadow_dirty_mask is set.
3255 */
3256 if (!try_cmpxchg64(sptep, &old_spte, new_spte))
3257 return false;
3258
3259 if (is_writable_pte(new_spte) && !is_writable_pte(old_spte))
3260 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn);
3261
3262 return true;
3263 }
3264
is_access_allowed(struct kvm_page_fault * fault,u64 spte)3265 static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte)
3266 {
3267 if (fault->exec)
3268 return is_executable_pte(spte);
3269
3270 if (fault->write)
3271 return is_writable_pte(spte);
3272
3273 /* Fault was on Read access */
3274 return spte & PT_PRESENT_MASK;
3275 }
3276
3277 /*
3278 * Returns the last level spte pointer of the shadow page walk for the given
3279 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3280 * walk could be performed, returns NULL and *spte does not contain valid data.
3281 *
3282 * Contract:
3283 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3284 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3285 */
fast_pf_get_last_sptep(struct kvm_vcpu * vcpu,gpa_t gpa,u64 * spte)3286 static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte)
3287 {
3288 struct kvm_shadow_walk_iterator iterator;
3289 u64 old_spte;
3290 u64 *sptep = NULL;
3291
3292 for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) {
3293 sptep = iterator.sptep;
3294 *spte = old_spte;
3295 }
3296
3297 return sptep;
3298 }
3299
3300 /*
3301 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3302 */
fast_page_fault(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)3303 static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3304 {
3305 struct kvm_mmu_page *sp;
3306 int ret = RET_PF_INVALID;
3307 u64 spte = 0ull;
3308 u64 *sptep = NULL;
3309 uint retry_count = 0;
3310
3311 if (!page_fault_can_be_fast(fault))
3312 return ret;
3313
3314 walk_shadow_page_lockless_begin(vcpu);
3315
3316 do {
3317 u64 new_spte;
3318
3319 if (is_tdp_mmu(vcpu->arch.mmu))
3320 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3321 else
3322 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3323
3324 if (!is_shadow_present_pte(spte))
3325 break;
3326
3327 sp = sptep_to_sp(sptep);
3328 if (!is_last_spte(spte, sp->role.level))
3329 break;
3330
3331 /*
3332 * Check whether the memory access that caused the fault would
3333 * still cause it if it were to be performed right now. If not,
3334 * then this is a spurious fault caused by TLB lazily flushed,
3335 * or some other CPU has already fixed the PTE after the
3336 * current CPU took the fault.
3337 *
3338 * Need not check the access of upper level table entries since
3339 * they are always ACC_ALL.
3340 */
3341 if (is_access_allowed(fault, spte)) {
3342 ret = RET_PF_SPURIOUS;
3343 break;
3344 }
3345
3346 new_spte = spte;
3347
3348 /*
3349 * KVM only supports fixing page faults outside of MMU lock for
3350 * direct MMUs, nested MMUs are always indirect, and KVM always
3351 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are
3352 * enabled, the SPTE can't be an access-tracked SPTE.
3353 */
3354 if (unlikely(!kvm_ad_enabled()) && is_access_track_spte(spte))
3355 new_spte = restore_acc_track_spte(new_spte);
3356
3357 /*
3358 * To keep things simple, only SPTEs that are MMU-writable can
3359 * be made fully writable outside of mmu_lock, e.g. only SPTEs
3360 * that were write-protected for dirty-logging or access
3361 * tracking are handled here. Don't bother checking if the
3362 * SPTE is writable to prioritize running with A/D bits enabled.
3363 * The is_access_allowed() check above handles the common case
3364 * of the fault being spurious, and the SPTE is known to be
3365 * shadow-present, i.e. except for access tracking restoration
3366 * making the new SPTE writable, the check is wasteful.
3367 */
3368 if (fault->write && is_mmu_writable_spte(spte)) {
3369 new_spte |= PT_WRITABLE_MASK;
3370
3371 /*
3372 * Do not fix write-permission on the large spte when
3373 * dirty logging is enabled. Since we only dirty the
3374 * first page into the dirty-bitmap in
3375 * fast_pf_fix_direct_spte(), other pages are missed
3376 * if its slot has dirty logging enabled.
3377 *
3378 * Instead, we let the slow page fault path create a
3379 * normal spte to fix the access.
3380 */
3381 if (sp->role.level > PG_LEVEL_4K &&
3382 kvm_slot_dirty_track_enabled(fault->slot))
3383 break;
3384 }
3385
3386 /* Verify that the fault can be handled in the fast path */
3387 if (new_spte == spte ||
3388 !is_access_allowed(fault, new_spte))
3389 break;
3390
3391 /*
3392 * Currently, fast page fault only works for direct mapping
3393 * since the gfn is not stable for indirect shadow page. See
3394 * Documentation/virt/kvm/locking.rst to get more detail.
3395 */
3396 if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) {
3397 ret = RET_PF_FIXED;
3398 break;
3399 }
3400
3401 if (++retry_count > 4) {
3402 printk_once(KERN_WARNING
3403 "kvm: Fast #PF retrying more than 4 times.\n");
3404 break;
3405 }
3406
3407 } while (true);
3408
3409 trace_fast_page_fault(vcpu, fault, sptep, spte, ret);
3410 walk_shadow_page_lockless_end(vcpu);
3411
3412 if (ret != RET_PF_INVALID)
3413 vcpu->stat.pf_fast++;
3414
3415 return ret;
3416 }
3417
mmu_free_root_page(struct kvm * kvm,hpa_t * root_hpa,struct list_head * invalid_list)3418 static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa,
3419 struct list_head *invalid_list)
3420 {
3421 struct kvm_mmu_page *sp;
3422
3423 if (!VALID_PAGE(*root_hpa))
3424 return;
3425
3426 sp = to_shadow_page(*root_hpa & SPTE_BASE_ADDR_MASK);
3427 if (WARN_ON(!sp))
3428 return;
3429
3430 if (is_tdp_mmu_page(sp))
3431 kvm_tdp_mmu_put_root(kvm, sp, false);
3432 else if (!--sp->root_count && sp->role.invalid)
3433 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
3434
3435 *root_hpa = INVALID_PAGE;
3436 }
3437
3438 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
kvm_mmu_free_roots(struct kvm * kvm,struct kvm_mmu * mmu,ulong roots_to_free)3439 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
3440 ulong roots_to_free)
3441 {
3442 int i;
3443 LIST_HEAD(invalid_list);
3444 bool free_active_root;
3445
3446 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG);
3447
3448 /* Before acquiring the MMU lock, see if we need to do any real work. */
3449 free_active_root = (roots_to_free & KVM_MMU_ROOT_CURRENT)
3450 && VALID_PAGE(mmu->root.hpa);
3451
3452 if (!free_active_root) {
3453 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3454 if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) &&
3455 VALID_PAGE(mmu->prev_roots[i].hpa))
3456 break;
3457
3458 if (i == KVM_MMU_NUM_PREV_ROOTS)
3459 return;
3460 }
3461
3462 write_lock(&kvm->mmu_lock);
3463
3464 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3465 if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i))
3466 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa,
3467 &invalid_list);
3468
3469 if (free_active_root) {
3470 if (to_shadow_page(mmu->root.hpa)) {
3471 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list);
3472 } else if (mmu->pae_root) {
3473 for (i = 0; i < 4; ++i) {
3474 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i]))
3475 continue;
3476
3477 mmu_free_root_page(kvm, &mmu->pae_root[i],
3478 &invalid_list);
3479 mmu->pae_root[i] = INVALID_PAE_ROOT;
3480 }
3481 }
3482 mmu->root.hpa = INVALID_PAGE;
3483 mmu->root.pgd = 0;
3484 }
3485
3486 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3487 write_unlock(&kvm->mmu_lock);
3488 }
3489 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots);
3490
kvm_mmu_free_guest_mode_roots(struct kvm * kvm,struct kvm_mmu * mmu)3491 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu)
3492 {
3493 unsigned long roots_to_free = 0;
3494 hpa_t root_hpa;
3495 int i;
3496
3497 /*
3498 * This should not be called while L2 is active, L2 can't invalidate
3499 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3500 */
3501 WARN_ON_ONCE(mmu->root_role.guest_mode);
3502
3503 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
3504 root_hpa = mmu->prev_roots[i].hpa;
3505 if (!VALID_PAGE(root_hpa))
3506 continue;
3507
3508 if (!to_shadow_page(root_hpa) ||
3509 to_shadow_page(root_hpa)->role.guest_mode)
3510 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3511 }
3512
3513 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
3514 }
3515 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots);
3516
3517
mmu_check_root(struct kvm_vcpu * vcpu,gfn_t root_gfn)3518 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3519 {
3520 int ret = 0;
3521
3522 if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {
3523 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3524 ret = 1;
3525 }
3526
3527 return ret;
3528 }
3529
mmu_alloc_root(struct kvm_vcpu * vcpu,gfn_t gfn,int quadrant,u8 level)3530 static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, int quadrant,
3531 u8 level)
3532 {
3533 union kvm_mmu_page_role role = vcpu->arch.mmu->root_role;
3534 struct kvm_mmu_page *sp;
3535
3536 role.level = level;
3537 role.quadrant = quadrant;
3538
3539 WARN_ON_ONCE(quadrant && !role.has_4_byte_gpte);
3540 WARN_ON_ONCE(role.direct && role.has_4_byte_gpte);
3541
3542 sp = kvm_mmu_get_shadow_page(vcpu, gfn, role);
3543 ++sp->root_count;
3544
3545 return __pa(sp->spt);
3546 }
3547
mmu_alloc_direct_roots(struct kvm_vcpu * vcpu)3548 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3549 {
3550 struct kvm_mmu *mmu = vcpu->arch.mmu;
3551 u8 shadow_root_level = mmu->root_role.level;
3552 hpa_t root;
3553 unsigned i;
3554 int r;
3555
3556 write_lock(&vcpu->kvm->mmu_lock);
3557 r = make_mmu_pages_available(vcpu);
3558 if (r < 0)
3559 goto out_unlock;
3560
3561 if (is_tdp_mmu_enabled(vcpu->kvm)) {
3562 root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu);
3563 mmu->root.hpa = root;
3564 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) {
3565 root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level);
3566 mmu->root.hpa = root;
3567 } else if (shadow_root_level == PT32E_ROOT_LEVEL) {
3568 if (WARN_ON_ONCE(!mmu->pae_root)) {
3569 r = -EIO;
3570 goto out_unlock;
3571 }
3572
3573 for (i = 0; i < 4; ++i) {
3574 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3575
3576 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 0,
3577 PT32_ROOT_LEVEL);
3578 mmu->pae_root[i] = root | PT_PRESENT_MASK |
3579 shadow_me_value;
3580 }
3581 mmu->root.hpa = __pa(mmu->pae_root);
3582 } else {
3583 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);
3584 r = -EIO;
3585 goto out_unlock;
3586 }
3587
3588 /* root.pgd is ignored for direct MMUs. */
3589 mmu->root.pgd = 0;
3590 out_unlock:
3591 write_unlock(&vcpu->kvm->mmu_lock);
3592 return r;
3593 }
3594
mmu_first_shadow_root_alloc(struct kvm * kvm)3595 static int mmu_first_shadow_root_alloc(struct kvm *kvm)
3596 {
3597 struct kvm_memslots *slots;
3598 struct kvm_memory_slot *slot;
3599 int r = 0, i, bkt;
3600
3601 /*
3602 * Check if this is the first shadow root being allocated before
3603 * taking the lock.
3604 */
3605 if (kvm_shadow_root_allocated(kvm))
3606 return 0;
3607
3608 mutex_lock(&kvm->slots_arch_lock);
3609
3610 /* Recheck, under the lock, whether this is the first shadow root. */
3611 if (kvm_shadow_root_allocated(kvm))
3612 goto out_unlock;
3613
3614 /*
3615 * Check if anything actually needs to be allocated, e.g. all metadata
3616 * will be allocated upfront if TDP is disabled.
3617 */
3618 if (kvm_memslots_have_rmaps(kvm) &&
3619 kvm_page_track_write_tracking_enabled(kvm))
3620 goto out_success;
3621
3622 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
3623 slots = __kvm_memslots(kvm, i);
3624 kvm_for_each_memslot(slot, bkt, slots) {
3625 /*
3626 * Both of these functions are no-ops if the target is
3627 * already allocated, so unconditionally calling both
3628 * is safe. Intentionally do NOT free allocations on
3629 * failure to avoid having to track which allocations
3630 * were made now versus when the memslot was created.
3631 * The metadata is guaranteed to be freed when the slot
3632 * is freed, and will be kept/used if userspace retries
3633 * KVM_RUN instead of killing the VM.
3634 */
3635 r = memslot_rmap_alloc(slot, slot->npages);
3636 if (r)
3637 goto out_unlock;
3638 r = kvm_page_track_write_tracking_alloc(slot);
3639 if (r)
3640 goto out_unlock;
3641 }
3642 }
3643
3644 /*
3645 * Ensure that shadow_root_allocated becomes true strictly after
3646 * all the related pointers are set.
3647 */
3648 out_success:
3649 smp_store_release(&kvm->arch.shadow_root_allocated, true);
3650
3651 out_unlock:
3652 mutex_unlock(&kvm->slots_arch_lock);
3653 return r;
3654 }
3655
mmu_alloc_shadow_roots(struct kvm_vcpu * vcpu)3656 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3657 {
3658 struct kvm_mmu *mmu = vcpu->arch.mmu;
3659 u64 pdptrs[4], pm_mask;
3660 gfn_t root_gfn, root_pgd;
3661 int quadrant, i, r;
3662 hpa_t root;
3663
3664 root_pgd = mmu->get_guest_pgd(vcpu);
3665 root_gfn = root_pgd >> PAGE_SHIFT;
3666
3667 if (mmu_check_root(vcpu, root_gfn))
3668 return 1;
3669
3670 /*
3671 * On SVM, reading PDPTRs might access guest memory, which might fault
3672 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3673 */
3674 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3675 for (i = 0; i < 4; ++i) {
3676 pdptrs[i] = mmu->get_pdptr(vcpu, i);
3677 if (!(pdptrs[i] & PT_PRESENT_MASK))
3678 continue;
3679
3680 if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT))
3681 return 1;
3682 }
3683 }
3684
3685 r = mmu_first_shadow_root_alloc(vcpu->kvm);
3686 if (r)
3687 return r;
3688
3689 write_lock(&vcpu->kvm->mmu_lock);
3690 r = make_mmu_pages_available(vcpu);
3691 if (r < 0)
3692 goto out_unlock;
3693
3694 /*
3695 * Do we shadow a long mode page table? If so we need to
3696 * write-protect the guests page table root.
3697 */
3698 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3699 root = mmu_alloc_root(vcpu, root_gfn, 0,
3700 mmu->root_role.level);
3701 mmu->root.hpa = root;
3702 goto set_root_pgd;
3703 }
3704
3705 if (WARN_ON_ONCE(!mmu->pae_root)) {
3706 r = -EIO;
3707 goto out_unlock;
3708 }
3709
3710 /*
3711 * We shadow a 32 bit page table. This may be a legacy 2-level
3712 * or a PAE 3-level page table. In either case we need to be aware that
3713 * the shadow page table may be a PAE or a long mode page table.
3714 */
3715 pm_mask = PT_PRESENT_MASK | shadow_me_value;
3716 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) {
3717 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3718
3719 if (WARN_ON_ONCE(!mmu->pml4_root)) {
3720 r = -EIO;
3721 goto out_unlock;
3722 }
3723 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask;
3724
3725 if (mmu->root_role.level == PT64_ROOT_5LEVEL) {
3726 if (WARN_ON_ONCE(!mmu->pml5_root)) {
3727 r = -EIO;
3728 goto out_unlock;
3729 }
3730 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask;
3731 }
3732 }
3733
3734 for (i = 0; i < 4; ++i) {
3735 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3736
3737 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3738 if (!(pdptrs[i] & PT_PRESENT_MASK)) {
3739 mmu->pae_root[i] = INVALID_PAE_ROOT;
3740 continue;
3741 }
3742 root_gfn = pdptrs[i] >> PAGE_SHIFT;
3743 }
3744
3745 /*
3746 * If shadowing 32-bit non-PAE page tables, each PAE page
3747 * directory maps one quarter of the guest's non-PAE page
3748 * directory. Othwerise each PAE page direct shadows one guest
3749 * PAE page directory so that quadrant should be 0.
3750 */
3751 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0;
3752
3753 root = mmu_alloc_root(vcpu, root_gfn, quadrant, PT32_ROOT_LEVEL);
3754 mmu->pae_root[i] = root | pm_mask;
3755 }
3756
3757 if (mmu->root_role.level == PT64_ROOT_5LEVEL)
3758 mmu->root.hpa = __pa(mmu->pml5_root);
3759 else if (mmu->root_role.level == PT64_ROOT_4LEVEL)
3760 mmu->root.hpa = __pa(mmu->pml4_root);
3761 else
3762 mmu->root.hpa = __pa(mmu->pae_root);
3763
3764 set_root_pgd:
3765 mmu->root.pgd = root_pgd;
3766 out_unlock:
3767 write_unlock(&vcpu->kvm->mmu_lock);
3768
3769 return r;
3770 }
3771
mmu_alloc_special_roots(struct kvm_vcpu * vcpu)3772 static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu)
3773 {
3774 struct kvm_mmu *mmu = vcpu->arch.mmu;
3775 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL;
3776 u64 *pml5_root = NULL;
3777 u64 *pml4_root = NULL;
3778 u64 *pae_root;
3779
3780 /*
3781 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3782 * tables are allocated and initialized at root creation as there is no
3783 * equivalent level in the guest's NPT to shadow. Allocate the tables
3784 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3785 */
3786 if (mmu->root_role.direct ||
3787 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||
3788 mmu->root_role.level < PT64_ROOT_4LEVEL)
3789 return 0;
3790
3791 /*
3792 * NPT, the only paging mode that uses this horror, uses a fixed number
3793 * of levels for the shadow page tables, e.g. all MMUs are 4-level or
3794 * all MMus are 5-level. Thus, this can safely require that pml5_root
3795 * is allocated if the other roots are valid and pml5 is needed, as any
3796 * prior MMU would also have required pml5.
3797 */
3798 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root))
3799 return 0;
3800
3801 /*
3802 * The special roots should always be allocated in concert. Yell and
3803 * bail if KVM ends up in a state where only one of the roots is valid.
3804 */
3805 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root ||
3806 (need_pml5 && mmu->pml5_root)))
3807 return -EIO;
3808
3809 /*
3810 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3811 * doesn't need to be decrypted.
3812 */
3813 pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3814 if (!pae_root)
3815 return -ENOMEM;
3816
3817 #ifdef CONFIG_X86_64
3818 pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3819 if (!pml4_root)
3820 goto err_pml4;
3821
3822 if (need_pml5) {
3823 pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3824 if (!pml5_root)
3825 goto err_pml5;
3826 }
3827 #endif
3828
3829 mmu->pae_root = pae_root;
3830 mmu->pml4_root = pml4_root;
3831 mmu->pml5_root = pml5_root;
3832
3833 return 0;
3834
3835 #ifdef CONFIG_X86_64
3836 err_pml5:
3837 free_page((unsigned long)pml4_root);
3838 err_pml4:
3839 free_page((unsigned long)pae_root);
3840 return -ENOMEM;
3841 #endif
3842 }
3843
is_unsync_root(hpa_t root)3844 static bool is_unsync_root(hpa_t root)
3845 {
3846 struct kvm_mmu_page *sp;
3847
3848 if (!VALID_PAGE(root))
3849 return false;
3850
3851 /*
3852 * The read barrier orders the CPU's read of SPTE.W during the page table
3853 * walk before the reads of sp->unsync/sp->unsync_children here.
3854 *
3855 * Even if another CPU was marking the SP as unsync-ed simultaneously,
3856 * any guest page table changes are not guaranteed to be visible anyway
3857 * until this VCPU issues a TLB flush strictly after those changes are
3858 * made. We only need to ensure that the other CPU sets these flags
3859 * before any actual changes to the page tables are made. The comments
3860 * in mmu_try_to_unsync_pages() describe what could go wrong if this
3861 * requirement isn't satisfied.
3862 */
3863 smp_rmb();
3864 sp = to_shadow_page(root);
3865
3866 /*
3867 * PAE roots (somewhat arbitrarily) aren't backed by shadow pages, the
3868 * PDPTEs for a given PAE root need to be synchronized individually.
3869 */
3870 if (WARN_ON_ONCE(!sp))
3871 return false;
3872
3873 if (sp->unsync || sp->unsync_children)
3874 return true;
3875
3876 return false;
3877 }
3878
kvm_mmu_sync_roots(struct kvm_vcpu * vcpu)3879 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3880 {
3881 int i;
3882 struct kvm_mmu_page *sp;
3883
3884 if (vcpu->arch.mmu->root_role.direct)
3885 return;
3886
3887 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa))
3888 return;
3889
3890 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3891
3892 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3893 hpa_t root = vcpu->arch.mmu->root.hpa;
3894 sp = to_shadow_page(root);
3895
3896 if (!is_unsync_root(root))
3897 return;
3898
3899 write_lock(&vcpu->kvm->mmu_lock);
3900 mmu_sync_children(vcpu, sp, true);
3901 write_unlock(&vcpu->kvm->mmu_lock);
3902 return;
3903 }
3904
3905 write_lock(&vcpu->kvm->mmu_lock);
3906
3907 for (i = 0; i < 4; ++i) {
3908 hpa_t root = vcpu->arch.mmu->pae_root[i];
3909
3910 if (IS_VALID_PAE_ROOT(root)) {
3911 root &= SPTE_BASE_ADDR_MASK;
3912 sp = to_shadow_page(root);
3913 mmu_sync_children(vcpu, sp, true);
3914 }
3915 }
3916
3917 write_unlock(&vcpu->kvm->mmu_lock);
3918 }
3919
kvm_mmu_sync_prev_roots(struct kvm_vcpu * vcpu)3920 void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu)
3921 {
3922 unsigned long roots_to_free = 0;
3923 int i;
3924
3925 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3926 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa))
3927 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3928
3929 /* sync prev_roots by simply freeing them */
3930 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free);
3931 }
3932
nonpaging_gva_to_gpa(struct kvm_vcpu * vcpu,struct kvm_mmu * mmu,gpa_t vaddr,u64 access,struct x86_exception * exception)3933 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
3934 gpa_t vaddr, u64 access,
3935 struct x86_exception *exception)
3936 {
3937 if (exception)
3938 exception->error_code = 0;
3939 return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception);
3940 }
3941
mmio_info_in_cache(struct kvm_vcpu * vcpu,u64 addr,bool direct)3942 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3943 {
3944 /*
3945 * A nested guest cannot use the MMIO cache if it is using nested
3946 * page tables, because cr2 is a nGPA while the cache stores GPAs.
3947 */
3948 if (mmu_is_nested(vcpu))
3949 return false;
3950
3951 if (direct)
3952 return vcpu_match_mmio_gpa(vcpu, addr);
3953
3954 return vcpu_match_mmio_gva(vcpu, addr);
3955 }
3956
3957 /*
3958 * Return the level of the lowest level SPTE added to sptes.
3959 * That SPTE may be non-present.
3960 *
3961 * Must be called between walk_shadow_page_lockless_{begin,end}.
3962 */
get_walk(struct kvm_vcpu * vcpu,u64 addr,u64 * sptes,int * root_level)3963 static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level)
3964 {
3965 struct kvm_shadow_walk_iterator iterator;
3966 int leaf = -1;
3967 u64 spte;
3968
3969 for (shadow_walk_init(&iterator, vcpu, addr),
3970 *root_level = iterator.level;
3971 shadow_walk_okay(&iterator);
3972 __shadow_walk_next(&iterator, spte)) {
3973 leaf = iterator.level;
3974 spte = mmu_spte_get_lockless(iterator.sptep);
3975
3976 sptes[leaf] = spte;
3977 }
3978
3979 return leaf;
3980 }
3981
3982 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
get_mmio_spte(struct kvm_vcpu * vcpu,u64 addr,u64 * sptep)3983 static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3984 {
3985 u64 sptes[PT64_ROOT_MAX_LEVEL + 1];
3986 struct rsvd_bits_validate *rsvd_check;
3987 int root, leaf, level;
3988 bool reserved = false;
3989
3990 walk_shadow_page_lockless_begin(vcpu);
3991
3992 if (is_tdp_mmu(vcpu->arch.mmu))
3993 leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root);
3994 else
3995 leaf = get_walk(vcpu, addr, sptes, &root);
3996
3997 walk_shadow_page_lockless_end(vcpu);
3998
3999 if (unlikely(leaf < 0)) {
4000 *sptep = 0ull;
4001 return reserved;
4002 }
4003
4004 *sptep = sptes[leaf];
4005
4006 /*
4007 * Skip reserved bits checks on the terminal leaf if it's not a valid
4008 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
4009 * design, always have reserved bits set. The purpose of the checks is
4010 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
4011 */
4012 if (!is_shadow_present_pte(sptes[leaf]))
4013 leaf++;
4014
4015 rsvd_check = &vcpu->arch.mmu->shadow_zero_check;
4016
4017 for (level = root; level >= leaf; level--)
4018 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level);
4019
4020 if (reserved) {
4021 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
4022 __func__, addr);
4023 for (level = root; level >= leaf; level--)
4024 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
4025 sptes[level], level,
4026 get_rsvd_bits(rsvd_check, sptes[level], level));
4027 }
4028
4029 return reserved;
4030 }
4031
handle_mmio_page_fault(struct kvm_vcpu * vcpu,u64 addr,bool direct)4032 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
4033 {
4034 u64 spte;
4035 bool reserved;
4036
4037 if (mmio_info_in_cache(vcpu, addr, direct))
4038 return RET_PF_EMULATE;
4039
4040 reserved = get_mmio_spte(vcpu, addr, &spte);
4041 if (WARN_ON(reserved))
4042 return -EINVAL;
4043
4044 if (is_mmio_spte(spte)) {
4045 gfn_t gfn = get_mmio_spte_gfn(spte);
4046 unsigned int access = get_mmio_spte_access(spte);
4047
4048 if (!check_mmio_spte(vcpu, spte))
4049 return RET_PF_INVALID;
4050
4051 if (direct)
4052 addr = 0;
4053
4054 trace_handle_mmio_page_fault(addr, gfn, access);
4055 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
4056 return RET_PF_EMULATE;
4057 }
4058
4059 /*
4060 * If the page table is zapped by other cpus, let CPU fault again on
4061 * the address.
4062 */
4063 return RET_PF_RETRY;
4064 }
4065
page_fault_handle_page_track(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)4066 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
4067 struct kvm_page_fault *fault)
4068 {
4069 if (unlikely(fault->rsvd))
4070 return false;
4071
4072 if (!fault->present || !fault->write)
4073 return false;
4074
4075 /*
4076 * guest is writing the page which is write tracked which can
4077 * not be fixed by page fault handler.
4078 */
4079 if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE))
4080 return true;
4081
4082 return false;
4083 }
4084
shadow_page_table_clear_flood(struct kvm_vcpu * vcpu,gva_t addr)4085 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
4086 {
4087 struct kvm_shadow_walk_iterator iterator;
4088 u64 spte;
4089
4090 walk_shadow_page_lockless_begin(vcpu);
4091 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
4092 clear_sp_write_flooding_count(iterator.sptep);
4093 walk_shadow_page_lockless_end(vcpu);
4094 }
4095
alloc_apf_token(struct kvm_vcpu * vcpu)4096 static u32 alloc_apf_token(struct kvm_vcpu *vcpu)
4097 {
4098 /* make sure the token value is not 0 */
4099 u32 id = vcpu->arch.apf.id;
4100
4101 if (id << 12 == 0)
4102 vcpu->arch.apf.id = 1;
4103
4104 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
4105 }
4106
kvm_arch_setup_async_pf(struct kvm_vcpu * vcpu,gpa_t cr2_or_gpa,gfn_t gfn)4107 static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
4108 gfn_t gfn)
4109 {
4110 struct kvm_arch_async_pf arch;
4111
4112 arch.token = alloc_apf_token(vcpu);
4113 arch.gfn = gfn;
4114 arch.direct_map = vcpu->arch.mmu->root_role.direct;
4115 arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu);
4116
4117 return kvm_setup_async_pf(vcpu, cr2_or_gpa,
4118 kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
4119 }
4120
kvm_arch_async_page_ready(struct kvm_vcpu * vcpu,struct kvm_async_pf * work)4121 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
4122 {
4123 int r;
4124
4125 if ((vcpu->arch.mmu->root_role.direct != work->arch.direct_map) ||
4126 work->wakeup_all)
4127 return;
4128
4129 r = kvm_mmu_reload(vcpu);
4130 if (unlikely(r))
4131 return;
4132
4133 if (!vcpu->arch.mmu->root_role.direct &&
4134 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
4135 return;
4136
4137 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
4138 }
4139
kvm_faultin_pfn(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)4140 static int kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4141 {
4142 struct kvm_memory_slot *slot = fault->slot;
4143 bool async;
4144
4145 /*
4146 * Retry the page fault if the gfn hit a memslot that is being deleted
4147 * or moved. This ensures any existing SPTEs for the old memslot will
4148 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
4149 */
4150 if (slot && (slot->flags & KVM_MEMSLOT_INVALID))
4151 return RET_PF_RETRY;
4152
4153 if (!kvm_is_visible_memslot(slot)) {
4154 /* Don't expose private memslots to L2. */
4155 if (is_guest_mode(vcpu)) {
4156 fault->slot = NULL;
4157 fault->pfn = KVM_PFN_NOSLOT;
4158 fault->map_writable = false;
4159 return RET_PF_CONTINUE;
4160 }
4161 /*
4162 * If the APIC access page exists but is disabled, go directly
4163 * to emulation without caching the MMIO access or creating a
4164 * MMIO SPTE. That way the cache doesn't need to be purged
4165 * when the AVIC is re-enabled.
4166 */
4167 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT &&
4168 !kvm_apicv_activated(vcpu->kvm))
4169 return RET_PF_EMULATE;
4170 }
4171
4172 async = false;
4173 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async,
4174 fault->write, &fault->map_writable,
4175 &fault->hva);
4176 if (!async)
4177 return RET_PF_CONTINUE; /* *pfn has correct page already */
4178
4179 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) {
4180 trace_kvm_try_async_get_page(fault->addr, fault->gfn);
4181 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) {
4182 trace_kvm_async_pf_repeated_fault(fault->addr, fault->gfn);
4183 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
4184 return RET_PF_RETRY;
4185 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) {
4186 return RET_PF_RETRY;
4187 }
4188 }
4189
4190 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL,
4191 fault->write, &fault->map_writable,
4192 &fault->hva);
4193 return RET_PF_CONTINUE;
4194 }
4195
4196 /*
4197 * Returns true if the page fault is stale and needs to be retried, i.e. if the
4198 * root was invalidated by a memslot update or a relevant mmu_notifier fired.
4199 */
is_page_fault_stale(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault,int mmu_seq)4200 static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
4201 struct kvm_page_fault *fault, int mmu_seq)
4202 {
4203 struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa);
4204
4205 /* Special roots, e.g. pae_root, are not backed by shadow pages. */
4206 if (sp && is_obsolete_sp(vcpu->kvm, sp))
4207 return true;
4208
4209 /*
4210 * Roots without an associated shadow page are considered invalid if
4211 * there is a pending request to free obsolete roots. The request is
4212 * only a hint that the current root _may_ be obsolete and needs to be
4213 * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a
4214 * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs
4215 * to reload even if no vCPU is actively using the root.
4216 */
4217 if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
4218 return true;
4219
4220 return fault->slot &&
4221 mmu_invalidate_retry_hva(vcpu->kvm, mmu_seq, fault->hva);
4222 }
4223
direct_page_fault(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)4224 static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4225 {
4226 bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu);
4227
4228 unsigned long mmu_seq;
4229 int r;
4230
4231 fault->gfn = fault->addr >> PAGE_SHIFT;
4232 fault->slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn);
4233
4234 if (page_fault_handle_page_track(vcpu, fault))
4235 return RET_PF_EMULATE;
4236
4237 r = fast_page_fault(vcpu, fault);
4238 if (r != RET_PF_INVALID)
4239 return r;
4240
4241 r = mmu_topup_memory_caches(vcpu, false);
4242 if (r)
4243 return r;
4244
4245 mmu_seq = vcpu->kvm->mmu_invalidate_seq;
4246 smp_rmb();
4247
4248 r = kvm_faultin_pfn(vcpu, fault);
4249 if (r != RET_PF_CONTINUE)
4250 return r;
4251
4252 r = handle_abnormal_pfn(vcpu, fault, ACC_ALL);
4253 if (r != RET_PF_CONTINUE)
4254 return r;
4255
4256 r = RET_PF_RETRY;
4257
4258 if (is_tdp_mmu_fault)
4259 read_lock(&vcpu->kvm->mmu_lock);
4260 else
4261 write_lock(&vcpu->kvm->mmu_lock);
4262
4263 if (is_page_fault_stale(vcpu, fault, mmu_seq))
4264 goto out_unlock;
4265
4266 if (is_tdp_mmu_fault) {
4267 r = kvm_tdp_mmu_map(vcpu, fault);
4268 } else {
4269 r = make_mmu_pages_available(vcpu);
4270 if (r)
4271 goto out_unlock;
4272 r = __direct_map(vcpu, fault);
4273 }
4274
4275 out_unlock:
4276 if (is_tdp_mmu_fault)
4277 read_unlock(&vcpu->kvm->mmu_lock);
4278 else
4279 write_unlock(&vcpu->kvm->mmu_lock);
4280 kvm_release_pfn_clean(fault->pfn);
4281 return r;
4282 }
4283
nonpaging_page_fault(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)4284 static int nonpaging_page_fault(struct kvm_vcpu *vcpu,
4285 struct kvm_page_fault *fault)
4286 {
4287 pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code);
4288
4289 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
4290 fault->max_level = PG_LEVEL_2M;
4291 return direct_page_fault(vcpu, fault);
4292 }
4293
kvm_handle_page_fault(struct kvm_vcpu * vcpu,u64 error_code,u64 fault_address,char * insn,int insn_len)4294 int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
4295 u64 fault_address, char *insn, int insn_len)
4296 {
4297 int r = 1;
4298 u32 flags = vcpu->arch.apf.host_apf_flags;
4299
4300 #ifndef CONFIG_X86_64
4301 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
4302 if (WARN_ON_ONCE(fault_address >> 32))
4303 return -EFAULT;
4304 #endif
4305
4306 vcpu->arch.l1tf_flush_l1d = true;
4307 if (!flags) {
4308 trace_kvm_page_fault(vcpu, fault_address, error_code);
4309
4310 if (kvm_event_needs_reinjection(vcpu))
4311 kvm_mmu_unprotect_page_virt(vcpu, fault_address);
4312 r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn,
4313 insn_len);
4314 } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) {
4315 vcpu->arch.apf.host_apf_flags = 0;
4316 local_irq_disable();
4317 kvm_async_pf_task_wait_schedule(fault_address);
4318 local_irq_enable();
4319 } else {
4320 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags);
4321 }
4322
4323 return r;
4324 }
4325 EXPORT_SYMBOL_GPL(kvm_handle_page_fault);
4326
kvm_tdp_page_fault(struct kvm_vcpu * vcpu,struct kvm_page_fault * fault)4327 int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4328 {
4329 /*
4330 * If the guest's MTRRs may be used to compute the "real" memtype,
4331 * restrict the mapping level to ensure KVM uses a consistent memtype
4332 * across the entire mapping. If the host MTRRs are ignored by TDP
4333 * (shadow_memtype_mask is non-zero), and the VM has non-coherent DMA
4334 * (DMA doesn't snoop CPU caches), KVM's ABI is to honor the memtype
4335 * from the guest's MTRRs so that guest accesses to memory that is
4336 * DMA'd aren't cached against the guest's wishes.
4337 *
4338 * Note, KVM may still ultimately ignore guest MTRRs for certain PFNs,
4339 * e.g. KVM will force UC memtype for host MMIO.
4340 */
4341 if (shadow_memtype_mask && kvm_arch_has_noncoherent_dma(vcpu->kvm)) {
4342 for ( ; fault->max_level > PG_LEVEL_4K; --fault->max_level) {
4343 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level);
4344 gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1);
4345
4346 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4347 break;
4348 }
4349 }
4350
4351 return direct_page_fault(vcpu, fault);
4352 }
4353
nonpaging_init_context(struct kvm_mmu * context)4354 static void nonpaging_init_context(struct kvm_mmu *context)
4355 {
4356 context->page_fault = nonpaging_page_fault;
4357 context->gva_to_gpa = nonpaging_gva_to_gpa;
4358 context->sync_page = nonpaging_sync_page;
4359 context->invlpg = NULL;
4360 }
4361
is_root_usable(struct kvm_mmu_root_info * root,gpa_t pgd,union kvm_mmu_page_role role)4362 static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd,
4363 union kvm_mmu_page_role role)
4364 {
4365 return (role.direct || pgd == root->pgd) &&
4366 VALID_PAGE(root->hpa) &&
4367 role.word == to_shadow_page(root->hpa)->role.word;
4368 }
4369
4370 /*
4371 * Find out if a previously cached root matching the new pgd/role is available,
4372 * and insert the current root as the MRU in the cache.
4373 * If a matching root is found, it is assigned to kvm_mmu->root and
4374 * true is returned.
4375 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4376 * evicted to make room for the current root, and false is returned.
4377 */
cached_root_find_and_keep_current(struct kvm * kvm,struct kvm_mmu * mmu,gpa_t new_pgd,union kvm_mmu_page_role new_role)4378 static bool cached_root_find_and_keep_current(struct kvm *kvm, struct kvm_mmu *mmu,
4379 gpa_t new_pgd,
4380 union kvm_mmu_page_role new_role)
4381 {
4382 uint i;
4383
4384 if (is_root_usable(&mmu->root, new_pgd, new_role))
4385 return true;
4386
4387 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
4388 /*
4389 * The swaps end up rotating the cache like this:
4390 * C 0 1 2 3 (on entry to the function)
4391 * 0 C 1 2 3
4392 * 1 C 0 2 3
4393 * 2 C 0 1 3
4394 * 3 C 0 1 2 (on exit from the loop)
4395 */
4396 swap(mmu->root, mmu->prev_roots[i]);
4397 if (is_root_usable(&mmu->root, new_pgd, new_role))
4398 return true;
4399 }
4400
4401 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4402 return false;
4403 }
4404
4405 /*
4406 * Find out if a previously cached root matching the new pgd/role is available.
4407 * On entry, mmu->root is invalid.
4408 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4409 * of the cache becomes invalid, and true is returned.
4410 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4411 */
cached_root_find_without_current(struct kvm * kvm,struct kvm_mmu * mmu,gpa_t new_pgd,union kvm_mmu_page_role new_role)4412 static bool cached_root_find_without_current(struct kvm *kvm, struct kvm_mmu *mmu,
4413 gpa_t new_pgd,
4414 union kvm_mmu_page_role new_role)
4415 {
4416 uint i;
4417
4418 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4419 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role))
4420 goto hit;
4421
4422 return false;
4423
4424 hit:
4425 swap(mmu->root, mmu->prev_roots[i]);
4426 /* Bubble up the remaining roots. */
4427 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++)
4428 mmu->prev_roots[i] = mmu->prev_roots[i + 1];
4429 mmu->prev_roots[i].hpa = INVALID_PAGE;
4430 return true;
4431 }
4432
fast_pgd_switch(struct kvm * kvm,struct kvm_mmu * mmu,gpa_t new_pgd,union kvm_mmu_page_role new_role)4433 static bool fast_pgd_switch(struct kvm *kvm, struct kvm_mmu *mmu,
4434 gpa_t new_pgd, union kvm_mmu_page_role new_role)
4435 {
4436 /*
4437 * For now, limit the caching to 64-bit hosts+VMs in order to avoid
4438 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
4439 * later if necessary.
4440 */
4441 if (VALID_PAGE(mmu->root.hpa) && !to_shadow_page(mmu->root.hpa))
4442 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4443
4444 if (VALID_PAGE(mmu->root.hpa))
4445 return cached_root_find_and_keep_current(kvm, mmu, new_pgd, new_role);
4446 else
4447 return cached_root_find_without_current(kvm, mmu, new_pgd, new_role);
4448 }
4449
kvm_mmu_new_pgd(struct kvm_vcpu * vcpu,gpa_t new_pgd)4450 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd)
4451 {
4452 struct kvm_mmu *mmu = vcpu->arch.mmu;
4453 union kvm_mmu_page_role new_role = mmu->root_role;
4454
4455 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role)) {
4456 /* kvm_mmu_ensure_valid_pgd will set up a new root. */
4457 return;
4458 }
4459
4460 /*
4461 * It's possible that the cached previous root page is obsolete because
4462 * of a change in the MMU generation number. However, changing the
4463 * generation number is accompanied by KVM_REQ_MMU_FREE_OBSOLETE_ROOTS,
4464 * which will free the root set here and allocate a new one.
4465 */
4466 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
4467
4468 if (force_flush_and_sync_on_reuse) {
4469 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
4470 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
4471 }
4472
4473 /*
4474 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4475 * switching to a new CR3, that GVA->GPA mapping may no longer be
4476 * valid. So clear any cached MMIO info even when we don't need to sync
4477 * the shadow page tables.
4478 */
4479 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4480
4481 /*
4482 * If this is a direct root page, it doesn't have a write flooding
4483 * count. Otherwise, clear the write flooding count.
4484 */
4485 if (!new_role.direct)
4486 __clear_sp_write_flooding_count(
4487 to_shadow_page(vcpu->arch.mmu->root.hpa));
4488 }
4489 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
4490
get_cr3(struct kvm_vcpu * vcpu)4491 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
4492 {
4493 return kvm_read_cr3(vcpu);
4494 }
4495
sync_mmio_spte(struct kvm_vcpu * vcpu,u64 * sptep,gfn_t gfn,unsigned int access)4496 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
4497 unsigned int access)
4498 {
4499 if (unlikely(is_mmio_spte(*sptep))) {
4500 if (gfn != get_mmio_spte_gfn(*sptep)) {
4501 mmu_spte_clear_no_track(sptep);
4502 return true;
4503 }
4504
4505 mark_mmio_spte(vcpu, sptep, gfn, access);
4506 return true;
4507 }
4508
4509 return false;
4510 }
4511
4512 #define PTTYPE_EPT 18 /* arbitrary */
4513 #define PTTYPE PTTYPE_EPT
4514 #include "paging_tmpl.h"
4515 #undef PTTYPE
4516
4517 #define PTTYPE 64
4518 #include "paging_tmpl.h"
4519 #undef PTTYPE
4520
4521 #define PTTYPE 32
4522 #include "paging_tmpl.h"
4523 #undef PTTYPE
4524
4525 static void
__reset_rsvds_bits_mask(struct rsvd_bits_validate * rsvd_check,u64 pa_bits_rsvd,int level,bool nx,bool gbpages,bool pse,bool amd)4526 __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check,
4527 u64 pa_bits_rsvd, int level, bool nx, bool gbpages,
4528 bool pse, bool amd)
4529 {
4530 u64 gbpages_bit_rsvd = 0;
4531 u64 nonleaf_bit8_rsvd = 0;
4532 u64 high_bits_rsvd;
4533
4534 rsvd_check->bad_mt_xwr = 0;
4535
4536 if (!gbpages)
4537 gbpages_bit_rsvd = rsvd_bits(7, 7);
4538
4539 if (level == PT32E_ROOT_LEVEL)
4540 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62);
4541 else
4542 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4543
4544 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4545 if (!nx)
4546 high_bits_rsvd |= rsvd_bits(63, 63);
4547
4548 /*
4549 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4550 * leaf entries) on AMD CPUs only.
4551 */
4552 if (amd)
4553 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
4554
4555 switch (level) {
4556 case PT32_ROOT_LEVEL:
4557 /* no rsvd bits for 2 level 4K page table entries */
4558 rsvd_check->rsvd_bits_mask[0][1] = 0;
4559 rsvd_check->rsvd_bits_mask[0][0] = 0;
4560 rsvd_check->rsvd_bits_mask[1][0] =
4561 rsvd_check->rsvd_bits_mask[0][0];
4562
4563 if (!pse) {
4564 rsvd_check->rsvd_bits_mask[1][1] = 0;
4565 break;
4566 }
4567
4568 if (is_cpuid_PSE36())
4569 /* 36bits PSE 4MB page */
4570 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
4571 else
4572 /* 32 bits PSE 4MB page */
4573 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
4574 break;
4575 case PT32E_ROOT_LEVEL:
4576 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) |
4577 high_bits_rsvd |
4578 rsvd_bits(5, 8) |
4579 rsvd_bits(1, 2); /* PDPTE */
4580 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */
4581 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */
4582 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4583 rsvd_bits(13, 20); /* large page */
4584 rsvd_check->rsvd_bits_mask[1][0] =
4585 rsvd_check->rsvd_bits_mask[0][0];
4586 break;
4587 case PT64_ROOT_5LEVEL:
4588 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd |
4589 nonleaf_bit8_rsvd |
4590 rsvd_bits(7, 7);
4591 rsvd_check->rsvd_bits_mask[1][4] =
4592 rsvd_check->rsvd_bits_mask[0][4];
4593 fallthrough;
4594 case PT64_ROOT_4LEVEL:
4595 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd |
4596 nonleaf_bit8_rsvd |
4597 rsvd_bits(7, 7);
4598 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd |
4599 gbpages_bit_rsvd;
4600 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd;
4601 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4602 rsvd_check->rsvd_bits_mask[1][3] =
4603 rsvd_check->rsvd_bits_mask[0][3];
4604 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd |
4605 gbpages_bit_rsvd |
4606 rsvd_bits(13, 29);
4607 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4608 rsvd_bits(13, 20); /* large page */
4609 rsvd_check->rsvd_bits_mask[1][0] =
4610 rsvd_check->rsvd_bits_mask[0][0];
4611 break;
4612 }
4613 }
4614
guest_can_use_gbpages(struct kvm_vcpu * vcpu)4615 static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu)
4616 {
4617 /*
4618 * If TDP is enabled, let the guest use GBPAGES if they're supported in
4619 * hardware. The hardware page walker doesn't let KVM disable GBPAGES,
4620 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
4621 * walk for performance and complexity reasons. Not to mention KVM
4622 * _can't_ solve the problem because GVA->GPA walks aren't visible to
4623 * KVM once a TDP translation is installed. Mimic hardware behavior so
4624 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
4625 */
4626 return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
4627 guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES);
4628 }
4629
reset_guest_rsvds_bits_mask(struct kvm_vcpu * vcpu,struct kvm_mmu * context)4630 static void reset_guest_rsvds_bits_mask(struct kvm_vcpu *vcpu,
4631 struct kvm_mmu *context)
4632 {
4633 __reset_rsvds_bits_mask(&context->guest_rsvd_check,
4634 vcpu->arch.reserved_gpa_bits,
4635 context->cpu_role.base.level, is_efer_nx(context),
4636 guest_can_use_gbpages(vcpu),
4637 is_cr4_pse(context),
4638 guest_cpuid_is_amd_or_hygon(vcpu));
4639 }
4640
4641 static void
__reset_rsvds_bits_mask_ept(struct rsvd_bits_validate * rsvd_check,u64 pa_bits_rsvd,bool execonly,int huge_page_level)4642 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
4643 u64 pa_bits_rsvd, bool execonly, int huge_page_level)
4644 {
4645 u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4646 u64 large_1g_rsvd = 0, large_2m_rsvd = 0;
4647 u64 bad_mt_xwr;
4648
4649 if (huge_page_level < PG_LEVEL_1G)
4650 large_1g_rsvd = rsvd_bits(7, 7);
4651 if (huge_page_level < PG_LEVEL_2M)
4652 large_2m_rsvd = rsvd_bits(7, 7);
4653
4654 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7);
4655 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7);
4656 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd;
4657 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd;
4658 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4659
4660 /* large page */
4661 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];
4662 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
4663 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd;
4664 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd;
4665 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
4666
4667 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
4668 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
4669 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
4670 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4671 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4672 if (!execonly) {
4673 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4674 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
4675 }
4676 rsvd_check->bad_mt_xwr = bad_mt_xwr;
4677 }
4678
reset_rsvds_bits_mask_ept(struct kvm_vcpu * vcpu,struct kvm_mmu * context,bool execonly,int huge_page_level)4679 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
4680 struct kvm_mmu *context, bool execonly, int huge_page_level)
4681 {
4682 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
4683 vcpu->arch.reserved_gpa_bits, execonly,
4684 huge_page_level);
4685 }
4686
reserved_hpa_bits(void)4687 static inline u64 reserved_hpa_bits(void)
4688 {
4689 return rsvd_bits(shadow_phys_bits, 63);
4690 }
4691
4692 /*
4693 * the page table on host is the shadow page table for the page
4694 * table in guest or amd nested guest, its mmu features completely
4695 * follow the features in guest.
4696 */
reset_shadow_zero_bits_mask(struct kvm_vcpu * vcpu,struct kvm_mmu * context)4697 static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
4698 struct kvm_mmu *context)
4699 {
4700 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4701 bool is_amd = true;
4702 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4703 bool is_pse = false;
4704 struct rsvd_bits_validate *shadow_zero_check;
4705 int i;
4706
4707 WARN_ON_ONCE(context->root_role.level < PT32E_ROOT_LEVEL);
4708
4709 shadow_zero_check = &context->shadow_zero_check;
4710 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4711 context->root_role.level,
4712 context->root_role.efer_nx,
4713 guest_can_use_gbpages(vcpu), is_pse, is_amd);
4714
4715 if (!shadow_me_mask)
4716 return;
4717
4718 for (i = context->root_role.level; --i >= 0;) {
4719 /*
4720 * So far shadow_me_value is a constant during KVM's life
4721 * time. Bits in shadow_me_value are allowed to be set.
4722 * Bits in shadow_me_mask but not in shadow_me_value are
4723 * not allowed to be set.
4724 */
4725 shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;
4726 shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;
4727 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;
4728 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;
4729 }
4730
4731 }
4732
boot_cpu_is_amd(void)4733 static inline bool boot_cpu_is_amd(void)
4734 {
4735 WARN_ON_ONCE(!tdp_enabled);
4736 return shadow_x_mask == 0;
4737 }
4738
4739 /*
4740 * the direct page table on host, use as much mmu features as
4741 * possible, however, kvm currently does not do execution-protection.
4742 */
4743 static void
reset_tdp_shadow_zero_bits_mask(struct kvm_mmu * context)4744 reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context)
4745 {
4746 struct rsvd_bits_validate *shadow_zero_check;
4747 int i;
4748
4749 shadow_zero_check = &context->shadow_zero_check;
4750
4751 if (boot_cpu_is_amd())
4752 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4753 context->root_role.level, true,
4754 boot_cpu_has(X86_FEATURE_GBPAGES),
4755 false, true);
4756 else
4757 __reset_rsvds_bits_mask_ept(shadow_zero_check,
4758 reserved_hpa_bits(), false,
4759 max_huge_page_level);
4760
4761 if (!shadow_me_mask)
4762 return;
4763
4764 for (i = context->root_role.level; --i >= 0;) {
4765 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
4766 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
4767 }
4768 }
4769
4770 /*
4771 * as the comments in reset_shadow_zero_bits_mask() except it
4772 * is the shadow page table for intel nested guest.
4773 */
4774 static void
reset_ept_shadow_zero_bits_mask(struct kvm_mmu * context,bool execonly)4775 reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly)
4776 {
4777 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
4778 reserved_hpa_bits(), execonly,
4779 max_huge_page_level);
4780 }
4781
4782 #define BYTE_MASK(access) \
4783 ((1 & (access) ? 2 : 0) | \
4784 (2 & (access) ? 4 : 0) | \
4785 (3 & (access) ? 8 : 0) | \
4786 (4 & (access) ? 16 : 0) | \
4787 (5 & (access) ? 32 : 0) | \
4788 (6 & (access) ? 64 : 0) | \
4789 (7 & (access) ? 128 : 0))
4790
4791
update_permission_bitmask(struct kvm_mmu * mmu,bool ept)4792 static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept)
4793 {
4794 unsigned byte;
4795
4796 const u8 x = BYTE_MASK(ACC_EXEC_MASK);
4797 const u8 w = BYTE_MASK(ACC_WRITE_MASK);
4798 const u8 u = BYTE_MASK(ACC_USER_MASK);
4799
4800 bool cr4_smep = is_cr4_smep(mmu);
4801 bool cr4_smap = is_cr4_smap(mmu);
4802 bool cr0_wp = is_cr0_wp(mmu);
4803 bool efer_nx = is_efer_nx(mmu);
4804
4805 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
4806 unsigned pfec = byte << 1;
4807
4808 /*
4809 * Each "*f" variable has a 1 bit for each UWX value
4810 * that causes a fault with the given PFEC.
4811 */
4812
4813 /* Faults from writes to non-writable pages */
4814 u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0;
4815 /* Faults from user mode accesses to supervisor pages */
4816 u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0;
4817 /* Faults from fetches of non-executable pages*/
4818 u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0;
4819 /* Faults from kernel mode fetches of user pages */
4820 u8 smepf = 0;
4821 /* Faults from kernel mode accesses of user pages */
4822 u8 smapf = 0;
4823
4824 if (!ept) {
4825 /* Faults from kernel mode accesses to user pages */
4826 u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u;
4827
4828 /* Not really needed: !nx will cause pte.nx to fault */
4829 if (!efer_nx)
4830 ff = 0;
4831
4832 /* Allow supervisor writes if !cr0.wp */
4833 if (!cr0_wp)
4834 wf = (pfec & PFERR_USER_MASK) ? wf : 0;
4835
4836 /* Disallow supervisor fetches of user code if cr4.smep */
4837 if (cr4_smep)
4838 smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0;
4839
4840 /*
4841 * SMAP:kernel-mode data accesses from user-mode
4842 * mappings should fault. A fault is considered
4843 * as a SMAP violation if all of the following
4844 * conditions are true:
4845 * - X86_CR4_SMAP is set in CR4
4846 * - A user page is accessed
4847 * - The access is not a fetch
4848 * - The access is supervisor mode
4849 * - If implicit supervisor access or X86_EFLAGS_AC is clear
4850 *
4851 * Here, we cover the first four conditions.
4852 * The fifth is computed dynamically in permission_fault();
4853 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4854 * *not* subject to SMAP restrictions.
4855 */
4856 if (cr4_smap)
4857 smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf;
4858 }
4859
4860 mmu->permissions[byte] = ff | uf | wf | smepf | smapf;
4861 }
4862 }
4863
4864 /*
4865 * PKU is an additional mechanism by which the paging controls access to
4866 * user-mode addresses based on the value in the PKRU register. Protection
4867 * key violations are reported through a bit in the page fault error code.
4868 * Unlike other bits of the error code, the PK bit is not known at the
4869 * call site of e.g. gva_to_gpa; it must be computed directly in
4870 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4871 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4872 *
4873 * In particular the following conditions come from the error code, the
4874 * page tables and the machine state:
4875 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4876 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4877 * - PK is always zero if U=0 in the page tables
4878 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4879 *
4880 * The PKRU bitmask caches the result of these four conditions. The error
4881 * code (minus the P bit) and the page table's U bit form an index into the
4882 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4883 * with the two bits of the PKRU register corresponding to the protection key.
4884 * For the first three conditions above the bits will be 00, thus masking
4885 * away both AD and WD. For all reads or if the last condition holds, WD
4886 * only will be masked away.
4887 */
update_pkru_bitmask(struct kvm_mmu * mmu)4888 static void update_pkru_bitmask(struct kvm_mmu *mmu)
4889 {
4890 unsigned bit;
4891 bool wp;
4892
4893 mmu->pkru_mask = 0;
4894
4895 if (!is_cr4_pke(mmu))
4896 return;
4897
4898 wp = is_cr0_wp(mmu);
4899
4900 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) {
4901 unsigned pfec, pkey_bits;
4902 bool check_pkey, check_write, ff, uf, wf, pte_user;
4903
4904 pfec = bit << 1;
4905 ff = pfec & PFERR_FETCH_MASK;
4906 uf = pfec & PFERR_USER_MASK;
4907 wf = pfec & PFERR_WRITE_MASK;
4908
4909 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
4910 pte_user = pfec & PFERR_RSVD_MASK;
4911
4912 /*
4913 * Only need to check the access which is not an
4914 * instruction fetch and is to a user page.
4915 */
4916 check_pkey = (!ff && pte_user);
4917 /*
4918 * write access is controlled by PKRU if it is a
4919 * user access or CR0.WP = 1.
4920 */
4921 check_write = check_pkey && wf && (uf || wp);
4922
4923 /* PKRU.AD stops both read and write access. */
4924 pkey_bits = !!check_pkey;
4925 /* PKRU.WD stops write access. */
4926 pkey_bits |= (!!check_write) << 1;
4927
4928 mmu->pkru_mask |= (pkey_bits & 3) << pfec;
4929 }
4930 }
4931
reset_guest_paging_metadata(struct kvm_vcpu * vcpu,struct kvm_mmu * mmu)4932 static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu,
4933 struct kvm_mmu *mmu)
4934 {
4935 if (!is_cr0_pg(mmu))
4936 return;
4937
4938 reset_guest_rsvds_bits_mask(vcpu, mmu);
4939 update_permission_bitmask(mmu, false);
4940 update_pkru_bitmask(mmu);
4941 }
4942
paging64_init_context(struct kvm_mmu * context)4943 static void paging64_init_context(struct kvm_mmu *context)
4944 {
4945 context->page_fault = paging64_page_fault;
4946 context->gva_to_gpa = paging64_gva_to_gpa;
4947 context->sync_page = paging64_sync_page;
4948 context->invlpg = paging64_invlpg;
4949 }
4950
paging32_init_context(struct kvm_mmu * context)4951 static void paging32_init_context(struct kvm_mmu *context)
4952 {
4953 context->page_fault = paging32_page_fault;
4954 context->gva_to_gpa = paging32_gva_to_gpa;
4955 context->sync_page = paging32_sync_page;
4956 context->invlpg = paging32_invlpg;
4957 }
4958
4959 static union kvm_cpu_role
kvm_calc_cpu_role(struct kvm_vcpu * vcpu,const struct kvm_mmu_role_regs * regs)4960 kvm_calc_cpu_role(struct kvm_vcpu *vcpu, const struct kvm_mmu_role_regs *regs)
4961 {
4962 union kvm_cpu_role role = {0};
4963
4964 role.base.access = ACC_ALL;
4965 role.base.smm = is_smm(vcpu);
4966 role.base.guest_mode = is_guest_mode(vcpu);
4967 role.ext.valid = 1;
4968
4969 if (!____is_cr0_pg(regs)) {
4970 role.base.direct = 1;
4971 return role;
4972 }
4973
4974 role.base.efer_nx = ____is_efer_nx(regs);
4975 role.base.cr0_wp = ____is_cr0_wp(regs);
4976 role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs);
4977 role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs);
4978 role.base.has_4_byte_gpte = !____is_cr4_pae(regs);
4979
4980 if (____is_efer_lma(regs))
4981 role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL
4982 : PT64_ROOT_4LEVEL;
4983 else if (____is_cr4_pae(regs))
4984 role.base.level = PT32E_ROOT_LEVEL;
4985 else
4986 role.base.level = PT32_ROOT_LEVEL;
4987
4988 role.ext.cr4_smep = ____is_cr4_smep(regs);
4989 role.ext.cr4_smap = ____is_cr4_smap(regs);
4990 role.ext.cr4_pse = ____is_cr4_pse(regs);
4991
4992 /* PKEY and LA57 are active iff long mode is active. */
4993 role.ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs);
4994 role.ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs);
4995 role.ext.efer_lma = ____is_efer_lma(regs);
4996 return role;
4997 }
4998
kvm_mmu_get_tdp_level(struct kvm_vcpu * vcpu)4999 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
5000 {
5001 /* tdp_root_level is architecture forced level, use it if nonzero */
5002 if (tdp_root_level)
5003 return tdp_root_level;
5004
5005 /* Use 5-level TDP if and only if it's useful/necessary. */
5006 if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
5007 return 4;
5008
5009 return max_tdp_level;
5010 }
5011
5012 static union kvm_mmu_page_role
kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu * vcpu,union kvm_cpu_role cpu_role)5013 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu,
5014 union kvm_cpu_role cpu_role)
5015 {
5016 union kvm_mmu_page_role role = {0};
5017
5018 role.access = ACC_ALL;
5019 role.cr0_wp = true;
5020 role.efer_nx = true;
5021 role.smm = cpu_role.base.smm;
5022 role.guest_mode = cpu_role.base.guest_mode;
5023 role.ad_disabled = !kvm_ad_enabled();
5024 role.level = kvm_mmu_get_tdp_level(vcpu);
5025 role.direct = true;
5026 role.has_4_byte_gpte = false;
5027
5028 return role;
5029 }
5030
init_kvm_tdp_mmu(struct kvm_vcpu * vcpu,union kvm_cpu_role cpu_role)5031 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu,
5032 union kvm_cpu_role cpu_role)
5033 {
5034 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5035 union kvm_mmu_page_role root_role = kvm_calc_tdp_mmu_root_page_role(vcpu, cpu_role);
5036
5037 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5038 root_role.word == context->root_role.word)
5039 return;
5040
5041 context->cpu_role.as_u64 = cpu_role.as_u64;
5042 context->root_role.word = root_role.word;
5043 context->page_fault = kvm_tdp_page_fault;
5044 context->sync_page = nonpaging_sync_page;
5045 context->invlpg = NULL;
5046 context->get_guest_pgd = get_cr3;
5047 context->get_pdptr = kvm_pdptr_read;
5048 context->inject_page_fault = kvm_inject_page_fault;
5049
5050 if (!is_cr0_pg(context))
5051 context->gva_to_gpa = nonpaging_gva_to_gpa;
5052 else if (is_cr4_pae(context))
5053 context->gva_to_gpa = paging64_gva_to_gpa;
5054 else
5055 context->gva_to_gpa = paging32_gva_to_gpa;
5056
5057 reset_guest_paging_metadata(vcpu, context);
5058 reset_tdp_shadow_zero_bits_mask(context);
5059 }
5060
shadow_mmu_init_context(struct kvm_vcpu * vcpu,struct kvm_mmu * context,union kvm_cpu_role cpu_role,union kvm_mmu_page_role root_role)5061 static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
5062 union kvm_cpu_role cpu_role,
5063 union kvm_mmu_page_role root_role)
5064 {
5065 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5066 root_role.word == context->root_role.word)
5067 return;
5068
5069 context->cpu_role.as_u64 = cpu_role.as_u64;
5070 context->root_role.word = root_role.word;
5071
5072 if (!is_cr0_pg(context))
5073 nonpaging_init_context(context);
5074 else if (is_cr4_pae(context))
5075 paging64_init_context(context);
5076 else
5077 paging32_init_context(context);
5078
5079 reset_guest_paging_metadata(vcpu, context);
5080 reset_shadow_zero_bits_mask(vcpu, context);
5081 }
5082
kvm_init_shadow_mmu(struct kvm_vcpu * vcpu,union kvm_cpu_role cpu_role)5083 static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
5084 union kvm_cpu_role cpu_role)
5085 {
5086 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5087 union kvm_mmu_page_role root_role;
5088
5089 root_role = cpu_role.base;
5090
5091 /* KVM uses PAE paging whenever the guest isn't using 64-bit paging. */
5092 root_role.level = max_t(u32, root_role.level, PT32E_ROOT_LEVEL);
5093
5094 /*
5095 * KVM forces EFER.NX=1 when TDP is disabled, reflect it in the MMU role.
5096 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
5097 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
5098 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
5099 * The iTLB multi-hit workaround can be toggled at any time, so assume
5100 * NX can be used by any non-nested shadow MMU to avoid having to reset
5101 * MMU contexts.
5102 */
5103 root_role.efer_nx = true;
5104
5105 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5106 }
5107
kvm_init_shadow_npt_mmu(struct kvm_vcpu * vcpu,unsigned long cr0,unsigned long cr4,u64 efer,gpa_t nested_cr3)5108 void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
5109 unsigned long cr4, u64 efer, gpa_t nested_cr3)
5110 {
5111 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5112 struct kvm_mmu_role_regs regs = {
5113 .cr0 = cr0,
5114 .cr4 = cr4 & ~X86_CR4_PKE,
5115 .efer = efer,
5116 };
5117 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5118 union kvm_mmu_page_role root_role;
5119
5120 /* NPT requires CR0.PG=1. */
5121 WARN_ON_ONCE(cpu_role.base.direct);
5122
5123 root_role = cpu_role.base;
5124 root_role.level = kvm_mmu_get_tdp_level(vcpu);
5125 if (root_role.level == PT64_ROOT_5LEVEL &&
5126 cpu_role.base.level == PT64_ROOT_4LEVEL)
5127 root_role.passthrough = 1;
5128
5129 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5130 kvm_mmu_new_pgd(vcpu, nested_cr3);
5131 }
5132 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
5133
5134 static union kvm_cpu_role
kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu * vcpu,bool accessed_dirty,bool execonly,u8 level)5135 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty,
5136 bool execonly, u8 level)
5137 {
5138 union kvm_cpu_role role = {0};
5139
5140 /*
5141 * KVM does not support SMM transfer monitors, and consequently does not
5142 * support the "entry to SMM" control either. role.base.smm is always 0.
5143 */
5144 WARN_ON_ONCE(is_smm(vcpu));
5145 role.base.level = level;
5146 role.base.has_4_byte_gpte = false;
5147 role.base.direct = false;
5148 role.base.ad_disabled = !accessed_dirty;
5149 role.base.guest_mode = true;
5150 role.base.access = ACC_ALL;
5151
5152 role.ext.word = 0;
5153 role.ext.execonly = execonly;
5154 role.ext.valid = 1;
5155
5156 return role;
5157 }
5158
kvm_init_shadow_ept_mmu(struct kvm_vcpu * vcpu,bool execonly,int huge_page_level,bool accessed_dirty,gpa_t new_eptp)5159 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
5160 int huge_page_level, bool accessed_dirty,
5161 gpa_t new_eptp)
5162 {
5163 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5164 u8 level = vmx_eptp_page_walk_level(new_eptp);
5165 union kvm_cpu_role new_mode =
5166 kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
5167 execonly, level);
5168
5169 if (new_mode.as_u64 != context->cpu_role.as_u64) {
5170 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
5171 context->cpu_role.as_u64 = new_mode.as_u64;
5172 context->root_role.word = new_mode.base.word;
5173
5174 context->page_fault = ept_page_fault;
5175 context->gva_to_gpa = ept_gva_to_gpa;
5176 context->sync_page = ept_sync_page;
5177 context->invlpg = ept_invlpg;
5178
5179 update_permission_bitmask(context, true);
5180 context->pkru_mask = 0;
5181 reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level);
5182 reset_ept_shadow_zero_bits_mask(context, execonly);
5183 }
5184
5185 kvm_mmu_new_pgd(vcpu, new_eptp);
5186 }
5187 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
5188
init_kvm_softmmu(struct kvm_vcpu * vcpu,union kvm_cpu_role cpu_role)5189 static void init_kvm_softmmu(struct kvm_vcpu *vcpu,
5190 union kvm_cpu_role cpu_role)
5191 {
5192 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5193
5194 kvm_init_shadow_mmu(vcpu, cpu_role);
5195
5196 context->get_guest_pgd = get_cr3;
5197 context->get_pdptr = kvm_pdptr_read;
5198 context->inject_page_fault = kvm_inject_page_fault;
5199 }
5200
init_kvm_nested_mmu(struct kvm_vcpu * vcpu,union kvm_cpu_role new_mode)5201 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu,
5202 union kvm_cpu_role new_mode)
5203 {
5204 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
5205
5206 if (new_mode.as_u64 == g_context->cpu_role.as_u64)
5207 return;
5208
5209 g_context->cpu_role.as_u64 = new_mode.as_u64;
5210 g_context->get_guest_pgd = get_cr3;
5211 g_context->get_pdptr = kvm_pdptr_read;
5212 g_context->inject_page_fault = kvm_inject_page_fault;
5213
5214 /*
5215 * L2 page tables are never shadowed, so there is no need to sync
5216 * SPTEs.
5217 */
5218 g_context->invlpg = NULL;
5219
5220 /*
5221 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
5222 * L1's nested page tables (e.g. EPT12). The nested translation
5223 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
5224 * L2's page tables as the first level of translation and L1's
5225 * nested page tables as the second level of translation. Basically
5226 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
5227 */
5228 if (!is_paging(vcpu))
5229 g_context->gva_to_gpa = nonpaging_gva_to_gpa;
5230 else if (is_long_mode(vcpu))
5231 g_context->gva_to_gpa = paging64_gva_to_gpa;
5232 else if (is_pae(vcpu))
5233 g_context->gva_to_gpa = paging64_gva_to_gpa;
5234 else
5235 g_context->gva_to_gpa = paging32_gva_to_gpa;
5236
5237 reset_guest_paging_metadata(vcpu, g_context);
5238 }
5239
kvm_init_mmu(struct kvm_vcpu * vcpu)5240 void kvm_init_mmu(struct kvm_vcpu *vcpu)
5241 {
5242 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
5243 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5244
5245 if (mmu_is_nested(vcpu))
5246 init_kvm_nested_mmu(vcpu, cpu_role);
5247 else if (tdp_enabled)
5248 init_kvm_tdp_mmu(vcpu, cpu_role);
5249 else
5250 init_kvm_softmmu(vcpu, cpu_role);
5251 }
5252 EXPORT_SYMBOL_GPL(kvm_init_mmu);
5253
kvm_mmu_after_set_cpuid(struct kvm_vcpu * vcpu)5254 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu)
5255 {
5256 /*
5257 * Invalidate all MMU roles to force them to reinitialize as CPUID
5258 * information is factored into reserved bit calculations.
5259 *
5260 * Correctly handling multiple vCPU models with respect to paging and
5261 * physical address properties) in a single VM would require tracking
5262 * all relevant CPUID information in kvm_mmu_page_role. That is very
5263 * undesirable as it would increase the memory requirements for
5264 * gfn_track (see struct kvm_mmu_page_role comments). For now that
5265 * problem is swept under the rug; KVM's CPUID API is horrific and
5266 * it's all but impossible to solve it without introducing a new API.
5267 */
5268 vcpu->arch.root_mmu.root_role.word = 0;
5269 vcpu->arch.guest_mmu.root_role.word = 0;
5270 vcpu->arch.nested_mmu.root_role.word = 0;
5271 vcpu->arch.root_mmu.cpu_role.ext.valid = 0;
5272 vcpu->arch.guest_mmu.cpu_role.ext.valid = 0;
5273 vcpu->arch.nested_mmu.cpu_role.ext.valid = 0;
5274 kvm_mmu_reset_context(vcpu);
5275
5276 /*
5277 * Changing guest CPUID after KVM_RUN is forbidden, see the comment in
5278 * kvm_arch_vcpu_ioctl().
5279 */
5280 KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm);
5281 }
5282
kvm_mmu_reset_context(struct kvm_vcpu * vcpu)5283 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
5284 {
5285 kvm_mmu_unload(vcpu);
5286 kvm_init_mmu(vcpu);
5287 }
5288 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
5289
kvm_mmu_load(struct kvm_vcpu * vcpu)5290 int kvm_mmu_load(struct kvm_vcpu *vcpu)
5291 {
5292 int r;
5293
5294 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->root_role.direct);
5295 if (r)
5296 goto out;
5297 r = mmu_alloc_special_roots(vcpu);
5298 if (r)
5299 goto out;
5300 if (vcpu->arch.mmu->root_role.direct)
5301 r = mmu_alloc_direct_roots(vcpu);
5302 else
5303 r = mmu_alloc_shadow_roots(vcpu);
5304 if (r)
5305 goto out;
5306
5307 kvm_mmu_sync_roots(vcpu);
5308
5309 kvm_mmu_load_pgd(vcpu);
5310
5311 /*
5312 * Flush any TLB entries for the new root, the provenance of the root
5313 * is unknown. Even if KVM ensures there are no stale TLB entries
5314 * for a freed root, in theory another hypervisor could have left
5315 * stale entries. Flushing on alloc also allows KVM to skip the TLB
5316 * flush when freeing a root (see kvm_tdp_mmu_put_root()).
5317 */
5318 static_call(kvm_x86_flush_tlb_current)(vcpu);
5319 out:
5320 return r;
5321 }
5322
kvm_mmu_unload(struct kvm_vcpu * vcpu)5323 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
5324 {
5325 struct kvm *kvm = vcpu->kvm;
5326
5327 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL);
5328 WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));
5329 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL);
5330 WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));
5331 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
5332 }
5333
is_obsolete_root(struct kvm * kvm,hpa_t root_hpa)5334 static bool is_obsolete_root(struct kvm *kvm, hpa_t root_hpa)
5335 {
5336 struct kvm_mmu_page *sp;
5337
5338 if (!VALID_PAGE(root_hpa))
5339 return false;
5340
5341 /*
5342 * When freeing obsolete roots, treat roots as obsolete if they don't
5343 * have an associated shadow page. This does mean KVM will get false
5344 * positives and free roots that don't strictly need to be freed, but
5345 * such false positives are relatively rare:
5346 *
5347 * (a) only PAE paging and nested NPT has roots without shadow pages
5348 * (b) remote reloads due to a memslot update obsoletes _all_ roots
5349 * (c) KVM doesn't track previous roots for PAE paging, and the guest
5350 * is unlikely to zap an in-use PGD.
5351 */
5352 sp = to_shadow_page(root_hpa);
5353 return !sp || is_obsolete_sp(kvm, sp);
5354 }
5355
__kvm_mmu_free_obsolete_roots(struct kvm * kvm,struct kvm_mmu * mmu)5356 static void __kvm_mmu_free_obsolete_roots(struct kvm *kvm, struct kvm_mmu *mmu)
5357 {
5358 unsigned long roots_to_free = 0;
5359 int i;
5360
5361 if (is_obsolete_root(kvm, mmu->root.hpa))
5362 roots_to_free |= KVM_MMU_ROOT_CURRENT;
5363
5364 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5365 if (is_obsolete_root(kvm, mmu->prev_roots[i].hpa))
5366 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
5367 }
5368
5369 if (roots_to_free)
5370 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
5371 }
5372
kvm_mmu_free_obsolete_roots(struct kvm_vcpu * vcpu)5373 void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)
5374 {
5375 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu);
5376 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu);
5377 }
5378
mmu_pte_write_fetch_gpte(struct kvm_vcpu * vcpu,gpa_t * gpa,int * bytes)5379 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
5380 int *bytes)
5381 {
5382 u64 gentry = 0;
5383 int r;
5384
5385 /*
5386 * Assume that the pte write on a page table of the same type
5387 * as the current vcpu paging mode since we update the sptes only
5388 * when they have the same mode.
5389 */
5390 if (is_pae(vcpu) && *bytes == 4) {
5391 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5392 *gpa &= ~(gpa_t)7;
5393 *bytes = 8;
5394 }
5395
5396 if (*bytes == 4 || *bytes == 8) {
5397 r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes);
5398 if (r)
5399 gentry = 0;
5400 }
5401
5402 return gentry;
5403 }
5404
5405 /*
5406 * If we're seeing too many writes to a page, it may no longer be a page table,
5407 * or we may be forking, in which case it is better to unmap the page.
5408 */
detect_write_flooding(struct kvm_mmu_page * sp)5409 static bool detect_write_flooding(struct kvm_mmu_page *sp)
5410 {
5411 /*
5412 * Skip write-flooding detected for the sp whose level is 1, because
5413 * it can become unsync, then the guest page is not write-protected.
5414 */
5415 if (sp->role.level == PG_LEVEL_4K)
5416 return false;
5417
5418 atomic_inc(&sp->write_flooding_count);
5419 return atomic_read(&sp->write_flooding_count) >= 3;
5420 }
5421
5422 /*
5423 * Misaligned accesses are too much trouble to fix up; also, they usually
5424 * indicate a page is not used as a page table.
5425 */
detect_write_misaligned(struct kvm_mmu_page * sp,gpa_t gpa,int bytes)5426 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
5427 int bytes)
5428 {
5429 unsigned offset, pte_size, misaligned;
5430
5431 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
5432 gpa, bytes, sp->role.word);
5433
5434 offset = offset_in_page(gpa);
5435 pte_size = sp->role.has_4_byte_gpte ? 4 : 8;
5436
5437 /*
5438 * Sometimes, the OS only writes the last one bytes to update status
5439 * bits, for example, in linux, andb instruction is used in clear_bit().
5440 */
5441 if (!(offset & (pte_size - 1)) && bytes == 1)
5442 return false;
5443
5444 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
5445 misaligned |= bytes < 4;
5446
5447 return misaligned;
5448 }
5449
get_written_sptes(struct kvm_mmu_page * sp,gpa_t gpa,int * nspte)5450 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
5451 {
5452 unsigned page_offset, quadrant;
5453 u64 *spte;
5454 int level;
5455
5456 page_offset = offset_in_page(gpa);
5457 level = sp->role.level;
5458 *nspte = 1;
5459 if (sp->role.has_4_byte_gpte) {
5460 page_offset <<= 1; /* 32->64 */
5461 /*
5462 * A 32-bit pde maps 4MB while the shadow pdes map
5463 * only 2MB. So we need to double the offset again
5464 * and zap two pdes instead of one.
5465 */
5466 if (level == PT32_ROOT_LEVEL) {
5467 page_offset &= ~7; /* kill rounding error */
5468 page_offset <<= 1;
5469 *nspte = 2;
5470 }
5471 quadrant = page_offset >> PAGE_SHIFT;
5472 page_offset &= ~PAGE_MASK;
5473 if (quadrant != sp->role.quadrant)
5474 return NULL;
5475 }
5476
5477 spte = &sp->spt[page_offset / sizeof(*spte)];
5478 return spte;
5479 }
5480
kvm_mmu_pte_write(struct kvm_vcpu * vcpu,gpa_t gpa,const u8 * new,int bytes,struct kvm_page_track_notifier_node * node)5481 static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
5482 const u8 *new, int bytes,
5483 struct kvm_page_track_notifier_node *node)
5484 {
5485 gfn_t gfn = gpa >> PAGE_SHIFT;
5486 struct kvm_mmu_page *sp;
5487 LIST_HEAD(invalid_list);
5488 u64 entry, gentry, *spte;
5489 int npte;
5490 bool flush = false;
5491
5492 /*
5493 * If we don't have indirect shadow pages, it means no page is
5494 * write-protected, so we can exit simply.
5495 */
5496 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
5497 return;
5498
5499 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
5500
5501 write_lock(&vcpu->kvm->mmu_lock);
5502
5503 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes);
5504
5505 ++vcpu->kvm->stat.mmu_pte_write;
5506
5507 for_each_gfn_valid_sp_with_gptes(vcpu->kvm, sp, gfn) {
5508 if (detect_write_misaligned(sp, gpa, bytes) ||
5509 detect_write_flooding(sp)) {
5510 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
5511 ++vcpu->kvm->stat.mmu_flooded;
5512 continue;
5513 }
5514
5515 spte = get_written_sptes(sp, gpa, &npte);
5516 if (!spte)
5517 continue;
5518
5519 while (npte--) {
5520 entry = *spte;
5521 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL);
5522 if (gentry && sp->role.level != PG_LEVEL_4K)
5523 ++vcpu->kvm->stat.mmu_pde_zapped;
5524 if (is_shadow_present_pte(entry))
5525 flush = true;
5526 ++spte;
5527 }
5528 }
5529 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
5530 write_unlock(&vcpu->kvm->mmu_lock);
5531 }
5532
kvm_mmu_page_fault(struct kvm_vcpu * vcpu,gpa_t cr2_or_gpa,u64 error_code,void * insn,int insn_len)5533 int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
5534 void *insn, int insn_len)
5535 {
5536 int r, emulation_type = EMULTYPE_PF;
5537 bool direct = vcpu->arch.mmu->root_role.direct;
5538
5539 if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))
5540 return RET_PF_RETRY;
5541
5542 r = RET_PF_INVALID;
5543 if (unlikely(error_code & PFERR_RSVD_MASK)) {
5544 r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct);
5545 if (r == RET_PF_EMULATE)
5546 goto emulate;
5547 }
5548
5549 if (r == RET_PF_INVALID) {
5550 r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa,
5551 lower_32_bits(error_code), false);
5552 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm))
5553 return -EIO;
5554 }
5555
5556 if (r < 0)
5557 return r;
5558 if (r != RET_PF_EMULATE)
5559 return 1;
5560
5561 /*
5562 * Before emulating the instruction, check if the error code
5563 * was due to a RO violation while translating the guest page.
5564 * This can occur when using nested virtualization with nested
5565 * paging in both guests. If true, we simply unprotect the page
5566 * and resume the guest.
5567 */
5568 if (vcpu->arch.mmu->root_role.direct &&
5569 (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) {
5570 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa));
5571 return 1;
5572 }
5573
5574 /*
5575 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5576 * optimistically try to just unprotect the page and let the processor
5577 * re-execute the instruction that caused the page fault. Do not allow
5578 * retrying MMIO emulation, as it's not only pointless but could also
5579 * cause us to enter an infinite loop because the processor will keep
5580 * faulting on the non-existent MMIO address. Retrying an instruction
5581 * from a nested guest is also pointless and dangerous as we are only
5582 * explicitly shadowing L1's page tables, i.e. unprotecting something
5583 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5584 */
5585 if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu))
5586 emulation_type |= EMULTYPE_ALLOW_RETRY_PF;
5587 emulate:
5588 return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn,
5589 insn_len);
5590 }
5591 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
5592
kvm_mmu_invalidate_gva(struct kvm_vcpu * vcpu,struct kvm_mmu * mmu,gva_t gva,hpa_t root_hpa)5593 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5594 gva_t gva, hpa_t root_hpa)
5595 {
5596 int i;
5597
5598 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5599 if (mmu != &vcpu->arch.guest_mmu) {
5600 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5601 if (is_noncanonical_address(gva, vcpu))
5602 return;
5603
5604 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5605 }
5606
5607 if (!mmu->invlpg)
5608 return;
5609
5610 if (root_hpa == INVALID_PAGE) {
5611 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5612
5613 /*
5614 * INVLPG is required to invalidate any global mappings for the VA,
5615 * irrespective of PCID. Since it would take us roughly similar amount
5616 * of work to determine whether any of the prev_root mappings of the VA
5617 * is marked global, or to just sync it blindly, so we might as well
5618 * just always sync it.
5619 *
5620 * Mappings not reachable via the current cr3 or the prev_roots will be
5621 * synced when switching to that cr3, so nothing needs to be done here
5622 * for them.
5623 */
5624 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5625 if (VALID_PAGE(mmu->prev_roots[i].hpa))
5626 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5627 } else {
5628 mmu->invlpg(vcpu, gva, root_hpa);
5629 }
5630 }
5631
kvm_mmu_invlpg(struct kvm_vcpu * vcpu,gva_t gva)5632 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
5633 {
5634 kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE);
5635 ++vcpu->stat.invlpg;
5636 }
5637 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
5638
5639
kvm_mmu_invpcid_gva(struct kvm_vcpu * vcpu,gva_t gva,unsigned long pcid)5640 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
5641 {
5642 struct kvm_mmu *mmu = vcpu->arch.mmu;
5643 bool tlb_flush = false;
5644 uint i;
5645
5646 if (pcid == kvm_get_active_pcid(vcpu)) {
5647 if (mmu->invlpg)
5648 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5649 tlb_flush = true;
5650 }
5651
5652 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5653 if (VALID_PAGE(mmu->prev_roots[i].hpa) &&
5654 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) {
5655 if (mmu->invlpg)
5656 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5657 tlb_flush = true;
5658 }
5659 }
5660
5661 if (tlb_flush)
5662 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5663
5664 ++vcpu->stat.invlpg;
5665
5666 /*
5667 * Mappings not reachable via the current cr3 or the prev_roots will be
5668 * synced when switching to that cr3, so nothing needs to be done here
5669 * for them.
5670 */
5671 }
5672
kvm_configure_mmu(bool enable_tdp,int tdp_forced_root_level,int tdp_max_root_level,int tdp_huge_page_level)5673 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
5674 int tdp_max_root_level, int tdp_huge_page_level)
5675 {
5676 tdp_enabled = enable_tdp;
5677 tdp_root_level = tdp_forced_root_level;
5678 max_tdp_level = tdp_max_root_level;
5679
5680 /*
5681 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5682 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5683 * the kernel is not. But, KVM never creates a page size greater than
5684 * what is used by the kernel for any given HVA, i.e. the kernel's
5685 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5686 */
5687 if (tdp_enabled)
5688 max_huge_page_level = tdp_huge_page_level;
5689 else if (boot_cpu_has(X86_FEATURE_GBPAGES))
5690 max_huge_page_level = PG_LEVEL_1G;
5691 else
5692 max_huge_page_level = PG_LEVEL_2M;
5693 }
5694 EXPORT_SYMBOL_GPL(kvm_configure_mmu);
5695
5696 /* The return value indicates if tlb flush on all vcpus is needed. */
5697 typedef bool (*slot_level_handler) (struct kvm *kvm,
5698 struct kvm_rmap_head *rmap_head,
5699 const struct kvm_memory_slot *slot);
5700
5701 /* The caller should hold mmu-lock before calling this function. */
5702 static __always_inline bool
slot_handle_level_range(struct kvm * kvm,const struct kvm_memory_slot * memslot,slot_level_handler fn,int start_level,int end_level,gfn_t start_gfn,gfn_t end_gfn,bool flush_on_yield,bool flush)5703 slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5704 slot_level_handler fn, int start_level, int end_level,
5705 gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield,
5706 bool flush)
5707 {
5708 struct slot_rmap_walk_iterator iterator;
5709
5710 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
5711 end_gfn, &iterator) {
5712 if (iterator.rmap)
5713 flush |= fn(kvm, iterator.rmap, memslot);
5714
5715 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
5716 if (flush && flush_on_yield) {
5717 kvm_flush_remote_tlbs_with_address(kvm,
5718 start_gfn,
5719 iterator.gfn - start_gfn + 1);
5720 flush = false;
5721 }
5722 cond_resched_rwlock_write(&kvm->mmu_lock);
5723 }
5724 }
5725
5726 return flush;
5727 }
5728
5729 static __always_inline bool
slot_handle_level(struct kvm * kvm,const struct kvm_memory_slot * memslot,slot_level_handler fn,int start_level,int end_level,bool flush_on_yield)5730 slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5731 slot_level_handler fn, int start_level, int end_level,
5732 bool flush_on_yield)
5733 {
5734 return slot_handle_level_range(kvm, memslot, fn, start_level,
5735 end_level, memslot->base_gfn,
5736 memslot->base_gfn + memslot->npages - 1,
5737 flush_on_yield, false);
5738 }
5739
5740 static __always_inline bool
slot_handle_level_4k(struct kvm * kvm,const struct kvm_memory_slot * memslot,slot_level_handler fn,bool flush_on_yield)5741 slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5742 slot_level_handler fn, bool flush_on_yield)
5743 {
5744 return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K,
5745 PG_LEVEL_4K, flush_on_yield);
5746 }
5747
free_mmu_pages(struct kvm_mmu * mmu)5748 static void free_mmu_pages(struct kvm_mmu *mmu)
5749 {
5750 if (!tdp_enabled && mmu->pae_root)
5751 set_memory_encrypted((unsigned long)mmu->pae_root, 1);
5752 free_page((unsigned long)mmu->pae_root);
5753 free_page((unsigned long)mmu->pml4_root);
5754 free_page((unsigned long)mmu->pml5_root);
5755 }
5756
__kvm_mmu_create(struct kvm_vcpu * vcpu,struct kvm_mmu * mmu)5757 static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
5758 {
5759 struct page *page;
5760 int i;
5761
5762 mmu->root.hpa = INVALID_PAGE;
5763 mmu->root.pgd = 0;
5764 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5765 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID;
5766
5767 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */
5768 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu)
5769 return 0;
5770
5771 /*
5772 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5773 * while the PDP table is a per-vCPU construct that's allocated at MMU
5774 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5775 * x86_64. Therefore we need to allocate the PDP table in the first
5776 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
5777 * generally doesn't use PAE paging and can skip allocating the PDP
5778 * table. The main exception, handled here, is SVM's 32-bit NPT. The
5779 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
5780 * KVM; that horror is handled on-demand by mmu_alloc_special_roots().
5781 */
5782 if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
5783 return 0;
5784
5785 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
5786 if (!page)
5787 return -ENOMEM;
5788
5789 mmu->pae_root = page_address(page);
5790
5791 /*
5792 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
5793 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
5794 * that KVM's writes and the CPU's reads get along. Note, this is
5795 * only necessary when using shadow paging, as 64-bit NPT can get at
5796 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
5797 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
5798 */
5799 if (!tdp_enabled)
5800 set_memory_decrypted((unsigned long)mmu->pae_root, 1);
5801 else
5802 WARN_ON_ONCE(shadow_me_value);
5803
5804 for (i = 0; i < 4; ++i)
5805 mmu->pae_root[i] = INVALID_PAE_ROOT;
5806
5807 return 0;
5808 }
5809
kvm_mmu_create(struct kvm_vcpu * vcpu)5810 int kvm_mmu_create(struct kvm_vcpu *vcpu)
5811 {
5812 int ret;
5813
5814 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache;
5815 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO;
5816
5817 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache;
5818 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO;
5819
5820 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
5821
5822 vcpu->arch.mmu = &vcpu->arch.root_mmu;
5823 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
5824
5825 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu);
5826 if (ret)
5827 return ret;
5828
5829 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu);
5830 if (ret)
5831 goto fail_allocate_root;
5832
5833 return ret;
5834 fail_allocate_root:
5835 free_mmu_pages(&vcpu->arch.guest_mmu);
5836 return ret;
5837 }
5838
5839 #define BATCH_ZAP_PAGES 10
kvm_zap_obsolete_pages(struct kvm * kvm)5840 static void kvm_zap_obsolete_pages(struct kvm *kvm)
5841 {
5842 struct kvm_mmu_page *sp, *node;
5843 int nr_zapped, batch = 0;
5844 bool unstable;
5845
5846 restart:
5847 list_for_each_entry_safe_reverse(sp, node,
5848 &kvm->arch.active_mmu_pages, link) {
5849 /*
5850 * No obsolete valid page exists before a newly created page
5851 * since active_mmu_pages is a FIFO list.
5852 */
5853 if (!is_obsolete_sp(kvm, sp))
5854 break;
5855
5856 /*
5857 * Invalid pages should never land back on the list of active
5858 * pages. Skip the bogus page, otherwise we'll get stuck in an
5859 * infinite loop if the page gets put back on the list (again).
5860 */
5861 if (WARN_ON(sp->role.invalid))
5862 continue;
5863
5864 /*
5865 * No need to flush the TLB since we're only zapping shadow
5866 * pages with an obsolete generation number and all vCPUS have
5867 * loaded a new root, i.e. the shadow pages being zapped cannot
5868 * be in active use by the guest.
5869 */
5870 if (batch >= BATCH_ZAP_PAGES &&
5871 cond_resched_rwlock_write(&kvm->mmu_lock)) {
5872 batch = 0;
5873 goto restart;
5874 }
5875
5876 unstable = __kvm_mmu_prepare_zap_page(kvm, sp,
5877 &kvm->arch.zapped_obsolete_pages, &nr_zapped);
5878 batch += nr_zapped;
5879
5880 if (unstable)
5881 goto restart;
5882 }
5883
5884 /*
5885 * Kick all vCPUs (via remote TLB flush) before freeing the page tables
5886 * to ensure KVM is not in the middle of a lockless shadow page table
5887 * walk, which may reference the pages. The remote TLB flush itself is
5888 * not required and is simply a convenient way to kick vCPUs as needed.
5889 * KVM performs a local TLB flush when allocating a new root (see
5890 * kvm_mmu_load()), and the reload in the caller ensure no vCPUs are
5891 * running with an obsolete MMU.
5892 */
5893 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
5894 }
5895
5896 /*
5897 * Fast invalidate all shadow pages and use lock-break technique
5898 * to zap obsolete pages.
5899 *
5900 * It's required when memslot is being deleted or VM is being
5901 * destroyed, in these cases, we should ensure that KVM MMU does
5902 * not use any resource of the being-deleted slot or all slots
5903 * after calling the function.
5904 */
kvm_mmu_zap_all_fast(struct kvm * kvm)5905 static void kvm_mmu_zap_all_fast(struct kvm *kvm)
5906 {
5907 lockdep_assert_held(&kvm->slots_lock);
5908
5909 write_lock(&kvm->mmu_lock);
5910 trace_kvm_mmu_zap_all_fast(kvm);
5911
5912 /*
5913 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
5914 * held for the entire duration of zapping obsolete pages, it's
5915 * impossible for there to be multiple invalid generations associated
5916 * with *valid* shadow pages at any given time, i.e. there is exactly
5917 * one valid generation and (at most) one invalid generation.
5918 */
5919 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1;
5920
5921 /*
5922 * In order to ensure all vCPUs drop their soon-to-be invalid roots,
5923 * invalidating TDP MMU roots must be done while holding mmu_lock for
5924 * write and in the same critical section as making the reload request,
5925 * e.g. before kvm_zap_obsolete_pages() could drop mmu_lock and yield.
5926 */
5927 if (is_tdp_mmu_enabled(kvm))
5928 kvm_tdp_mmu_invalidate_all_roots(kvm);
5929
5930 /*
5931 * Notify all vcpus to reload its shadow page table and flush TLB.
5932 * Then all vcpus will switch to new shadow page table with the new
5933 * mmu_valid_gen.
5934 *
5935 * Note: we need to do this under the protection of mmu_lock,
5936 * otherwise, vcpu would purge shadow page but miss tlb flush.
5937 */
5938 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
5939
5940 kvm_zap_obsolete_pages(kvm);
5941
5942 write_unlock(&kvm->mmu_lock);
5943
5944 /*
5945 * Zap the invalidated TDP MMU roots, all SPTEs must be dropped before
5946 * returning to the caller, e.g. if the zap is in response to a memslot
5947 * deletion, mmu_notifier callbacks will be unable to reach the SPTEs
5948 * associated with the deleted memslot once the update completes, and
5949 * Deferring the zap until the final reference to the root is put would
5950 * lead to use-after-free.
5951 */
5952 if (is_tdp_mmu_enabled(kvm))
5953 kvm_tdp_mmu_zap_invalidated_roots(kvm);
5954 }
5955
kvm_has_zapped_obsolete_pages(struct kvm * kvm)5956 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
5957 {
5958 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
5959 }
5960
kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm * kvm,struct kvm_memory_slot * slot,struct kvm_page_track_notifier_node * node)5961 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,
5962 struct kvm_memory_slot *slot,
5963 struct kvm_page_track_notifier_node *node)
5964 {
5965 kvm_mmu_zap_all_fast(kvm);
5966 }
5967
kvm_mmu_init_vm(struct kvm * kvm)5968 int kvm_mmu_init_vm(struct kvm *kvm)
5969 {
5970 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5971 int r;
5972
5973 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5974 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
5975 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
5976 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
5977
5978 r = kvm_mmu_init_tdp_mmu(kvm);
5979 if (r < 0)
5980 return r;
5981
5982 node->track_write = kvm_mmu_pte_write;
5983 node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot;
5984 kvm_page_track_register_notifier(kvm, node);
5985
5986 kvm->arch.split_page_header_cache.kmem_cache = mmu_page_header_cache;
5987 kvm->arch.split_page_header_cache.gfp_zero = __GFP_ZERO;
5988
5989 kvm->arch.split_shadow_page_cache.gfp_zero = __GFP_ZERO;
5990
5991 kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache;
5992 kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO;
5993
5994 return 0;
5995 }
5996
mmu_free_vm_memory_caches(struct kvm * kvm)5997 static void mmu_free_vm_memory_caches(struct kvm *kvm)
5998 {
5999 kvm_mmu_free_memory_cache(&kvm->arch.split_desc_cache);
6000 kvm_mmu_free_memory_cache(&kvm->arch.split_page_header_cache);
6001 kvm_mmu_free_memory_cache(&kvm->arch.split_shadow_page_cache);
6002 }
6003
kvm_mmu_uninit_vm(struct kvm * kvm)6004 void kvm_mmu_uninit_vm(struct kvm *kvm)
6005 {
6006 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
6007
6008 kvm_page_track_unregister_notifier(kvm, node);
6009
6010 kvm_mmu_uninit_tdp_mmu(kvm);
6011
6012 mmu_free_vm_memory_caches(kvm);
6013 }
6014
kvm_rmap_zap_gfn_range(struct kvm * kvm,gfn_t gfn_start,gfn_t gfn_end)6015 static bool kvm_rmap_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6016 {
6017 const struct kvm_memory_slot *memslot;
6018 struct kvm_memslots *slots;
6019 struct kvm_memslot_iter iter;
6020 bool flush = false;
6021 gfn_t start, end;
6022 int i;
6023
6024 if (!kvm_memslots_have_rmaps(kvm))
6025 return flush;
6026
6027 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
6028 slots = __kvm_memslots(kvm, i);
6029
6030 kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) {
6031 memslot = iter.slot;
6032 start = max(gfn_start, memslot->base_gfn);
6033 end = min(gfn_end, memslot->base_gfn + memslot->npages);
6034 if (WARN_ON_ONCE(start >= end))
6035 continue;
6036
6037 flush = slot_handle_level_range(kvm, memslot, __kvm_zap_rmap,
6038 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
6039 start, end - 1, true, flush);
6040 }
6041 }
6042
6043 return flush;
6044 }
6045
6046 /*
6047 * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end
6048 * (not including it)
6049 */
kvm_zap_gfn_range(struct kvm * kvm,gfn_t gfn_start,gfn_t gfn_end)6050 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6051 {
6052 bool flush;
6053 int i;
6054
6055 if (WARN_ON_ONCE(gfn_end <= gfn_start))
6056 return;
6057
6058 write_lock(&kvm->mmu_lock);
6059
6060 kvm_mmu_invalidate_begin(kvm, 0, -1ul);
6061
6062 flush = kvm_rmap_zap_gfn_range(kvm, gfn_start, gfn_end);
6063
6064 if (is_tdp_mmu_enabled(kvm)) {
6065 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
6066 flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
6067 gfn_end, true, flush);
6068 }
6069
6070 if (flush)
6071 kvm_flush_remote_tlbs_with_address(kvm, gfn_start,
6072 gfn_end - gfn_start);
6073
6074 kvm_mmu_invalidate_end(kvm, 0, -1ul);
6075
6076 write_unlock(&kvm->mmu_lock);
6077 }
6078
slot_rmap_write_protect(struct kvm * kvm,struct kvm_rmap_head * rmap_head,const struct kvm_memory_slot * slot)6079 static bool slot_rmap_write_protect(struct kvm *kvm,
6080 struct kvm_rmap_head *rmap_head,
6081 const struct kvm_memory_slot *slot)
6082 {
6083 return rmap_write_protect(rmap_head, false);
6084 }
6085
kvm_mmu_slot_remove_write_access(struct kvm * kvm,const struct kvm_memory_slot * memslot,int start_level)6086 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
6087 const struct kvm_memory_slot *memslot,
6088 int start_level)
6089 {
6090 if (kvm_memslots_have_rmaps(kvm)) {
6091 write_lock(&kvm->mmu_lock);
6092 slot_handle_level(kvm, memslot, slot_rmap_write_protect,
6093 start_level, KVM_MAX_HUGEPAGE_LEVEL, false);
6094 write_unlock(&kvm->mmu_lock);
6095 }
6096
6097 if (is_tdp_mmu_enabled(kvm)) {
6098 read_lock(&kvm->mmu_lock);
6099 kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level);
6100 read_unlock(&kvm->mmu_lock);
6101 }
6102 }
6103
need_topup(struct kvm_mmu_memory_cache * cache,int min)6104 static inline bool need_topup(struct kvm_mmu_memory_cache *cache, int min)
6105 {
6106 return kvm_mmu_memory_cache_nr_free_objects(cache) < min;
6107 }
6108
need_topup_split_caches_or_resched(struct kvm * kvm)6109 static bool need_topup_split_caches_or_resched(struct kvm *kvm)
6110 {
6111 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock))
6112 return true;
6113
6114 /*
6115 * In the worst case, SPLIT_DESC_CACHE_MIN_NR_OBJECTS descriptors are needed
6116 * to split a single huge page. Calculating how many are actually needed
6117 * is possible but not worth the complexity.
6118 */
6119 return need_topup(&kvm->arch.split_desc_cache, SPLIT_DESC_CACHE_MIN_NR_OBJECTS) ||
6120 need_topup(&kvm->arch.split_page_header_cache, 1) ||
6121 need_topup(&kvm->arch.split_shadow_page_cache, 1);
6122 }
6123
topup_split_caches(struct kvm * kvm)6124 static int topup_split_caches(struct kvm *kvm)
6125 {
6126 /*
6127 * Allocating rmap list entries when splitting huge pages for nested
6128 * MMUs is uncommon as KVM needs to use a list if and only if there is
6129 * more than one rmap entry for a gfn, i.e. requires an L1 gfn to be
6130 * aliased by multiple L2 gfns and/or from multiple nested roots with
6131 * different roles. Aliasing gfns when using TDP is atypical for VMMs;
6132 * a few gfns are often aliased during boot, e.g. when remapping BIOS,
6133 * but aliasing rarely occurs post-boot or for many gfns. If there is
6134 * only one rmap entry, rmap->val points directly at that one entry and
6135 * doesn't need to allocate a list. Buffer the cache by the default
6136 * capacity so that KVM doesn't have to drop mmu_lock to topup if KVM
6137 * encounters an aliased gfn or two.
6138 */
6139 const int capacity = SPLIT_DESC_CACHE_MIN_NR_OBJECTS +
6140 KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE;
6141 int r;
6142
6143 lockdep_assert_held(&kvm->slots_lock);
6144
6145 r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache, capacity,
6146 SPLIT_DESC_CACHE_MIN_NR_OBJECTS);
6147 if (r)
6148 return r;
6149
6150 r = kvm_mmu_topup_memory_cache(&kvm->arch.split_page_header_cache, 1);
6151 if (r)
6152 return r;
6153
6154 return kvm_mmu_topup_memory_cache(&kvm->arch.split_shadow_page_cache, 1);
6155 }
6156
shadow_mmu_get_sp_for_split(struct kvm * kvm,u64 * huge_sptep)6157 static struct kvm_mmu_page *shadow_mmu_get_sp_for_split(struct kvm *kvm, u64 *huge_sptep)
6158 {
6159 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6160 struct shadow_page_caches caches = {};
6161 union kvm_mmu_page_role role;
6162 unsigned int access;
6163 gfn_t gfn;
6164
6165 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6166 access = kvm_mmu_page_get_access(huge_sp, spte_index(huge_sptep));
6167
6168 /*
6169 * Note, huge page splitting always uses direct shadow pages, regardless
6170 * of whether the huge page itself is mapped by a direct or indirect
6171 * shadow page, since the huge page region itself is being directly
6172 * mapped with smaller pages.
6173 */
6174 role = kvm_mmu_child_role(huge_sptep, /*direct=*/true, access);
6175
6176 /* Direct SPs do not require a shadowed_info_cache. */
6177 caches.page_header_cache = &kvm->arch.split_page_header_cache;
6178 caches.shadow_page_cache = &kvm->arch.split_shadow_page_cache;
6179
6180 /* Safe to pass NULL for vCPU since requesting a direct SP. */
6181 return __kvm_mmu_get_shadow_page(kvm, NULL, &caches, gfn, role);
6182 }
6183
shadow_mmu_split_huge_page(struct kvm * kvm,const struct kvm_memory_slot * slot,u64 * huge_sptep)6184 static void shadow_mmu_split_huge_page(struct kvm *kvm,
6185 const struct kvm_memory_slot *slot,
6186 u64 *huge_sptep)
6187
6188 {
6189 struct kvm_mmu_memory_cache *cache = &kvm->arch.split_desc_cache;
6190 u64 huge_spte = READ_ONCE(*huge_sptep);
6191 struct kvm_mmu_page *sp;
6192 bool flush = false;
6193 u64 *sptep, spte;
6194 gfn_t gfn;
6195 int index;
6196
6197 sp = shadow_mmu_get_sp_for_split(kvm, huge_sptep);
6198
6199 for (index = 0; index < SPTE_ENT_PER_PAGE; index++) {
6200 sptep = &sp->spt[index];
6201 gfn = kvm_mmu_page_get_gfn(sp, index);
6202
6203 /*
6204 * The SP may already have populated SPTEs, e.g. if this huge
6205 * page is aliased by multiple sptes with the same access
6206 * permissions. These entries are guaranteed to map the same
6207 * gfn-to-pfn translation since the SP is direct, so no need to
6208 * modify them.
6209 *
6210 * However, if a given SPTE points to a lower level page table,
6211 * that lower level page table may only be partially populated.
6212 * Installing such SPTEs would effectively unmap a potion of the
6213 * huge page. Unmapping guest memory always requires a TLB flush
6214 * since a subsequent operation on the unmapped regions would
6215 * fail to detect the need to flush.
6216 */
6217 if (is_shadow_present_pte(*sptep)) {
6218 flush |= !is_last_spte(*sptep, sp->role.level);
6219 continue;
6220 }
6221
6222 spte = make_huge_page_split_spte(kvm, huge_spte, sp->role, index);
6223 mmu_spte_set(sptep, spte);
6224 __rmap_add(kvm, cache, slot, sptep, gfn, sp->role.access);
6225 }
6226
6227 __link_shadow_page(kvm, cache, huge_sptep, sp, flush);
6228 }
6229
shadow_mmu_try_split_huge_page(struct kvm * kvm,const struct kvm_memory_slot * slot,u64 * huge_sptep)6230 static int shadow_mmu_try_split_huge_page(struct kvm *kvm,
6231 const struct kvm_memory_slot *slot,
6232 u64 *huge_sptep)
6233 {
6234 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6235 int level, r = 0;
6236 gfn_t gfn;
6237 u64 spte;
6238
6239 /* Grab information for the tracepoint before dropping the MMU lock. */
6240 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6241 level = huge_sp->role.level;
6242 spte = *huge_sptep;
6243
6244 if (kvm_mmu_available_pages(kvm) <= KVM_MIN_FREE_MMU_PAGES) {
6245 r = -ENOSPC;
6246 goto out;
6247 }
6248
6249 if (need_topup_split_caches_or_resched(kvm)) {
6250 write_unlock(&kvm->mmu_lock);
6251 cond_resched();
6252 /*
6253 * If the topup succeeds, return -EAGAIN to indicate that the
6254 * rmap iterator should be restarted because the MMU lock was
6255 * dropped.
6256 */
6257 r = topup_split_caches(kvm) ?: -EAGAIN;
6258 write_lock(&kvm->mmu_lock);
6259 goto out;
6260 }
6261
6262 shadow_mmu_split_huge_page(kvm, slot, huge_sptep);
6263
6264 out:
6265 trace_kvm_mmu_split_huge_page(gfn, spte, level, r);
6266 return r;
6267 }
6268
shadow_mmu_try_split_huge_pages(struct kvm * kvm,struct kvm_rmap_head * rmap_head,const struct kvm_memory_slot * slot)6269 static bool shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6270 struct kvm_rmap_head *rmap_head,
6271 const struct kvm_memory_slot *slot)
6272 {
6273 struct rmap_iterator iter;
6274 struct kvm_mmu_page *sp;
6275 u64 *huge_sptep;
6276 int r;
6277
6278 restart:
6279 for_each_rmap_spte(rmap_head, &iter, huge_sptep) {
6280 sp = sptep_to_sp(huge_sptep);
6281
6282 /* TDP MMU is enabled, so rmap only contains nested MMU SPs. */
6283 if (WARN_ON_ONCE(!sp->role.guest_mode))
6284 continue;
6285
6286 /* The rmaps should never contain non-leaf SPTEs. */
6287 if (WARN_ON_ONCE(!is_large_pte(*huge_sptep)))
6288 continue;
6289
6290 /* SPs with level >PG_LEVEL_4K should never by unsync. */
6291 if (WARN_ON_ONCE(sp->unsync))
6292 continue;
6293
6294 /* Don't bother splitting huge pages on invalid SPs. */
6295 if (sp->role.invalid)
6296 continue;
6297
6298 r = shadow_mmu_try_split_huge_page(kvm, slot, huge_sptep);
6299
6300 /*
6301 * The split succeeded or needs to be retried because the MMU
6302 * lock was dropped. Either way, restart the iterator to get it
6303 * back into a consistent state.
6304 */
6305 if (!r || r == -EAGAIN)
6306 goto restart;
6307
6308 /* The split failed and shouldn't be retried (e.g. -ENOMEM). */
6309 break;
6310 }
6311
6312 return false;
6313 }
6314
kvm_shadow_mmu_try_split_huge_pages(struct kvm * kvm,const struct kvm_memory_slot * slot,gfn_t start,gfn_t end,int target_level)6315 static void kvm_shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6316 const struct kvm_memory_slot *slot,
6317 gfn_t start, gfn_t end,
6318 int target_level)
6319 {
6320 int level;
6321
6322 /*
6323 * Split huge pages starting with KVM_MAX_HUGEPAGE_LEVEL and working
6324 * down to the target level. This ensures pages are recursively split
6325 * all the way to the target level. There's no need to split pages
6326 * already at the target level.
6327 */
6328 for (level = KVM_MAX_HUGEPAGE_LEVEL; level > target_level; level--) {
6329 slot_handle_level_range(kvm, slot, shadow_mmu_try_split_huge_pages,
6330 level, level, start, end - 1, true, false);
6331 }
6332 }
6333
6334 /* Must be called with the mmu_lock held in write-mode. */
kvm_mmu_try_split_huge_pages(struct kvm * kvm,const struct kvm_memory_slot * memslot,u64 start,u64 end,int target_level)6335 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
6336 const struct kvm_memory_slot *memslot,
6337 u64 start, u64 end,
6338 int target_level)
6339 {
6340 if (!is_tdp_mmu_enabled(kvm))
6341 return;
6342
6343 if (kvm_memslots_have_rmaps(kvm))
6344 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6345
6346 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, false);
6347
6348 /*
6349 * A TLB flush is unnecessary at this point for the same resons as in
6350 * kvm_mmu_slot_try_split_huge_pages().
6351 */
6352 }
6353
kvm_mmu_slot_try_split_huge_pages(struct kvm * kvm,const struct kvm_memory_slot * memslot,int target_level)6354 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
6355 const struct kvm_memory_slot *memslot,
6356 int target_level)
6357 {
6358 u64 start = memslot->base_gfn;
6359 u64 end = start + memslot->npages;
6360
6361 if (!is_tdp_mmu_enabled(kvm))
6362 return;
6363
6364 if (kvm_memslots_have_rmaps(kvm)) {
6365 write_lock(&kvm->mmu_lock);
6366 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6367 write_unlock(&kvm->mmu_lock);
6368 }
6369
6370 read_lock(&kvm->mmu_lock);
6371 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true);
6372 read_unlock(&kvm->mmu_lock);
6373
6374 /*
6375 * No TLB flush is necessary here. KVM will flush TLBs after
6376 * write-protecting and/or clearing dirty on the newly split SPTEs to
6377 * ensure that guest writes are reflected in the dirty log before the
6378 * ioctl to enable dirty logging on this memslot completes. Since the
6379 * split SPTEs retain the write and dirty bits of the huge SPTE, it is
6380 * safe for KVM to decide if a TLB flush is necessary based on the split
6381 * SPTEs.
6382 */
6383 }
6384
kvm_mmu_zap_collapsible_spte(struct kvm * kvm,struct kvm_rmap_head * rmap_head,const struct kvm_memory_slot * slot)6385 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
6386 struct kvm_rmap_head *rmap_head,
6387 const struct kvm_memory_slot *slot)
6388 {
6389 u64 *sptep;
6390 struct rmap_iterator iter;
6391 int need_tlb_flush = 0;
6392 struct kvm_mmu_page *sp;
6393
6394 restart:
6395 for_each_rmap_spte(rmap_head, &iter, sptep) {
6396 sp = sptep_to_sp(sptep);
6397
6398 /*
6399 * We cannot do huge page mapping for indirect shadow pages,
6400 * which are found on the last rmap (level = 1) when not using
6401 * tdp; such shadow pages are synced with the page table in
6402 * the guest, and the guest page table is using 4K page size
6403 * mapping if the indirect sp has level = 1.
6404 */
6405 if (sp->role.direct &&
6406 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn,
6407 PG_LEVEL_NUM)) {
6408 kvm_zap_one_rmap_spte(kvm, rmap_head, sptep);
6409
6410 if (kvm_available_flush_tlb_with_range())
6411 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
6412 KVM_PAGES_PER_HPAGE(sp->role.level));
6413 else
6414 need_tlb_flush = 1;
6415
6416 goto restart;
6417 }
6418 }
6419
6420 return need_tlb_flush;
6421 }
6422
kvm_rmap_zap_collapsible_sptes(struct kvm * kvm,const struct kvm_memory_slot * slot)6423 static void kvm_rmap_zap_collapsible_sptes(struct kvm *kvm,
6424 const struct kvm_memory_slot *slot)
6425 {
6426 /*
6427 * Note, use KVM_MAX_HUGEPAGE_LEVEL - 1 since there's no need to zap
6428 * pages that are already mapped at the maximum hugepage level.
6429 */
6430 if (slot_handle_level(kvm, slot, kvm_mmu_zap_collapsible_spte,
6431 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL - 1, true))
6432 kvm_arch_flush_remote_tlbs_memslot(kvm, slot);
6433 }
6434
kvm_mmu_zap_collapsible_sptes(struct kvm * kvm,const struct kvm_memory_slot * slot)6435 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
6436 const struct kvm_memory_slot *slot)
6437 {
6438 if (kvm_memslots_have_rmaps(kvm)) {
6439 write_lock(&kvm->mmu_lock);
6440 kvm_rmap_zap_collapsible_sptes(kvm, slot);
6441 write_unlock(&kvm->mmu_lock);
6442 }
6443
6444 if (is_tdp_mmu_enabled(kvm)) {
6445 read_lock(&kvm->mmu_lock);
6446 kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot);
6447 read_unlock(&kvm->mmu_lock);
6448 }
6449 }
6450
kvm_arch_flush_remote_tlbs_memslot(struct kvm * kvm,const struct kvm_memory_slot * memslot)6451 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,
6452 const struct kvm_memory_slot *memslot)
6453 {
6454 /*
6455 * All current use cases for flushing the TLBs for a specific memslot
6456 * related to dirty logging, and many do the TLB flush out of mmu_lock.
6457 * The interaction between the various operations on memslot must be
6458 * serialized by slots_locks to ensure the TLB flush from one operation
6459 * is observed by any other operation on the same memslot.
6460 */
6461 lockdep_assert_held(&kvm->slots_lock);
6462 kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn,
6463 memslot->npages);
6464 }
6465
kvm_mmu_slot_leaf_clear_dirty(struct kvm * kvm,const struct kvm_memory_slot * memslot)6466 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
6467 const struct kvm_memory_slot *memslot)
6468 {
6469 if (kvm_memslots_have_rmaps(kvm)) {
6470 write_lock(&kvm->mmu_lock);
6471 /*
6472 * Clear dirty bits only on 4k SPTEs since the legacy MMU only
6473 * support dirty logging at a 4k granularity.
6474 */
6475 slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false);
6476 write_unlock(&kvm->mmu_lock);
6477 }
6478
6479 if (is_tdp_mmu_enabled(kvm)) {
6480 read_lock(&kvm->mmu_lock);
6481 kvm_tdp_mmu_clear_dirty_slot(kvm, memslot);
6482 read_unlock(&kvm->mmu_lock);
6483 }
6484
6485 /*
6486 * The caller will flush the TLBs after this function returns.
6487 *
6488 * It's also safe to flush TLBs out of mmu lock here as currently this
6489 * function is only used for dirty logging, in which case flushing TLB
6490 * out of mmu lock also guarantees no dirty pages will be lost in
6491 * dirty_bitmap.
6492 */
6493 }
6494
kvm_mmu_zap_all(struct kvm * kvm)6495 void kvm_mmu_zap_all(struct kvm *kvm)
6496 {
6497 struct kvm_mmu_page *sp, *node;
6498 LIST_HEAD(invalid_list);
6499 int ign;
6500
6501 write_lock(&kvm->mmu_lock);
6502 restart:
6503 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
6504 if (WARN_ON(sp->role.invalid))
6505 continue;
6506 if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign))
6507 goto restart;
6508 if (cond_resched_rwlock_write(&kvm->mmu_lock))
6509 goto restart;
6510 }
6511
6512 kvm_mmu_commit_zap_page(kvm, &invalid_list);
6513
6514 if (is_tdp_mmu_enabled(kvm))
6515 kvm_tdp_mmu_zap_all(kvm);
6516
6517 write_unlock(&kvm->mmu_lock);
6518 }
6519
kvm_mmu_invalidate_mmio_sptes(struct kvm * kvm,u64 gen)6520 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen)
6521 {
6522 WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);
6523
6524 gen &= MMIO_SPTE_GEN_MASK;
6525
6526 /*
6527 * Generation numbers are incremented in multiples of the number of
6528 * address spaces in order to provide unique generations across all
6529 * address spaces. Strip what is effectively the address space
6530 * modifier prior to checking for a wrap of the MMIO generation so
6531 * that a wrap in any address space is detected.
6532 */
6533 gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1);
6534
6535 /*
6536 * The very rare case: if the MMIO generation number has wrapped,
6537 * zap all shadow pages.
6538 */
6539 if (unlikely(gen == 0)) {
6540 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
6541 kvm_mmu_zap_all_fast(kvm);
6542 }
6543 }
6544
6545 static unsigned long
mmu_shrink_scan(struct shrinker * shrink,struct shrink_control * sc)6546 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
6547 {
6548 struct kvm *kvm;
6549 int nr_to_scan = sc->nr_to_scan;
6550 unsigned long freed = 0;
6551
6552 mutex_lock(&kvm_lock);
6553
6554 list_for_each_entry(kvm, &vm_list, vm_list) {
6555 int idx;
6556 LIST_HEAD(invalid_list);
6557
6558 /*
6559 * Never scan more than sc->nr_to_scan VM instances.
6560 * Will not hit this condition practically since we do not try
6561 * to shrink more than one VM and it is very unlikely to see
6562 * !n_used_mmu_pages so many times.
6563 */
6564 if (!nr_to_scan--)
6565 break;
6566 /*
6567 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
6568 * here. We may skip a VM instance errorneosly, but we do not
6569 * want to shrink a VM that only started to populate its MMU
6570 * anyway.
6571 */
6572 if (!kvm->arch.n_used_mmu_pages &&
6573 !kvm_has_zapped_obsolete_pages(kvm))
6574 continue;
6575
6576 idx = srcu_read_lock(&kvm->srcu);
6577 write_lock(&kvm->mmu_lock);
6578
6579 if (kvm_has_zapped_obsolete_pages(kvm)) {
6580 kvm_mmu_commit_zap_page(kvm,
6581 &kvm->arch.zapped_obsolete_pages);
6582 goto unlock;
6583 }
6584
6585 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan);
6586
6587 unlock:
6588 write_unlock(&kvm->mmu_lock);
6589 srcu_read_unlock(&kvm->srcu, idx);
6590
6591 /*
6592 * unfair on small ones
6593 * per-vm shrinkers cry out
6594 * sadness comes quickly
6595 */
6596 list_move_tail(&kvm->vm_list, &vm_list);
6597 break;
6598 }
6599
6600 mutex_unlock(&kvm_lock);
6601 return freed;
6602 }
6603
6604 static unsigned long
mmu_shrink_count(struct shrinker * shrink,struct shrink_control * sc)6605 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
6606 {
6607 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
6608 }
6609
6610 static struct shrinker mmu_shrinker = {
6611 .count_objects = mmu_shrink_count,
6612 .scan_objects = mmu_shrink_scan,
6613 .seeks = DEFAULT_SEEKS * 10,
6614 };
6615
mmu_destroy_caches(void)6616 static void mmu_destroy_caches(void)
6617 {
6618 kmem_cache_destroy(pte_list_desc_cache);
6619 kmem_cache_destroy(mmu_page_header_cache);
6620 }
6621
get_nx_auto_mode(void)6622 static bool get_nx_auto_mode(void)
6623 {
6624 /* Return true when CPU has the bug, and mitigations are ON */
6625 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off();
6626 }
6627
__set_nx_huge_pages(bool val)6628 static void __set_nx_huge_pages(bool val)
6629 {
6630 nx_huge_pages = itlb_multihit_kvm_mitigation = val;
6631 }
6632
set_nx_huge_pages(const char * val,const struct kernel_param * kp)6633 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
6634 {
6635 bool old_val = nx_huge_pages;
6636 bool new_val;
6637
6638 /* In "auto" mode deploy workaround only if CPU has the bug. */
6639 if (sysfs_streq(val, "off"))
6640 new_val = 0;
6641 else if (sysfs_streq(val, "force"))
6642 new_val = 1;
6643 else if (sysfs_streq(val, "auto"))
6644 new_val = get_nx_auto_mode();
6645 else if (strtobool(val, &new_val) < 0)
6646 return -EINVAL;
6647
6648 __set_nx_huge_pages(new_val);
6649
6650 if (new_val != old_val) {
6651 struct kvm *kvm;
6652
6653 mutex_lock(&kvm_lock);
6654
6655 list_for_each_entry(kvm, &vm_list, vm_list) {
6656 mutex_lock(&kvm->slots_lock);
6657 kvm_mmu_zap_all_fast(kvm);
6658 mutex_unlock(&kvm->slots_lock);
6659
6660 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6661 }
6662 mutex_unlock(&kvm_lock);
6663 }
6664
6665 return 0;
6666 }
6667
6668 /*
6669 * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as
6670 * its default value of -1 is technically undefined behavior for a boolean.
6671 * Forward the module init call to SPTE code so that it too can handle module
6672 * params that need to be resolved/snapshot.
6673 */
kvm_mmu_x86_module_init(void)6674 void __init kvm_mmu_x86_module_init(void)
6675 {
6676 if (nx_huge_pages == -1)
6677 __set_nx_huge_pages(get_nx_auto_mode());
6678
6679 kvm_mmu_spte_module_init();
6680 }
6681
6682 /*
6683 * The bulk of the MMU initialization is deferred until the vendor module is
6684 * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need
6685 * to be reset when a potentially different vendor module is loaded.
6686 */
kvm_mmu_vendor_module_init(void)6687 int kvm_mmu_vendor_module_init(void)
6688 {
6689 int ret = -ENOMEM;
6690
6691 /*
6692 * MMU roles use union aliasing which is, generally speaking, an
6693 * undefined behavior. However, we supposedly know how compilers behave
6694 * and the current status quo is unlikely to change. Guardians below are
6695 * supposed to let us know if the assumption becomes false.
6696 */
6697 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32));
6698 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32));
6699 BUILD_BUG_ON(sizeof(union kvm_cpu_role) != sizeof(u64));
6700
6701 kvm_mmu_reset_all_pte_masks();
6702
6703 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
6704 sizeof(struct pte_list_desc),
6705 0, SLAB_ACCOUNT, NULL);
6706 if (!pte_list_desc_cache)
6707 goto out;
6708
6709 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
6710 sizeof(struct kvm_mmu_page),
6711 0, SLAB_ACCOUNT, NULL);
6712 if (!mmu_page_header_cache)
6713 goto out;
6714
6715 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
6716 goto out;
6717
6718 ret = register_shrinker(&mmu_shrinker, "x86-mmu");
6719 if (ret)
6720 goto out_shrinker;
6721
6722 return 0;
6723
6724 out_shrinker:
6725 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6726 out:
6727 mmu_destroy_caches();
6728 return ret;
6729 }
6730
kvm_mmu_destroy(struct kvm_vcpu * vcpu)6731 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
6732 {
6733 kvm_mmu_unload(vcpu);
6734 free_mmu_pages(&vcpu->arch.root_mmu);
6735 free_mmu_pages(&vcpu->arch.guest_mmu);
6736 mmu_free_memory_caches(vcpu);
6737 }
6738
kvm_mmu_vendor_module_exit(void)6739 void kvm_mmu_vendor_module_exit(void)
6740 {
6741 mmu_destroy_caches();
6742 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6743 unregister_shrinker(&mmu_shrinker);
6744 }
6745
6746 /*
6747 * Calculate the effective recovery period, accounting for '0' meaning "let KVM
6748 * select a halving time of 1 hour". Returns true if recovery is enabled.
6749 */
calc_nx_huge_pages_recovery_period(uint * period)6750 static bool calc_nx_huge_pages_recovery_period(uint *period)
6751 {
6752 /*
6753 * Use READ_ONCE to get the params, this may be called outside of the
6754 * param setters, e.g. by the kthread to compute its next timeout.
6755 */
6756 bool enabled = READ_ONCE(nx_huge_pages);
6757 uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6758
6759 if (!enabled || !ratio)
6760 return false;
6761
6762 *period = READ_ONCE(nx_huge_pages_recovery_period_ms);
6763 if (!*period) {
6764 /* Make sure the period is not less than one second. */
6765 ratio = min(ratio, 3600u);
6766 *period = 60 * 60 * 1000 / ratio;
6767 }
6768 return true;
6769 }
6770
set_nx_huge_pages_recovery_param(const char * val,const struct kernel_param * kp)6771 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp)
6772 {
6773 bool was_recovery_enabled, is_recovery_enabled;
6774 uint old_period, new_period;
6775 int err;
6776
6777 was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period);
6778
6779 err = param_set_uint(val, kp);
6780 if (err)
6781 return err;
6782
6783 is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period);
6784
6785 if (is_recovery_enabled &&
6786 (!was_recovery_enabled || old_period > new_period)) {
6787 struct kvm *kvm;
6788
6789 mutex_lock(&kvm_lock);
6790
6791 list_for_each_entry(kvm, &vm_list, vm_list)
6792 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6793
6794 mutex_unlock(&kvm_lock);
6795 }
6796
6797 return err;
6798 }
6799
kvm_recover_nx_lpages(struct kvm * kvm)6800 static void kvm_recover_nx_lpages(struct kvm *kvm)
6801 {
6802 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits;
6803 int rcu_idx;
6804 struct kvm_mmu_page *sp;
6805 unsigned int ratio;
6806 LIST_HEAD(invalid_list);
6807 bool flush = false;
6808 ulong to_zap;
6809
6810 rcu_idx = srcu_read_lock(&kvm->srcu);
6811 write_lock(&kvm->mmu_lock);
6812
6813 /*
6814 * Zapping TDP MMU shadow pages, including the remote TLB flush, must
6815 * be done under RCU protection, because the pages are freed via RCU
6816 * callback.
6817 */
6818 rcu_read_lock();
6819
6820 ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6821 to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0;
6822 for ( ; to_zap; --to_zap) {
6823 if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages))
6824 break;
6825
6826 /*
6827 * We use a separate list instead of just using active_mmu_pages
6828 * because the number of lpage_disallowed pages is expected to
6829 * be relatively small compared to the total.
6830 */
6831 sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages,
6832 struct kvm_mmu_page,
6833 lpage_disallowed_link);
6834 WARN_ON_ONCE(!sp->lpage_disallowed);
6835 if (is_tdp_mmu_page(sp)) {
6836 flush |= kvm_tdp_mmu_zap_sp(kvm, sp);
6837 } else {
6838 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
6839 WARN_ON_ONCE(sp->lpage_disallowed);
6840 }
6841
6842 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
6843 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6844 rcu_read_unlock();
6845
6846 cond_resched_rwlock_write(&kvm->mmu_lock);
6847 flush = false;
6848
6849 rcu_read_lock();
6850 }
6851 }
6852 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6853
6854 rcu_read_unlock();
6855
6856 write_unlock(&kvm->mmu_lock);
6857 srcu_read_unlock(&kvm->srcu, rcu_idx);
6858 }
6859
get_nx_lpage_recovery_timeout(u64 start_time)6860 static long get_nx_lpage_recovery_timeout(u64 start_time)
6861 {
6862 bool enabled;
6863 uint period;
6864
6865 enabled = calc_nx_huge_pages_recovery_period(&period);
6866
6867 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64()
6868 : MAX_SCHEDULE_TIMEOUT;
6869 }
6870
kvm_nx_lpage_recovery_worker(struct kvm * kvm,uintptr_t data)6871 static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data)
6872 {
6873 u64 start_time;
6874 long remaining_time;
6875
6876 while (true) {
6877 start_time = get_jiffies_64();
6878 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6879
6880 set_current_state(TASK_INTERRUPTIBLE);
6881 while (!kthread_should_stop() && remaining_time > 0) {
6882 schedule_timeout(remaining_time);
6883 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6884 set_current_state(TASK_INTERRUPTIBLE);
6885 }
6886
6887 set_current_state(TASK_RUNNING);
6888
6889 if (kthread_should_stop())
6890 return 0;
6891
6892 kvm_recover_nx_lpages(kvm);
6893 }
6894 }
6895
kvm_mmu_post_init_vm(struct kvm * kvm)6896 int kvm_mmu_post_init_vm(struct kvm *kvm)
6897 {
6898 int err;
6899
6900 err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0,
6901 "kvm-nx-lpage-recovery",
6902 &kvm->arch.nx_lpage_recovery_thread);
6903 if (!err)
6904 kthread_unpark(kvm->arch.nx_lpage_recovery_thread);
6905
6906 return err;
6907 }
6908
kvm_mmu_pre_destroy_vm(struct kvm * kvm)6909 void kvm_mmu_pre_destroy_vm(struct kvm *kvm)
6910 {
6911 if (kvm->arch.nx_lpage_recovery_thread)
6912 kthread_stop(kvm->arch.nx_lpage_recovery_thread);
6913 }
6914