1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5 #ifndef __IVPU_GEM_H__
6 #define __IVPU_GEM_H__
7
8 #include <drm/drm_gem.h>
9 #include <drm/drm_mm.h>
10
11 struct dma_buf;
12 struct ivpu_bo_ops;
13 struct ivpu_file_priv;
14
15 struct ivpu_bo {
16 struct drm_gem_object base;
17 const struct ivpu_bo_ops *ops;
18
19 struct ivpu_mmu_context *ctx;
20 struct list_head ctx_node;
21 struct drm_mm_node mm_node;
22
23 struct mutex lock; /* Protects: pages, sgt, mmu_mapped */
24 struct sg_table *sgt;
25 struct page **pages;
26 bool mmu_mapped;
27
28 void *kvaddr;
29 u64 vpu_addr;
30 u32 handle;
31 u32 flags;
32 uintptr_t user_ptr;
33 u32 job_status;
34 };
35
36 enum ivpu_bo_type {
37 IVPU_BO_TYPE_SHMEM = 1,
38 IVPU_BO_TYPE_INTERNAL,
39 IVPU_BO_TYPE_PRIME,
40 };
41
42 struct ivpu_bo_ops {
43 enum ivpu_bo_type type;
44 const char *name;
45 int (*alloc_pages)(struct ivpu_bo *bo);
46 void (*free_pages)(struct ivpu_bo *bo);
47 int (*map_pages)(struct ivpu_bo *bo);
48 void (*unmap_pages)(struct ivpu_bo *bo);
49 };
50
51 int ivpu_bo_pin(struct ivpu_bo *bo);
52 void ivpu_bo_remove_all_bos_from_context(struct ivpu_mmu_context *ctx);
53 void ivpu_bo_list(struct drm_device *dev, struct drm_printer *p);
54 void ivpu_bo_list_print(struct drm_device *dev);
55
56 struct ivpu_bo *
57 ivpu_bo_alloc_internal(struct ivpu_device *vdev, u64 vpu_addr, u64 size, u32 flags);
58 void ivpu_bo_free_internal(struct ivpu_bo *bo);
59 struct drm_gem_object *ivpu_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf);
60 void ivpu_bo_unmap_sgt_and_remove_from_context(struct ivpu_bo *bo);
61
62 int ivpu_bo_create_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
63 int ivpu_bo_info_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
64 int ivpu_bo_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
65
to_ivpu_bo(struct drm_gem_object * obj)66 static inline struct ivpu_bo *to_ivpu_bo(struct drm_gem_object *obj)
67 {
68 return container_of(obj, struct ivpu_bo, base);
69 }
70
ivpu_bo_get_page(struct ivpu_bo * bo,u64 offset)71 static inline struct page *ivpu_bo_get_page(struct ivpu_bo *bo, u64 offset)
72 {
73 if (offset > bo->base.size || !bo->pages)
74 return NULL;
75
76 return bo->pages[offset / PAGE_SIZE];
77 }
78
ivpu_bo_cache_mode(struct ivpu_bo * bo)79 static inline u32 ivpu_bo_cache_mode(struct ivpu_bo *bo)
80 {
81 return bo->flags & DRM_IVPU_BO_CACHE_MASK;
82 }
83
ivpu_bo_is_snooped(struct ivpu_bo * bo)84 static inline bool ivpu_bo_is_snooped(struct ivpu_bo *bo)
85 {
86 return ivpu_bo_cache_mode(bo) == DRM_IVPU_BO_CACHED;
87 }
88
ivpu_bo_pgprot(struct ivpu_bo * bo,pgprot_t prot)89 static inline pgprot_t ivpu_bo_pgprot(struct ivpu_bo *bo, pgprot_t prot)
90 {
91 if (bo->flags & DRM_IVPU_BO_WC)
92 return pgprot_writecombine(prot);
93
94 if (bo->flags & DRM_IVPU_BO_UNCACHED)
95 return pgprot_noncached(prot);
96
97 return prot;
98 }
99
ivpu_bo_to_vdev(struct ivpu_bo * bo)100 static inline struct ivpu_device *ivpu_bo_to_vdev(struct ivpu_bo *bo)
101 {
102 return to_ivpu_device(bo->base.dev);
103 }
104
ivpu_to_cpu_addr(struct ivpu_bo * bo,u32 vpu_addr)105 static inline void *ivpu_to_cpu_addr(struct ivpu_bo *bo, u32 vpu_addr)
106 {
107 if (vpu_addr < bo->vpu_addr)
108 return NULL;
109
110 if (vpu_addr >= (bo->vpu_addr + bo->base.size))
111 return NULL;
112
113 return bo->kvaddr + (vpu_addr - bo->vpu_addr);
114 }
115
cpu_to_vpu_addr(struct ivpu_bo * bo,void * cpu_addr)116 static inline u32 cpu_to_vpu_addr(struct ivpu_bo *bo, void *cpu_addr)
117 {
118 if (cpu_addr < bo->kvaddr)
119 return 0;
120
121 if (cpu_addr >= (bo->kvaddr + bo->base.size))
122 return 0;
123
124 return bo->vpu_addr + (cpu_addr - bo->kvaddr);
125 }
126
127 #endif /* __IVPU_GEM_H__ */
128