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Searched defs:mmDCCG_AUDIO_DTO0_PHASE (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1135 #define mmDCCG_AUDIO_DTO0_PHASE 0x016C macro
Ddce_8_0_d.h1077 #define mmDCCG_AUDIO_DTO0_PHASE 0x16c macro
Ddce_10_0_d.h1226 #define mmDCCG_AUDIO_DTO0_PHASE 0x16c macro
Ddce_11_0_d.h1037 #define mmDCCG_AUDIO_DTO0_PHASE 0x16c macro
Ddce_11_2_d.h1115 #define mmDCCG_AUDIO_DTO0_PHASE 0x16c macro
Ddce_12_0_offset.h842 #define mmDCCG_AUDIO_DTO0_PHASE … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h126 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_3_0_3_offset.h213 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_3_0_1_offset.h326 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_2_1_0_offset.h282 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_1_0_offset.h644 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_3_0_2_offset.h276 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_2_0_0_offset.h292 #define mmDCCG_AUDIO_DTO0_PHASE … macro
Ddcn_3_0_0_offset.h274 #define mmDCCG_AUDIO_DTO0_PHASE … macro