1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <linux/firmware.h>
24 #include <asm/byteorder.h>
25 #include <net/devlink.h>
26 #include <trace/events/devlink.h>
27
28 #include "core.h"
29 #include "core_env.h"
30 #include "item.h"
31 #include "cmd.h"
32 #include "port.h"
33 #include "trap.h"
34 #include "emad.h"
35 #include "reg.h"
36 #include "resources.h"
37 #include "../mlxfw/mlxfw.h"
38
39 static LIST_HEAD(mlxsw_core_driver_list);
40 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
41
42 static const char mlxsw_core_driver_name[] = "mlxsw_core";
43
44 static struct workqueue_struct *mlxsw_wq;
45 static struct workqueue_struct *mlxsw_owq;
46
47 struct mlxsw_core_port {
48 struct devlink_port devlink_port;
49 void *port_driver_priv;
50 u16 local_port;
51 struct mlxsw_linecard *linecard;
52 };
53
mlxsw_core_port_driver_priv(struct mlxsw_core_port * mlxsw_core_port)54 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
55 {
56 return mlxsw_core_port->port_driver_priv;
57 }
58 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
59
mlxsw_core_port_check(struct mlxsw_core_port * mlxsw_core_port)60 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
61 {
62 return mlxsw_core_port->port_driver_priv != NULL;
63 }
64
65 struct mlxsw_core {
66 struct mlxsw_driver *driver;
67 const struct mlxsw_bus *bus;
68 void *bus_priv;
69 const struct mlxsw_bus_info *bus_info;
70 struct workqueue_struct *emad_wq;
71 struct list_head rx_listener_list;
72 struct list_head event_listener_list;
73 struct list_head irq_event_handler_list;
74 struct mutex irq_event_handler_lock; /* Locks access to handlers list */
75 struct {
76 atomic64_t tid;
77 struct list_head trans_list;
78 spinlock_t trans_list_lock; /* protects trans_list writes */
79 bool use_emad;
80 bool enable_string_tlv;
81 } emad;
82 struct {
83 u16 *mapping; /* lag_id+port_index to local_port mapping */
84 } lag;
85 struct mlxsw_res res;
86 struct mlxsw_hwmon *hwmon;
87 struct mlxsw_thermal *thermal;
88 struct mlxsw_linecards *linecards;
89 struct mlxsw_core_port *ports;
90 unsigned int max_ports;
91 atomic_t active_ports_count;
92 bool fw_flash_in_progress;
93 struct {
94 struct devlink_health_reporter *fw_fatal;
95 } health;
96 struct mlxsw_env *env;
97 unsigned long driver_priv[];
98 /* driver_priv has to be always the last item */
99 };
100
mlxsw_core_linecards(struct mlxsw_core * mlxsw_core)101 struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core)
102 {
103 return mlxsw_core->linecards;
104 }
105
mlxsw_core_linecards_set(struct mlxsw_core * mlxsw_core,struct mlxsw_linecards * linecards)106 void mlxsw_core_linecards_set(struct mlxsw_core *mlxsw_core,
107 struct mlxsw_linecards *linecards)
108 {
109 mlxsw_core->linecards = linecards;
110 }
111
112 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40
113
mlxsw_ports_occ_get(void * priv)114 static u64 mlxsw_ports_occ_get(void *priv)
115 {
116 struct mlxsw_core *mlxsw_core = priv;
117
118 return atomic_read(&mlxsw_core->active_ports_count);
119 }
120
mlxsw_core_resources_ports_register(struct mlxsw_core * mlxsw_core)121 static int mlxsw_core_resources_ports_register(struct mlxsw_core *mlxsw_core)
122 {
123 struct devlink *devlink = priv_to_devlink(mlxsw_core);
124 struct devlink_resource_size_params ports_num_params;
125 u32 max_ports;
126
127 max_ports = mlxsw_core->max_ports - 1;
128 devlink_resource_size_params_init(&ports_num_params, max_ports,
129 max_ports, 1,
130 DEVLINK_RESOURCE_UNIT_ENTRY);
131
132 return devl_resource_register(devlink,
133 DEVLINK_RESOURCE_GENERIC_NAME_PORTS,
134 max_ports, MLXSW_CORE_RESOURCE_PORTS,
135 DEVLINK_RESOURCE_ID_PARENT_TOP,
136 &ports_num_params);
137 }
138
mlxsw_ports_init(struct mlxsw_core * mlxsw_core,bool reload)139 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core, bool reload)
140 {
141 struct devlink *devlink = priv_to_devlink(mlxsw_core);
142 int err;
143
144 /* Switch ports are numbered from 1 to queried value */
145 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
146 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
147 MAX_SYSTEM_PORT) + 1;
148 else
149 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
150
151 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
152 sizeof(struct mlxsw_core_port), GFP_KERNEL);
153 if (!mlxsw_core->ports)
154 return -ENOMEM;
155
156 if (!reload) {
157 err = mlxsw_core_resources_ports_register(mlxsw_core);
158 if (err)
159 goto err_resources_ports_register;
160 }
161 atomic_set(&mlxsw_core->active_ports_count, 0);
162 devl_resource_occ_get_register(devlink, MLXSW_CORE_RESOURCE_PORTS,
163 mlxsw_ports_occ_get, mlxsw_core);
164
165 return 0;
166
167 err_resources_ports_register:
168 kfree(mlxsw_core->ports);
169 return err;
170 }
171
mlxsw_ports_fini(struct mlxsw_core * mlxsw_core,bool reload)172 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core, bool reload)
173 {
174 struct devlink *devlink = priv_to_devlink(mlxsw_core);
175
176 devl_resource_occ_get_unregister(devlink, MLXSW_CORE_RESOURCE_PORTS);
177 if (!reload)
178 devl_resources_unregister(priv_to_devlink(mlxsw_core));
179
180 kfree(mlxsw_core->ports);
181 }
182
mlxsw_core_max_ports(const struct mlxsw_core * mlxsw_core)183 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
184 {
185 return mlxsw_core->max_ports;
186 }
187 EXPORT_SYMBOL(mlxsw_core_max_ports);
188
mlxsw_core_max_lag(struct mlxsw_core * mlxsw_core,u16 * p_max_lag)189 int mlxsw_core_max_lag(struct mlxsw_core *mlxsw_core, u16 *p_max_lag)
190 {
191 struct mlxsw_driver *driver = mlxsw_core->driver;
192
193 if (driver->profile->used_max_lag) {
194 *p_max_lag = driver->profile->max_lag;
195 return 0;
196 }
197
198 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG))
199 return -EIO;
200
201 *p_max_lag = MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG);
202 return 0;
203 }
204 EXPORT_SYMBOL(mlxsw_core_max_lag);
205
mlxsw_core_driver_priv(struct mlxsw_core * mlxsw_core)206 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
207 {
208 return mlxsw_core->driver_priv;
209 }
210 EXPORT_SYMBOL(mlxsw_core_driver_priv);
211
212 bool
mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev * rev,const struct mlxsw_fw_rev * req_rev)213 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
214 const struct mlxsw_fw_rev *req_rev)
215 {
216 return rev->minor > req_rev->minor ||
217 (rev->minor == req_rev->minor &&
218 rev->subminor >= req_rev->subminor);
219 }
220 EXPORT_SYMBOL(mlxsw_core_fw_rev_minor_subminor_validate);
221
222 struct mlxsw_rx_listener_item {
223 struct list_head list;
224 struct mlxsw_rx_listener rxl;
225 void *priv;
226 bool enabled;
227 };
228
229 struct mlxsw_event_listener_item {
230 struct list_head list;
231 struct mlxsw_core *mlxsw_core;
232 struct mlxsw_event_listener el;
233 void *priv;
234 };
235
236 static const u8 mlxsw_core_trap_groups[] = {
237 MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
238 MLXSW_REG_HTGT_TRAP_GROUP_CORE_EVENT,
239 };
240
mlxsw_core_trap_groups_set(struct mlxsw_core * mlxsw_core)241 static int mlxsw_core_trap_groups_set(struct mlxsw_core *mlxsw_core)
242 {
243 char htgt_pl[MLXSW_REG_HTGT_LEN];
244 int err;
245 int i;
246
247 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
248 return 0;
249
250 for (i = 0; i < ARRAY_SIZE(mlxsw_core_trap_groups); i++) {
251 mlxsw_reg_htgt_pack(htgt_pl, mlxsw_core_trap_groups[i],
252 MLXSW_REG_HTGT_INVALID_POLICER,
253 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
254 MLXSW_REG_HTGT_DEFAULT_TC);
255 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
256 if (err)
257 return err;
258 }
259 return 0;
260 }
261
262 /******************
263 * EMAD processing
264 ******************/
265
266 /* emad_eth_hdr_dmac
267 * Destination MAC in EMAD's Ethernet header.
268 * Must be set to 01:02:c9:00:00:01
269 */
270 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
271
272 /* emad_eth_hdr_smac
273 * Source MAC in EMAD's Ethernet header.
274 * Must be set to 00:02:c9:01:02:03
275 */
276 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
277
278 /* emad_eth_hdr_ethertype
279 * Ethertype in EMAD's Ethernet header.
280 * Must be set to 0x8932
281 */
282 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
283
284 /* emad_eth_hdr_mlx_proto
285 * Mellanox protocol.
286 * Must be set to 0x0.
287 */
288 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
289
290 /* emad_eth_hdr_ver
291 * Mellanox protocol version.
292 * Must be set to 0x0.
293 */
294 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
295
296 /* emad_op_tlv_type
297 * Type of the TLV.
298 * Must be set to 0x1 (operation TLV).
299 */
300 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
301
302 /* emad_op_tlv_len
303 * Length of the operation TLV in u32.
304 * Must be set to 0x4.
305 */
306 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
307
308 /* emad_op_tlv_dr
309 * Direct route bit. Setting to 1 indicates the EMAD is a direct route
310 * EMAD. DR TLV must follow.
311 *
312 * Note: Currently not supported and must not be set.
313 */
314 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
315
316 /* emad_op_tlv_status
317 * Returned status in case of EMAD response. Must be set to 0 in case
318 * of EMAD request.
319 * 0x0 - success
320 * 0x1 - device is busy. Requester should retry
321 * 0x2 - Mellanox protocol version not supported
322 * 0x3 - unknown TLV
323 * 0x4 - register not supported
324 * 0x5 - operation class not supported
325 * 0x6 - EMAD method not supported
326 * 0x7 - bad parameter (e.g. port out of range)
327 * 0x8 - resource not available
328 * 0x9 - message receipt acknowledgment. Requester should retry
329 * 0x70 - internal error
330 */
331 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
332
333 /* emad_op_tlv_register_id
334 * Register ID of register within register TLV.
335 */
336 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
337
338 /* emad_op_tlv_r
339 * Response bit. Setting to 1 indicates Response, otherwise request.
340 */
341 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
342
343 /* emad_op_tlv_method
344 * EMAD method type.
345 * 0x1 - query
346 * 0x2 - write
347 * 0x3 - send (currently not supported)
348 * 0x4 - event
349 */
350 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
351
352 /* emad_op_tlv_class
353 * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
354 */
355 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
356
357 /* emad_op_tlv_tid
358 * EMAD transaction ID. Used for pairing request and response EMADs.
359 */
360 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
361
362 /* emad_string_tlv_type
363 * Type of the TLV.
364 * Must be set to 0x2 (string TLV).
365 */
366 MLXSW_ITEM32(emad, string_tlv, type, 0x00, 27, 5);
367
368 /* emad_string_tlv_len
369 * Length of the string TLV in u32.
370 */
371 MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11);
372
373 #define MLXSW_EMAD_STRING_TLV_STRING_LEN 128
374
375 /* emad_string_tlv_string
376 * String provided by the device's firmware in case of erroneous register access
377 */
378 MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04,
379 MLXSW_EMAD_STRING_TLV_STRING_LEN);
380
381 /* emad_reg_tlv_type
382 * Type of the TLV.
383 * Must be set to 0x3 (register TLV).
384 */
385 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
386
387 /* emad_reg_tlv_len
388 * Length of the operation TLV in u32.
389 */
390 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
391
392 /* emad_end_tlv_type
393 * Type of the TLV.
394 * Must be set to 0x0 (end TLV).
395 */
396 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
397
398 /* emad_end_tlv_len
399 * Length of the end TLV in u32.
400 * Must be set to 1.
401 */
402 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
403
404 enum mlxsw_core_reg_access_type {
405 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
406 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
407 };
408
409 static inline const char *
mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)410 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
411 {
412 switch (type) {
413 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
414 return "query";
415 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
416 return "write";
417 }
418 BUG();
419 }
420
mlxsw_emad_pack_end_tlv(char * end_tlv)421 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
422 {
423 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
424 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
425 }
426
mlxsw_emad_pack_reg_tlv(char * reg_tlv,const struct mlxsw_reg_info * reg,char * payload)427 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
428 const struct mlxsw_reg_info *reg,
429 char *payload)
430 {
431 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
432 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
433 memcpy(reg_tlv + sizeof(u32), payload, reg->len);
434 }
435
mlxsw_emad_pack_string_tlv(char * string_tlv)436 static void mlxsw_emad_pack_string_tlv(char *string_tlv)
437 {
438 mlxsw_emad_string_tlv_type_set(string_tlv, MLXSW_EMAD_TLV_TYPE_STRING);
439 mlxsw_emad_string_tlv_len_set(string_tlv, MLXSW_EMAD_STRING_TLV_LEN);
440 }
441
mlxsw_emad_pack_op_tlv(char * op_tlv,const struct mlxsw_reg_info * reg,enum mlxsw_core_reg_access_type type,u64 tid)442 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
443 const struct mlxsw_reg_info *reg,
444 enum mlxsw_core_reg_access_type type,
445 u64 tid)
446 {
447 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
448 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
449 mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
450 mlxsw_emad_op_tlv_status_set(op_tlv, 0);
451 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
452 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
453 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
454 mlxsw_emad_op_tlv_method_set(op_tlv,
455 MLXSW_EMAD_OP_TLV_METHOD_QUERY);
456 else
457 mlxsw_emad_op_tlv_method_set(op_tlv,
458 MLXSW_EMAD_OP_TLV_METHOD_WRITE);
459 mlxsw_emad_op_tlv_class_set(op_tlv,
460 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
461 mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
462 }
463
mlxsw_emad_construct_eth_hdr(struct sk_buff * skb)464 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
465 {
466 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
467
468 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
469 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
470 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
471 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
472 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
473
474 skb_reset_mac_header(skb);
475
476 return 0;
477 }
478
mlxsw_emad_construct(struct sk_buff * skb,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,u64 tid,bool enable_string_tlv)479 static void mlxsw_emad_construct(struct sk_buff *skb,
480 const struct mlxsw_reg_info *reg,
481 char *payload,
482 enum mlxsw_core_reg_access_type type,
483 u64 tid, bool enable_string_tlv)
484 {
485 char *buf;
486
487 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
488 mlxsw_emad_pack_end_tlv(buf);
489
490 buf = skb_push(skb, reg->len + sizeof(u32));
491 mlxsw_emad_pack_reg_tlv(buf, reg, payload);
492
493 if (enable_string_tlv) {
494 buf = skb_push(skb, MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32));
495 mlxsw_emad_pack_string_tlv(buf);
496 }
497
498 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
499 mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
500
501 mlxsw_emad_construct_eth_hdr(skb);
502 }
503
504 struct mlxsw_emad_tlv_offsets {
505 u16 op_tlv;
506 u16 string_tlv;
507 u16 reg_tlv;
508 };
509
mlxsw_emad_tlv_is_string_tlv(const char * tlv)510 static bool mlxsw_emad_tlv_is_string_tlv(const char *tlv)
511 {
512 u8 tlv_type = mlxsw_emad_string_tlv_type_get(tlv);
513
514 return tlv_type == MLXSW_EMAD_TLV_TYPE_STRING;
515 }
516
mlxsw_emad_tlv_parse(struct sk_buff * skb)517 static void mlxsw_emad_tlv_parse(struct sk_buff *skb)
518 {
519 struct mlxsw_emad_tlv_offsets *offsets =
520 (struct mlxsw_emad_tlv_offsets *) skb->cb;
521
522 offsets->op_tlv = MLXSW_EMAD_ETH_HDR_LEN;
523 offsets->string_tlv = 0;
524 offsets->reg_tlv = MLXSW_EMAD_ETH_HDR_LEN +
525 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
526
527 /* If string TLV is present, it must come after the operation TLV. */
528 if (mlxsw_emad_tlv_is_string_tlv(skb->data + offsets->reg_tlv)) {
529 offsets->string_tlv = offsets->reg_tlv;
530 offsets->reg_tlv += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
531 }
532 }
533
mlxsw_emad_op_tlv(const struct sk_buff * skb)534 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
535 {
536 struct mlxsw_emad_tlv_offsets *offsets =
537 (struct mlxsw_emad_tlv_offsets *) skb->cb;
538
539 return ((char *) (skb->data + offsets->op_tlv));
540 }
541
mlxsw_emad_string_tlv(const struct sk_buff * skb)542 static char *mlxsw_emad_string_tlv(const struct sk_buff *skb)
543 {
544 struct mlxsw_emad_tlv_offsets *offsets =
545 (struct mlxsw_emad_tlv_offsets *) skb->cb;
546
547 if (!offsets->string_tlv)
548 return NULL;
549
550 return ((char *) (skb->data + offsets->string_tlv));
551 }
552
mlxsw_emad_reg_tlv(const struct sk_buff * skb)553 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
554 {
555 struct mlxsw_emad_tlv_offsets *offsets =
556 (struct mlxsw_emad_tlv_offsets *) skb->cb;
557
558 return ((char *) (skb->data + offsets->reg_tlv));
559 }
560
mlxsw_emad_reg_payload(const char * reg_tlv)561 static char *mlxsw_emad_reg_payload(const char *reg_tlv)
562 {
563 return ((char *) (reg_tlv + sizeof(u32)));
564 }
565
mlxsw_emad_reg_payload_cmd(const char * mbox)566 static char *mlxsw_emad_reg_payload_cmd(const char *mbox)
567 {
568 return ((char *) (mbox + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
569 }
570
mlxsw_emad_get_tid(const struct sk_buff * skb)571 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
572 {
573 char *op_tlv;
574
575 op_tlv = mlxsw_emad_op_tlv(skb);
576 return mlxsw_emad_op_tlv_tid_get(op_tlv);
577 }
578
mlxsw_emad_is_resp(const struct sk_buff * skb)579 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
580 {
581 char *op_tlv;
582
583 op_tlv = mlxsw_emad_op_tlv(skb);
584 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
585 }
586
mlxsw_emad_process_status(char * op_tlv,enum mlxsw_emad_op_tlv_status * p_status)587 static int mlxsw_emad_process_status(char *op_tlv,
588 enum mlxsw_emad_op_tlv_status *p_status)
589 {
590 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
591
592 switch (*p_status) {
593 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
594 return 0;
595 case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
596 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
597 return -EAGAIN;
598 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
599 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
600 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
601 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
602 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
603 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
604 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
605 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
606 default:
607 return -EIO;
608 }
609 }
610
611 static int
mlxsw_emad_process_status_skb(struct sk_buff * skb,enum mlxsw_emad_op_tlv_status * p_status)612 mlxsw_emad_process_status_skb(struct sk_buff *skb,
613 enum mlxsw_emad_op_tlv_status *p_status)
614 {
615 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
616 }
617
618 struct mlxsw_reg_trans {
619 struct list_head list;
620 struct list_head bulk_list;
621 struct mlxsw_core *core;
622 struct sk_buff *tx_skb;
623 struct mlxsw_tx_info tx_info;
624 struct delayed_work timeout_dw;
625 unsigned int retries;
626 u64 tid;
627 struct completion completion;
628 atomic_t active;
629 mlxsw_reg_trans_cb_t *cb;
630 unsigned long cb_priv;
631 const struct mlxsw_reg_info *reg;
632 enum mlxsw_core_reg_access_type type;
633 int err;
634 char *emad_err_string;
635 enum mlxsw_emad_op_tlv_status emad_status;
636 struct rcu_head rcu;
637 };
638
mlxsw_emad_process_string_tlv(const struct sk_buff * skb,struct mlxsw_reg_trans * trans)639 static void mlxsw_emad_process_string_tlv(const struct sk_buff *skb,
640 struct mlxsw_reg_trans *trans)
641 {
642 char *string_tlv;
643 char *string;
644
645 string_tlv = mlxsw_emad_string_tlv(skb);
646 if (!string_tlv)
647 return;
648
649 trans->emad_err_string = kzalloc(MLXSW_EMAD_STRING_TLV_STRING_LEN,
650 GFP_ATOMIC);
651 if (!trans->emad_err_string)
652 return;
653
654 string = mlxsw_emad_string_tlv_string_data(string_tlv);
655 strscpy(trans->emad_err_string, string,
656 MLXSW_EMAD_STRING_TLV_STRING_LEN);
657 }
658
659 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000
660 #define MLXSW_EMAD_TIMEOUT_MS 200
661
mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans * trans)662 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
663 {
664 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
665
666 if (trans->core->fw_flash_in_progress)
667 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
668
669 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw,
670 timeout << trans->retries);
671 }
672
mlxsw_emad_transmit(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans)673 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
674 struct mlxsw_reg_trans *trans)
675 {
676 struct sk_buff *skb;
677 int err;
678
679 skb = skb_clone(trans->tx_skb, GFP_KERNEL);
680 if (!skb)
681 return -ENOMEM;
682
683 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
684 skb->data + mlxsw_core->driver->txhdr_len,
685 skb->len - mlxsw_core->driver->txhdr_len);
686
687 atomic_set(&trans->active, 1);
688 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
689 if (err) {
690 dev_kfree_skb(skb);
691 return err;
692 }
693 mlxsw_emad_trans_timeout_schedule(trans);
694 return 0;
695 }
696
mlxsw_emad_trans_finish(struct mlxsw_reg_trans * trans,int err)697 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
698 {
699 struct mlxsw_core *mlxsw_core = trans->core;
700
701 dev_kfree_skb(trans->tx_skb);
702 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
703 list_del_rcu(&trans->list);
704 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
705 trans->err = err;
706 complete(&trans->completion);
707 }
708
mlxsw_emad_transmit_retry(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans)709 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
710 struct mlxsw_reg_trans *trans)
711 {
712 int err;
713
714 if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
715 trans->retries++;
716 err = mlxsw_emad_transmit(trans->core, trans);
717 if (err == 0)
718 return;
719
720 if (!atomic_dec_and_test(&trans->active))
721 return;
722 } else {
723 err = -EIO;
724 }
725 mlxsw_emad_trans_finish(trans, err);
726 }
727
mlxsw_emad_trans_timeout_work(struct work_struct * work)728 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
729 {
730 struct mlxsw_reg_trans *trans = container_of(work,
731 struct mlxsw_reg_trans,
732 timeout_dw.work);
733
734 if (!atomic_dec_and_test(&trans->active))
735 return;
736
737 mlxsw_emad_transmit_retry(trans->core, trans);
738 }
739
mlxsw_emad_process_response(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans,struct sk_buff * skb)740 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
741 struct mlxsw_reg_trans *trans,
742 struct sk_buff *skb)
743 {
744 int err;
745
746 if (!atomic_dec_and_test(&trans->active))
747 return;
748
749 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
750 if (err == -EAGAIN) {
751 mlxsw_emad_transmit_retry(mlxsw_core, trans);
752 } else {
753 if (err == 0) {
754 char *reg_tlv = mlxsw_emad_reg_tlv(skb);
755
756 if (trans->cb)
757 trans->cb(mlxsw_core,
758 mlxsw_emad_reg_payload(reg_tlv),
759 trans->reg->len, trans->cb_priv);
760 } else {
761 mlxsw_emad_process_string_tlv(skb, trans);
762 }
763 mlxsw_emad_trans_finish(trans, err);
764 }
765 }
766
767 /* called with rcu read lock held */
mlxsw_emad_rx_listener_func(struct sk_buff * skb,u16 local_port,void * priv)768 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u16 local_port,
769 void *priv)
770 {
771 struct mlxsw_core *mlxsw_core = priv;
772 struct mlxsw_reg_trans *trans;
773
774 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
775 skb->data, skb->len);
776
777 mlxsw_emad_tlv_parse(skb);
778
779 if (!mlxsw_emad_is_resp(skb))
780 goto free_skb;
781
782 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
783 if (mlxsw_emad_get_tid(skb) == trans->tid) {
784 mlxsw_emad_process_response(mlxsw_core, trans, skb);
785 break;
786 }
787 }
788
789 free_skb:
790 dev_kfree_skb(skb);
791 }
792
793 static const struct mlxsw_listener mlxsw_emad_rx_listener =
794 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
795 EMAD, DISCARD);
796
mlxsw_emad_init(struct mlxsw_core * mlxsw_core)797 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
798 {
799 struct workqueue_struct *emad_wq;
800 u64 tid;
801 int err;
802
803 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
804 return 0;
805
806 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
807 if (!emad_wq)
808 return -ENOMEM;
809 mlxsw_core->emad_wq = emad_wq;
810
811 /* Set the upper 32 bits of the transaction ID field to a random
812 * number. This allows us to discard EMADs addressed to other
813 * devices.
814 */
815 get_random_bytes(&tid, 4);
816 tid <<= 32;
817 atomic64_set(&mlxsw_core->emad.tid, tid);
818
819 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
820 spin_lock_init(&mlxsw_core->emad.trans_list_lock);
821
822 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
823 mlxsw_core);
824 if (err)
825 goto err_trap_register;
826
827 mlxsw_core->emad.use_emad = true;
828
829 return 0;
830
831 err_trap_register:
832 destroy_workqueue(mlxsw_core->emad_wq);
833 return err;
834 }
835
mlxsw_emad_fini(struct mlxsw_core * mlxsw_core)836 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
837 {
838
839 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
840 return;
841
842 mlxsw_core->emad.use_emad = false;
843 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
844 mlxsw_core);
845 destroy_workqueue(mlxsw_core->emad_wq);
846 }
847
mlxsw_emad_alloc(const struct mlxsw_core * mlxsw_core,u16 reg_len,bool enable_string_tlv)848 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
849 u16 reg_len, bool enable_string_tlv)
850 {
851 struct sk_buff *skb;
852 u16 emad_len;
853
854 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
855 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
856 sizeof(u32) + mlxsw_core->driver->txhdr_len);
857 if (enable_string_tlv)
858 emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
859 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
860 return NULL;
861
862 skb = netdev_alloc_skb(NULL, emad_len);
863 if (!skb)
864 return NULL;
865 memset(skb->data, 0, emad_len);
866 skb_reserve(skb, emad_len);
867
868 return skb;
869 }
870
mlxsw_emad_reg_access(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,struct mlxsw_reg_trans * trans,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv,u64 tid)871 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
872 const struct mlxsw_reg_info *reg,
873 char *payload,
874 enum mlxsw_core_reg_access_type type,
875 struct mlxsw_reg_trans *trans,
876 struct list_head *bulk_list,
877 mlxsw_reg_trans_cb_t *cb,
878 unsigned long cb_priv, u64 tid)
879 {
880 bool enable_string_tlv;
881 struct sk_buff *skb;
882 int err;
883
884 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
885 tid, reg->id, mlxsw_reg_id_str(reg->id),
886 mlxsw_core_reg_access_type_str(type));
887
888 /* Since this can be changed during emad_reg_access, read it once and
889 * use the value all the way.
890 */
891 enable_string_tlv = mlxsw_core->emad.enable_string_tlv;
892
893 skb = mlxsw_emad_alloc(mlxsw_core, reg->len, enable_string_tlv);
894 if (!skb)
895 return -ENOMEM;
896
897 list_add_tail(&trans->bulk_list, bulk_list);
898 trans->core = mlxsw_core;
899 trans->tx_skb = skb;
900 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
901 trans->tx_info.is_emad = true;
902 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
903 trans->tid = tid;
904 init_completion(&trans->completion);
905 trans->cb = cb;
906 trans->cb_priv = cb_priv;
907 trans->reg = reg;
908 trans->type = type;
909
910 mlxsw_emad_construct(skb, reg, payload, type, trans->tid,
911 enable_string_tlv);
912 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
913
914 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
915 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
916 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
917 err = mlxsw_emad_transmit(mlxsw_core, trans);
918 if (err)
919 goto err_out;
920 return 0;
921
922 err_out:
923 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
924 list_del_rcu(&trans->list);
925 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
926 list_del(&trans->bulk_list);
927 dev_kfree_skb(trans->tx_skb);
928 return err;
929 }
930
931 /*****************
932 * Core functions
933 *****************/
934
mlxsw_core_driver_register(struct mlxsw_driver * mlxsw_driver)935 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
936 {
937 spin_lock(&mlxsw_core_driver_list_lock);
938 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
939 spin_unlock(&mlxsw_core_driver_list_lock);
940 return 0;
941 }
942 EXPORT_SYMBOL(mlxsw_core_driver_register);
943
mlxsw_core_driver_unregister(struct mlxsw_driver * mlxsw_driver)944 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
945 {
946 spin_lock(&mlxsw_core_driver_list_lock);
947 list_del(&mlxsw_driver->list);
948 spin_unlock(&mlxsw_core_driver_list_lock);
949 }
950 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
951
__driver_find(const char * kind)952 static struct mlxsw_driver *__driver_find(const char *kind)
953 {
954 struct mlxsw_driver *mlxsw_driver;
955
956 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
957 if (strcmp(mlxsw_driver->kind, kind) == 0)
958 return mlxsw_driver;
959 }
960 return NULL;
961 }
962
mlxsw_core_driver_get(const char * kind)963 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
964 {
965 struct mlxsw_driver *mlxsw_driver;
966
967 spin_lock(&mlxsw_core_driver_list_lock);
968 mlxsw_driver = __driver_find(kind);
969 spin_unlock(&mlxsw_core_driver_list_lock);
970 return mlxsw_driver;
971 }
972
mlxsw_core_fw_flash(struct mlxsw_core * mlxsw_core,struct mlxfw_dev * mlxfw_dev,const struct firmware * firmware,struct netlink_ext_ack * extack)973 int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core,
974 struct mlxfw_dev *mlxfw_dev,
975 const struct firmware *firmware,
976 struct netlink_ext_ack *extack)
977 {
978 int err;
979
980 mlxsw_core->fw_flash_in_progress = true;
981 err = mlxfw_firmware_flash(mlxfw_dev, firmware, extack);
982 mlxsw_core->fw_flash_in_progress = false;
983
984 return err;
985 }
986
987 struct mlxsw_core_fw_info {
988 struct mlxfw_dev mlxfw_dev;
989 struct mlxsw_core *mlxsw_core;
990 };
991
mlxsw_core_fw_component_query(struct mlxfw_dev * mlxfw_dev,u16 component_index,u32 * p_max_size,u8 * p_align_bits,u16 * p_max_write_size)992 static int mlxsw_core_fw_component_query(struct mlxfw_dev *mlxfw_dev,
993 u16 component_index, u32 *p_max_size,
994 u8 *p_align_bits, u16 *p_max_write_size)
995 {
996 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
997 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
998 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
999 char mcqi_pl[MLXSW_REG_MCQI_LEN];
1000 int err;
1001
1002 mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
1003 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl);
1004 if (err)
1005 return err;
1006 mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, p_max_write_size);
1007
1008 *p_align_bits = max_t(u8, *p_align_bits, 2);
1009 *p_max_write_size = min_t(u16, *p_max_write_size, MLXSW_REG_MCDA_MAX_DATA_LEN);
1010 return 0;
1011 }
1012
mlxsw_core_fw_fsm_lock(struct mlxfw_dev * mlxfw_dev,u32 * fwhandle)1013 static int mlxsw_core_fw_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
1014 {
1015 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1016 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1017 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1018 char mcc_pl[MLXSW_REG_MCC_LEN];
1019 u8 control_state;
1020 int err;
1021
1022 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
1023 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1024 if (err)
1025 return err;
1026
1027 mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
1028 if (control_state != MLXFW_FSM_STATE_IDLE)
1029 return -EBUSY;
1030
1031 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, 0, *fwhandle, 0);
1032 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1033 }
1034
mlxsw_core_fw_fsm_component_update(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,u16 component_index,u32 component_size)1035 static int mlxsw_core_fw_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
1036 u16 component_index, u32 component_size)
1037 {
1038 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1039 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1040 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1041 char mcc_pl[MLXSW_REG_MCC_LEN];
1042
1043 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
1044 component_index, fwhandle, component_size);
1045 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1046 }
1047
mlxsw_core_fw_fsm_block_download(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,u8 * data,u16 size,u32 offset)1048 static int mlxsw_core_fw_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
1049 u8 *data, u16 size, u32 offset)
1050 {
1051 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1052 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1053 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1054 char mcda_pl[MLXSW_REG_MCDA_LEN];
1055
1056 mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
1057 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl);
1058 }
1059
mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,u16 component_index)1060 static int mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
1061 u16 component_index)
1062 {
1063 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1064 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1065 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1066 char mcc_pl[MLXSW_REG_MCC_LEN];
1067
1068 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
1069 component_index, fwhandle, 0);
1070 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1071 }
1072
mlxsw_core_fw_fsm_activate(struct mlxfw_dev * mlxfw_dev,u32 fwhandle)1073 static int mlxsw_core_fw_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1074 {
1075 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1076 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1077 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1078 char mcc_pl[MLXSW_REG_MCC_LEN];
1079
1080 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, fwhandle, 0);
1081 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1082 }
1083
mlxsw_core_fw_fsm_query_state(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,enum mlxfw_fsm_state * fsm_state,enum mlxfw_fsm_state_err * fsm_state_err)1084 static int mlxsw_core_fw_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
1085 enum mlxfw_fsm_state *fsm_state,
1086 enum mlxfw_fsm_state_err *fsm_state_err)
1087 {
1088 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1089 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1090 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1091 char mcc_pl[MLXSW_REG_MCC_LEN];
1092 u8 control_state;
1093 u8 error_code;
1094 int err;
1095
1096 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
1097 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1098 if (err)
1099 return err;
1100
1101 mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
1102 *fsm_state = control_state;
1103 *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, MLXFW_FSM_STATE_ERR_MAX);
1104 return 0;
1105 }
1106
mlxsw_core_fw_fsm_cancel(struct mlxfw_dev * mlxfw_dev,u32 fwhandle)1107 static void mlxsw_core_fw_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1108 {
1109 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1110 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1111 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1112 char mcc_pl[MLXSW_REG_MCC_LEN];
1113
1114 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, fwhandle, 0);
1115 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1116 }
1117
mlxsw_core_fw_fsm_release(struct mlxfw_dev * mlxfw_dev,u32 fwhandle)1118 static void mlxsw_core_fw_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1119 {
1120 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1121 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1122 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1123 char mcc_pl[MLXSW_REG_MCC_LEN];
1124
1125 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, fwhandle, 0);
1126 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1127 }
1128
1129 static const struct mlxfw_dev_ops mlxsw_core_fw_mlxsw_dev_ops = {
1130 .component_query = mlxsw_core_fw_component_query,
1131 .fsm_lock = mlxsw_core_fw_fsm_lock,
1132 .fsm_component_update = mlxsw_core_fw_fsm_component_update,
1133 .fsm_block_download = mlxsw_core_fw_fsm_block_download,
1134 .fsm_component_verify = mlxsw_core_fw_fsm_component_verify,
1135 .fsm_activate = mlxsw_core_fw_fsm_activate,
1136 .fsm_query_state = mlxsw_core_fw_fsm_query_state,
1137 .fsm_cancel = mlxsw_core_fw_fsm_cancel,
1138 .fsm_release = mlxsw_core_fw_fsm_release,
1139 };
1140
mlxsw_core_dev_fw_flash(struct mlxsw_core * mlxsw_core,const struct firmware * firmware,struct netlink_ext_ack * extack)1141 static int mlxsw_core_dev_fw_flash(struct mlxsw_core *mlxsw_core,
1142 const struct firmware *firmware,
1143 struct netlink_ext_ack *extack)
1144 {
1145 struct mlxsw_core_fw_info mlxsw_core_fw_info = {
1146 .mlxfw_dev = {
1147 .ops = &mlxsw_core_fw_mlxsw_dev_ops,
1148 .psid = mlxsw_core->bus_info->psid,
1149 .psid_size = strlen(mlxsw_core->bus_info->psid),
1150 .devlink = priv_to_devlink(mlxsw_core),
1151 },
1152 .mlxsw_core = mlxsw_core
1153 };
1154
1155 return mlxsw_core_fw_flash(mlxsw_core, &mlxsw_core_fw_info.mlxfw_dev,
1156 firmware, extack);
1157 }
1158
mlxsw_core_fw_rev_validate(struct mlxsw_core * mlxsw_core,const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_fw_rev * req_rev,const char * filename)1159 static int mlxsw_core_fw_rev_validate(struct mlxsw_core *mlxsw_core,
1160 const struct mlxsw_bus_info *mlxsw_bus_info,
1161 const struct mlxsw_fw_rev *req_rev,
1162 const char *filename)
1163 {
1164 const struct mlxsw_fw_rev *rev = &mlxsw_bus_info->fw_rev;
1165 union devlink_param_value value;
1166 const struct firmware *firmware;
1167 int err;
1168
1169 /* Don't check if driver does not require it */
1170 if (!req_rev || !filename)
1171 return 0;
1172
1173 /* Don't check if devlink 'fw_load_policy' param is 'flash' */
1174 err = devlink_param_driverinit_value_get(priv_to_devlink(mlxsw_core),
1175 DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY,
1176 &value);
1177 if (err)
1178 return err;
1179 if (value.vu8 == DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH)
1180 return 0;
1181
1182 /* Validate driver & FW are compatible */
1183 if (rev->major != req_rev->major) {
1184 WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n",
1185 rev->major, req_rev->major);
1186 return -EINVAL;
1187 }
1188 if (mlxsw_core_fw_rev_minor_subminor_validate(rev, req_rev))
1189 return 0;
1190
1191 dev_err(mlxsw_bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver (required >= %d.%d.%d)\n",
1192 rev->major, rev->minor, rev->subminor, req_rev->major,
1193 req_rev->minor, req_rev->subminor);
1194 dev_info(mlxsw_bus_info->dev, "Flashing firmware using file %s\n", filename);
1195
1196 err = request_firmware_direct(&firmware, filename, mlxsw_bus_info->dev);
1197 if (err) {
1198 dev_err(mlxsw_bus_info->dev, "Could not request firmware file %s\n", filename);
1199 return err;
1200 }
1201
1202 err = mlxsw_core_dev_fw_flash(mlxsw_core, firmware, NULL);
1203 release_firmware(firmware);
1204 if (err)
1205 dev_err(mlxsw_bus_info->dev, "Could not upgrade firmware\n");
1206
1207 /* On FW flash success, tell the caller FW reset is needed
1208 * if current FW supports it.
1209 */
1210 if (rev->minor >= req_rev->can_reset_minor)
1211 return err ? err : -EAGAIN;
1212 else
1213 return 0;
1214 }
1215
mlxsw_core_fw_flash_update(struct mlxsw_core * mlxsw_core,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)1216 static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core,
1217 struct devlink_flash_update_params *params,
1218 struct netlink_ext_ack *extack)
1219 {
1220 return mlxsw_core_dev_fw_flash(mlxsw_core, params->fw, extack);
1221 }
1222
mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)1223 static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id,
1224 union devlink_param_value val,
1225 struct netlink_ext_ack *extack)
1226 {
1227 if (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER &&
1228 val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) {
1229 NL_SET_ERR_MSG_MOD(extack, "'fw_load_policy' must be 'driver' or 'flash'");
1230 return -EINVAL;
1231 }
1232
1233 return 0;
1234 }
1235
1236 static const struct devlink_param mlxsw_core_fw_devlink_params[] = {
1237 DEVLINK_PARAM_GENERIC(FW_LOAD_POLICY, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
1238 mlxsw_core_devlink_param_fw_load_policy_validate),
1239 };
1240
mlxsw_core_fw_params_register(struct mlxsw_core * mlxsw_core)1241 static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core)
1242 {
1243 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1244 union devlink_param_value value;
1245 int err;
1246
1247 err = devlink_params_register(devlink, mlxsw_core_fw_devlink_params,
1248 ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1249 if (err)
1250 return err;
1251
1252 value.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER;
1253 devlink_param_driverinit_value_set(devlink, DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, value);
1254 return 0;
1255 }
1256
mlxsw_core_fw_params_unregister(struct mlxsw_core * mlxsw_core)1257 static void mlxsw_core_fw_params_unregister(struct mlxsw_core *mlxsw_core)
1258 {
1259 devlink_params_unregister(priv_to_devlink(mlxsw_core), mlxsw_core_fw_devlink_params,
1260 ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1261 }
1262
__dl_port(struct devlink_port * devlink_port)1263 static void *__dl_port(struct devlink_port *devlink_port)
1264 {
1265 return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
1266 }
1267
mlxsw_devlink_port_split(struct devlink * devlink,struct devlink_port * port,unsigned int count,struct netlink_ext_ack * extack)1268 static int mlxsw_devlink_port_split(struct devlink *devlink,
1269 struct devlink_port *port,
1270 unsigned int count,
1271 struct netlink_ext_ack *extack)
1272 {
1273 struct mlxsw_core_port *mlxsw_core_port = __dl_port(port);
1274 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1275
1276 if (!mlxsw_core->driver->port_split)
1277 return -EOPNOTSUPP;
1278 return mlxsw_core->driver->port_split(mlxsw_core,
1279 mlxsw_core_port->local_port,
1280 count, extack);
1281 }
1282
mlxsw_devlink_port_unsplit(struct devlink * devlink,struct devlink_port * port,struct netlink_ext_ack * extack)1283 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
1284 struct devlink_port *port,
1285 struct netlink_ext_ack *extack)
1286 {
1287 struct mlxsw_core_port *mlxsw_core_port = __dl_port(port);
1288 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1289
1290 if (!mlxsw_core->driver->port_unsplit)
1291 return -EOPNOTSUPP;
1292 return mlxsw_core->driver->port_unsplit(mlxsw_core,
1293 mlxsw_core_port->local_port,
1294 extack);
1295 }
1296
1297 static int
mlxsw_devlink_sb_pool_get(struct devlink * devlink,unsigned int sb_index,u16 pool_index,struct devlink_sb_pool_info * pool_info)1298 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
1299 unsigned int sb_index, u16 pool_index,
1300 struct devlink_sb_pool_info *pool_info)
1301 {
1302 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1303 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1304
1305 if (!mlxsw_driver->sb_pool_get)
1306 return -EOPNOTSUPP;
1307 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
1308 pool_index, pool_info);
1309 }
1310
1311 static int
mlxsw_devlink_sb_pool_set(struct devlink * devlink,unsigned int sb_index,u16 pool_index,u32 size,enum devlink_sb_threshold_type threshold_type,struct netlink_ext_ack * extack)1312 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
1313 unsigned int sb_index, u16 pool_index, u32 size,
1314 enum devlink_sb_threshold_type threshold_type,
1315 struct netlink_ext_ack *extack)
1316 {
1317 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1318 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1319
1320 if (!mlxsw_driver->sb_pool_set)
1321 return -EOPNOTSUPP;
1322 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
1323 pool_index, size, threshold_type,
1324 extack);
1325 }
1326
mlxsw_devlink_sb_port_pool_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 * p_threshold)1327 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
1328 unsigned int sb_index, u16 pool_index,
1329 u32 *p_threshold)
1330 {
1331 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1332 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1333 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1334
1335 if (!mlxsw_driver->sb_port_pool_get ||
1336 !mlxsw_core_port_check(mlxsw_core_port))
1337 return -EOPNOTSUPP;
1338 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
1339 pool_index, p_threshold);
1340 }
1341
mlxsw_devlink_sb_port_pool_set(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1342 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
1343 unsigned int sb_index, u16 pool_index,
1344 u32 threshold,
1345 struct netlink_ext_ack *extack)
1346 {
1347 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1348 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1349 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1350
1351 if (!mlxsw_driver->sb_port_pool_set ||
1352 !mlxsw_core_port_check(mlxsw_core_port))
1353 return -EOPNOTSUPP;
1354 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
1355 pool_index, threshold, extack);
1356 }
1357
1358 static int
mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 * p_pool_index,u32 * p_threshold)1359 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
1360 unsigned int sb_index, u16 tc_index,
1361 enum devlink_sb_pool_type pool_type,
1362 u16 *p_pool_index, u32 *p_threshold)
1363 {
1364 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1365 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1366 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1367
1368 if (!mlxsw_driver->sb_tc_pool_bind_get ||
1369 !mlxsw_core_port_check(mlxsw_core_port))
1370 return -EOPNOTSUPP;
1371 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
1372 tc_index, pool_type,
1373 p_pool_index, p_threshold);
1374 }
1375
1376 static int
mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1377 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
1378 unsigned int sb_index, u16 tc_index,
1379 enum devlink_sb_pool_type pool_type,
1380 u16 pool_index, u32 threshold,
1381 struct netlink_ext_ack *extack)
1382 {
1383 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1384 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1385 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1386
1387 if (!mlxsw_driver->sb_tc_pool_bind_set ||
1388 !mlxsw_core_port_check(mlxsw_core_port))
1389 return -EOPNOTSUPP;
1390 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
1391 tc_index, pool_type,
1392 pool_index, threshold, extack);
1393 }
1394
mlxsw_devlink_sb_occ_snapshot(struct devlink * devlink,unsigned int sb_index)1395 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
1396 unsigned int sb_index)
1397 {
1398 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1399 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1400
1401 if (!mlxsw_driver->sb_occ_snapshot)
1402 return -EOPNOTSUPP;
1403 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
1404 }
1405
mlxsw_devlink_sb_occ_max_clear(struct devlink * devlink,unsigned int sb_index)1406 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
1407 unsigned int sb_index)
1408 {
1409 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1410 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1411
1412 if (!mlxsw_driver->sb_occ_max_clear)
1413 return -EOPNOTSUPP;
1414 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
1415 }
1416
1417 static int
mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 * p_cur,u32 * p_max)1418 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
1419 unsigned int sb_index, u16 pool_index,
1420 u32 *p_cur, u32 *p_max)
1421 {
1422 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1423 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1424 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1425
1426 if (!mlxsw_driver->sb_occ_port_pool_get ||
1427 !mlxsw_core_port_check(mlxsw_core_port))
1428 return -EOPNOTSUPP;
1429 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
1430 pool_index, p_cur, p_max);
1431 }
1432
1433 static int
mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u32 * p_cur,u32 * p_max)1434 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
1435 unsigned int sb_index, u16 tc_index,
1436 enum devlink_sb_pool_type pool_type,
1437 u32 *p_cur, u32 *p_max)
1438 {
1439 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1440 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1441 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1442
1443 if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
1444 !mlxsw_core_port_check(mlxsw_core_port))
1445 return -EOPNOTSUPP;
1446 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
1447 sb_index, tc_index,
1448 pool_type, p_cur, p_max);
1449 }
1450
1451 static int
mlxsw_devlink_info_get(struct devlink * devlink,struct devlink_info_req * req,struct netlink_ext_ack * extack)1452 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
1453 struct netlink_ext_ack *extack)
1454 {
1455 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1456 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
1457 u32 hw_rev, fw_major, fw_minor, fw_sub_minor;
1458 char mgir_pl[MLXSW_REG_MGIR_LEN];
1459 char buf[32];
1460 int err;
1461
1462 err = devlink_info_driver_name_put(req,
1463 mlxsw_core->bus_info->device_kind);
1464 if (err)
1465 return err;
1466
1467 mlxsw_reg_mgir_pack(mgir_pl);
1468 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl);
1469 if (err)
1470 return err;
1471 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major,
1472 &fw_minor, &fw_sub_minor);
1473
1474 sprintf(buf, "%X", hw_rev);
1475 err = devlink_info_version_fixed_put(req, "hw.revision", buf);
1476 if (err)
1477 return err;
1478
1479 err = devlink_info_version_fixed_put(req,
1480 DEVLINK_INFO_VERSION_GENERIC_FW_PSID,
1481 fw_info_psid);
1482 if (err)
1483 return err;
1484
1485 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor);
1486 err = devlink_info_version_running_put(req, "fw.version", buf);
1487 if (err)
1488 return err;
1489
1490 return devlink_info_version_running_put(req,
1491 DEVLINK_INFO_VERSION_GENERIC_FW,
1492 buf);
1493 }
1494
1495 static int
mlxsw_devlink_core_bus_device_reload_down(struct devlink * devlink,bool netns_change,enum devlink_reload_action action,enum devlink_reload_limit limit,struct netlink_ext_ack * extack)1496 mlxsw_devlink_core_bus_device_reload_down(struct devlink *devlink,
1497 bool netns_change, enum devlink_reload_action action,
1498 enum devlink_reload_limit limit,
1499 struct netlink_ext_ack *extack)
1500 {
1501 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1502
1503 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
1504 return -EOPNOTSUPP;
1505
1506 mlxsw_core_bus_device_unregister(mlxsw_core, true);
1507 return 0;
1508 }
1509
1510 static int
mlxsw_devlink_core_bus_device_reload_up(struct devlink * devlink,enum devlink_reload_action action,enum devlink_reload_limit limit,u32 * actions_performed,struct netlink_ext_ack * extack)1511 mlxsw_devlink_core_bus_device_reload_up(struct devlink *devlink, enum devlink_reload_action action,
1512 enum devlink_reload_limit limit, u32 *actions_performed,
1513 struct netlink_ext_ack *extack)
1514 {
1515 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1516 int err;
1517
1518 *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1519 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE);
1520 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
1521 mlxsw_core->bus,
1522 mlxsw_core->bus_priv, true,
1523 devlink, extack);
1524 return err;
1525 }
1526
mlxsw_devlink_flash_update(struct devlink * devlink,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)1527 static int mlxsw_devlink_flash_update(struct devlink *devlink,
1528 struct devlink_flash_update_params *params,
1529 struct netlink_ext_ack *extack)
1530 {
1531 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1532
1533 return mlxsw_core_fw_flash_update(mlxsw_core, params, extack);
1534 }
1535
mlxsw_devlink_trap_init(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)1536 static int mlxsw_devlink_trap_init(struct devlink *devlink,
1537 const struct devlink_trap *trap,
1538 void *trap_ctx)
1539 {
1540 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1541 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1542
1543 if (!mlxsw_driver->trap_init)
1544 return -EOPNOTSUPP;
1545 return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx);
1546 }
1547
mlxsw_devlink_trap_fini(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)1548 static void mlxsw_devlink_trap_fini(struct devlink *devlink,
1549 const struct devlink_trap *trap,
1550 void *trap_ctx)
1551 {
1552 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1553 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1554
1555 if (!mlxsw_driver->trap_fini)
1556 return;
1557 mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx);
1558 }
1559
mlxsw_devlink_trap_action_set(struct devlink * devlink,const struct devlink_trap * trap,enum devlink_trap_action action,struct netlink_ext_ack * extack)1560 static int mlxsw_devlink_trap_action_set(struct devlink *devlink,
1561 const struct devlink_trap *trap,
1562 enum devlink_trap_action action,
1563 struct netlink_ext_ack *extack)
1564 {
1565 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1566 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1567
1568 if (!mlxsw_driver->trap_action_set)
1569 return -EOPNOTSUPP;
1570 return mlxsw_driver->trap_action_set(mlxsw_core, trap, action, extack);
1571 }
1572
1573 static int
mlxsw_devlink_trap_group_init(struct devlink * devlink,const struct devlink_trap_group * group)1574 mlxsw_devlink_trap_group_init(struct devlink *devlink,
1575 const struct devlink_trap_group *group)
1576 {
1577 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1578 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1579
1580 if (!mlxsw_driver->trap_group_init)
1581 return -EOPNOTSUPP;
1582 return mlxsw_driver->trap_group_init(mlxsw_core, group);
1583 }
1584
1585 static int
mlxsw_devlink_trap_group_set(struct devlink * devlink,const struct devlink_trap_group * group,const struct devlink_trap_policer * policer,struct netlink_ext_ack * extack)1586 mlxsw_devlink_trap_group_set(struct devlink *devlink,
1587 const struct devlink_trap_group *group,
1588 const struct devlink_trap_policer *policer,
1589 struct netlink_ext_ack *extack)
1590 {
1591 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1592 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1593
1594 if (!mlxsw_driver->trap_group_set)
1595 return -EOPNOTSUPP;
1596 return mlxsw_driver->trap_group_set(mlxsw_core, group, policer, extack);
1597 }
1598
1599 static int
mlxsw_devlink_trap_policer_init(struct devlink * devlink,const struct devlink_trap_policer * policer)1600 mlxsw_devlink_trap_policer_init(struct devlink *devlink,
1601 const struct devlink_trap_policer *policer)
1602 {
1603 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1604 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1605
1606 if (!mlxsw_driver->trap_policer_init)
1607 return -EOPNOTSUPP;
1608 return mlxsw_driver->trap_policer_init(mlxsw_core, policer);
1609 }
1610
1611 static void
mlxsw_devlink_trap_policer_fini(struct devlink * devlink,const struct devlink_trap_policer * policer)1612 mlxsw_devlink_trap_policer_fini(struct devlink *devlink,
1613 const struct devlink_trap_policer *policer)
1614 {
1615 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1616 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1617
1618 if (!mlxsw_driver->trap_policer_fini)
1619 return;
1620 mlxsw_driver->trap_policer_fini(mlxsw_core, policer);
1621 }
1622
1623 static int
mlxsw_devlink_trap_policer_set(struct devlink * devlink,const struct devlink_trap_policer * policer,u64 rate,u64 burst,struct netlink_ext_ack * extack)1624 mlxsw_devlink_trap_policer_set(struct devlink *devlink,
1625 const struct devlink_trap_policer *policer,
1626 u64 rate, u64 burst,
1627 struct netlink_ext_ack *extack)
1628 {
1629 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1630 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1631
1632 if (!mlxsw_driver->trap_policer_set)
1633 return -EOPNOTSUPP;
1634 return mlxsw_driver->trap_policer_set(mlxsw_core, policer, rate, burst,
1635 extack);
1636 }
1637
1638 static int
mlxsw_devlink_trap_policer_counter_get(struct devlink * devlink,const struct devlink_trap_policer * policer,u64 * p_drops)1639 mlxsw_devlink_trap_policer_counter_get(struct devlink *devlink,
1640 const struct devlink_trap_policer *policer,
1641 u64 *p_drops)
1642 {
1643 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1644 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1645
1646 if (!mlxsw_driver->trap_policer_counter_get)
1647 return -EOPNOTSUPP;
1648 return mlxsw_driver->trap_policer_counter_get(mlxsw_core, policer,
1649 p_drops);
1650 }
1651
1652 static const struct devlink_ops mlxsw_devlink_ops = {
1653 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1654 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
1655 .reload_down = mlxsw_devlink_core_bus_device_reload_down,
1656 .reload_up = mlxsw_devlink_core_bus_device_reload_up,
1657 .port_split = mlxsw_devlink_port_split,
1658 .port_unsplit = mlxsw_devlink_port_unsplit,
1659 .sb_pool_get = mlxsw_devlink_sb_pool_get,
1660 .sb_pool_set = mlxsw_devlink_sb_pool_set,
1661 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get,
1662 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set,
1663 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get,
1664 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set,
1665 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot,
1666 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear,
1667 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get,
1668 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get,
1669 .info_get = mlxsw_devlink_info_get,
1670 .flash_update = mlxsw_devlink_flash_update,
1671 .trap_init = mlxsw_devlink_trap_init,
1672 .trap_fini = mlxsw_devlink_trap_fini,
1673 .trap_action_set = mlxsw_devlink_trap_action_set,
1674 .trap_group_init = mlxsw_devlink_trap_group_init,
1675 .trap_group_set = mlxsw_devlink_trap_group_set,
1676 .trap_policer_init = mlxsw_devlink_trap_policer_init,
1677 .trap_policer_fini = mlxsw_devlink_trap_policer_fini,
1678 .trap_policer_set = mlxsw_devlink_trap_policer_set,
1679 .trap_policer_counter_get = mlxsw_devlink_trap_policer_counter_get,
1680 };
1681
mlxsw_core_params_register(struct mlxsw_core * mlxsw_core)1682 static int mlxsw_core_params_register(struct mlxsw_core *mlxsw_core)
1683 {
1684 int err;
1685
1686 err = mlxsw_core_fw_params_register(mlxsw_core);
1687 if (err)
1688 return err;
1689
1690 if (mlxsw_core->driver->params_register) {
1691 err = mlxsw_core->driver->params_register(mlxsw_core);
1692 if (err)
1693 goto err_params_register;
1694 }
1695 return 0;
1696
1697 err_params_register:
1698 mlxsw_core_fw_params_unregister(mlxsw_core);
1699 return err;
1700 }
1701
mlxsw_core_params_unregister(struct mlxsw_core * mlxsw_core)1702 static void mlxsw_core_params_unregister(struct mlxsw_core *mlxsw_core)
1703 {
1704 mlxsw_core_fw_params_unregister(mlxsw_core);
1705 if (mlxsw_core->driver->params_register)
1706 mlxsw_core->driver->params_unregister(mlxsw_core);
1707 }
1708
1709 struct mlxsw_core_health_event {
1710 struct mlxsw_core *mlxsw_core;
1711 char mfde_pl[MLXSW_REG_MFDE_LEN];
1712 struct work_struct work;
1713 };
1714
mlxsw_core_health_event_work(struct work_struct * work)1715 static void mlxsw_core_health_event_work(struct work_struct *work)
1716 {
1717 struct mlxsw_core_health_event *event;
1718 struct mlxsw_core *mlxsw_core;
1719
1720 event = container_of(work, struct mlxsw_core_health_event, work);
1721 mlxsw_core = event->mlxsw_core;
1722 devlink_health_report(mlxsw_core->health.fw_fatal, "FW fatal event occurred",
1723 event->mfde_pl);
1724 kfree(event);
1725 }
1726
mlxsw_core_health_listener_func(const struct mlxsw_reg_info * reg,char * mfde_pl,void * priv)1727 static void mlxsw_core_health_listener_func(const struct mlxsw_reg_info *reg,
1728 char *mfde_pl, void *priv)
1729 {
1730 struct mlxsw_core_health_event *event;
1731 struct mlxsw_core *mlxsw_core = priv;
1732
1733 event = kmalloc(sizeof(*event), GFP_ATOMIC);
1734 if (!event)
1735 return;
1736 event->mlxsw_core = mlxsw_core;
1737 memcpy(event->mfde_pl, mfde_pl, sizeof(event->mfde_pl));
1738 INIT_WORK(&event->work, mlxsw_core_health_event_work);
1739 mlxsw_core_schedule_work(&event->work);
1740 }
1741
1742 static const struct mlxsw_listener mlxsw_core_health_listener =
1743 MLXSW_CORE_EVENTL(mlxsw_core_health_listener_func, MFDE);
1744
1745 static int
mlxsw_core_health_fw_fatal_dump_fatal_cause(const char * mfde_pl,struct devlink_fmsg * fmsg)1746 mlxsw_core_health_fw_fatal_dump_fatal_cause(const char *mfde_pl,
1747 struct devlink_fmsg *fmsg)
1748 {
1749 u32 val, tile_v;
1750 int err;
1751
1752 val = mlxsw_reg_mfde_fatal_cause_id_get(mfde_pl);
1753 err = devlink_fmsg_u32_pair_put(fmsg, "cause_id", val);
1754 if (err)
1755 return err;
1756 tile_v = mlxsw_reg_mfde_fatal_cause_tile_v_get(mfde_pl);
1757 if (tile_v) {
1758 val = mlxsw_reg_mfde_fatal_cause_tile_index_get(mfde_pl);
1759 err = devlink_fmsg_u8_pair_put(fmsg, "tile_index", val);
1760 if (err)
1761 return err;
1762 }
1763
1764 return 0;
1765 }
1766
1767 static int
mlxsw_core_health_fw_fatal_dump_fw_assert(const char * mfde_pl,struct devlink_fmsg * fmsg)1768 mlxsw_core_health_fw_fatal_dump_fw_assert(const char *mfde_pl,
1769 struct devlink_fmsg *fmsg)
1770 {
1771 u32 val, tile_v;
1772 int err;
1773
1774 val = mlxsw_reg_mfde_fw_assert_var0_get(mfde_pl);
1775 err = devlink_fmsg_u32_pair_put(fmsg, "var0", val);
1776 if (err)
1777 return err;
1778 val = mlxsw_reg_mfde_fw_assert_var1_get(mfde_pl);
1779 err = devlink_fmsg_u32_pair_put(fmsg, "var1", val);
1780 if (err)
1781 return err;
1782 val = mlxsw_reg_mfde_fw_assert_var2_get(mfde_pl);
1783 err = devlink_fmsg_u32_pair_put(fmsg, "var2", val);
1784 if (err)
1785 return err;
1786 val = mlxsw_reg_mfde_fw_assert_var3_get(mfde_pl);
1787 err = devlink_fmsg_u32_pair_put(fmsg, "var3", val);
1788 if (err)
1789 return err;
1790 val = mlxsw_reg_mfde_fw_assert_var4_get(mfde_pl);
1791 err = devlink_fmsg_u32_pair_put(fmsg, "var4", val);
1792 if (err)
1793 return err;
1794 val = mlxsw_reg_mfde_fw_assert_existptr_get(mfde_pl);
1795 err = devlink_fmsg_u32_pair_put(fmsg, "existptr", val);
1796 if (err)
1797 return err;
1798 val = mlxsw_reg_mfde_fw_assert_callra_get(mfde_pl);
1799 err = devlink_fmsg_u32_pair_put(fmsg, "callra", val);
1800 if (err)
1801 return err;
1802 val = mlxsw_reg_mfde_fw_assert_oe_get(mfde_pl);
1803 err = devlink_fmsg_bool_pair_put(fmsg, "old_event", val);
1804 if (err)
1805 return err;
1806 tile_v = mlxsw_reg_mfde_fw_assert_tile_v_get(mfde_pl);
1807 if (tile_v) {
1808 val = mlxsw_reg_mfde_fw_assert_tile_index_get(mfde_pl);
1809 err = devlink_fmsg_u8_pair_put(fmsg, "tile_index", val);
1810 if (err)
1811 return err;
1812 }
1813 val = mlxsw_reg_mfde_fw_assert_ext_synd_get(mfde_pl);
1814 err = devlink_fmsg_u32_pair_put(fmsg, "ext_synd", val);
1815 if (err)
1816 return err;
1817
1818 return 0;
1819 }
1820
1821 static int
mlxsw_core_health_fw_fatal_dump_kvd_im_stop(const char * mfde_pl,struct devlink_fmsg * fmsg)1822 mlxsw_core_health_fw_fatal_dump_kvd_im_stop(const char *mfde_pl,
1823 struct devlink_fmsg *fmsg)
1824 {
1825 u32 val;
1826 int err;
1827
1828 val = mlxsw_reg_mfde_kvd_im_stop_oe_get(mfde_pl);
1829 err = devlink_fmsg_bool_pair_put(fmsg, "old_event", val);
1830 if (err)
1831 return err;
1832 val = mlxsw_reg_mfde_kvd_im_stop_pipes_mask_get(mfde_pl);
1833 return devlink_fmsg_u32_pair_put(fmsg, "pipes_mask", val);
1834 }
1835
1836 static int
mlxsw_core_health_fw_fatal_dump_crspace_to(const char * mfde_pl,struct devlink_fmsg * fmsg)1837 mlxsw_core_health_fw_fatal_dump_crspace_to(const char *mfde_pl,
1838 struct devlink_fmsg *fmsg)
1839 {
1840 u32 val;
1841 int err;
1842
1843 val = mlxsw_reg_mfde_crspace_to_log_address_get(mfde_pl);
1844 err = devlink_fmsg_u32_pair_put(fmsg, "log_address", val);
1845 if (err)
1846 return err;
1847 val = mlxsw_reg_mfde_crspace_to_oe_get(mfde_pl);
1848 err = devlink_fmsg_bool_pair_put(fmsg, "old_event", val);
1849 if (err)
1850 return err;
1851 val = mlxsw_reg_mfde_crspace_to_log_id_get(mfde_pl);
1852 err = devlink_fmsg_u8_pair_put(fmsg, "log_irisc_id", val);
1853 if (err)
1854 return err;
1855 val = mlxsw_reg_mfde_crspace_to_log_ip_get(mfde_pl);
1856 err = devlink_fmsg_u64_pair_put(fmsg, "log_ip", val);
1857 if (err)
1858 return err;
1859
1860 return 0;
1861 }
1862
mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter * reporter,struct devlink_fmsg * fmsg,void * priv_ctx,struct netlink_ext_ack * extack)1863 static int mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter *reporter,
1864 struct devlink_fmsg *fmsg, void *priv_ctx,
1865 struct netlink_ext_ack *extack)
1866 {
1867 char *mfde_pl = priv_ctx;
1868 char *val_str;
1869 u8 event_id;
1870 u32 val;
1871 int err;
1872
1873 if (!priv_ctx)
1874 /* User-triggered dumps are not possible */
1875 return -EOPNOTSUPP;
1876
1877 val = mlxsw_reg_mfde_irisc_id_get(mfde_pl);
1878 err = devlink_fmsg_u8_pair_put(fmsg, "irisc_id", val);
1879 if (err)
1880 return err;
1881 err = devlink_fmsg_arr_pair_nest_start(fmsg, "event");
1882 if (err)
1883 return err;
1884
1885 event_id = mlxsw_reg_mfde_event_id_get(mfde_pl);
1886 err = devlink_fmsg_u32_pair_put(fmsg, "id", event_id);
1887 if (err)
1888 return err;
1889 switch (event_id) {
1890 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO:
1891 val_str = "CR space timeout";
1892 break;
1893 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP:
1894 val_str = "KVD insertion machine stopped";
1895 break;
1896 case MLXSW_REG_MFDE_EVENT_ID_TEST:
1897 val_str = "Test";
1898 break;
1899 case MLXSW_REG_MFDE_EVENT_ID_FW_ASSERT:
1900 val_str = "FW assert";
1901 break;
1902 case MLXSW_REG_MFDE_EVENT_ID_FATAL_CAUSE:
1903 val_str = "Fatal cause";
1904 break;
1905 default:
1906 val_str = NULL;
1907 }
1908 if (val_str) {
1909 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str);
1910 if (err)
1911 return err;
1912 }
1913
1914 err = devlink_fmsg_arr_pair_nest_end(fmsg);
1915 if (err)
1916 return err;
1917
1918 err = devlink_fmsg_arr_pair_nest_start(fmsg, "severity");
1919 if (err)
1920 return err;
1921
1922 val = mlxsw_reg_mfde_severity_get(mfde_pl);
1923 err = devlink_fmsg_u8_pair_put(fmsg, "id", val);
1924 if (err)
1925 return err;
1926 switch (val) {
1927 case MLXSW_REG_MFDE_SEVERITY_FATL:
1928 val_str = "Fatal";
1929 break;
1930 case MLXSW_REG_MFDE_SEVERITY_NRML:
1931 val_str = "Normal";
1932 break;
1933 case MLXSW_REG_MFDE_SEVERITY_INTR:
1934 val_str = "Debug";
1935 break;
1936 default:
1937 val_str = NULL;
1938 }
1939 if (val_str) {
1940 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str);
1941 if (err)
1942 return err;
1943 }
1944
1945 err = devlink_fmsg_arr_pair_nest_end(fmsg);
1946 if (err)
1947 return err;
1948
1949 val = mlxsw_reg_mfde_method_get(mfde_pl);
1950 switch (val) {
1951 case MLXSW_REG_MFDE_METHOD_QUERY:
1952 val_str = "query";
1953 break;
1954 case MLXSW_REG_MFDE_METHOD_WRITE:
1955 val_str = "write";
1956 break;
1957 default:
1958 val_str = NULL;
1959 }
1960 if (val_str) {
1961 err = devlink_fmsg_string_pair_put(fmsg, "method", val_str);
1962 if (err)
1963 return err;
1964 }
1965
1966 val = mlxsw_reg_mfde_long_process_get(mfde_pl);
1967 err = devlink_fmsg_bool_pair_put(fmsg, "long_process", val);
1968 if (err)
1969 return err;
1970
1971 val = mlxsw_reg_mfde_command_type_get(mfde_pl);
1972 switch (val) {
1973 case MLXSW_REG_MFDE_COMMAND_TYPE_MAD:
1974 val_str = "mad";
1975 break;
1976 case MLXSW_REG_MFDE_COMMAND_TYPE_EMAD:
1977 val_str = "emad";
1978 break;
1979 case MLXSW_REG_MFDE_COMMAND_TYPE_CMDIF:
1980 val_str = "cmdif";
1981 break;
1982 default:
1983 val_str = NULL;
1984 }
1985 if (val_str) {
1986 err = devlink_fmsg_string_pair_put(fmsg, "command_type", val_str);
1987 if (err)
1988 return err;
1989 }
1990
1991 val = mlxsw_reg_mfde_reg_attr_id_get(mfde_pl);
1992 err = devlink_fmsg_u32_pair_put(fmsg, "reg_attr_id", val);
1993 if (err)
1994 return err;
1995
1996 switch (event_id) {
1997 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO:
1998 return mlxsw_core_health_fw_fatal_dump_crspace_to(mfde_pl,
1999 fmsg);
2000 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP:
2001 return mlxsw_core_health_fw_fatal_dump_kvd_im_stop(mfde_pl,
2002 fmsg);
2003 case MLXSW_REG_MFDE_EVENT_ID_FW_ASSERT:
2004 return mlxsw_core_health_fw_fatal_dump_fw_assert(mfde_pl, fmsg);
2005 case MLXSW_REG_MFDE_EVENT_ID_FATAL_CAUSE:
2006 return mlxsw_core_health_fw_fatal_dump_fatal_cause(mfde_pl,
2007 fmsg);
2008 }
2009
2010 return 0;
2011 }
2012
2013 static int
mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter * reporter,struct netlink_ext_ack * extack)2014 mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter *reporter,
2015 struct netlink_ext_ack *extack)
2016 {
2017 struct mlxsw_core *mlxsw_core = devlink_health_reporter_priv(reporter);
2018 char mfgd_pl[MLXSW_REG_MFGD_LEN];
2019 int err;
2020
2021 /* Read the register first to make sure no other bits are changed. */
2022 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
2023 if (err)
2024 return err;
2025 mlxsw_reg_mfgd_trigger_test_set(mfgd_pl, true);
2026 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
2027 }
2028
2029 static const struct devlink_health_reporter_ops
2030 mlxsw_core_health_fw_fatal_ops = {
2031 .name = "fw_fatal",
2032 .dump = mlxsw_core_health_fw_fatal_dump,
2033 .test = mlxsw_core_health_fw_fatal_test,
2034 };
2035
mlxsw_core_health_fw_fatal_config(struct mlxsw_core * mlxsw_core,bool enable)2036 static int mlxsw_core_health_fw_fatal_config(struct mlxsw_core *mlxsw_core,
2037 bool enable)
2038 {
2039 char mfgd_pl[MLXSW_REG_MFGD_LEN];
2040 int err;
2041
2042 /* Read the register first to make sure no other bits are changed. */
2043 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
2044 if (err)
2045 return err;
2046 mlxsw_reg_mfgd_fatal_event_mode_set(mfgd_pl, enable);
2047 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
2048 }
2049
mlxsw_core_health_init(struct mlxsw_core * mlxsw_core)2050 static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core)
2051 {
2052 struct devlink *devlink = priv_to_devlink(mlxsw_core);
2053 struct devlink_health_reporter *fw_fatal;
2054 int err;
2055
2056 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
2057 return 0;
2058
2059 fw_fatal = devlink_health_reporter_create(devlink, &mlxsw_core_health_fw_fatal_ops,
2060 0, mlxsw_core);
2061 if (IS_ERR(fw_fatal)) {
2062 dev_err(mlxsw_core->bus_info->dev, "Failed to create fw fatal reporter");
2063 return PTR_ERR(fw_fatal);
2064 }
2065 mlxsw_core->health.fw_fatal = fw_fatal;
2066
2067 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
2068 if (err)
2069 goto err_trap_register;
2070
2071 err = mlxsw_core_health_fw_fatal_config(mlxsw_core, true);
2072 if (err)
2073 goto err_fw_fatal_config;
2074
2075 return 0;
2076
2077 err_fw_fatal_config:
2078 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
2079 err_trap_register:
2080 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
2081 return err;
2082 }
2083
mlxsw_core_health_fini(struct mlxsw_core * mlxsw_core)2084 static void mlxsw_core_health_fini(struct mlxsw_core *mlxsw_core)
2085 {
2086 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
2087 return;
2088
2089 mlxsw_core_health_fw_fatal_config(mlxsw_core, false);
2090 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
2091 /* Make sure there is no more event work scheduled */
2092 mlxsw_core_flush_owq();
2093 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
2094 }
2095
mlxsw_core_irq_event_handler_init(struct mlxsw_core * mlxsw_core)2096 static void mlxsw_core_irq_event_handler_init(struct mlxsw_core *mlxsw_core)
2097 {
2098 INIT_LIST_HEAD(&mlxsw_core->irq_event_handler_list);
2099 mutex_init(&mlxsw_core->irq_event_handler_lock);
2100 }
2101
mlxsw_core_irq_event_handler_fini(struct mlxsw_core * mlxsw_core)2102 static void mlxsw_core_irq_event_handler_fini(struct mlxsw_core *mlxsw_core)
2103 {
2104 mutex_destroy(&mlxsw_core->irq_event_handler_lock);
2105 WARN_ON(!list_empty(&mlxsw_core->irq_event_handler_list));
2106 }
2107
2108 static int
__mlxsw_core_bus_device_register(const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_bus * mlxsw_bus,void * bus_priv,bool reload,struct devlink * devlink,struct netlink_ext_ack * extack)2109 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
2110 const struct mlxsw_bus *mlxsw_bus,
2111 void *bus_priv, bool reload,
2112 struct devlink *devlink,
2113 struct netlink_ext_ack *extack)
2114 {
2115 const char *device_kind = mlxsw_bus_info->device_kind;
2116 struct mlxsw_core *mlxsw_core;
2117 struct mlxsw_driver *mlxsw_driver;
2118 size_t alloc_size;
2119 u16 max_lag;
2120 int err;
2121
2122 mlxsw_driver = mlxsw_core_driver_get(device_kind);
2123 if (!mlxsw_driver)
2124 return -EINVAL;
2125
2126 if (!reload) {
2127 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
2128 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size,
2129 mlxsw_bus_info->dev);
2130 if (!devlink) {
2131 err = -ENOMEM;
2132 goto err_devlink_alloc;
2133 }
2134 devl_lock(devlink);
2135 }
2136
2137 mlxsw_core = devlink_priv(devlink);
2138 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
2139 INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
2140 mlxsw_core->driver = mlxsw_driver;
2141 mlxsw_core->bus = mlxsw_bus;
2142 mlxsw_core->bus_priv = bus_priv;
2143 mlxsw_core->bus_info = mlxsw_bus_info;
2144 mlxsw_core_irq_event_handler_init(mlxsw_core);
2145
2146 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile,
2147 &mlxsw_core->res);
2148 if (err)
2149 goto err_bus_init;
2150
2151 if (mlxsw_driver->resources_register && !reload) {
2152 err = mlxsw_driver->resources_register(mlxsw_core);
2153 if (err)
2154 goto err_register_resources;
2155 }
2156
2157 err = mlxsw_ports_init(mlxsw_core, reload);
2158 if (err)
2159 goto err_ports_init;
2160
2161 err = mlxsw_core_max_lag(mlxsw_core, &max_lag);
2162 if (!err && MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
2163 alloc_size = sizeof(*mlxsw_core->lag.mapping) * max_lag *
2164 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
2165 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
2166 if (!mlxsw_core->lag.mapping) {
2167 err = -ENOMEM;
2168 goto err_alloc_lag_mapping;
2169 }
2170 }
2171
2172 err = mlxsw_core_trap_groups_set(mlxsw_core);
2173 if (err)
2174 goto err_trap_groups_set;
2175
2176 err = mlxsw_emad_init(mlxsw_core);
2177 if (err)
2178 goto err_emad_init;
2179
2180 if (!reload) {
2181 err = mlxsw_core_params_register(mlxsw_core);
2182 if (err)
2183 goto err_register_params;
2184 }
2185
2186 err = mlxsw_core_fw_rev_validate(mlxsw_core, mlxsw_bus_info, mlxsw_driver->fw_req_rev,
2187 mlxsw_driver->fw_filename);
2188 if (err)
2189 goto err_fw_rev_validate;
2190
2191 err = mlxsw_linecards_init(mlxsw_core, mlxsw_bus_info);
2192 if (err)
2193 goto err_linecards_init;
2194
2195 err = mlxsw_core_health_init(mlxsw_core);
2196 if (err)
2197 goto err_health_init;
2198
2199 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
2200 if (err)
2201 goto err_hwmon_init;
2202
2203 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
2204 &mlxsw_core->thermal);
2205 if (err)
2206 goto err_thermal_init;
2207
2208 err = mlxsw_env_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->env);
2209 if (err)
2210 goto err_env_init;
2211
2212 if (mlxsw_driver->init) {
2213 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack);
2214 if (err)
2215 goto err_driver_init;
2216 }
2217
2218 if (!reload) {
2219 devlink_set_features(devlink, DEVLINK_F_RELOAD);
2220 devl_unlock(devlink);
2221 devlink_register(devlink);
2222 }
2223 return 0;
2224
2225 err_driver_init:
2226 mlxsw_env_fini(mlxsw_core->env);
2227 err_env_init:
2228 mlxsw_thermal_fini(mlxsw_core->thermal);
2229 err_thermal_init:
2230 mlxsw_hwmon_fini(mlxsw_core->hwmon);
2231 err_hwmon_init:
2232 mlxsw_core_health_fini(mlxsw_core);
2233 err_health_init:
2234 mlxsw_linecards_fini(mlxsw_core);
2235 err_linecards_init:
2236 err_fw_rev_validate:
2237 if (!reload)
2238 mlxsw_core_params_unregister(mlxsw_core);
2239 err_register_params:
2240 mlxsw_emad_fini(mlxsw_core);
2241 err_emad_init:
2242 err_trap_groups_set:
2243 kfree(mlxsw_core->lag.mapping);
2244 err_alloc_lag_mapping:
2245 mlxsw_ports_fini(mlxsw_core, reload);
2246 err_ports_init:
2247 if (!reload)
2248 devl_resources_unregister(devlink);
2249 err_register_resources:
2250 mlxsw_bus->fini(bus_priv);
2251 err_bus_init:
2252 mlxsw_core_irq_event_handler_fini(mlxsw_core);
2253 if (!reload) {
2254 devl_unlock(devlink);
2255 devlink_free(devlink);
2256 }
2257 err_devlink_alloc:
2258 return err;
2259 }
2260
mlxsw_core_bus_device_register(const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_bus * mlxsw_bus,void * bus_priv,bool reload,struct devlink * devlink,struct netlink_ext_ack * extack)2261 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
2262 const struct mlxsw_bus *mlxsw_bus,
2263 void *bus_priv, bool reload,
2264 struct devlink *devlink,
2265 struct netlink_ext_ack *extack)
2266 {
2267 bool called_again = false;
2268 int err;
2269
2270 again:
2271 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
2272 bus_priv, reload,
2273 devlink, extack);
2274 /* -EAGAIN is returned in case the FW was updated. FW needs
2275 * a reset, so lets try to call __mlxsw_core_bus_device_register()
2276 * again.
2277 */
2278 if (err == -EAGAIN && !called_again) {
2279 called_again = true;
2280 goto again;
2281 }
2282
2283 return err;
2284 }
2285 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
2286
mlxsw_core_bus_device_unregister(struct mlxsw_core * mlxsw_core,bool reload)2287 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
2288 bool reload)
2289 {
2290 struct devlink *devlink = priv_to_devlink(mlxsw_core);
2291
2292 if (!reload) {
2293 devlink_unregister(devlink);
2294 devl_lock(devlink);
2295 }
2296
2297 if (devlink_is_reload_failed(devlink)) {
2298 if (!reload)
2299 /* Only the parts that were not de-initialized in the
2300 * failed reload attempt need to be de-initialized.
2301 */
2302 goto reload_fail_deinit;
2303 else
2304 return;
2305 }
2306
2307 if (mlxsw_core->driver->fini)
2308 mlxsw_core->driver->fini(mlxsw_core);
2309 mlxsw_env_fini(mlxsw_core->env);
2310 mlxsw_thermal_fini(mlxsw_core->thermal);
2311 mlxsw_hwmon_fini(mlxsw_core->hwmon);
2312 mlxsw_core_health_fini(mlxsw_core);
2313 mlxsw_linecards_fini(mlxsw_core);
2314 if (!reload)
2315 mlxsw_core_params_unregister(mlxsw_core);
2316 mlxsw_emad_fini(mlxsw_core);
2317 kfree(mlxsw_core->lag.mapping);
2318 mlxsw_ports_fini(mlxsw_core, reload);
2319 if (!reload)
2320 devl_resources_unregister(devlink);
2321 mlxsw_core->bus->fini(mlxsw_core->bus_priv);
2322 mlxsw_core_irq_event_handler_fini(mlxsw_core);
2323 if (!reload) {
2324 devl_unlock(devlink);
2325 devlink_free(devlink);
2326 }
2327
2328 return;
2329
2330 reload_fail_deinit:
2331 mlxsw_core_params_unregister(mlxsw_core);
2332 devl_resources_unregister(devlink);
2333 devl_unlock(devlink);
2334 devlink_free(devlink);
2335 }
2336 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
2337
mlxsw_core_skb_transmit_busy(struct mlxsw_core * mlxsw_core,const struct mlxsw_tx_info * tx_info)2338 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
2339 const struct mlxsw_tx_info *tx_info)
2340 {
2341 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
2342 tx_info);
2343 }
2344 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
2345
mlxsw_core_skb_transmit(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,const struct mlxsw_tx_info * tx_info)2346 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2347 const struct mlxsw_tx_info *tx_info)
2348 {
2349 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
2350 tx_info);
2351 }
2352 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
2353
mlxsw_core_ptp_transmitted(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,u16 local_port)2354 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
2355 struct sk_buff *skb, u16 local_port)
2356 {
2357 if (mlxsw_core->driver->ptp_transmitted)
2358 mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb,
2359 local_port);
2360 }
2361 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted);
2362
__is_rx_listener_equal(const struct mlxsw_rx_listener * rxl_a,const struct mlxsw_rx_listener * rxl_b)2363 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
2364 const struct mlxsw_rx_listener *rxl_b)
2365 {
2366 return (rxl_a->func == rxl_b->func &&
2367 rxl_a->local_port == rxl_b->local_port &&
2368 rxl_a->trap_id == rxl_b->trap_id &&
2369 rxl_a->mirror_reason == rxl_b->mirror_reason);
2370 }
2371
2372 static struct mlxsw_rx_listener_item *
__find_rx_listener_item(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl)2373 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
2374 const struct mlxsw_rx_listener *rxl)
2375 {
2376 struct mlxsw_rx_listener_item *rxl_item;
2377
2378 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
2379 if (__is_rx_listener_equal(&rxl_item->rxl, rxl))
2380 return rxl_item;
2381 }
2382 return NULL;
2383 }
2384
mlxsw_core_rx_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,void * priv,bool enabled)2385 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
2386 const struct mlxsw_rx_listener *rxl,
2387 void *priv, bool enabled)
2388 {
2389 struct mlxsw_rx_listener_item *rxl_item;
2390
2391 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2392 if (rxl_item)
2393 return -EEXIST;
2394 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
2395 if (!rxl_item)
2396 return -ENOMEM;
2397 rxl_item->rxl = *rxl;
2398 rxl_item->priv = priv;
2399 rxl_item->enabled = enabled;
2400
2401 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
2402 return 0;
2403 }
2404 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
2405
mlxsw_core_rx_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl)2406 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
2407 const struct mlxsw_rx_listener *rxl)
2408 {
2409 struct mlxsw_rx_listener_item *rxl_item;
2410
2411 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2412 if (!rxl_item)
2413 return;
2414 list_del_rcu(&rxl_item->list);
2415 synchronize_rcu();
2416 kfree(rxl_item);
2417 }
2418 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
2419
2420 static void
mlxsw_core_rx_listener_state_set(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,bool enabled)2421 mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core,
2422 const struct mlxsw_rx_listener *rxl,
2423 bool enabled)
2424 {
2425 struct mlxsw_rx_listener_item *rxl_item;
2426
2427 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2428 if (WARN_ON(!rxl_item))
2429 return;
2430 rxl_item->enabled = enabled;
2431 }
2432
mlxsw_core_event_listener_func(struct sk_buff * skb,u16 local_port,void * priv)2433 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u16 local_port,
2434 void *priv)
2435 {
2436 struct mlxsw_event_listener_item *event_listener_item = priv;
2437 struct mlxsw_core *mlxsw_core;
2438 struct mlxsw_reg_info reg;
2439 char *payload;
2440 char *reg_tlv;
2441 char *op_tlv;
2442
2443 mlxsw_core = event_listener_item->mlxsw_core;
2444 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
2445 skb->data, skb->len);
2446
2447 mlxsw_emad_tlv_parse(skb);
2448 op_tlv = mlxsw_emad_op_tlv(skb);
2449 reg_tlv = mlxsw_emad_reg_tlv(skb);
2450
2451 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
2452 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
2453 payload = mlxsw_emad_reg_payload(reg_tlv);
2454 event_listener_item->el.func(®, payload, event_listener_item->priv);
2455 dev_kfree_skb(skb);
2456 }
2457
__is_event_listener_equal(const struct mlxsw_event_listener * el_a,const struct mlxsw_event_listener * el_b)2458 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
2459 const struct mlxsw_event_listener *el_b)
2460 {
2461 return (el_a->func == el_b->func &&
2462 el_a->trap_id == el_b->trap_id);
2463 }
2464
2465 static struct mlxsw_event_listener_item *
__find_event_listener_item(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el)2466 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
2467 const struct mlxsw_event_listener *el)
2468 {
2469 struct mlxsw_event_listener_item *el_item;
2470
2471 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
2472 if (__is_event_listener_equal(&el_item->el, el))
2473 return el_item;
2474 }
2475 return NULL;
2476 }
2477
mlxsw_core_event_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el,void * priv)2478 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
2479 const struct mlxsw_event_listener *el,
2480 void *priv)
2481 {
2482 int err;
2483 struct mlxsw_event_listener_item *el_item;
2484 const struct mlxsw_rx_listener rxl = {
2485 .func = mlxsw_core_event_listener_func,
2486 .local_port = MLXSW_PORT_DONT_CARE,
2487 .trap_id = el->trap_id,
2488 };
2489
2490 el_item = __find_event_listener_item(mlxsw_core, el);
2491 if (el_item)
2492 return -EEXIST;
2493 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
2494 if (!el_item)
2495 return -ENOMEM;
2496 el_item->mlxsw_core = mlxsw_core;
2497 el_item->el = *el;
2498 el_item->priv = priv;
2499
2500 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item, true);
2501 if (err)
2502 goto err_rx_listener_register;
2503
2504 /* No reason to save item if we did not manage to register an RX
2505 * listener for it.
2506 */
2507 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
2508
2509 return 0;
2510
2511 err_rx_listener_register:
2512 kfree(el_item);
2513 return err;
2514 }
2515 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
2516
mlxsw_core_event_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el)2517 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
2518 const struct mlxsw_event_listener *el)
2519 {
2520 struct mlxsw_event_listener_item *el_item;
2521 const struct mlxsw_rx_listener rxl = {
2522 .func = mlxsw_core_event_listener_func,
2523 .local_port = MLXSW_PORT_DONT_CARE,
2524 .trap_id = el->trap_id,
2525 };
2526
2527 el_item = __find_event_listener_item(mlxsw_core, el);
2528 if (!el_item)
2529 return;
2530 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl);
2531 list_del(&el_item->list);
2532 kfree(el_item);
2533 }
2534 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
2535
mlxsw_core_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv,bool enabled)2536 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
2537 const struct mlxsw_listener *listener,
2538 void *priv, bool enabled)
2539 {
2540 if (listener->is_event) {
2541 WARN_ON(!enabled);
2542 return mlxsw_core_event_listener_register(mlxsw_core,
2543 &listener->event_listener,
2544 priv);
2545 } else {
2546 return mlxsw_core_rx_listener_register(mlxsw_core,
2547 &listener->rx_listener,
2548 priv, enabled);
2549 }
2550 }
2551
mlxsw_core_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)2552 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
2553 const struct mlxsw_listener *listener,
2554 void *priv)
2555 {
2556 if (listener->is_event)
2557 mlxsw_core_event_listener_unregister(mlxsw_core,
2558 &listener->event_listener);
2559 else
2560 mlxsw_core_rx_listener_unregister(mlxsw_core,
2561 &listener->rx_listener);
2562 }
2563
mlxsw_core_trap_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)2564 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
2565 const struct mlxsw_listener *listener, void *priv)
2566 {
2567 enum mlxsw_reg_htgt_trap_group trap_group;
2568 enum mlxsw_reg_hpkt_action action;
2569 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2570 int err;
2571
2572 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
2573 return 0;
2574
2575 err = mlxsw_core_listener_register(mlxsw_core, listener, priv,
2576 listener->enabled_on_register);
2577 if (err)
2578 return err;
2579
2580 action = listener->enabled_on_register ? listener->en_action :
2581 listener->dis_action;
2582 trap_group = listener->enabled_on_register ? listener->en_trap_group :
2583 listener->dis_trap_group;
2584 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2585 trap_group, listener->is_ctrl);
2586 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2587 if (err)
2588 goto err_trap_set;
2589
2590 return 0;
2591
2592 err_trap_set:
2593 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2594 return err;
2595 }
2596 EXPORT_SYMBOL(mlxsw_core_trap_register);
2597
mlxsw_core_trap_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)2598 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
2599 const struct mlxsw_listener *listener,
2600 void *priv)
2601 {
2602 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2603
2604 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
2605 return;
2606
2607 if (!listener->is_event) {
2608 mlxsw_reg_hpkt_pack(hpkt_pl, listener->dis_action,
2609 listener->trap_id, listener->dis_trap_group,
2610 listener->is_ctrl);
2611 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2612 }
2613
2614 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2615 }
2616 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
2617
mlxsw_core_traps_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listeners,size_t listeners_count,void * priv)2618 int mlxsw_core_traps_register(struct mlxsw_core *mlxsw_core,
2619 const struct mlxsw_listener *listeners,
2620 size_t listeners_count, void *priv)
2621 {
2622 int i, err;
2623
2624 for (i = 0; i < listeners_count; i++) {
2625 err = mlxsw_core_trap_register(mlxsw_core,
2626 &listeners[i],
2627 priv);
2628 if (err)
2629 goto err_listener_register;
2630 }
2631 return 0;
2632
2633 err_listener_register:
2634 for (i--; i >= 0; i--) {
2635 mlxsw_core_trap_unregister(mlxsw_core,
2636 &listeners[i],
2637 priv);
2638 }
2639 return err;
2640 }
2641 EXPORT_SYMBOL(mlxsw_core_traps_register);
2642
mlxsw_core_traps_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listeners,size_t listeners_count,void * priv)2643 void mlxsw_core_traps_unregister(struct mlxsw_core *mlxsw_core,
2644 const struct mlxsw_listener *listeners,
2645 size_t listeners_count, void *priv)
2646 {
2647 int i;
2648
2649 for (i = 0; i < listeners_count; i++) {
2650 mlxsw_core_trap_unregister(mlxsw_core,
2651 &listeners[i],
2652 priv);
2653 }
2654 }
2655 EXPORT_SYMBOL(mlxsw_core_traps_unregister);
2656
mlxsw_core_trap_state_set(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,bool enabled)2657 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
2658 const struct mlxsw_listener *listener,
2659 bool enabled)
2660 {
2661 enum mlxsw_reg_htgt_trap_group trap_group;
2662 enum mlxsw_reg_hpkt_action action;
2663 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2664 int err;
2665
2666 /* Not supported for event listener */
2667 if (WARN_ON(listener->is_event))
2668 return -EINVAL;
2669
2670 action = enabled ? listener->en_action : listener->dis_action;
2671 trap_group = enabled ? listener->en_trap_group :
2672 listener->dis_trap_group;
2673 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2674 trap_group, listener->is_ctrl);
2675 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2676 if (err)
2677 return err;
2678
2679 mlxsw_core_rx_listener_state_set(mlxsw_core, &listener->rx_listener,
2680 enabled);
2681 return 0;
2682 }
2683 EXPORT_SYMBOL(mlxsw_core_trap_state_set);
2684
mlxsw_core_tid_get(struct mlxsw_core * mlxsw_core)2685 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
2686 {
2687 return atomic64_inc_return(&mlxsw_core->emad.tid);
2688 }
2689
mlxsw_core_reg_access_emad(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)2690 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
2691 const struct mlxsw_reg_info *reg,
2692 char *payload,
2693 enum mlxsw_core_reg_access_type type,
2694 struct list_head *bulk_list,
2695 mlxsw_reg_trans_cb_t *cb,
2696 unsigned long cb_priv)
2697 {
2698 u64 tid = mlxsw_core_tid_get(mlxsw_core);
2699 struct mlxsw_reg_trans *trans;
2700 int err;
2701
2702 trans = kzalloc(sizeof(*trans), GFP_KERNEL);
2703 if (!trans)
2704 return -ENOMEM;
2705
2706 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
2707 bulk_list, cb, cb_priv, tid);
2708 if (err) {
2709 kfree_rcu(trans, rcu);
2710 return err;
2711 }
2712 return 0;
2713 }
2714
mlxsw_reg_trans_query(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)2715 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
2716 const struct mlxsw_reg_info *reg, char *payload,
2717 struct list_head *bulk_list,
2718 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2719 {
2720 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2721 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
2722 bulk_list, cb, cb_priv);
2723 }
2724 EXPORT_SYMBOL(mlxsw_reg_trans_query);
2725
mlxsw_reg_trans_write(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)2726 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
2727 const struct mlxsw_reg_info *reg, char *payload,
2728 struct list_head *bulk_list,
2729 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2730 {
2731 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2732 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
2733 bulk_list, cb, cb_priv);
2734 }
2735 EXPORT_SYMBOL(mlxsw_reg_trans_write);
2736
2737 #define MLXSW_REG_TRANS_ERR_STRING_SIZE 256
2738
mlxsw_reg_trans_wait(struct mlxsw_reg_trans * trans)2739 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
2740 {
2741 char err_string[MLXSW_REG_TRANS_ERR_STRING_SIZE];
2742 struct mlxsw_core *mlxsw_core = trans->core;
2743 int err;
2744
2745 wait_for_completion(&trans->completion);
2746 cancel_delayed_work_sync(&trans->timeout_dw);
2747 err = trans->err;
2748
2749 if (trans->retries)
2750 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
2751 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
2752 if (err) {
2753 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
2754 trans->tid, trans->reg->id,
2755 mlxsw_reg_id_str(trans->reg->id),
2756 mlxsw_core_reg_access_type_str(trans->type),
2757 trans->emad_status,
2758 mlxsw_emad_op_tlv_status_str(trans->emad_status));
2759
2760 snprintf(err_string, MLXSW_REG_TRANS_ERR_STRING_SIZE,
2761 "(tid=%llx,reg_id=%x(%s)) %s (%s)\n", trans->tid,
2762 trans->reg->id, mlxsw_reg_id_str(trans->reg->id),
2763 mlxsw_emad_op_tlv_status_str(trans->emad_status),
2764 trans->emad_err_string ? trans->emad_err_string : "");
2765
2766 trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
2767 trans->emad_status, err_string);
2768
2769 kfree(trans->emad_err_string);
2770 }
2771
2772 list_del(&trans->bulk_list);
2773 kfree_rcu(trans, rcu);
2774 return err;
2775 }
2776
mlxsw_reg_trans_bulk_wait(struct list_head * bulk_list)2777 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
2778 {
2779 struct mlxsw_reg_trans *trans;
2780 struct mlxsw_reg_trans *tmp;
2781 int sum_err = 0;
2782 int err;
2783
2784 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
2785 err = mlxsw_reg_trans_wait(trans);
2786 if (err && sum_err == 0)
2787 sum_err = err; /* first error to be returned */
2788 }
2789 return sum_err;
2790 }
2791 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
2792
2793 struct mlxsw_core_irq_event_handler_item {
2794 struct list_head list;
2795 void (*cb)(struct mlxsw_core *mlxsw_core);
2796 };
2797
mlxsw_core_irq_event_handler_register(struct mlxsw_core * mlxsw_core,mlxsw_irq_event_cb_t cb)2798 int mlxsw_core_irq_event_handler_register(struct mlxsw_core *mlxsw_core,
2799 mlxsw_irq_event_cb_t cb)
2800 {
2801 struct mlxsw_core_irq_event_handler_item *item;
2802
2803 item = kzalloc(sizeof(*item), GFP_KERNEL);
2804 if (!item)
2805 return -ENOMEM;
2806 item->cb = cb;
2807 mutex_lock(&mlxsw_core->irq_event_handler_lock);
2808 list_add_tail(&item->list, &mlxsw_core->irq_event_handler_list);
2809 mutex_unlock(&mlxsw_core->irq_event_handler_lock);
2810 return 0;
2811 }
2812 EXPORT_SYMBOL(mlxsw_core_irq_event_handler_register);
2813
mlxsw_core_irq_event_handler_unregister(struct mlxsw_core * mlxsw_core,mlxsw_irq_event_cb_t cb)2814 void mlxsw_core_irq_event_handler_unregister(struct mlxsw_core *mlxsw_core,
2815 mlxsw_irq_event_cb_t cb)
2816 {
2817 struct mlxsw_core_irq_event_handler_item *item, *tmp;
2818
2819 mutex_lock(&mlxsw_core->irq_event_handler_lock);
2820 list_for_each_entry_safe(item, tmp,
2821 &mlxsw_core->irq_event_handler_list, list) {
2822 if (item->cb == cb) {
2823 list_del(&item->list);
2824 kfree(item);
2825 }
2826 }
2827 mutex_unlock(&mlxsw_core->irq_event_handler_lock);
2828 }
2829 EXPORT_SYMBOL(mlxsw_core_irq_event_handler_unregister);
2830
mlxsw_core_irq_event_handlers_call(struct mlxsw_core * mlxsw_core)2831 void mlxsw_core_irq_event_handlers_call(struct mlxsw_core *mlxsw_core)
2832 {
2833 struct mlxsw_core_irq_event_handler_item *item;
2834
2835 mutex_lock(&mlxsw_core->irq_event_handler_lock);
2836 list_for_each_entry(item, &mlxsw_core->irq_event_handler_list, list) {
2837 if (item->cb)
2838 item->cb(mlxsw_core);
2839 }
2840 mutex_unlock(&mlxsw_core->irq_event_handler_lock);
2841 }
2842 EXPORT_SYMBOL(mlxsw_core_irq_event_handlers_call);
2843
mlxsw_core_reg_access_cmd(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type)2844 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
2845 const struct mlxsw_reg_info *reg,
2846 char *payload,
2847 enum mlxsw_core_reg_access_type type)
2848 {
2849 enum mlxsw_emad_op_tlv_status status;
2850 int err, n_retry;
2851 bool reset_ok;
2852 char *in_mbox, *out_mbox, *tmp;
2853
2854 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
2855 reg->id, mlxsw_reg_id_str(reg->id),
2856 mlxsw_core_reg_access_type_str(type));
2857
2858 in_mbox = mlxsw_cmd_mbox_alloc();
2859 if (!in_mbox)
2860 return -ENOMEM;
2861
2862 out_mbox = mlxsw_cmd_mbox_alloc();
2863 if (!out_mbox) {
2864 err = -ENOMEM;
2865 goto free_in_mbox;
2866 }
2867
2868 mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
2869 mlxsw_core_tid_get(mlxsw_core));
2870 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
2871 mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
2872
2873 /* There is a special treatment needed for MRSR (reset) register.
2874 * The command interface will return error after the command
2875 * is executed, so tell the lower layer to expect it
2876 * and cope accordingly.
2877 */
2878 reset_ok = reg->id == MLXSW_REG_MRSR_ID;
2879
2880 n_retry = 0;
2881 retry:
2882 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
2883 if (!err) {
2884 err = mlxsw_emad_process_status(out_mbox, &status);
2885 if (err) {
2886 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
2887 goto retry;
2888 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
2889 status, mlxsw_emad_op_tlv_status_str(status));
2890 }
2891 }
2892
2893 if (!err)
2894 memcpy(payload, mlxsw_emad_reg_payload_cmd(out_mbox),
2895 reg->len);
2896
2897 mlxsw_cmd_mbox_free(out_mbox);
2898 free_in_mbox:
2899 mlxsw_cmd_mbox_free(in_mbox);
2900 if (err)
2901 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
2902 reg->id, mlxsw_reg_id_str(reg->id),
2903 mlxsw_core_reg_access_type_str(type));
2904 return err;
2905 }
2906
mlxsw_core_reg_access_cb(struct mlxsw_core * mlxsw_core,char * payload,size_t payload_len,unsigned long cb_priv)2907 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
2908 char *payload, size_t payload_len,
2909 unsigned long cb_priv)
2910 {
2911 char *orig_payload = (char *) cb_priv;
2912
2913 memcpy(orig_payload, payload, payload_len);
2914 }
2915
mlxsw_core_reg_access(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type)2916 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
2917 const struct mlxsw_reg_info *reg,
2918 char *payload,
2919 enum mlxsw_core_reg_access_type type)
2920 {
2921 LIST_HEAD(bulk_list);
2922 int err;
2923
2924 /* During initialization EMAD interface is not available to us,
2925 * so we default to command interface. We switch to EMAD interface
2926 * after setting the appropriate traps.
2927 */
2928 if (!mlxsw_core->emad.use_emad)
2929 return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
2930 payload, type);
2931
2932 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
2933 payload, type, &bulk_list,
2934 mlxsw_core_reg_access_cb,
2935 (unsigned long) payload);
2936 if (err)
2937 return err;
2938 return mlxsw_reg_trans_bulk_wait(&bulk_list);
2939 }
2940
mlxsw_reg_query(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload)2941 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
2942 const struct mlxsw_reg_info *reg, char *payload)
2943 {
2944 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2945 MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
2946 }
2947 EXPORT_SYMBOL(mlxsw_reg_query);
2948
mlxsw_reg_write(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload)2949 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
2950 const struct mlxsw_reg_info *reg, char *payload)
2951 {
2952 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2953 MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
2954 }
2955 EXPORT_SYMBOL(mlxsw_reg_write);
2956
mlxsw_core_skb_receive(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,struct mlxsw_rx_info * rx_info)2957 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2958 struct mlxsw_rx_info *rx_info)
2959 {
2960 struct mlxsw_rx_listener_item *rxl_item;
2961 const struct mlxsw_rx_listener *rxl;
2962 u16 local_port;
2963 bool found = false;
2964
2965 if (rx_info->is_lag) {
2966 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
2967 __func__, rx_info->u.lag_id,
2968 rx_info->trap_id);
2969 /* Upper layer does not care if the skb came from LAG or not,
2970 * so just get the local_port for the lag port and push it up.
2971 */
2972 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
2973 rx_info->u.lag_id,
2974 rx_info->lag_port_index);
2975 } else {
2976 local_port = rx_info->u.sys_port;
2977 }
2978
2979 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
2980 __func__, local_port, rx_info->trap_id);
2981
2982 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
2983 (local_port >= mlxsw_core->max_ports))
2984 goto drop;
2985
2986 rcu_read_lock();
2987 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
2988 rxl = &rxl_item->rxl;
2989 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
2990 rxl->local_port == local_port) &&
2991 rxl->trap_id == rx_info->trap_id &&
2992 rxl->mirror_reason == rx_info->mirror_reason) {
2993 if (rxl_item->enabled)
2994 found = true;
2995 break;
2996 }
2997 }
2998 if (!found) {
2999 rcu_read_unlock();
3000 goto drop;
3001 }
3002
3003 rxl->func(skb, local_port, rxl_item->priv);
3004 rcu_read_unlock();
3005 return;
3006
3007 drop:
3008 dev_kfree_skb(skb);
3009 }
3010 EXPORT_SYMBOL(mlxsw_core_skb_receive);
3011
mlxsw_core_lag_mapping_index(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index)3012 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
3013 u16 lag_id, u8 port_index)
3014 {
3015 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
3016 port_index;
3017 }
3018
mlxsw_core_lag_mapping_set(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index,u16 local_port)3019 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
3020 u16 lag_id, u8 port_index, u16 local_port)
3021 {
3022 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
3023 lag_id, port_index);
3024
3025 mlxsw_core->lag.mapping[index] = local_port;
3026 }
3027 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
3028
mlxsw_core_lag_mapping_get(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index)3029 u16 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
3030 u16 lag_id, u8 port_index)
3031 {
3032 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
3033 lag_id, port_index);
3034
3035 return mlxsw_core->lag.mapping[index];
3036 }
3037 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
3038
mlxsw_core_lag_mapping_clear(struct mlxsw_core * mlxsw_core,u16 lag_id,u16 local_port)3039 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
3040 u16 lag_id, u16 local_port)
3041 {
3042 int i;
3043
3044 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
3045 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
3046 lag_id, i);
3047
3048 if (mlxsw_core->lag.mapping[index] == local_port)
3049 mlxsw_core->lag.mapping[index] = 0;
3050 }
3051 }
3052 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
3053
mlxsw_core_res_valid(struct mlxsw_core * mlxsw_core,enum mlxsw_res_id res_id)3054 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
3055 enum mlxsw_res_id res_id)
3056 {
3057 return mlxsw_res_valid(&mlxsw_core->res, res_id);
3058 }
3059 EXPORT_SYMBOL(mlxsw_core_res_valid);
3060
mlxsw_core_res_get(struct mlxsw_core * mlxsw_core,enum mlxsw_res_id res_id)3061 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
3062 enum mlxsw_res_id res_id)
3063 {
3064 return mlxsw_res_get(&mlxsw_core->res, res_id);
3065 }
3066 EXPORT_SYMBOL(mlxsw_core_res_get);
3067
__mlxsw_core_port_init(struct mlxsw_core * mlxsw_core,u16 local_port,enum devlink_port_flavour flavour,u8 slot_index,u32 port_number,bool split,u32 split_port_subnumber,bool splittable,u32 lanes,const unsigned char * switch_id,unsigned char switch_id_len)3068 static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
3069 enum devlink_port_flavour flavour,
3070 u8 slot_index, u32 port_number, bool split,
3071 u32 split_port_subnumber,
3072 bool splittable, u32 lanes,
3073 const unsigned char *switch_id,
3074 unsigned char switch_id_len)
3075 {
3076 struct devlink *devlink = priv_to_devlink(mlxsw_core);
3077 struct mlxsw_core_port *mlxsw_core_port =
3078 &mlxsw_core->ports[local_port];
3079 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
3080 struct devlink_port_attrs attrs = {};
3081 int err;
3082
3083 attrs.split = split;
3084 attrs.lanes = lanes;
3085 attrs.splittable = splittable;
3086 attrs.flavour = flavour;
3087 attrs.phys.port_number = port_number;
3088 attrs.phys.split_subport_number = split_port_subnumber;
3089 memcpy(attrs.switch_id.id, switch_id, switch_id_len);
3090 attrs.switch_id.id_len = switch_id_len;
3091 mlxsw_core_port->local_port = local_port;
3092 devlink_port_attrs_set(devlink_port, &attrs);
3093 if (slot_index) {
3094 struct mlxsw_linecard *linecard;
3095
3096 linecard = mlxsw_linecard_get(mlxsw_core->linecards,
3097 slot_index);
3098 mlxsw_core_port->linecard = linecard;
3099 devlink_port_linecard_set(devlink_port,
3100 linecard->devlink_linecard);
3101 }
3102 err = devl_port_register(devlink, devlink_port, local_port);
3103 if (err)
3104 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
3105 return err;
3106 }
3107
__mlxsw_core_port_fini(struct mlxsw_core * mlxsw_core,u16 local_port)3108 static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port)
3109 {
3110 struct mlxsw_core_port *mlxsw_core_port =
3111 &mlxsw_core->ports[local_port];
3112 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
3113
3114 devl_port_unregister(devlink_port);
3115 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
3116 }
3117
mlxsw_core_port_init(struct mlxsw_core * mlxsw_core,u16 local_port,u8 slot_index,u32 port_number,bool split,u32 split_port_subnumber,bool splittable,u32 lanes,const unsigned char * switch_id,unsigned char switch_id_len)3118 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
3119 u8 slot_index, u32 port_number, bool split,
3120 u32 split_port_subnumber,
3121 bool splittable, u32 lanes,
3122 const unsigned char *switch_id,
3123 unsigned char switch_id_len)
3124 {
3125 int err;
3126
3127 err = __mlxsw_core_port_init(mlxsw_core, local_port,
3128 DEVLINK_PORT_FLAVOUR_PHYSICAL, slot_index,
3129 port_number, split, split_port_subnumber,
3130 splittable, lanes,
3131 switch_id, switch_id_len);
3132 if (err)
3133 return err;
3134
3135 atomic_inc(&mlxsw_core->active_ports_count);
3136 return 0;
3137 }
3138 EXPORT_SYMBOL(mlxsw_core_port_init);
3139
mlxsw_core_port_fini(struct mlxsw_core * mlxsw_core,u16 local_port)3140 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port)
3141 {
3142 atomic_dec(&mlxsw_core->active_ports_count);
3143
3144 __mlxsw_core_port_fini(mlxsw_core, local_port);
3145 }
3146 EXPORT_SYMBOL(mlxsw_core_port_fini);
3147
mlxsw_core_cpu_port_init(struct mlxsw_core * mlxsw_core,void * port_driver_priv,const unsigned char * switch_id,unsigned char switch_id_len)3148 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
3149 void *port_driver_priv,
3150 const unsigned char *switch_id,
3151 unsigned char switch_id_len)
3152 {
3153 struct mlxsw_core_port *mlxsw_core_port =
3154 &mlxsw_core->ports[MLXSW_PORT_CPU_PORT];
3155 int err;
3156
3157 err = __mlxsw_core_port_init(mlxsw_core, MLXSW_PORT_CPU_PORT,
3158 DEVLINK_PORT_FLAVOUR_CPU,
3159 0, 0, false, 0, false, 0,
3160 switch_id, switch_id_len);
3161 if (err)
3162 return err;
3163
3164 mlxsw_core_port->port_driver_priv = port_driver_priv;
3165 return 0;
3166 }
3167 EXPORT_SYMBOL(mlxsw_core_cpu_port_init);
3168
mlxsw_core_cpu_port_fini(struct mlxsw_core * mlxsw_core)3169 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core)
3170 {
3171 __mlxsw_core_port_fini(mlxsw_core, MLXSW_PORT_CPU_PORT);
3172 }
3173 EXPORT_SYMBOL(mlxsw_core_cpu_port_fini);
3174
mlxsw_core_port_eth_set(struct mlxsw_core * mlxsw_core,u16 local_port,void * port_driver_priv,struct net_device * dev)3175 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
3176 void *port_driver_priv, struct net_device *dev)
3177 {
3178 struct mlxsw_core_port *mlxsw_core_port =
3179 &mlxsw_core->ports[local_port];
3180 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
3181
3182 mlxsw_core_port->port_driver_priv = port_driver_priv;
3183 devlink_port_type_eth_set(devlink_port, dev);
3184 }
3185 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
3186
mlxsw_core_port_clear(struct mlxsw_core * mlxsw_core,u16 local_port,void * port_driver_priv)3187 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
3188 void *port_driver_priv)
3189 {
3190 struct mlxsw_core_port *mlxsw_core_port =
3191 &mlxsw_core->ports[local_port];
3192 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
3193
3194 mlxsw_core_port->port_driver_priv = port_driver_priv;
3195 devlink_port_type_clear(devlink_port);
3196 }
3197 EXPORT_SYMBOL(mlxsw_core_port_clear);
3198
3199 struct devlink_port *
mlxsw_core_port_devlink_port_get(struct mlxsw_core * mlxsw_core,u16 local_port)3200 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
3201 u16 local_port)
3202 {
3203 struct mlxsw_core_port *mlxsw_core_port =
3204 &mlxsw_core->ports[local_port];
3205 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
3206
3207 return devlink_port;
3208 }
3209 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get);
3210
3211 struct mlxsw_linecard *
mlxsw_core_port_linecard_get(struct mlxsw_core * mlxsw_core,u16 local_port)3212 mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core,
3213 u16 local_port)
3214 {
3215 struct mlxsw_core_port *mlxsw_core_port =
3216 &mlxsw_core->ports[local_port];
3217
3218 return mlxsw_core_port->linecard;
3219 }
3220
mlxsw_core_ports_remove_selected(struct mlxsw_core * mlxsw_core,bool (* selector)(void * priv,u16 local_port),void * priv)3221 void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core,
3222 bool (*selector)(void *priv, u16 local_port),
3223 void *priv)
3224 {
3225 if (WARN_ON_ONCE(!mlxsw_core->driver->ports_remove_selected))
3226 return;
3227 mlxsw_core->driver->ports_remove_selected(mlxsw_core, selector, priv);
3228 }
3229
mlxsw_core_env(const struct mlxsw_core * mlxsw_core)3230 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core)
3231 {
3232 return mlxsw_core->env;
3233 }
3234
mlxsw_core_buf_dump_dbg(struct mlxsw_core * mlxsw_core,const char * buf,size_t size)3235 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
3236 const char *buf, size_t size)
3237 {
3238 __be32 *m = (__be32 *) buf;
3239 int i;
3240 int count = size / sizeof(__be32);
3241
3242 for (i = count - 1; i >= 0; i--)
3243 if (m[i])
3244 break;
3245 i++;
3246 count = i ? i : 1;
3247 for (i = 0; i < count; i += 4)
3248 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
3249 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
3250 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
3251 }
3252
mlxsw_cmd_exec(struct mlxsw_core * mlxsw_core,u16 opcode,u8 opcode_mod,u32 in_mod,bool out_mbox_direct,bool reset_ok,char * in_mbox,size_t in_mbox_size,char * out_mbox,size_t out_mbox_size)3253 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
3254 u32 in_mod, bool out_mbox_direct, bool reset_ok,
3255 char *in_mbox, size_t in_mbox_size,
3256 char *out_mbox, size_t out_mbox_size)
3257 {
3258 u8 status;
3259 int err;
3260
3261 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
3262 if (!mlxsw_core->bus->cmd_exec)
3263 return -EOPNOTSUPP;
3264
3265 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
3266 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
3267 if (in_mbox) {
3268 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
3269 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
3270 }
3271
3272 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
3273 opcode_mod, in_mod, out_mbox_direct,
3274 in_mbox, in_mbox_size,
3275 out_mbox, out_mbox_size, &status);
3276
3277 if (!err && out_mbox) {
3278 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
3279 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
3280 }
3281
3282 if (reset_ok && err == -EIO &&
3283 status == MLXSW_CMD_STATUS_RUNNING_RESET) {
3284 err = 0;
3285 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
3286 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
3287 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
3288 in_mod, status, mlxsw_cmd_status_str(status));
3289 } else if (err == -ETIMEDOUT) {
3290 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
3291 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
3292 in_mod);
3293 }
3294
3295 return err;
3296 }
3297 EXPORT_SYMBOL(mlxsw_cmd_exec);
3298
mlxsw_core_schedule_dw(struct delayed_work * dwork,unsigned long delay)3299 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
3300 {
3301 return queue_delayed_work(mlxsw_wq, dwork, delay);
3302 }
3303 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
3304
mlxsw_core_schedule_work(struct work_struct * work)3305 bool mlxsw_core_schedule_work(struct work_struct *work)
3306 {
3307 return queue_work(mlxsw_owq, work);
3308 }
3309 EXPORT_SYMBOL(mlxsw_core_schedule_work);
3310
mlxsw_core_flush_owq(void)3311 void mlxsw_core_flush_owq(void)
3312 {
3313 flush_workqueue(mlxsw_owq);
3314 }
3315 EXPORT_SYMBOL(mlxsw_core_flush_owq);
3316
mlxsw_core_kvd_sizes_get(struct mlxsw_core * mlxsw_core,const struct mlxsw_config_profile * profile,u64 * p_single_size,u64 * p_double_size,u64 * p_linear_size)3317 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
3318 const struct mlxsw_config_profile *profile,
3319 u64 *p_single_size, u64 *p_double_size,
3320 u64 *p_linear_size)
3321 {
3322 struct mlxsw_driver *driver = mlxsw_core->driver;
3323
3324 if (!driver->kvd_sizes_get)
3325 return -EINVAL;
3326
3327 return driver->kvd_sizes_get(mlxsw_core, profile,
3328 p_single_size, p_double_size,
3329 p_linear_size);
3330 }
3331 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
3332
mlxsw_core_resources_query(struct mlxsw_core * mlxsw_core,char * mbox,struct mlxsw_res * res)3333 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
3334 struct mlxsw_res *res)
3335 {
3336 int index, i;
3337 u64 data;
3338 u16 id;
3339 int err;
3340
3341 mlxsw_cmd_mbox_zero(mbox);
3342
3343 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
3344 index++) {
3345 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
3346 if (err)
3347 return err;
3348
3349 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
3350 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
3351 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
3352
3353 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
3354 return 0;
3355
3356 mlxsw_res_parse(res, id, data);
3357 }
3358 }
3359
3360 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
3361 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
3362 */
3363 return -EIO;
3364 }
3365 EXPORT_SYMBOL(mlxsw_core_resources_query);
3366
mlxsw_core_read_frc_h(struct mlxsw_core * mlxsw_core)3367 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core)
3368 {
3369 return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv);
3370 }
3371 EXPORT_SYMBOL(mlxsw_core_read_frc_h);
3372
mlxsw_core_read_frc_l(struct mlxsw_core * mlxsw_core)3373 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core)
3374 {
3375 return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv);
3376 }
3377 EXPORT_SYMBOL(mlxsw_core_read_frc_l);
3378
mlxsw_core_read_utc_sec(struct mlxsw_core * mlxsw_core)3379 u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core)
3380 {
3381 return mlxsw_core->bus->read_utc_sec(mlxsw_core->bus_priv);
3382 }
3383 EXPORT_SYMBOL(mlxsw_core_read_utc_sec);
3384
mlxsw_core_read_utc_nsec(struct mlxsw_core * mlxsw_core)3385 u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core)
3386 {
3387 return mlxsw_core->bus->read_utc_nsec(mlxsw_core->bus_priv);
3388 }
3389 EXPORT_SYMBOL(mlxsw_core_read_utc_nsec);
3390
mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core * mlxsw_core)3391 bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core)
3392 {
3393 return mlxsw_core->driver->sdq_supports_cqe_v2;
3394 }
3395 EXPORT_SYMBOL(mlxsw_core_sdq_supports_cqe_v2);
3396
mlxsw_core_emad_string_tlv_enable(struct mlxsw_core * mlxsw_core)3397 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core)
3398 {
3399 mlxsw_core->emad.enable_string_tlv = true;
3400 }
3401 EXPORT_SYMBOL(mlxsw_core_emad_string_tlv_enable);
3402
mlxsw_core_module_init(void)3403 static int __init mlxsw_core_module_init(void)
3404 {
3405 int err;
3406
3407 err = mlxsw_linecard_driver_register();
3408 if (err)
3409 return err;
3410
3411 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
3412 if (!mlxsw_wq) {
3413 err = -ENOMEM;
3414 goto err_alloc_workqueue;
3415 }
3416 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
3417 mlxsw_core_driver_name);
3418 if (!mlxsw_owq) {
3419 err = -ENOMEM;
3420 goto err_alloc_ordered_workqueue;
3421 }
3422 return 0;
3423
3424 err_alloc_ordered_workqueue:
3425 destroy_workqueue(mlxsw_wq);
3426 err_alloc_workqueue:
3427 mlxsw_linecard_driver_unregister();
3428 return err;
3429 }
3430
mlxsw_core_module_exit(void)3431 static void __exit mlxsw_core_module_exit(void)
3432 {
3433 destroy_workqueue(mlxsw_owq);
3434 destroy_workqueue(mlxsw_wq);
3435 mlxsw_linecard_driver_unregister();
3436 }
3437
3438 module_init(mlxsw_core_module_init);
3439 module_exit(mlxsw_core_module_exit);
3440
3441 MODULE_LICENSE("Dual BSD/GPL");
3442 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3443 MODULE_DESCRIPTION("Mellanox switch device core driver");
3444