1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies. */
3 
4 #include "setup.h"
5 #include "en/params.h"
6 #include "en/txrx.h"
7 #include "en/health.h"
8 
9 /* It matches XDP_UMEM_MIN_CHUNK_SIZE, but as this constant is private and may
10  * change unexpectedly, and mlx5e has a minimum valid stride size for striding
11  * RQ, keep this check in the driver.
12  */
13 #define MLX5E_MIN_XSK_CHUNK_SIZE 2048
14 
mlx5e_validate_xsk_param(struct mlx5e_params * params,struct mlx5e_xsk_param * xsk,struct mlx5_core_dev * mdev)15 bool mlx5e_validate_xsk_param(struct mlx5e_params *params,
16 			      struct mlx5e_xsk_param *xsk,
17 			      struct mlx5_core_dev *mdev)
18 {
19 	/* AF_XDP doesn't support frames larger than PAGE_SIZE. */
20 	if (xsk->chunk_size > PAGE_SIZE ||
21 			xsk->chunk_size < MLX5E_MIN_XSK_CHUNK_SIZE)
22 		return false;
23 
24 	/* Current MTU and XSK headroom don't allow packets to fit the frames. */
25 	if (mlx5e_rx_get_min_frag_sz(params, xsk) > xsk->chunk_size)
26 		return false;
27 
28 	/* frag_sz is different for regular and XSK RQs, so ensure that linear
29 	 * SKB mode is possible.
30 	 */
31 	switch (params->rq_wq_type) {
32 	case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
33 		return mlx5e_rx_mpwqe_is_linear_skb(mdev, params, xsk);
34 	default: /* MLX5_WQ_TYPE_CYCLIC */
35 		return mlx5e_rx_is_linear_skb(params, xsk);
36 	}
37 }
38 
mlx5e_build_xsk_cparam(struct mlx5_core_dev * mdev,struct mlx5e_params * params,struct mlx5e_xsk_param * xsk,u16 q_counter,struct mlx5e_channel_param * cparam)39 static void mlx5e_build_xsk_cparam(struct mlx5_core_dev *mdev,
40 				   struct mlx5e_params *params,
41 				   struct mlx5e_xsk_param *xsk,
42 				   u16 q_counter,
43 				   struct mlx5e_channel_param *cparam)
44 {
45 	mlx5e_build_rq_param(mdev, params, xsk, q_counter, &cparam->rq);
46 	mlx5e_build_xdpsq_param(mdev, params, xsk, &cparam->xdp_sq);
47 }
48 
mlx5e_init_xsk_rq(struct mlx5e_channel * c,struct mlx5e_params * params,struct xsk_buff_pool * pool,struct mlx5e_xsk_param * xsk,struct mlx5e_rq * rq)49 static int mlx5e_init_xsk_rq(struct mlx5e_channel *c,
50 			     struct mlx5e_params *params,
51 			     struct xsk_buff_pool *pool,
52 			     struct mlx5e_xsk_param *xsk,
53 			     struct mlx5e_rq *rq)
54 {
55 	struct mlx5_core_dev *mdev = c->mdev;
56 	int rq_xdp_ix;
57 	int err;
58 
59 	rq->wq_type      = params->rq_wq_type;
60 	rq->pdev         = c->pdev;
61 	rq->netdev       = c->netdev;
62 	rq->priv         = c->priv;
63 	rq->tstamp       = c->tstamp;
64 	rq->clock        = &mdev->clock;
65 	rq->icosq        = &c->icosq;
66 	rq->ix           = c->ix;
67 	rq->channel      = c;
68 	rq->mdev         = mdev;
69 	rq->hw_mtu       = MLX5E_SW2HW_MTU(params, params->sw_mtu);
70 	rq->xdpsq        = &c->rq_xdpsq;
71 	rq->xsk_pool     = pool;
72 	rq->stats        = &c->priv->channel_stats[c->ix]->xskrq;
73 	rq->ptp_cyc2time = mlx5_rq_ts_translator(mdev);
74 	rq_xdp_ix        = c->ix + params->num_channels * MLX5E_RQ_GROUP_XSK;
75 	err = mlx5e_rq_set_handlers(rq, params, xsk);
76 	if (err)
77 		return err;
78 
79 	return  xdp_rxq_info_reg(&rq->xdp_rxq, rq->netdev, rq_xdp_ix, 0);
80 }
81 
mlx5e_open_xsk_rq(struct mlx5e_channel * c,struct mlx5e_params * params,struct mlx5e_rq_param * rq_params,struct xsk_buff_pool * pool,struct mlx5e_xsk_param * xsk)82 static int mlx5e_open_xsk_rq(struct mlx5e_channel *c, struct mlx5e_params *params,
83 			     struct mlx5e_rq_param *rq_params, struct xsk_buff_pool *pool,
84 			     struct mlx5e_xsk_param *xsk)
85 {
86 	int err;
87 
88 	err = mlx5e_init_xsk_rq(c, params, pool, xsk, &c->xskrq);
89 	if (err)
90 		return err;
91 
92 	return mlx5e_open_rq(params, rq_params, xsk, cpu_to_node(c->cpu), &c->xskrq);
93 }
94 
mlx5e_open_xsk(struct mlx5e_priv * priv,struct mlx5e_params * params,struct mlx5e_xsk_param * xsk,struct xsk_buff_pool * pool,struct mlx5e_channel * c)95 int mlx5e_open_xsk(struct mlx5e_priv *priv, struct mlx5e_params *params,
96 		   struct mlx5e_xsk_param *xsk, struct xsk_buff_pool *pool,
97 		   struct mlx5e_channel *c)
98 {
99 	struct mlx5e_channel_param *cparam;
100 	struct mlx5e_create_cq_param ccp;
101 	int err;
102 
103 	mlx5e_build_create_cq_param(&ccp, c);
104 
105 	if (!mlx5e_validate_xsk_param(params, xsk, priv->mdev))
106 		return -EINVAL;
107 
108 	cparam = kvzalloc(sizeof(*cparam), GFP_KERNEL);
109 	if (!cparam)
110 		return -ENOMEM;
111 
112 	mlx5e_build_xsk_cparam(priv->mdev, params, xsk, priv->q_counter, cparam);
113 
114 	err = mlx5e_open_cq(c->priv, params->rx_cq_moderation, &cparam->rq.cqp, &ccp,
115 			    &c->xskrq.cq);
116 	if (unlikely(err))
117 		goto err_free_cparam;
118 
119 	err = mlx5e_open_xsk_rq(c, params, &cparam->rq, pool, xsk);
120 	if (unlikely(err))
121 		goto err_close_rx_cq;
122 
123 	err = mlx5e_open_cq(c->priv, params->tx_cq_moderation, &cparam->xdp_sq.cqp, &ccp,
124 			    &c->xsksq.cq);
125 	if (unlikely(err))
126 		goto err_close_rq;
127 
128 	/* Create a separate SQ, so that when the buff pool is disabled, we could
129 	 * close this SQ safely and stop receiving CQEs. In other case, e.g., if
130 	 * the XDPSQ was used instead, we might run into trouble when the buff pool
131 	 * is disabled and then re-enabled, but the SQ continues receiving CQEs
132 	 * from the old buff pool.
133 	 */
134 	err = mlx5e_open_xdpsq(c, params, &cparam->xdp_sq, pool, &c->xsksq, true);
135 	if (unlikely(err))
136 		goto err_close_tx_cq;
137 
138 	kvfree(cparam);
139 
140 	set_bit(MLX5E_CHANNEL_STATE_XSK, c->state);
141 
142 	return 0;
143 
144 err_close_tx_cq:
145 	mlx5e_close_cq(&c->xsksq.cq);
146 
147 err_close_rq:
148 	mlx5e_close_rq(&c->xskrq);
149 
150 err_close_rx_cq:
151 	mlx5e_close_cq(&c->xskrq.cq);
152 
153 err_free_cparam:
154 	kvfree(cparam);
155 
156 	return err;
157 }
158 
mlx5e_close_xsk(struct mlx5e_channel * c)159 void mlx5e_close_xsk(struct mlx5e_channel *c)
160 {
161 	clear_bit(MLX5E_CHANNEL_STATE_XSK, c->state);
162 	synchronize_net(); /* Sync with the XSK wakeup and with NAPI. */
163 
164 	mlx5e_close_rq(&c->xskrq);
165 	mlx5e_close_cq(&c->xskrq.cq);
166 	mlx5e_close_xdpsq(&c->xsksq);
167 	mlx5e_close_cq(&c->xsksq.cq);
168 
169 	memset(&c->xskrq, 0, sizeof(c->xskrq));
170 	memset(&c->xsksq, 0, sizeof(c->xsksq));
171 }
172 
mlx5e_activate_xsk(struct mlx5e_channel * c)173 void mlx5e_activate_xsk(struct mlx5e_channel *c)
174 {
175 	/* ICOSQ recovery deactivates RQs. Suspend the recovery to avoid
176 	 * activating XSKRQ in the middle of recovery.
177 	 */
178 	mlx5e_reporter_icosq_suspend_recovery(c);
179 	set_bit(MLX5E_RQ_STATE_ENABLED, &c->xskrq.state);
180 	mlx5e_reporter_icosq_resume_recovery(c);
181 
182 	/* TX queue is created active. */
183 }
184 
mlx5e_deactivate_xsk(struct mlx5e_channel * c)185 void mlx5e_deactivate_xsk(struct mlx5e_channel *c)
186 {
187 	/* ICOSQ recovery may reactivate XSKRQ if clear_bit is called in the
188 	 * middle of recovery. Suspend the recovery to avoid it.
189 	 */
190 	mlx5e_reporter_icosq_suspend_recovery(c);
191 	clear_bit(MLX5E_RQ_STATE_ENABLED, &c->xskrq.state);
192 	mlx5e_reporter_icosq_resume_recovery(c);
193 	synchronize_net(); /* Sync with NAPI to prevent mlx5e_post_rx_wqes. */
194 
195 	/* TX queue is disabled on close. */
196 }
197