1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies. */
3 
4 #include "dr_types.h"
5 #include "dr_ste.h"
6 
7 enum dr_action_domain {
8 	DR_ACTION_DOMAIN_NIC_INGRESS,
9 	DR_ACTION_DOMAIN_NIC_EGRESS,
10 	DR_ACTION_DOMAIN_FDB_INGRESS,
11 	DR_ACTION_DOMAIN_FDB_EGRESS,
12 	DR_ACTION_DOMAIN_MAX,
13 };
14 
15 enum dr_action_valid_state {
16 	DR_ACTION_STATE_ERR,
17 	DR_ACTION_STATE_NO_ACTION,
18 	DR_ACTION_STATE_ENCAP,
19 	DR_ACTION_STATE_DECAP,
20 	DR_ACTION_STATE_MODIFY_HDR,
21 	DR_ACTION_STATE_POP_VLAN,
22 	DR_ACTION_STATE_PUSH_VLAN,
23 	DR_ACTION_STATE_NON_TERM,
24 	DR_ACTION_STATE_TERM,
25 	DR_ACTION_STATE_MAX,
26 };
27 
28 static const char * const action_type_to_str[] = {
29 	[DR_ACTION_TYP_TNL_L2_TO_L2] = "DR_ACTION_TYP_TNL_L2_TO_L2",
30 	[DR_ACTION_TYP_L2_TO_TNL_L2] = "DR_ACTION_TYP_L2_TO_TNL_L2",
31 	[DR_ACTION_TYP_TNL_L3_TO_L2] = "DR_ACTION_TYP_TNL_L3_TO_L2",
32 	[DR_ACTION_TYP_L2_TO_TNL_L3] = "DR_ACTION_TYP_L2_TO_TNL_L3",
33 	[DR_ACTION_TYP_DROP] = "DR_ACTION_TYP_DROP",
34 	[DR_ACTION_TYP_QP] = "DR_ACTION_TYP_QP",
35 	[DR_ACTION_TYP_FT] = "DR_ACTION_TYP_FT",
36 	[DR_ACTION_TYP_CTR] = "DR_ACTION_TYP_CTR",
37 	[DR_ACTION_TYP_TAG] = "DR_ACTION_TYP_TAG",
38 	[DR_ACTION_TYP_MODIFY_HDR] = "DR_ACTION_TYP_MODIFY_HDR",
39 	[DR_ACTION_TYP_VPORT] = "DR_ACTION_TYP_VPORT",
40 	[DR_ACTION_TYP_POP_VLAN] = "DR_ACTION_TYP_POP_VLAN",
41 	[DR_ACTION_TYP_PUSH_VLAN] = "DR_ACTION_TYP_PUSH_VLAN",
42 	[DR_ACTION_TYP_SAMPLER] = "DR_ACTION_TYP_SAMPLER",
43 	[DR_ACTION_TYP_INSERT_HDR] = "DR_ACTION_TYP_INSERT_HDR",
44 	[DR_ACTION_TYP_REMOVE_HDR] = "DR_ACTION_TYP_REMOVE_HDR",
45 	[DR_ACTION_TYP_MAX] = "DR_ACTION_UNKNOWN",
46 };
47 
dr_action_id_to_str(enum mlx5dr_action_type action_id)48 static const char *dr_action_id_to_str(enum mlx5dr_action_type action_id)
49 {
50 	if (action_id > DR_ACTION_TYP_MAX)
51 		action_id = DR_ACTION_TYP_MAX;
52 	return action_type_to_str[action_id];
53 }
54 
55 static const enum dr_action_valid_state
56 next_action_state[DR_ACTION_DOMAIN_MAX][DR_ACTION_STATE_MAX][DR_ACTION_TYP_MAX] = {
57 	[DR_ACTION_DOMAIN_NIC_INGRESS] = {
58 		[DR_ACTION_STATE_NO_ACTION] = {
59 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
60 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
61 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
62 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
63 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_NON_TERM,
64 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
65 			[DR_ACTION_TYP_TNL_L2_TO_L2]	= DR_ACTION_STATE_DECAP,
66 			[DR_ACTION_TYP_TNL_L3_TO_L2]	= DR_ACTION_STATE_DECAP,
67 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
68 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
69 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
70 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
71 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
72 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
73 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
74 		},
75 		[DR_ACTION_STATE_DECAP] = {
76 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
77 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
78 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
79 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
80 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_DECAP,
81 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_DECAP,
82 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
83 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
84 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
85 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
86 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
87 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
88 		},
89 		[DR_ACTION_STATE_ENCAP] = {
90 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
91 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
92 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
93 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
94 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_ENCAP,
95 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_ENCAP,
96 		},
97 		[DR_ACTION_STATE_MODIFY_HDR] = {
98 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
99 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
100 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
101 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
102 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_MODIFY_HDR,
103 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_MODIFY_HDR,
104 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
105 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
106 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
107 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
108 		},
109 		[DR_ACTION_STATE_POP_VLAN] = {
110 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
111 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
112 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
113 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
114 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_POP_VLAN,
115 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_POP_VLAN,
116 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
117 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
118 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
119 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
120 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
121 		},
122 		[DR_ACTION_STATE_PUSH_VLAN] = {
123 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
124 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
125 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
126 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_PUSH_VLAN,
127 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_PUSH_VLAN,
128 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
129 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
130 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
131 		},
132 		[DR_ACTION_STATE_NON_TERM] = {
133 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
134 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
135 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
136 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
137 			[DR_ACTION_TYP_TAG]		= DR_ACTION_STATE_NON_TERM,
138 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
139 			[DR_ACTION_TYP_TNL_L2_TO_L2]	= DR_ACTION_STATE_DECAP,
140 			[DR_ACTION_TYP_TNL_L3_TO_L2]	= DR_ACTION_STATE_DECAP,
141 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
142 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
143 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
144 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
145 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
146 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
147 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
148 		},
149 		[DR_ACTION_STATE_TERM] = {
150 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_TERM,
151 		},
152 	},
153 	[DR_ACTION_DOMAIN_NIC_EGRESS] = {
154 		[DR_ACTION_STATE_NO_ACTION] = {
155 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
156 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
157 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
158 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
159 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
160 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
161 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
162 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
163 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
164 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
165 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
166 		},
167 		[DR_ACTION_STATE_DECAP] = {
168 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
169 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
170 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
171 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_DECAP,
172 		},
173 		[DR_ACTION_STATE_ENCAP] = {
174 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
175 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
176 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
177 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_ENCAP,
178 		},
179 		[DR_ACTION_STATE_MODIFY_HDR] = {
180 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
181 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
182 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
183 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_MODIFY_HDR,
184 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
185 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
186 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
187 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
188 		},
189 		[DR_ACTION_STATE_POP_VLAN] = {
190 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
191 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
192 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_POP_VLAN,
193 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
194 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
195 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
196 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
197 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
198 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
199 		},
200 		[DR_ACTION_STATE_PUSH_VLAN] = {
201 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
202 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
203 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
204 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_PUSH_VLAN,
205 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
206 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
207 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
208 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
209 		},
210 		[DR_ACTION_STATE_NON_TERM] = {
211 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
212 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
213 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
214 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
215 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
216 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
217 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
218 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
219 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
220 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
221 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
222 		},
223 		[DR_ACTION_STATE_TERM] = {
224 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_TERM,
225 		},
226 	},
227 	[DR_ACTION_DOMAIN_FDB_INGRESS] = {
228 		[DR_ACTION_STATE_NO_ACTION] = {
229 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
230 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
231 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
232 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
233 			[DR_ACTION_TYP_TNL_L2_TO_L2]	= DR_ACTION_STATE_DECAP,
234 			[DR_ACTION_TYP_TNL_L3_TO_L2]	= DR_ACTION_STATE_DECAP,
235 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
236 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
237 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
238 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
239 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
240 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
241 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
242 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
243 		},
244 		[DR_ACTION_STATE_DECAP] = {
245 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
246 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
247 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_DECAP,
248 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
249 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
250 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
251 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
252 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
253 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
254 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
255 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
256 		},
257 		[DR_ACTION_STATE_ENCAP] = {
258 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
259 			[DR_ACTION_TYP_QP]		= DR_ACTION_STATE_TERM,
260 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
261 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
262 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
263 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_ENCAP,
264 		},
265 		[DR_ACTION_STATE_MODIFY_HDR] = {
266 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
267 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
268 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
269 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_MODIFY_HDR,
270 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
271 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
272 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
273 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
274 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
275 		},
276 		[DR_ACTION_STATE_POP_VLAN] = {
277 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
278 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
279 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
280 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
281 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_POP_VLAN,
282 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
283 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
284 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
285 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
286 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
287 		},
288 		[DR_ACTION_STATE_PUSH_VLAN] = {
289 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
290 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
291 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
292 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
293 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_PUSH_VLAN,
294 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
295 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
296 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
297 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
298 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
299 		},
300 		[DR_ACTION_STATE_NON_TERM] = {
301 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
302 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
303 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
304 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
305 			[DR_ACTION_TYP_TNL_L2_TO_L2]	= DR_ACTION_STATE_DECAP,
306 			[DR_ACTION_TYP_TNL_L3_TO_L2]	= DR_ACTION_STATE_DECAP,
307 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
308 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
309 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
310 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
311 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
312 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
313 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
314 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
315 		},
316 		[DR_ACTION_STATE_TERM] = {
317 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_TERM,
318 		},
319 	},
320 	[DR_ACTION_DOMAIN_FDB_EGRESS] = {
321 		[DR_ACTION_STATE_NO_ACTION] = {
322 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
323 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
324 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
325 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
326 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
327 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
328 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
329 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
330 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
331 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
332 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
333 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
334 		},
335 		[DR_ACTION_STATE_DECAP] = {
336 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
337 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
338 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_DECAP,
339 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
340 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
341 		},
342 		[DR_ACTION_STATE_ENCAP] = {
343 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
344 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
345 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_ENCAP,
346 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
347 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
348 		},
349 		[DR_ACTION_STATE_MODIFY_HDR] = {
350 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
351 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
352 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
353 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_MODIFY_HDR,
354 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
355 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
356 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
357 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
358 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
359 		},
360 		[DR_ACTION_STATE_POP_VLAN] = {
361 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
362 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
363 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_POP_VLAN,
364 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
365 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
366 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
367 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
368 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
369 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
370 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
371 		},
372 		[DR_ACTION_STATE_PUSH_VLAN] = {
373 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
374 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
375 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
376 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
377 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_PUSH_VLAN,
378 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
379 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
380 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
381 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
382 		},
383 		[DR_ACTION_STATE_NON_TERM] = {
384 			[DR_ACTION_TYP_DROP]		= DR_ACTION_STATE_TERM,
385 			[DR_ACTION_TYP_FT]		= DR_ACTION_STATE_TERM,
386 			[DR_ACTION_TYP_SAMPLER]		= DR_ACTION_STATE_TERM,
387 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_NON_TERM,
388 			[DR_ACTION_TYP_MODIFY_HDR]	= DR_ACTION_STATE_MODIFY_HDR,
389 			[DR_ACTION_TYP_L2_TO_TNL_L2]	= DR_ACTION_STATE_ENCAP,
390 			[DR_ACTION_TYP_L2_TO_TNL_L3]	= DR_ACTION_STATE_ENCAP,
391 			[DR_ACTION_TYP_INSERT_HDR]	= DR_ACTION_STATE_ENCAP,
392 			[DR_ACTION_TYP_REMOVE_HDR]	= DR_ACTION_STATE_DECAP,
393 			[DR_ACTION_TYP_PUSH_VLAN]	= DR_ACTION_STATE_PUSH_VLAN,
394 			[DR_ACTION_TYP_POP_VLAN]	= DR_ACTION_STATE_POP_VLAN,
395 			[DR_ACTION_TYP_VPORT]		= DR_ACTION_STATE_TERM,
396 		},
397 		[DR_ACTION_STATE_TERM] = {
398 			[DR_ACTION_TYP_CTR]		= DR_ACTION_STATE_TERM,
399 		},
400 	},
401 };
402 
403 static int
dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type,enum mlx5dr_action_type * action_type)404 dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type,
405 				  enum mlx5dr_action_type *action_type)
406 {
407 	switch (reformat_type) {
408 	case DR_ACTION_REFORMAT_TYP_TNL_L2_TO_L2:
409 		*action_type = DR_ACTION_TYP_TNL_L2_TO_L2;
410 		break;
411 	case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L2:
412 		*action_type = DR_ACTION_TYP_L2_TO_TNL_L2;
413 		break;
414 	case DR_ACTION_REFORMAT_TYP_TNL_L3_TO_L2:
415 		*action_type = DR_ACTION_TYP_TNL_L3_TO_L2;
416 		break;
417 	case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L3:
418 		*action_type = DR_ACTION_TYP_L2_TO_TNL_L3;
419 		break;
420 	case DR_ACTION_REFORMAT_TYP_INSERT_HDR:
421 		*action_type = DR_ACTION_TYP_INSERT_HDR;
422 		break;
423 	case DR_ACTION_REFORMAT_TYP_REMOVE_HDR:
424 		*action_type = DR_ACTION_TYP_REMOVE_HDR;
425 		break;
426 	default:
427 		return -EINVAL;
428 	}
429 
430 	return 0;
431 }
432 
433 /* Apply the actions on the rule STE array starting from the last_ste.
434  * Actions might require more than one STE, new_num_stes will return
435  * the new size of the STEs array, rule with actions.
436  */
dr_actions_apply(struct mlx5dr_domain * dmn,enum mlx5dr_domain_nic_type nic_type,u8 * action_type_set,u8 * last_ste,struct mlx5dr_ste_actions_attr * attr,u32 * new_num_stes)437 static void dr_actions_apply(struct mlx5dr_domain *dmn,
438 			     enum mlx5dr_domain_nic_type nic_type,
439 			     u8 *action_type_set,
440 			     u8 *last_ste,
441 			     struct mlx5dr_ste_actions_attr *attr,
442 			     u32 *new_num_stes)
443 {
444 	struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx;
445 	u32 added_stes = 0;
446 
447 	if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
448 		mlx5dr_ste_set_actions_rx(ste_ctx, dmn, action_type_set,
449 					  last_ste, attr, &added_stes);
450 	else
451 		mlx5dr_ste_set_actions_tx(ste_ctx, dmn, action_type_set,
452 					  last_ste, attr, &added_stes);
453 
454 	*new_num_stes += added_stes;
455 }
456 
457 static enum dr_action_domain
dr_action_get_action_domain(enum mlx5dr_domain_type domain,enum mlx5dr_domain_nic_type nic_type)458 dr_action_get_action_domain(enum mlx5dr_domain_type domain,
459 			    enum mlx5dr_domain_nic_type nic_type)
460 {
461 	switch (domain) {
462 	case MLX5DR_DOMAIN_TYPE_NIC_RX:
463 		return DR_ACTION_DOMAIN_NIC_INGRESS;
464 	case MLX5DR_DOMAIN_TYPE_NIC_TX:
465 		return DR_ACTION_DOMAIN_NIC_EGRESS;
466 	case MLX5DR_DOMAIN_TYPE_FDB:
467 		if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
468 			return DR_ACTION_DOMAIN_FDB_INGRESS;
469 		return DR_ACTION_DOMAIN_FDB_EGRESS;
470 	default:
471 		WARN_ON(true);
472 		return DR_ACTION_DOMAIN_MAX;
473 	}
474 }
475 
476 static
dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,u32 action_type,u32 * state)477 int dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,
478 					  u32 action_type,
479 					  u32 *state)
480 {
481 	u32 cur_state = *state;
482 
483 	/* Check action state machine is valid */
484 	*state = next_action_state[action_domain][cur_state][action_type];
485 
486 	if (*state == DR_ACTION_STATE_ERR)
487 		return -EOPNOTSUPP;
488 
489 	return 0;
490 }
491 
dr_action_handle_cs_recalc(struct mlx5dr_domain * dmn,struct mlx5dr_action * dest_action,u64 * final_icm_addr)492 static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn,
493 				      struct mlx5dr_action *dest_action,
494 				      u64 *final_icm_addr)
495 {
496 	int ret;
497 
498 	switch (dest_action->action_type) {
499 	case DR_ACTION_TYP_FT:
500 		/* Allow destination flow table only if table is a terminating
501 		 * table, since there is an *assumption* that in such case FW
502 		 * will recalculate the CS.
503 		 */
504 		if (dest_action->dest_tbl->is_fw_tbl) {
505 			*final_icm_addr = dest_action->dest_tbl->fw_tbl.rx_icm_addr;
506 		} else {
507 			mlx5dr_dbg(dmn,
508 				   "Destination FT should be terminating when modify TTL is used\n");
509 			return -EINVAL;
510 		}
511 		break;
512 
513 	case DR_ACTION_TYP_VPORT:
514 		/* If destination is vport we will get the FW flow table
515 		 * that recalculates the CS and forwards to the vport.
516 		 */
517 		ret = mlx5dr_domain_get_recalc_cs_ft_addr(dest_action->vport->dmn,
518 							  dest_action->vport->caps->num,
519 							  final_icm_addr);
520 		if (ret) {
521 			mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n");
522 			return ret;
523 		}
524 		break;
525 
526 	default:
527 		break;
528 	}
529 
530 	return 0;
531 }
532 
dr_action_modify_ttl_adjust(struct mlx5dr_domain * dmn,struct mlx5dr_ste_actions_attr * attr,bool rx_rule,bool * recalc_cs_required)533 static void dr_action_modify_ttl_adjust(struct mlx5dr_domain *dmn,
534 					struct mlx5dr_ste_actions_attr *attr,
535 					bool rx_rule,
536 					bool *recalc_cs_required)
537 {
538 	*recalc_cs_required = false;
539 
540 	/* if device supports csum recalculation - no adjustment needed */
541 	if (mlx5dr_ste_supp_ttl_cs_recalc(&dmn->info.caps))
542 		return;
543 
544 	/* no adjustment needed on TX rules */
545 	if (!rx_rule)
546 		return;
547 
548 	if (!MLX5_CAP_ESW_FLOWTABLE(dmn->mdev, fdb_ipv4_ttl_modify)) {
549 		/* Ignore the modify TTL action.
550 		 * It is always kept as last HW action.
551 		 */
552 		attr->modify_actions--;
553 		return;
554 	}
555 
556 	if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB)
557 		/* Due to a HW bug on some devices, modifying TTL on RX flows
558 		 * will cause an incorrect checksum calculation. In such cases
559 		 * we will use a FW table to recalculate the checksum.
560 		 */
561 		*recalc_cs_required = true;
562 }
563 
dr_action_print_sequence(struct mlx5dr_domain * dmn,struct mlx5dr_action * actions[],int last_idx)564 static void dr_action_print_sequence(struct mlx5dr_domain *dmn,
565 				     struct mlx5dr_action *actions[],
566 				     int last_idx)
567 {
568 	int i;
569 
570 	for (i = 0; i <= last_idx; i++)
571 		mlx5dr_err(dmn, "< %s (%d) > ",
572 			   dr_action_id_to_str(actions[i]->action_type),
573 			   actions[i]->action_type);
574 }
575 
576 #define WITH_VLAN_NUM_HW_ACTIONS 6
577 
mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher * matcher,struct mlx5dr_matcher_rx_tx * nic_matcher,struct mlx5dr_action * actions[],u32 num_actions,u8 * ste_arr,u32 * new_hw_ste_arr_sz)578 int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
579 				 struct mlx5dr_matcher_rx_tx *nic_matcher,
580 				 struct mlx5dr_action *actions[],
581 				 u32 num_actions,
582 				 u8 *ste_arr,
583 				 u32 *new_hw_ste_arr_sz)
584 {
585 	struct mlx5dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn;
586 	bool rx_rule = nic_dmn->type == DR_DOMAIN_NIC_TYPE_RX;
587 	struct mlx5dr_domain *dmn = matcher->tbl->dmn;
588 	u8 action_type_set[DR_ACTION_TYP_MAX] = {};
589 	struct mlx5dr_ste_actions_attr attr = {};
590 	struct mlx5dr_action *dest_action = NULL;
591 	u32 state = DR_ACTION_STATE_NO_ACTION;
592 	enum dr_action_domain action_domain;
593 	bool recalc_cs_required = false;
594 	u8 *last_ste;
595 	int i, ret;
596 
597 	attr.gvmi = dmn->info.caps.gvmi;
598 	attr.hit_gvmi = dmn->info.caps.gvmi;
599 	attr.final_icm_addr = nic_dmn->default_icm_addr;
600 	action_domain = dr_action_get_action_domain(dmn->type, nic_dmn->type);
601 
602 	for (i = 0; i < num_actions; i++) {
603 		struct mlx5dr_action_dest_tbl *dest_tbl;
604 		struct mlx5dr_icm_chunk *chunk;
605 		struct mlx5dr_action *action;
606 		int max_actions_type = 1;
607 		u32 action_type;
608 
609 		action = actions[i];
610 		action_type = action->action_type;
611 
612 		switch (action_type) {
613 		case DR_ACTION_TYP_DROP:
614 			attr.final_icm_addr = nic_dmn->drop_icm_addr;
615 			break;
616 		case DR_ACTION_TYP_FT:
617 			dest_action = action;
618 			dest_tbl = action->dest_tbl;
619 			if (!dest_tbl->is_fw_tbl) {
620 				if (dest_tbl->tbl->dmn != dmn) {
621 					mlx5dr_err(dmn,
622 						   "Destination table belongs to a different domain\n");
623 					return -EINVAL;
624 				}
625 				if (dest_tbl->tbl->level <= matcher->tbl->level) {
626 					mlx5_core_dbg_once(dmn->mdev,
627 							   "Connecting table to a lower/same level destination table\n");
628 					mlx5dr_dbg(dmn,
629 						   "Connecting table at level %d to a destination table at level %d\n",
630 						   matcher->tbl->level,
631 						   dest_tbl->tbl->level);
632 				}
633 				chunk = rx_rule ? dest_tbl->tbl->rx.s_anchor->chunk :
634 					dest_tbl->tbl->tx.s_anchor->chunk;
635 				attr.final_icm_addr = mlx5dr_icm_pool_get_chunk_icm_addr(chunk);
636 			} else {
637 				struct mlx5dr_cmd_query_flow_table_details output;
638 				int ret;
639 
640 				/* get the relevant addresses */
641 				if (!action->dest_tbl->fw_tbl.rx_icm_addr) {
642 					ret = mlx5dr_cmd_query_flow_table(dmn->mdev,
643 									  dest_tbl->fw_tbl.type,
644 									  dest_tbl->fw_tbl.id,
645 									  &output);
646 					if (!ret) {
647 						dest_tbl->fw_tbl.tx_icm_addr =
648 							output.sw_owner_icm_root_1;
649 						dest_tbl->fw_tbl.rx_icm_addr =
650 							output.sw_owner_icm_root_0;
651 					} else {
652 						mlx5dr_err(dmn,
653 							   "Failed mlx5_cmd_query_flow_table ret: %d\n",
654 							   ret);
655 						return ret;
656 					}
657 				}
658 				attr.final_icm_addr = rx_rule ?
659 					dest_tbl->fw_tbl.rx_icm_addr :
660 					dest_tbl->fw_tbl.tx_icm_addr;
661 			}
662 			break;
663 		case DR_ACTION_TYP_QP:
664 			mlx5dr_info(dmn, "Domain doesn't support QP\n");
665 			return -EOPNOTSUPP;
666 		case DR_ACTION_TYP_CTR:
667 			attr.ctr_id = action->ctr->ctr_id +
668 				action->ctr->offset;
669 			break;
670 		case DR_ACTION_TYP_TAG:
671 			attr.flow_tag = action->flow_tag->flow_tag;
672 			break;
673 		case DR_ACTION_TYP_TNL_L2_TO_L2:
674 			break;
675 		case DR_ACTION_TYP_TNL_L3_TO_L2:
676 			attr.decap_index = action->rewrite->index;
677 			attr.decap_actions = action->rewrite->num_of_actions;
678 			attr.decap_with_vlan =
679 				attr.decap_actions == WITH_VLAN_NUM_HW_ACTIONS;
680 			break;
681 		case DR_ACTION_TYP_MODIFY_HDR:
682 			attr.modify_index = action->rewrite->index;
683 			attr.modify_actions = action->rewrite->num_of_actions;
684 			if (action->rewrite->modify_ttl)
685 				dr_action_modify_ttl_adjust(dmn, &attr, rx_rule,
686 							    &recalc_cs_required);
687 			break;
688 		case DR_ACTION_TYP_L2_TO_TNL_L2:
689 		case DR_ACTION_TYP_L2_TO_TNL_L3:
690 			if (rx_rule &&
691 			    !(dmn->ste_ctx->actions_caps & DR_STE_CTX_ACTION_CAP_RX_ENCAP)) {
692 				mlx5dr_info(dmn, "Device doesn't support Encap on RX\n");
693 				return -EOPNOTSUPP;
694 			}
695 			attr.reformat.size = action->reformat->size;
696 			attr.reformat.id = action->reformat->id;
697 			break;
698 		case DR_ACTION_TYP_SAMPLER:
699 			attr.final_icm_addr = rx_rule ? action->sampler->rx_icm_addr :
700 							action->sampler->tx_icm_addr;
701 			break;
702 		case DR_ACTION_TYP_VPORT:
703 			attr.hit_gvmi = action->vport->caps->vhca_gvmi;
704 			dest_action = action;
705 			attr.final_icm_addr = rx_rule ?
706 				action->vport->caps->icm_address_rx :
707 				action->vport->caps->icm_address_tx;
708 			break;
709 		case DR_ACTION_TYP_POP_VLAN:
710 			if (!rx_rule && !(dmn->ste_ctx->actions_caps &
711 					  DR_STE_CTX_ACTION_CAP_TX_POP)) {
712 				mlx5dr_dbg(dmn, "Device doesn't support POP VLAN action on TX\n");
713 				return -EOPNOTSUPP;
714 			}
715 
716 			max_actions_type = MLX5DR_MAX_VLANS;
717 			attr.vlans.count++;
718 			break;
719 		case DR_ACTION_TYP_PUSH_VLAN:
720 			if (rx_rule && !(dmn->ste_ctx->actions_caps &
721 					 DR_STE_CTX_ACTION_CAP_RX_PUSH)) {
722 				mlx5dr_dbg(dmn, "Device doesn't support PUSH VLAN action on RX\n");
723 				return -EOPNOTSUPP;
724 			}
725 
726 			max_actions_type = MLX5DR_MAX_VLANS;
727 			if (attr.vlans.count == MLX5DR_MAX_VLANS) {
728 				mlx5dr_dbg(dmn, "Max VLAN push/pop count exceeded\n");
729 				return -EINVAL;
730 			}
731 
732 			attr.vlans.headers[attr.vlans.count++] = action->push_vlan->vlan_hdr;
733 			break;
734 		case DR_ACTION_TYP_INSERT_HDR:
735 		case DR_ACTION_TYP_REMOVE_HDR:
736 			attr.reformat.size = action->reformat->size;
737 			attr.reformat.id = action->reformat->id;
738 			attr.reformat.param_0 = action->reformat->param_0;
739 			attr.reformat.param_1 = action->reformat->param_1;
740 			break;
741 		default:
742 			mlx5dr_err(dmn, "Unsupported action type %d\n", action_type);
743 			return -EINVAL;
744 		}
745 
746 		/* Check action duplication */
747 		if (++action_type_set[action_type] > max_actions_type) {
748 			mlx5dr_err(dmn, "Action type %d supports only max %d time(s)\n",
749 				   action_type, max_actions_type);
750 			return -EINVAL;
751 		}
752 
753 		/* Check action state machine is valid */
754 		if (dr_action_validate_and_get_next_state(action_domain,
755 							  action_type,
756 							  &state)) {
757 			mlx5dr_err(dmn, "Invalid action (gvmi: %d, is_rx: %d) sequence provided:",
758 				   attr.gvmi, rx_rule);
759 			dr_action_print_sequence(dmn, actions, i);
760 			return -EOPNOTSUPP;
761 		}
762 	}
763 
764 	*new_hw_ste_arr_sz = nic_matcher->num_of_builders;
765 	last_ste = ste_arr + DR_STE_SIZE * (nic_matcher->num_of_builders - 1);
766 
767 	if (recalc_cs_required && dest_action) {
768 		ret = dr_action_handle_cs_recalc(dmn, dest_action, &attr.final_icm_addr);
769 		if (ret) {
770 			mlx5dr_err(dmn,
771 				   "Failed to handle checksum recalculation err %d\n",
772 				   ret);
773 			return ret;
774 		}
775 	}
776 
777 	dr_actions_apply(dmn,
778 			 nic_dmn->type,
779 			 action_type_set,
780 			 last_ste,
781 			 &attr,
782 			 new_hw_ste_arr_sz);
783 
784 	return 0;
785 }
786 
787 static unsigned int action_size[DR_ACTION_TYP_MAX] = {
788 	[DR_ACTION_TYP_TNL_L2_TO_L2] = sizeof(struct mlx5dr_action_reformat),
789 	[DR_ACTION_TYP_L2_TO_TNL_L2] = sizeof(struct mlx5dr_action_reformat),
790 	[DR_ACTION_TYP_TNL_L3_TO_L2] = sizeof(struct mlx5dr_action_rewrite),
791 	[DR_ACTION_TYP_L2_TO_TNL_L3] = sizeof(struct mlx5dr_action_reformat),
792 	[DR_ACTION_TYP_FT]           = sizeof(struct mlx5dr_action_dest_tbl),
793 	[DR_ACTION_TYP_CTR]          = sizeof(struct mlx5dr_action_ctr),
794 	[DR_ACTION_TYP_TAG]          = sizeof(struct mlx5dr_action_flow_tag),
795 	[DR_ACTION_TYP_MODIFY_HDR]   = sizeof(struct mlx5dr_action_rewrite),
796 	[DR_ACTION_TYP_VPORT]        = sizeof(struct mlx5dr_action_vport),
797 	[DR_ACTION_TYP_PUSH_VLAN]    = sizeof(struct mlx5dr_action_push_vlan),
798 	[DR_ACTION_TYP_INSERT_HDR]   = sizeof(struct mlx5dr_action_reformat),
799 	[DR_ACTION_TYP_REMOVE_HDR]   = sizeof(struct mlx5dr_action_reformat),
800 	[DR_ACTION_TYP_SAMPLER]      = sizeof(struct mlx5dr_action_sampler),
801 };
802 
803 static struct mlx5dr_action *
dr_action_create_generic(enum mlx5dr_action_type action_type)804 dr_action_create_generic(enum mlx5dr_action_type action_type)
805 {
806 	struct mlx5dr_action *action;
807 	int extra_size;
808 
809 	if (action_type < DR_ACTION_TYP_MAX)
810 		extra_size = action_size[action_type];
811 	else
812 		return NULL;
813 
814 	action = kzalloc(sizeof(*action) + extra_size, GFP_KERNEL);
815 	if (!action)
816 		return NULL;
817 
818 	action->action_type = action_type;
819 	refcount_set(&action->refcount, 1);
820 	action->data = action + 1;
821 
822 	return action;
823 }
824 
mlx5dr_action_create_drop(void)825 struct mlx5dr_action *mlx5dr_action_create_drop(void)
826 {
827 	return dr_action_create_generic(DR_ACTION_TYP_DROP);
828 }
829 
830 struct mlx5dr_action *
mlx5dr_action_create_dest_table_num(struct mlx5dr_domain * dmn,u32 table_num)831 mlx5dr_action_create_dest_table_num(struct mlx5dr_domain *dmn, u32 table_num)
832 {
833 	struct mlx5dr_action *action;
834 
835 	action = dr_action_create_generic(DR_ACTION_TYP_FT);
836 	if (!action)
837 		return NULL;
838 
839 	action->dest_tbl->is_fw_tbl = true;
840 	action->dest_tbl->fw_tbl.dmn = dmn;
841 	action->dest_tbl->fw_tbl.id = table_num;
842 	action->dest_tbl->fw_tbl.type = FS_FT_FDB;
843 	refcount_inc(&dmn->refcount);
844 
845 	return action;
846 }
847 
848 struct mlx5dr_action *
mlx5dr_action_create_dest_table(struct mlx5dr_table * tbl)849 mlx5dr_action_create_dest_table(struct mlx5dr_table *tbl)
850 {
851 	struct mlx5dr_action *action;
852 
853 	refcount_inc(&tbl->refcount);
854 
855 	action = dr_action_create_generic(DR_ACTION_TYP_FT);
856 	if (!action)
857 		goto dec_ref;
858 
859 	action->dest_tbl->tbl = tbl;
860 
861 	return action;
862 
863 dec_ref:
864 	refcount_dec(&tbl->refcount);
865 	return NULL;
866 }
867 
868 struct mlx5dr_action *
mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain * dmn,struct mlx5dr_action_dest * dests,u32 num_of_dests,bool ignore_flow_level,u32 flow_source)869 mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain *dmn,
870 				   struct mlx5dr_action_dest *dests,
871 				   u32 num_of_dests,
872 				   bool ignore_flow_level,
873 				   u32 flow_source)
874 {
875 	struct mlx5dr_cmd_flow_destination_hw_info *hw_dests;
876 	struct mlx5dr_action **ref_actions;
877 	struct mlx5dr_action *action;
878 	bool reformat_req = false;
879 	u32 num_of_ref = 0;
880 	u32 ref_act_cnt;
881 	int ret;
882 	int i;
883 
884 	if (dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
885 		mlx5dr_err(dmn, "Multiple destination support is for FDB only\n");
886 		return NULL;
887 	}
888 
889 	hw_dests = kcalloc(num_of_dests, sizeof(*hw_dests), GFP_KERNEL);
890 	if (!hw_dests)
891 		return NULL;
892 
893 	if (unlikely(check_mul_overflow(num_of_dests, 2u, &ref_act_cnt)))
894 		goto free_hw_dests;
895 
896 	ref_actions = kcalloc(ref_act_cnt, sizeof(*ref_actions), GFP_KERNEL);
897 	if (!ref_actions)
898 		goto free_hw_dests;
899 
900 	for (i = 0; i < num_of_dests; i++) {
901 		struct mlx5dr_action *reformat_action = dests[i].reformat;
902 		struct mlx5dr_action *dest_action = dests[i].dest;
903 
904 		ref_actions[num_of_ref++] = dest_action;
905 
906 		switch (dest_action->action_type) {
907 		case DR_ACTION_TYP_VPORT:
908 			hw_dests[i].vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID;
909 			hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
910 			hw_dests[i].vport.num = dest_action->vport->caps->num;
911 			hw_dests[i].vport.vhca_id = dest_action->vport->caps->vhca_gvmi;
912 			if (reformat_action) {
913 				reformat_req = true;
914 				hw_dests[i].vport.reformat_id =
915 					reformat_action->reformat->id;
916 				ref_actions[num_of_ref++] = reformat_action;
917 				hw_dests[i].vport.flags |= MLX5_FLOW_DEST_VPORT_REFORMAT_ID;
918 			}
919 			break;
920 
921 		case DR_ACTION_TYP_FT:
922 			hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
923 			if (dest_action->dest_tbl->is_fw_tbl)
924 				hw_dests[i].ft_id = dest_action->dest_tbl->fw_tbl.id;
925 			else
926 				hw_dests[i].ft_id = dest_action->dest_tbl->tbl->table_id;
927 			break;
928 
929 		default:
930 			mlx5dr_dbg(dmn, "Invalid multiple destinations action\n");
931 			goto free_ref_actions;
932 		}
933 	}
934 
935 	action = dr_action_create_generic(DR_ACTION_TYP_FT);
936 	if (!action)
937 		goto free_ref_actions;
938 
939 	ret = mlx5dr_fw_create_md_tbl(dmn,
940 				      hw_dests,
941 				      num_of_dests,
942 				      reformat_req,
943 				      &action->dest_tbl->fw_tbl.id,
944 				      &action->dest_tbl->fw_tbl.group_id,
945 				      ignore_flow_level,
946 				      flow_source);
947 	if (ret)
948 		goto free_action;
949 
950 	refcount_inc(&dmn->refcount);
951 
952 	for (i = 0; i < num_of_ref; i++)
953 		refcount_inc(&ref_actions[i]->refcount);
954 
955 	action->dest_tbl->is_fw_tbl = true;
956 	action->dest_tbl->fw_tbl.dmn = dmn;
957 	action->dest_tbl->fw_tbl.type = FS_FT_FDB;
958 	action->dest_tbl->fw_tbl.ref_actions = ref_actions;
959 	action->dest_tbl->fw_tbl.num_of_ref_actions = num_of_ref;
960 
961 	kfree(hw_dests);
962 
963 	return action;
964 
965 free_action:
966 	kfree(action);
967 free_ref_actions:
968 	kfree(ref_actions);
969 free_hw_dests:
970 	kfree(hw_dests);
971 	return NULL;
972 }
973 
974 struct mlx5dr_action *
mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain * dmn,struct mlx5_flow_table * ft)975 mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain *dmn,
976 					struct mlx5_flow_table *ft)
977 {
978 	struct mlx5dr_action *action;
979 
980 	action = dr_action_create_generic(DR_ACTION_TYP_FT);
981 	if (!action)
982 		return NULL;
983 
984 	action->dest_tbl->is_fw_tbl = 1;
985 	action->dest_tbl->fw_tbl.type = ft->type;
986 	action->dest_tbl->fw_tbl.id = ft->id;
987 	action->dest_tbl->fw_tbl.dmn = dmn;
988 
989 	refcount_inc(&dmn->refcount);
990 
991 	return action;
992 }
993 
994 struct mlx5dr_action *
mlx5dr_action_create_flow_counter(u32 counter_id)995 mlx5dr_action_create_flow_counter(u32 counter_id)
996 {
997 	struct mlx5dr_action *action;
998 
999 	action = dr_action_create_generic(DR_ACTION_TYP_CTR);
1000 	if (!action)
1001 		return NULL;
1002 
1003 	action->ctr->ctr_id = counter_id;
1004 
1005 	return action;
1006 }
1007 
mlx5dr_action_create_tag(u32 tag_value)1008 struct mlx5dr_action *mlx5dr_action_create_tag(u32 tag_value)
1009 {
1010 	struct mlx5dr_action *action;
1011 
1012 	action = dr_action_create_generic(DR_ACTION_TYP_TAG);
1013 	if (!action)
1014 		return NULL;
1015 
1016 	action->flow_tag->flow_tag = tag_value & 0xffffff;
1017 
1018 	return action;
1019 }
1020 
1021 struct mlx5dr_action *
mlx5dr_action_create_flow_sampler(struct mlx5dr_domain * dmn,u32 sampler_id)1022 mlx5dr_action_create_flow_sampler(struct mlx5dr_domain *dmn, u32 sampler_id)
1023 {
1024 	struct mlx5dr_action *action;
1025 	u64 icm_rx, icm_tx;
1026 	int ret;
1027 
1028 	ret = mlx5dr_cmd_query_flow_sampler(dmn->mdev, sampler_id,
1029 					    &icm_rx, &icm_tx);
1030 	if (ret)
1031 		return NULL;
1032 
1033 	action = dr_action_create_generic(DR_ACTION_TYP_SAMPLER);
1034 	if (!action)
1035 		return NULL;
1036 
1037 	action->sampler->dmn = dmn;
1038 	action->sampler->sampler_id = sampler_id;
1039 	action->sampler->rx_icm_addr = icm_rx;
1040 	action->sampler->tx_icm_addr = icm_tx;
1041 
1042 	refcount_inc(&dmn->refcount);
1043 	return action;
1044 }
1045 
1046 static int
dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type,struct mlx5dr_domain * dmn,u8 reformat_param_0,u8 reformat_param_1,size_t data_sz,void * data)1047 dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type,
1048 				 struct mlx5dr_domain *dmn,
1049 				 u8 reformat_param_0,
1050 				 u8 reformat_param_1,
1051 				 size_t data_sz,
1052 				 void *data)
1053 {
1054 	if (reformat_type == DR_ACTION_TYP_INSERT_HDR) {
1055 		if ((!data && data_sz) || (data && !data_sz) ||
1056 		    MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_size) < data_sz ||
1057 		    MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_offset) < reformat_param_1) {
1058 			mlx5dr_dbg(dmn, "Invalid reformat parameters for INSERT_HDR\n");
1059 			goto out_err;
1060 		}
1061 	} else if (reformat_type == DR_ACTION_TYP_REMOVE_HDR) {
1062 		if (data ||
1063 		    MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_size) < data_sz ||
1064 		    MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_offset) < reformat_param_1) {
1065 			mlx5dr_dbg(dmn, "Invalid reformat parameters for REMOVE_HDR\n");
1066 			goto out_err;
1067 		}
1068 	} else if (reformat_param_0 || reformat_param_1 ||
1069 		   reformat_type > DR_ACTION_TYP_REMOVE_HDR) {
1070 		mlx5dr_dbg(dmn, "Invalid reformat parameters\n");
1071 		goto out_err;
1072 	}
1073 
1074 	if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB)
1075 		return 0;
1076 
1077 	if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) {
1078 		if (reformat_type != DR_ACTION_TYP_TNL_L2_TO_L2 &&
1079 		    reformat_type != DR_ACTION_TYP_TNL_L3_TO_L2) {
1080 			mlx5dr_dbg(dmn, "Action reformat type not support on RX domain\n");
1081 			goto out_err;
1082 		}
1083 	} else if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) {
1084 		if (reformat_type != DR_ACTION_TYP_L2_TO_TNL_L2 &&
1085 		    reformat_type != DR_ACTION_TYP_L2_TO_TNL_L3) {
1086 			mlx5dr_dbg(dmn, "Action reformat type not support on TX domain\n");
1087 			goto out_err;
1088 		}
1089 	}
1090 
1091 	return 0;
1092 
1093 out_err:
1094 	return -EINVAL;
1095 }
1096 
1097 #define ACTION_CACHE_LINE_SIZE 64
1098 
1099 static int
dr_action_create_reformat_action(struct mlx5dr_domain * dmn,u8 reformat_param_0,u8 reformat_param_1,size_t data_sz,void * data,struct mlx5dr_action * action)1100 dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
1101 				 u8 reformat_param_0, u8 reformat_param_1,
1102 				 size_t data_sz, void *data,
1103 				 struct mlx5dr_action *action)
1104 {
1105 	u32 reformat_id;
1106 	int ret;
1107 
1108 	switch (action->action_type) {
1109 	case DR_ACTION_TYP_L2_TO_TNL_L2:
1110 	case DR_ACTION_TYP_L2_TO_TNL_L3:
1111 	{
1112 		enum mlx5_reformat_ctx_type rt;
1113 
1114 		if (action->action_type == DR_ACTION_TYP_L2_TO_TNL_L2)
1115 			rt = MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL;
1116 		else
1117 			rt = MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
1118 
1119 		ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev, rt, 0, 0,
1120 						     data_sz, data,
1121 						     &reformat_id);
1122 		if (ret)
1123 			return ret;
1124 
1125 		action->reformat->id = reformat_id;
1126 		action->reformat->size = data_sz;
1127 		return 0;
1128 	}
1129 	case DR_ACTION_TYP_TNL_L2_TO_L2:
1130 	{
1131 		return 0;
1132 	}
1133 	case DR_ACTION_TYP_TNL_L3_TO_L2:
1134 	{
1135 		u8 hw_actions[ACTION_CACHE_LINE_SIZE] = {};
1136 		int ret;
1137 
1138 		ret = mlx5dr_ste_set_action_decap_l3_list(dmn->ste_ctx,
1139 							  data, data_sz,
1140 							  hw_actions,
1141 							  ACTION_CACHE_LINE_SIZE,
1142 							  &action->rewrite->num_of_actions);
1143 		if (ret) {
1144 			mlx5dr_dbg(dmn, "Failed creating decap l3 action list\n");
1145 			return ret;
1146 		}
1147 
1148 		action->rewrite->chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool,
1149 								DR_CHUNK_SIZE_8);
1150 		if (!action->rewrite->chunk) {
1151 			mlx5dr_dbg(dmn, "Failed allocating modify header chunk\n");
1152 			return -ENOMEM;
1153 		}
1154 
1155 		action->rewrite->data = (void *)hw_actions;
1156 		action->rewrite->index = (mlx5dr_icm_pool_get_chunk_icm_addr
1157 					  (action->rewrite->chunk) -
1158 					 dmn->info.caps.hdr_modify_icm_addr) /
1159 					 ACTION_CACHE_LINE_SIZE;
1160 
1161 		ret = mlx5dr_send_postsend_action(dmn, action);
1162 		if (ret) {
1163 			mlx5dr_dbg(dmn, "Writing decap l3 actions to ICM failed\n");
1164 			mlx5dr_icm_free_chunk(action->rewrite->chunk);
1165 			return ret;
1166 		}
1167 		return 0;
1168 	}
1169 	case DR_ACTION_TYP_INSERT_HDR:
1170 		ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev,
1171 						     MLX5_REFORMAT_TYPE_INSERT_HDR,
1172 						     reformat_param_0,
1173 						     reformat_param_1,
1174 						     data_sz, data,
1175 						     &reformat_id);
1176 		if (ret)
1177 			return ret;
1178 
1179 		action->reformat->id = reformat_id;
1180 		action->reformat->size = data_sz;
1181 		action->reformat->param_0 = reformat_param_0;
1182 		action->reformat->param_1 = reformat_param_1;
1183 		return 0;
1184 	case DR_ACTION_TYP_REMOVE_HDR:
1185 		action->reformat->id = 0;
1186 		action->reformat->size = data_sz;
1187 		action->reformat->param_0 = reformat_param_0;
1188 		action->reformat->param_1 = reformat_param_1;
1189 		return 0;
1190 	default:
1191 		mlx5dr_info(dmn, "Reformat type is not supported %d\n", action->action_type);
1192 		return -EINVAL;
1193 	}
1194 }
1195 
1196 #define CVLAN_ETHERTYPE 0x8100
1197 #define SVLAN_ETHERTYPE 0x88a8
1198 
mlx5dr_action_create_pop_vlan(void)1199 struct mlx5dr_action *mlx5dr_action_create_pop_vlan(void)
1200 {
1201 	return dr_action_create_generic(DR_ACTION_TYP_POP_VLAN);
1202 }
1203 
mlx5dr_action_create_push_vlan(struct mlx5dr_domain * dmn,__be32 vlan_hdr)1204 struct mlx5dr_action *mlx5dr_action_create_push_vlan(struct mlx5dr_domain *dmn,
1205 						     __be32 vlan_hdr)
1206 {
1207 	u32 vlan_hdr_h = ntohl(vlan_hdr);
1208 	u16 ethertype = vlan_hdr_h >> 16;
1209 	struct mlx5dr_action *action;
1210 
1211 	if (ethertype != SVLAN_ETHERTYPE && ethertype != CVLAN_ETHERTYPE) {
1212 		mlx5dr_dbg(dmn, "Invalid vlan ethertype\n");
1213 		return NULL;
1214 	}
1215 
1216 	action = dr_action_create_generic(DR_ACTION_TYP_PUSH_VLAN);
1217 	if (!action)
1218 		return NULL;
1219 
1220 	action->push_vlan->vlan_hdr = vlan_hdr_h;
1221 	return action;
1222 }
1223 
1224 struct mlx5dr_action *
mlx5dr_action_create_packet_reformat(struct mlx5dr_domain * dmn,enum mlx5dr_action_reformat_type reformat_type,u8 reformat_param_0,u8 reformat_param_1,size_t data_sz,void * data)1225 mlx5dr_action_create_packet_reformat(struct mlx5dr_domain *dmn,
1226 				     enum mlx5dr_action_reformat_type reformat_type,
1227 				     u8 reformat_param_0,
1228 				     u8 reformat_param_1,
1229 				     size_t data_sz,
1230 				     void *data)
1231 {
1232 	enum mlx5dr_action_type action_type;
1233 	struct mlx5dr_action *action;
1234 	int ret;
1235 
1236 	refcount_inc(&dmn->refcount);
1237 
1238 	/* General checks */
1239 	ret = dr_action_reformat_to_action_type(reformat_type, &action_type);
1240 	if (ret) {
1241 		mlx5dr_dbg(dmn, "Invalid reformat_type provided\n");
1242 		goto dec_ref;
1243 	}
1244 
1245 	ret = dr_action_verify_reformat_params(action_type, dmn,
1246 					       reformat_param_0, reformat_param_1,
1247 					       data_sz, data);
1248 	if (ret)
1249 		goto dec_ref;
1250 
1251 	action = dr_action_create_generic(action_type);
1252 	if (!action)
1253 		goto dec_ref;
1254 
1255 	action->reformat->dmn = dmn;
1256 
1257 	ret = dr_action_create_reformat_action(dmn,
1258 					       reformat_param_0,
1259 					       reformat_param_1,
1260 					       data_sz,
1261 					       data,
1262 					       action);
1263 	if (ret) {
1264 		mlx5dr_dbg(dmn, "Failed creating reformat action %d\n", ret);
1265 		goto free_action;
1266 	}
1267 
1268 	return action;
1269 
1270 free_action:
1271 	kfree(action);
1272 dec_ref:
1273 	refcount_dec(&dmn->refcount);
1274 	return NULL;
1275 }
1276 
1277 static int
dr_action_modify_sw_to_hw_add(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_hw_info)1278 dr_action_modify_sw_to_hw_add(struct mlx5dr_domain *dmn,
1279 			      __be64 *sw_action,
1280 			      __be64 *hw_action,
1281 			      const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1282 {
1283 	const struct mlx5dr_ste_action_modify_field *hw_action_info;
1284 	u8 max_length;
1285 	u16 sw_field;
1286 	u32 data;
1287 
1288 	/* Get SW modify action data */
1289 	sw_field = MLX5_GET(set_action_in, sw_action, field);
1290 	data = MLX5_GET(set_action_in, sw_action, data);
1291 
1292 	/* Convert SW data to HW modify action format */
1293 	hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1294 	if (!hw_action_info) {
1295 		mlx5dr_dbg(dmn, "Modify add action invalid field given\n");
1296 		return -EINVAL;
1297 	}
1298 
1299 	max_length = hw_action_info->end - hw_action_info->start + 1;
1300 
1301 	mlx5dr_ste_set_action_add(dmn->ste_ctx,
1302 				  hw_action,
1303 				  hw_action_info->hw_field,
1304 				  hw_action_info->start,
1305 				  max_length,
1306 				  data);
1307 
1308 	*ret_hw_info = hw_action_info;
1309 
1310 	return 0;
1311 }
1312 
1313 static int
dr_action_modify_sw_to_hw_set(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_hw_info)1314 dr_action_modify_sw_to_hw_set(struct mlx5dr_domain *dmn,
1315 			      __be64 *sw_action,
1316 			      __be64 *hw_action,
1317 			      const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1318 {
1319 	const struct mlx5dr_ste_action_modify_field *hw_action_info;
1320 	u8 offset, length, max_length;
1321 	u16 sw_field;
1322 	u32 data;
1323 
1324 	/* Get SW modify action data */
1325 	length = MLX5_GET(set_action_in, sw_action, length);
1326 	offset = MLX5_GET(set_action_in, sw_action, offset);
1327 	sw_field = MLX5_GET(set_action_in, sw_action, field);
1328 	data = MLX5_GET(set_action_in, sw_action, data);
1329 
1330 	/* Convert SW data to HW modify action format */
1331 	hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1332 	if (!hw_action_info) {
1333 		mlx5dr_dbg(dmn, "Modify set action invalid field given\n");
1334 		return -EINVAL;
1335 	}
1336 
1337 	/* PRM defines that length zero specific length of 32bits */
1338 	length = length ? length : 32;
1339 
1340 	max_length = hw_action_info->end - hw_action_info->start + 1;
1341 
1342 	if (length + offset > max_length) {
1343 		mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1344 		return -EINVAL;
1345 	}
1346 
1347 	mlx5dr_ste_set_action_set(dmn->ste_ctx,
1348 				  hw_action,
1349 				  hw_action_info->hw_field,
1350 				  hw_action_info->start + offset,
1351 				  length,
1352 				  data);
1353 
1354 	*ret_hw_info = hw_action_info;
1355 
1356 	return 0;
1357 }
1358 
1359 static int
dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_dst_hw_info,const struct mlx5dr_ste_action_modify_field ** ret_src_hw_info)1360 dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain *dmn,
1361 			       __be64 *sw_action,
1362 			       __be64 *hw_action,
1363 			       const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1364 			       const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1365 {
1366 	u8 src_offset, dst_offset, src_max_length, dst_max_length, length;
1367 	const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1368 	const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1369 	u16 src_field, dst_field;
1370 
1371 	/* Get SW modify action data */
1372 	src_field = MLX5_GET(copy_action_in, sw_action, src_field);
1373 	dst_field = MLX5_GET(copy_action_in, sw_action, dst_field);
1374 	src_offset = MLX5_GET(copy_action_in, sw_action, src_offset);
1375 	dst_offset = MLX5_GET(copy_action_in, sw_action, dst_offset);
1376 	length = MLX5_GET(copy_action_in, sw_action, length);
1377 
1378 	/* Convert SW data to HW modify action format */
1379 	hw_src_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, src_field);
1380 	hw_dst_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, dst_field);
1381 	if (!hw_src_action_info || !hw_dst_action_info) {
1382 		mlx5dr_dbg(dmn, "Modify copy action invalid field given\n");
1383 		return -EINVAL;
1384 	}
1385 
1386 	/* PRM defines that length zero specific length of 32bits */
1387 	length = length ? length : 32;
1388 
1389 	src_max_length = hw_src_action_info->end -
1390 			 hw_src_action_info->start + 1;
1391 	dst_max_length = hw_dst_action_info->end -
1392 			 hw_dst_action_info->start + 1;
1393 
1394 	if (length + src_offset > src_max_length ||
1395 	    length + dst_offset > dst_max_length) {
1396 		mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1397 		return -EINVAL;
1398 	}
1399 
1400 	mlx5dr_ste_set_action_copy(dmn->ste_ctx,
1401 				   hw_action,
1402 				   hw_dst_action_info->hw_field,
1403 				   hw_dst_action_info->start + dst_offset,
1404 				   length,
1405 				   hw_src_action_info->hw_field,
1406 				   hw_src_action_info->start + src_offset);
1407 
1408 	*ret_dst_hw_info = hw_dst_action_info;
1409 	*ret_src_hw_info = hw_src_action_info;
1410 
1411 	return 0;
1412 }
1413 
1414 static int
dr_action_modify_sw_to_hw(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_dst_hw_info,const struct mlx5dr_ste_action_modify_field ** ret_src_hw_info)1415 dr_action_modify_sw_to_hw(struct mlx5dr_domain *dmn,
1416 			  __be64 *sw_action,
1417 			  __be64 *hw_action,
1418 			  const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1419 			  const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1420 {
1421 	u8 action;
1422 	int ret;
1423 
1424 	*hw_action = 0;
1425 	*ret_src_hw_info = NULL;
1426 
1427 	/* Get SW modify action type */
1428 	action = MLX5_GET(set_action_in, sw_action, action_type);
1429 
1430 	switch (action) {
1431 	case MLX5_ACTION_TYPE_SET:
1432 		ret = dr_action_modify_sw_to_hw_set(dmn, sw_action,
1433 						    hw_action,
1434 						    ret_dst_hw_info);
1435 		break;
1436 
1437 	case MLX5_ACTION_TYPE_ADD:
1438 		ret = dr_action_modify_sw_to_hw_add(dmn, sw_action,
1439 						    hw_action,
1440 						    ret_dst_hw_info);
1441 		break;
1442 
1443 	case MLX5_ACTION_TYPE_COPY:
1444 		ret = dr_action_modify_sw_to_hw_copy(dmn, sw_action,
1445 						     hw_action,
1446 						     ret_dst_hw_info,
1447 						     ret_src_hw_info);
1448 		break;
1449 
1450 	default:
1451 		mlx5dr_info(dmn, "Unsupported action_type for modify action\n");
1452 		ret = -EOPNOTSUPP;
1453 	}
1454 
1455 	return ret;
1456 }
1457 
1458 static int
dr_action_modify_check_set_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1459 dr_action_modify_check_set_field_limitation(struct mlx5dr_action *action,
1460 					    const __be64 *sw_action)
1461 {
1462 	u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1463 	struct mlx5dr_domain *dmn = action->rewrite->dmn;
1464 
1465 	if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1466 		action->rewrite->allow_rx = 0;
1467 		if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1468 			mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1469 				   sw_field);
1470 			return -EINVAL;
1471 		}
1472 	} else if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1473 		action->rewrite->allow_tx = 0;
1474 		if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1475 			mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1476 				   sw_field);
1477 			return -EINVAL;
1478 		}
1479 	}
1480 
1481 	if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1482 		mlx5dr_dbg(dmn, "Modify SET actions not supported on both RX and TX\n");
1483 		return -EINVAL;
1484 	}
1485 
1486 	return 0;
1487 }
1488 
1489 static int
dr_action_modify_check_add_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1490 dr_action_modify_check_add_field_limitation(struct mlx5dr_action *action,
1491 					    const __be64 *sw_action)
1492 {
1493 	u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1494 	struct mlx5dr_domain *dmn = action->rewrite->dmn;
1495 
1496 	if (sw_field != MLX5_ACTION_IN_FIELD_OUT_IP_TTL &&
1497 	    sw_field != MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT &&
1498 	    sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM &&
1499 	    sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM) {
1500 		mlx5dr_dbg(dmn, "Unsupported field %d for add action\n",
1501 			   sw_field);
1502 		return -EINVAL;
1503 	}
1504 
1505 	return 0;
1506 }
1507 
1508 static int
dr_action_modify_check_copy_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1509 dr_action_modify_check_copy_field_limitation(struct mlx5dr_action *action,
1510 					     const __be64 *sw_action)
1511 {
1512 	struct mlx5dr_domain *dmn = action->rewrite->dmn;
1513 	u16 sw_fields[2];
1514 	int i;
1515 
1516 	sw_fields[0] = MLX5_GET(copy_action_in, sw_action, src_field);
1517 	sw_fields[1] = MLX5_GET(copy_action_in, sw_action, dst_field);
1518 
1519 	for (i = 0; i < 2; i++) {
1520 		if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1521 			action->rewrite->allow_rx = 0;
1522 			if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1523 				mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1524 					   sw_fields[i]);
1525 				return -EINVAL;
1526 			}
1527 		} else if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1528 			action->rewrite->allow_tx = 0;
1529 			if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1530 				mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1531 					   sw_fields[i]);
1532 				return -EINVAL;
1533 			}
1534 		}
1535 	}
1536 
1537 	if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1538 		mlx5dr_dbg(dmn, "Modify copy actions not supported on both RX and TX\n");
1539 		return -EINVAL;
1540 	}
1541 
1542 	return 0;
1543 }
1544 
1545 static int
dr_action_modify_check_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1546 dr_action_modify_check_field_limitation(struct mlx5dr_action *action,
1547 					const __be64 *sw_action)
1548 {
1549 	struct mlx5dr_domain *dmn = action->rewrite->dmn;
1550 	u8 action_type;
1551 	int ret;
1552 
1553 	action_type = MLX5_GET(set_action_in, sw_action, action_type);
1554 
1555 	switch (action_type) {
1556 	case MLX5_ACTION_TYPE_SET:
1557 		ret = dr_action_modify_check_set_field_limitation(action,
1558 								  sw_action);
1559 		break;
1560 
1561 	case MLX5_ACTION_TYPE_ADD:
1562 		ret = dr_action_modify_check_add_field_limitation(action,
1563 								  sw_action);
1564 		break;
1565 
1566 	case MLX5_ACTION_TYPE_COPY:
1567 		ret = dr_action_modify_check_copy_field_limitation(action,
1568 								   sw_action);
1569 		break;
1570 
1571 	default:
1572 		mlx5dr_info(dmn, "Unsupported action %d modify action\n",
1573 			    action_type);
1574 		ret = -EOPNOTSUPP;
1575 	}
1576 
1577 	return ret;
1578 }
1579 
1580 static bool
dr_action_modify_check_is_ttl_modify(const void * sw_action)1581 dr_action_modify_check_is_ttl_modify(const void *sw_action)
1582 {
1583 	u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1584 
1585 	return sw_field == MLX5_ACTION_IN_FIELD_OUT_IP_TTL;
1586 }
1587 
dr_actions_convert_modify_header(struct mlx5dr_action * action,u32 max_hw_actions,u32 num_sw_actions,__be64 sw_actions[],__be64 hw_actions[],u32 * num_hw_actions,bool * modify_ttl)1588 static int dr_actions_convert_modify_header(struct mlx5dr_action *action,
1589 					    u32 max_hw_actions,
1590 					    u32 num_sw_actions,
1591 					    __be64 sw_actions[],
1592 					    __be64 hw_actions[],
1593 					    u32 *num_hw_actions,
1594 					    bool *modify_ttl)
1595 {
1596 	const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1597 	const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1598 	struct mlx5dr_domain *dmn = action->rewrite->dmn;
1599 	__be64 *modify_ttl_sw_action = NULL;
1600 	int ret, i, hw_idx = 0;
1601 	__be64 *sw_action;
1602 	__be64 hw_action;
1603 	u16 hw_field = 0;
1604 	u32 l3_type = 0;
1605 	u32 l4_type = 0;
1606 
1607 	*modify_ttl = false;
1608 
1609 	action->rewrite->allow_rx = 1;
1610 	action->rewrite->allow_tx = 1;
1611 
1612 	for (i = 0; i < num_sw_actions || modify_ttl_sw_action; i++) {
1613 		/* modify TTL is handled separately, as a last action */
1614 		if (i == num_sw_actions) {
1615 			sw_action = modify_ttl_sw_action;
1616 			modify_ttl_sw_action = NULL;
1617 		} else {
1618 			sw_action = &sw_actions[i];
1619 		}
1620 
1621 		ret = dr_action_modify_check_field_limitation(action,
1622 							      sw_action);
1623 		if (ret)
1624 			return ret;
1625 
1626 		if (!(*modify_ttl) &&
1627 		    dr_action_modify_check_is_ttl_modify(sw_action)) {
1628 			modify_ttl_sw_action = sw_action;
1629 			*modify_ttl = true;
1630 			continue;
1631 		}
1632 
1633 		/* Convert SW action to HW action */
1634 		ret = dr_action_modify_sw_to_hw(dmn,
1635 						sw_action,
1636 						&hw_action,
1637 						&hw_dst_action_info,
1638 						&hw_src_action_info);
1639 		if (ret)
1640 			return ret;
1641 
1642 		/* Due to a HW limitation we cannot modify 2 different L3 types */
1643 		if (l3_type && hw_dst_action_info->l3_type &&
1644 		    hw_dst_action_info->l3_type != l3_type) {
1645 			mlx5dr_dbg(dmn, "Action list can't support two different L3 types\n");
1646 			return -EINVAL;
1647 		}
1648 		if (hw_dst_action_info->l3_type)
1649 			l3_type = hw_dst_action_info->l3_type;
1650 
1651 		/* Due to a HW limitation we cannot modify two different L4 types */
1652 		if (l4_type && hw_dst_action_info->l4_type &&
1653 		    hw_dst_action_info->l4_type != l4_type) {
1654 			mlx5dr_dbg(dmn, "Action list can't support two different L4 types\n");
1655 			return -EINVAL;
1656 		}
1657 		if (hw_dst_action_info->l4_type)
1658 			l4_type = hw_dst_action_info->l4_type;
1659 
1660 		/* HW reads and executes two actions at once this means we
1661 		 * need to create a gap if two actions access the same field
1662 		 */
1663 		if ((hw_idx % 2) && (hw_field == hw_dst_action_info->hw_field ||
1664 				     (hw_src_action_info &&
1665 				      hw_field == hw_src_action_info->hw_field))) {
1666 			/* Check if after gap insertion the total number of HW
1667 			 * modify actions doesn't exceeds the limit
1668 			 */
1669 			hw_idx++;
1670 			if (hw_idx >= max_hw_actions) {
1671 				mlx5dr_dbg(dmn, "Modify header action number exceeds HW limit\n");
1672 				return -EINVAL;
1673 			}
1674 		}
1675 		hw_field = hw_dst_action_info->hw_field;
1676 
1677 		hw_actions[hw_idx] = hw_action;
1678 		hw_idx++;
1679 	}
1680 
1681 	/* if the resulting HW actions list is empty, add NOP action */
1682 	if (!hw_idx)
1683 		hw_idx++;
1684 
1685 	*num_hw_actions = hw_idx;
1686 
1687 	return 0;
1688 }
1689 
dr_action_create_modify_action(struct mlx5dr_domain * dmn,size_t actions_sz,__be64 actions[],struct mlx5dr_action * action)1690 static int dr_action_create_modify_action(struct mlx5dr_domain *dmn,
1691 					  size_t actions_sz,
1692 					  __be64 actions[],
1693 					  struct mlx5dr_action *action)
1694 {
1695 	struct mlx5dr_icm_chunk *chunk;
1696 	u32 max_hw_actions;
1697 	u32 num_hw_actions;
1698 	u32 num_sw_actions;
1699 	__be64 *hw_actions;
1700 	bool modify_ttl;
1701 	int ret;
1702 
1703 	num_sw_actions = actions_sz / DR_MODIFY_ACTION_SIZE;
1704 	max_hw_actions = mlx5dr_icm_pool_chunk_size_to_entries(DR_CHUNK_SIZE_16);
1705 
1706 	if (num_sw_actions > max_hw_actions) {
1707 		mlx5dr_dbg(dmn, "Max number of actions %d exceeds limit %d\n",
1708 			   num_sw_actions, max_hw_actions);
1709 		return -EINVAL;
1710 	}
1711 
1712 	chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool, DR_CHUNK_SIZE_16);
1713 	if (!chunk)
1714 		return -ENOMEM;
1715 
1716 	hw_actions = kcalloc(1, max_hw_actions * DR_MODIFY_ACTION_SIZE, GFP_KERNEL);
1717 	if (!hw_actions) {
1718 		ret = -ENOMEM;
1719 		goto free_chunk;
1720 	}
1721 
1722 	ret = dr_actions_convert_modify_header(action,
1723 					       max_hw_actions,
1724 					       num_sw_actions,
1725 					       actions,
1726 					       hw_actions,
1727 					       &num_hw_actions,
1728 					       &modify_ttl);
1729 	if (ret)
1730 		goto free_hw_actions;
1731 
1732 	action->rewrite->chunk = chunk;
1733 	action->rewrite->modify_ttl = modify_ttl;
1734 	action->rewrite->data = (u8 *)hw_actions;
1735 	action->rewrite->num_of_actions = num_hw_actions;
1736 	action->rewrite->index = (mlx5dr_icm_pool_get_chunk_icm_addr(chunk) -
1737 				  dmn->info.caps.hdr_modify_icm_addr) /
1738 				  ACTION_CACHE_LINE_SIZE;
1739 
1740 	ret = mlx5dr_send_postsend_action(dmn, action);
1741 	if (ret)
1742 		goto free_hw_actions;
1743 
1744 	return 0;
1745 
1746 free_hw_actions:
1747 	kfree(hw_actions);
1748 free_chunk:
1749 	mlx5dr_icm_free_chunk(chunk);
1750 	return ret;
1751 }
1752 
1753 struct mlx5dr_action *
mlx5dr_action_create_modify_header(struct mlx5dr_domain * dmn,u32 flags,size_t actions_sz,__be64 actions[])1754 mlx5dr_action_create_modify_header(struct mlx5dr_domain *dmn,
1755 				   u32 flags,
1756 				   size_t actions_sz,
1757 				   __be64 actions[])
1758 {
1759 	struct mlx5dr_action *action;
1760 	int ret = 0;
1761 
1762 	refcount_inc(&dmn->refcount);
1763 
1764 	if (actions_sz % DR_MODIFY_ACTION_SIZE) {
1765 		mlx5dr_dbg(dmn, "Invalid modify actions size provided\n");
1766 		goto dec_ref;
1767 	}
1768 
1769 	action = dr_action_create_generic(DR_ACTION_TYP_MODIFY_HDR);
1770 	if (!action)
1771 		goto dec_ref;
1772 
1773 	action->rewrite->dmn = dmn;
1774 
1775 	ret = dr_action_create_modify_action(dmn,
1776 					     actions_sz,
1777 					     actions,
1778 					     action);
1779 	if (ret) {
1780 		mlx5dr_dbg(dmn, "Failed creating modify header action %d\n", ret);
1781 		goto free_action;
1782 	}
1783 
1784 	return action;
1785 
1786 free_action:
1787 	kfree(action);
1788 dec_ref:
1789 	refcount_dec(&dmn->refcount);
1790 	return NULL;
1791 }
1792 
1793 struct mlx5dr_action *
mlx5dr_action_create_dest_vport(struct mlx5dr_domain * dmn,u16 vport,u8 vhca_id_valid,u16 vhca_id)1794 mlx5dr_action_create_dest_vport(struct mlx5dr_domain *dmn,
1795 				u16 vport, u8 vhca_id_valid,
1796 				u16 vhca_id)
1797 {
1798 	struct mlx5dr_cmd_vport_cap *vport_cap;
1799 	struct mlx5dr_domain *vport_dmn;
1800 	struct mlx5dr_action *action;
1801 	u8 peer_vport;
1802 
1803 	peer_vport = vhca_id_valid && (vhca_id != dmn->info.caps.gvmi);
1804 	vport_dmn = peer_vport ? dmn->peer_dmn : dmn;
1805 	if (!vport_dmn) {
1806 		mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n");
1807 		return NULL;
1808 	}
1809 
1810 	if (vport_dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
1811 		mlx5dr_dbg(dmn, "Domain doesn't support vport actions\n");
1812 		return NULL;
1813 	}
1814 
1815 	vport_cap = mlx5dr_domain_get_vport_cap(vport_dmn, vport);
1816 	if (!vport_cap) {
1817 		mlx5dr_err(dmn,
1818 			   "Failed to get vport 0x%x caps - vport is disabled or invalid\n",
1819 			   vport);
1820 		return NULL;
1821 	}
1822 
1823 	action = dr_action_create_generic(DR_ACTION_TYP_VPORT);
1824 	if (!action)
1825 		return NULL;
1826 
1827 	action->vport->dmn = vport_dmn;
1828 	action->vport->caps = vport_cap;
1829 
1830 	return action;
1831 }
1832 
mlx5dr_action_destroy(struct mlx5dr_action * action)1833 int mlx5dr_action_destroy(struct mlx5dr_action *action)
1834 {
1835 	if (WARN_ON_ONCE(refcount_read(&action->refcount) > 1))
1836 		return -EBUSY;
1837 
1838 	switch (action->action_type) {
1839 	case DR_ACTION_TYP_FT:
1840 		if (action->dest_tbl->is_fw_tbl)
1841 			refcount_dec(&action->dest_tbl->fw_tbl.dmn->refcount);
1842 		else
1843 			refcount_dec(&action->dest_tbl->tbl->refcount);
1844 
1845 		if (action->dest_tbl->is_fw_tbl &&
1846 		    action->dest_tbl->fw_tbl.num_of_ref_actions) {
1847 			struct mlx5dr_action **ref_actions;
1848 			int i;
1849 
1850 			ref_actions = action->dest_tbl->fw_tbl.ref_actions;
1851 			for (i = 0; i < action->dest_tbl->fw_tbl.num_of_ref_actions; i++)
1852 				refcount_dec(&ref_actions[i]->refcount);
1853 
1854 			kfree(ref_actions);
1855 
1856 			mlx5dr_fw_destroy_md_tbl(action->dest_tbl->fw_tbl.dmn,
1857 						 action->dest_tbl->fw_tbl.id,
1858 						 action->dest_tbl->fw_tbl.group_id);
1859 		}
1860 		break;
1861 	case DR_ACTION_TYP_TNL_L2_TO_L2:
1862 	case DR_ACTION_TYP_REMOVE_HDR:
1863 		refcount_dec(&action->reformat->dmn->refcount);
1864 		break;
1865 	case DR_ACTION_TYP_TNL_L3_TO_L2:
1866 		mlx5dr_icm_free_chunk(action->rewrite->chunk);
1867 		refcount_dec(&action->rewrite->dmn->refcount);
1868 		break;
1869 	case DR_ACTION_TYP_L2_TO_TNL_L2:
1870 	case DR_ACTION_TYP_L2_TO_TNL_L3:
1871 	case DR_ACTION_TYP_INSERT_HDR:
1872 		mlx5dr_cmd_destroy_reformat_ctx((action->reformat->dmn)->mdev,
1873 						action->reformat->id);
1874 		refcount_dec(&action->reformat->dmn->refcount);
1875 		break;
1876 	case DR_ACTION_TYP_MODIFY_HDR:
1877 		mlx5dr_icm_free_chunk(action->rewrite->chunk);
1878 		kfree(action->rewrite->data);
1879 		refcount_dec(&action->rewrite->dmn->refcount);
1880 		break;
1881 	case DR_ACTION_TYP_SAMPLER:
1882 		refcount_dec(&action->sampler->dmn->refcount);
1883 		break;
1884 	default:
1885 		break;
1886 	}
1887 
1888 	kfree(action);
1889 	return 0;
1890 }
1891