1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
3  * Copyright 2016 NXP
4  * Copyright 2020 NXP
5  */
6 #ifndef _FSL_DPNI_CMD_H
7 #define _FSL_DPNI_CMD_H
8 
9 #include "dpni.h"
10 
11 /* DPNI Version */
12 #define DPNI_VER_MAJOR				7
13 #define DPNI_VER_MINOR				0
14 #define DPNI_CMD_BASE_VERSION			1
15 #define DPNI_CMD_2ND_VERSION			2
16 #define DPNI_CMD_ID_OFFSET			4
17 
18 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
19 #define DPNI_CMD_V2(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION)
20 
21 #define DPNI_CMDID_OPEN					DPNI_CMD(0x801)
22 #define DPNI_CMDID_CLOSE				DPNI_CMD(0x800)
23 #define DPNI_CMDID_CREATE				DPNI_CMD(0x901)
24 #define DPNI_CMDID_DESTROY				DPNI_CMD(0x900)
25 #define DPNI_CMDID_GET_API_VERSION			DPNI_CMD(0xa01)
26 
27 #define DPNI_CMDID_ENABLE				DPNI_CMD(0x002)
28 #define DPNI_CMDID_DISABLE				DPNI_CMD(0x003)
29 #define DPNI_CMDID_GET_ATTR				DPNI_CMD(0x004)
30 #define DPNI_CMDID_RESET				DPNI_CMD(0x005)
31 #define DPNI_CMDID_IS_ENABLED				DPNI_CMD(0x006)
32 
33 #define DPNI_CMDID_SET_IRQ				DPNI_CMD(0x010)
34 #define DPNI_CMDID_GET_IRQ				DPNI_CMD(0x011)
35 #define DPNI_CMDID_SET_IRQ_ENABLE			DPNI_CMD(0x012)
36 #define DPNI_CMDID_GET_IRQ_ENABLE			DPNI_CMD(0x013)
37 #define DPNI_CMDID_SET_IRQ_MASK				DPNI_CMD(0x014)
38 #define DPNI_CMDID_GET_IRQ_MASK				DPNI_CMD(0x015)
39 #define DPNI_CMDID_GET_IRQ_STATUS			DPNI_CMD(0x016)
40 #define DPNI_CMDID_CLEAR_IRQ_STATUS			DPNI_CMD(0x017)
41 
42 #define DPNI_CMDID_SET_POOLS				DPNI_CMD(0x200)
43 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR			DPNI_CMD(0x20B)
44 
45 #define DPNI_CMDID_GET_QDID				DPNI_CMD(0x210)
46 #define DPNI_CMDID_GET_TX_DATA_OFFSET			DPNI_CMD(0x212)
47 #define DPNI_CMDID_GET_LINK_STATE			DPNI_CMD(0x215)
48 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH			DPNI_CMD(0x216)
49 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH			DPNI_CMD(0x217)
50 #define DPNI_CMDID_SET_LINK_CFG				DPNI_CMD(0x21A)
51 #define DPNI_CMDID_SET_TX_SHAPING			DPNI_CMD_V2(0x21B)
52 
53 #define DPNI_CMDID_SET_MCAST_PROMISC			DPNI_CMD(0x220)
54 #define DPNI_CMDID_GET_MCAST_PROMISC			DPNI_CMD(0x221)
55 #define DPNI_CMDID_SET_UNICAST_PROMISC			DPNI_CMD(0x222)
56 #define DPNI_CMDID_GET_UNICAST_PROMISC			DPNI_CMD(0x223)
57 #define DPNI_CMDID_SET_PRIM_MAC				DPNI_CMD(0x224)
58 #define DPNI_CMDID_GET_PRIM_MAC				DPNI_CMD(0x225)
59 #define DPNI_CMDID_ADD_MAC_ADDR				DPNI_CMD(0x226)
60 #define DPNI_CMDID_REMOVE_MAC_ADDR			DPNI_CMD(0x227)
61 #define DPNI_CMDID_CLR_MAC_FILTERS			DPNI_CMD(0x228)
62 
63 #define DPNI_CMDID_SET_RX_TC_DIST			DPNI_CMD(0x235)
64 
65 #define DPNI_CMDID_ENABLE_VLAN_FILTER			DPNI_CMD(0x230)
66 #define DPNI_CMDID_ADD_VLAN_ID				DPNI_CMD_V2(0x231)
67 #define DPNI_CMDID_REMOVE_VLAN_ID			DPNI_CMD(0x232)
68 
69 #define DPNI_CMDID_SET_QOS_TBL				DPNI_CMD(0x240)
70 #define DPNI_CMDID_ADD_QOS_ENT				DPNI_CMD(0x241)
71 #define DPNI_CMDID_REMOVE_QOS_ENT			DPNI_CMD(0x242)
72 #define DPNI_CMDID_CLR_QOS_TBL				DPNI_CMD(0x243)
73 #define DPNI_CMDID_ADD_FS_ENT				DPNI_CMD(0x244)
74 #define DPNI_CMDID_REMOVE_FS_ENT			DPNI_CMD(0x245)
75 #define DPNI_CMDID_CLR_FS_ENT				DPNI_CMD(0x246)
76 
77 #define DPNI_CMDID_GET_STATISTICS			DPNI_CMD(0x25D)
78 #define DPNI_CMDID_GET_QUEUE				DPNI_CMD(0x25F)
79 #define DPNI_CMDID_SET_QUEUE				DPNI_CMD(0x260)
80 #define DPNI_CMDID_GET_TAILDROP				DPNI_CMD(0x261)
81 #define DPNI_CMDID_SET_TAILDROP				DPNI_CMD(0x262)
82 
83 #define DPNI_CMDID_GET_PORT_MAC_ADDR			DPNI_CMD(0x263)
84 
85 #define DPNI_CMDID_GET_BUFFER_LAYOUT			DPNI_CMD(0x264)
86 #define DPNI_CMDID_SET_BUFFER_LAYOUT			DPNI_CMD(0x265)
87 
88 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE		DPNI_CMD(0x266)
89 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION		DPNI_CMD(0x267)
90 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION		DPNI_CMD(0x268)
91 #define DPNI_CMDID_SET_EARLY_DROP			DPNI_CMD(0x269)
92 #define DPNI_CMDID_GET_EARLY_DROP			DPNI_CMD(0x26A)
93 #define DPNI_CMDID_GET_OFFLOAD				DPNI_CMD(0x26B)
94 #define DPNI_CMDID_SET_OFFLOAD				DPNI_CMD(0x26C)
95 
96 #define DPNI_CMDID_SET_RX_FS_DIST			DPNI_CMD(0x273)
97 #define DPNI_CMDID_SET_RX_HASH_DIST			DPNI_CMD(0x274)
98 #define DPNI_CMDID_GET_LINK_CFG				DPNI_CMD(0x278)
99 
100 #define DPNI_CMDID_SET_SINGLE_STEP_CFG			DPNI_CMD(0x279)
101 #define DPNI_CMDID_GET_SINGLE_STEP_CFG			DPNI_CMD_V2(0x27a)
102 
103 /* Macros for accessing command fields smaller than 1byte */
104 #define DPNI_MASK(field)	\
105 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
106 		DPNI_##field##_SHIFT)
107 
108 #define dpni_set_field(var, field, val)	\
109 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
110 #define dpni_get_field(var, field)	\
111 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
112 
113 struct dpni_cmd_open {
114 	__le32 dpni_id;
115 };
116 
117 #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
118 struct dpni_cmd_set_pools {
119 	/* cmd word 0 */
120 	u8 num_dpbp;
121 	u8 backup_pool_mask;
122 	__le16 pad;
123 	/* cmd word 0..4 */
124 	__le32 dpbp_id[DPNI_MAX_DPBP];
125 	/* cmd word 4..6 */
126 	__le16 buffer_size[DPNI_MAX_DPBP];
127 };
128 
129 /* The enable indication is always the least significant bit */
130 #define DPNI_ENABLE_SHIFT		0
131 #define DPNI_ENABLE_SIZE		1
132 
133 struct dpni_rsp_is_enabled {
134 	u8 enabled;
135 };
136 
137 struct dpni_rsp_get_irq {
138 	/* response word 0 */
139 	__le32 irq_val;
140 	__le32 pad;
141 	/* response word 1 */
142 	__le64 irq_addr;
143 	/* response word 2 */
144 	__le32 irq_num;
145 	__le32 type;
146 };
147 
148 struct dpni_cmd_set_irq_enable {
149 	u8 enable;
150 	u8 pad[3];
151 	u8 irq_index;
152 };
153 
154 struct dpni_cmd_get_irq_enable {
155 	__le32 pad;
156 	u8 irq_index;
157 };
158 
159 struct dpni_rsp_get_irq_enable {
160 	u8 enabled;
161 };
162 
163 struct dpni_cmd_set_irq_mask {
164 	__le32 mask;
165 	u8 irq_index;
166 };
167 
168 struct dpni_cmd_get_irq_mask {
169 	__le32 pad;
170 	u8 irq_index;
171 };
172 
173 struct dpni_rsp_get_irq_mask {
174 	__le32 mask;
175 };
176 
177 struct dpni_cmd_get_irq_status {
178 	__le32 status;
179 	u8 irq_index;
180 };
181 
182 struct dpni_rsp_get_irq_status {
183 	__le32 status;
184 };
185 
186 struct dpni_cmd_clear_irq_status {
187 	__le32 status;
188 	u8 irq_index;
189 };
190 
191 struct dpni_rsp_get_attr {
192 	/* response word 0 */
193 	__le32 options;
194 	u8 num_queues;
195 	u8 num_tcs;
196 	u8 mac_filter_entries;
197 	u8 pad0;
198 	/* response word 1 */
199 	u8 vlan_filter_entries;
200 	u8 pad1;
201 	u8 qos_entries;
202 	u8 pad2;
203 	__le16 fs_entries;
204 	__le16 pad3;
205 	/* response word 2 */
206 	u8 qos_key_size;
207 	u8 fs_key_size;
208 	__le16 wriop_version;
209 };
210 
211 #define DPNI_ERROR_ACTION_SHIFT		0
212 #define DPNI_ERROR_ACTION_SIZE		4
213 #define DPNI_FRAME_ANN_SHIFT		4
214 #define DPNI_FRAME_ANN_SIZE		1
215 
216 struct dpni_cmd_set_errors_behavior {
217 	__le32 errors;
218 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
219 	u8 flags;
220 };
221 
222 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
223  * buffer layouts, but they all share the same parameters.
224  * If one of the functions changes, below structure needs to be split.
225  */
226 
227 #define DPNI_PASS_TS_SHIFT		0
228 #define DPNI_PASS_TS_SIZE		1
229 #define DPNI_PASS_PR_SHIFT		1
230 #define DPNI_PASS_PR_SIZE		1
231 #define DPNI_PASS_FS_SHIFT		2
232 #define DPNI_PASS_FS_SIZE		1
233 
234 struct dpni_cmd_get_buffer_layout {
235 	u8 qtype;
236 };
237 
238 struct dpni_rsp_get_buffer_layout {
239 	/* response word 0 */
240 	u8 pad0[6];
241 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
242 	u8 flags;
243 	u8 pad1;
244 	/* response word 1 */
245 	__le16 private_data_size;
246 	__le16 data_align;
247 	__le16 head_room;
248 	__le16 tail_room;
249 };
250 
251 struct dpni_cmd_set_buffer_layout {
252 	/* cmd word 0 */
253 	u8 qtype;
254 	u8 pad0[3];
255 	__le16 options;
256 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
257 	u8 flags;
258 	u8 pad1;
259 	/* cmd word 1 */
260 	__le16 private_data_size;
261 	__le16 data_align;
262 	__le16 head_room;
263 	__le16 tail_room;
264 };
265 
266 struct dpni_cmd_set_offload {
267 	u8 pad[3];
268 	u8 dpni_offload;
269 	__le32 config;
270 };
271 
272 struct dpni_cmd_get_offload {
273 	u8 pad[3];
274 	u8 dpni_offload;
275 };
276 
277 struct dpni_rsp_get_offload {
278 	__le32 pad;
279 	__le32 config;
280 };
281 
282 struct dpni_cmd_get_qdid {
283 	u8 qtype;
284 };
285 
286 struct dpni_rsp_get_qdid {
287 	__le16 qdid;
288 };
289 
290 struct dpni_rsp_get_tx_data_offset {
291 	__le16 data_offset;
292 };
293 
294 struct dpni_cmd_get_statistics {
295 	u8 page_number;
296 };
297 
298 struct dpni_rsp_get_statistics {
299 	__le64 counter[DPNI_STATISTICS_CNT];
300 };
301 
302 struct dpni_cmd_link_cfg {
303 	/* cmd word 0 */
304 	__le64 pad0;
305 	/* cmd word 1 */
306 	__le32 rate;
307 	__le32 pad1;
308 	/* cmd word 2 */
309 	__le64 options;
310 };
311 
312 #define DPNI_LINK_STATE_SHIFT		0
313 #define DPNI_LINK_STATE_SIZE		1
314 
315 struct dpni_rsp_get_link_state {
316 	/* response word 0 */
317 	__le32 pad0;
318 	/* from LSB: up:1 */
319 	u8 flags;
320 	u8 pad1[3];
321 	/* response word 1 */
322 	__le32 rate;
323 	__le32 pad2;
324 	/* response word 2 */
325 	__le64 options;
326 };
327 
328 struct dpni_cmd_set_max_frame_length {
329 	__le16 max_frame_length;
330 };
331 
332 struct dpni_rsp_get_max_frame_length {
333 	__le16 max_frame_length;
334 };
335 
336 struct dpni_cmd_set_multicast_promisc {
337 	u8 enable;
338 };
339 
340 struct dpni_rsp_get_multicast_promisc {
341 	u8 enabled;
342 };
343 
344 struct dpni_cmd_set_unicast_promisc {
345 	u8 enable;
346 };
347 
348 struct dpni_rsp_get_unicast_promisc {
349 	u8 enabled;
350 };
351 
352 struct dpni_cmd_set_primary_mac_addr {
353 	__le16 pad;
354 	u8 mac_addr[6];
355 };
356 
357 struct dpni_rsp_get_primary_mac_addr {
358 	__le16 pad;
359 	u8 mac_addr[6];
360 };
361 
362 struct dpni_rsp_get_port_mac_addr {
363 	__le16 pad;
364 	u8 mac_addr[6];
365 };
366 
367 struct dpni_cmd_add_mac_addr {
368 	__le16 pad;
369 	u8 mac_addr[6];
370 };
371 
372 struct dpni_cmd_remove_mac_addr {
373 	__le16 pad;
374 	u8 mac_addr[6];
375 };
376 
377 #define DPNI_UNICAST_FILTERS_SHIFT	0
378 #define DPNI_UNICAST_FILTERS_SIZE	1
379 #define DPNI_MULTICAST_FILTERS_SHIFT	1
380 #define DPNI_MULTICAST_FILTERS_SIZE	1
381 
382 struct dpni_cmd_clear_mac_filters {
383 	/* from LSB: unicast:1, multicast:1 */
384 	u8 flags;
385 };
386 
387 #define DPNI_DIST_MODE_SHIFT		0
388 #define DPNI_DIST_MODE_SIZE		4
389 #define DPNI_MISS_ACTION_SHIFT		4
390 #define DPNI_MISS_ACTION_SIZE		4
391 
392 struct dpni_cmd_set_rx_tc_dist {
393 	/* cmd word 0 */
394 	__le16 dist_size;
395 	u8 tc_id;
396 	/* from LSB: dist_mode:4, miss_action:4 */
397 	u8 flags;
398 	__le16 pad0;
399 	__le16 default_flow_id;
400 	/* cmd word 1..5 */
401 	__le64 pad1[5];
402 	/* cmd word 6 */
403 	__le64 key_cfg_iova;
404 };
405 
406 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
407  * key_cfg_iova)
408  */
409 struct dpni_mask_cfg {
410 	u8 mask;
411 	u8 offset;
412 };
413 
414 #define DPNI_EFH_TYPE_SHIFT		0
415 #define DPNI_EFH_TYPE_SIZE		4
416 #define DPNI_EXTRACT_TYPE_SHIFT		0
417 #define DPNI_EXTRACT_TYPE_SIZE		4
418 
419 struct dpni_dist_extract {
420 	/* word 0 */
421 	u8 prot;
422 	/* EFH type stored in the 4 least significant bits */
423 	u8 efh_type;
424 	u8 size;
425 	u8 offset;
426 	__le32 field;
427 	/* word 1 */
428 	u8 hdr_index;
429 	u8 constant;
430 	u8 num_of_repeats;
431 	u8 num_of_byte_masks;
432 	/* Extraction type is stored in the 4 LSBs */
433 	u8 extract_type;
434 	u8 pad[3];
435 	/* word 2 */
436 	struct dpni_mask_cfg masks[4];
437 };
438 
439 struct dpni_ext_set_rx_tc_dist {
440 	/* extension word 0 */
441 	u8 num_extracts;
442 	u8 pad[7];
443 	/* words 1..25 */
444 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
445 };
446 
447 struct dpni_cmd_get_queue {
448 	u8 qtype;
449 	u8 tc;
450 	u8 index;
451 };
452 
453 #define DPNI_DEST_TYPE_SHIFT		0
454 #define DPNI_DEST_TYPE_SIZE		4
455 #define DPNI_STASH_CTRL_SHIFT		6
456 #define DPNI_STASH_CTRL_SIZE		1
457 #define DPNI_HOLD_ACTIVE_SHIFT		7
458 #define DPNI_HOLD_ACTIVE_SIZE		1
459 
460 struct dpni_rsp_get_queue {
461 	/* response word 0 */
462 	__le64 pad0;
463 	/* response word 1 */
464 	__le32 dest_id;
465 	__le16 pad1;
466 	u8 dest_prio;
467 	/* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
468 	u8 flags;
469 	/* response word 2 */
470 	__le64 flc;
471 	/* response word 3 */
472 	__le64 user_context;
473 	/* response word 4 */
474 	__le32 fqid;
475 	__le16 qdbin;
476 };
477 
478 struct dpni_cmd_set_queue {
479 	/* cmd word 0 */
480 	u8 qtype;
481 	u8 tc;
482 	u8 index;
483 	u8 options;
484 	__le32 pad0;
485 	/* cmd word 1 */
486 	__le32 dest_id;
487 	__le16 pad1;
488 	u8 dest_prio;
489 	u8 flags;
490 	/* cmd word 2 */
491 	__le64 flc;
492 	/* cmd word 3 */
493 	__le64 user_context;
494 };
495 
496 struct dpni_cmd_set_taildrop {
497 	/* cmd word 0 */
498 	u8 congestion_point;
499 	u8 qtype;
500 	u8 tc;
501 	u8 index;
502 	__le32 pad0;
503 	/* cmd word 1 */
504 	/* Only least significant bit is relevant */
505 	u8 enable;
506 	u8 pad1;
507 	u8 units;
508 	u8 pad2;
509 	__le32 threshold;
510 };
511 
512 struct dpni_cmd_get_taildrop {
513 	u8 congestion_point;
514 	u8 qtype;
515 	u8 tc;
516 	u8 index;
517 };
518 
519 struct dpni_rsp_get_taildrop {
520 	/* cmd word 0 */
521 	__le64 pad0;
522 	/* cmd word 1 */
523 	/* only least significant bit is relevant */
524 	u8 enable;
525 	u8 pad1;
526 	u8 units;
527 	u8 pad2;
528 	__le32 threshold;
529 };
530 
531 struct dpni_rsp_get_api_version {
532 	__le16 major;
533 	__le16 minor;
534 };
535 
536 #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
537 #define DPNI_RX_FS_DIST_ENABLE_SIZE	1
538 struct dpni_cmd_set_rx_fs_dist {
539 	__le16 dist_size;
540 	u8 enable;
541 	u8 tc;
542 	__le16 miss_flow_id;
543 	__le16 pad;
544 	__le64 key_cfg_iova;
545 };
546 
547 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
548 #define DPNI_RX_HASH_DIST_ENABLE_SIZE	1
549 struct dpni_cmd_set_rx_hash_dist {
550 	__le16 dist_size;
551 	u8 enable;
552 	u8 tc;
553 	__le32 pad;
554 	__le64 key_cfg_iova;
555 };
556 
557 struct dpni_cmd_add_fs_entry {
558 	/* cmd word 0 */
559 	__le16 options;
560 	u8 tc_id;
561 	u8 key_size;
562 	__le16 index;
563 	__le16 flow_id;
564 	/* cmd word 1 */
565 	__le64 key_iova;
566 	/* cmd word 2 */
567 	__le64 mask_iova;
568 	/* cmd word 3 */
569 	__le64 flc;
570 };
571 
572 struct dpni_cmd_remove_fs_entry {
573 	/* cmd word 0 */
574 	__le16 pad0;
575 	u8 tc_id;
576 	u8 key_size;
577 	__le32 pad1;
578 	/* cmd word 1 */
579 	__le64 key_iova;
580 	/* cmd word 2 */
581 	__le64 mask_iova;
582 };
583 
584 #define DPNI_DISCARD_ON_MISS_SHIFT	0
585 #define DPNI_DISCARD_ON_MISS_SIZE	1
586 
587 struct dpni_cmd_set_qos_table {
588 	__le32 pad;
589 	u8 default_tc;
590 	/* only the LSB */
591 	u8 discard_on_miss;
592 	__le16 pad1[21];
593 	__le64 key_cfg_iova;
594 };
595 
596 struct dpni_cmd_add_qos_entry {
597 	__le16 pad;
598 	u8 tc_id;
599 	u8 key_size;
600 	__le16 index;
601 	__le16 pad1;
602 	__le64 key_iova;
603 	__le64 mask_iova;
604 };
605 
606 struct dpni_cmd_remove_qos_entry {
607 	u8 pad[3];
608 	u8 key_size;
609 	__le32 pad1;
610 	__le64 key_iova;
611 	__le64 mask_iova;
612 };
613 
614 #define DPNI_DEST_TYPE_SHIFT		0
615 #define DPNI_DEST_TYPE_SIZE		4
616 #define DPNI_CONG_UNITS_SHIFT		4
617 #define DPNI_CONG_UNITS_SIZE		2
618 
619 struct dpni_cmd_set_congestion_notification {
620 	/* cmd word 0 */
621 	u8 qtype;
622 	u8 tc;
623 	u8 pad[6];
624 	/* cmd word 1 */
625 	__le32 dest_id;
626 	__le16 notification_mode;
627 	u8 dest_priority;
628 	/* from LSB: dest_type: 4 units:2 */
629 	u8 type_units;
630 	/* cmd word 2 */
631 	__le64 message_iova;
632 	/* cmd word 3 */
633 	__le64 message_ctx;
634 	/* cmd word 4 */
635 	__le32 threshold_entry;
636 	__le32 threshold_exit;
637 };
638 
639 #define DPNI_COUPLED_SHIFT	0
640 #define DPNI_COUPLED_SIZE	1
641 
642 struct dpni_cmd_set_tx_shaping {
643 	__le16 tx_cr_max_burst_size;
644 	__le16 tx_er_max_burst_size;
645 	__le32 pad;
646 	__le32 tx_cr_rate_limit;
647 	__le32 tx_er_rate_limit;
648 	/* from LSB: coupled:1 */
649 	u8 coupled;
650 };
651 
652 #define DPNI_PTP_ENABLE_SHIFT			0
653 #define DPNI_PTP_ENABLE_SIZE			1
654 #define DPNI_PTP_CH_UPDATE_SHIFT		1
655 #define DPNI_PTP_CH_UPDATE_SIZE			1
656 
657 struct dpni_cmd_single_step_cfg {
658 	__le16 flags;
659 	__le16 offset;
660 	__le32 peer_delay;
661 	__le32 ptp_onestep_reg_base;
662 	__le32 pad0;
663 };
664 
665 struct dpni_rsp_single_step_cfg {
666 	__le16 flags;
667 	__le16 offset;
668 	__le32 peer_delay;
669 	__le32 ptp_onestep_reg_base;
670 	__le32 pad0;
671 };
672 
673 struct dpni_cmd_enable_vlan_filter {
674 	/* only the LSB */
675 	u8 en;
676 };
677 
678 struct dpni_cmd_vlan_id {
679 	u8 flags;
680 	u8 tc_id;
681 	u8 flow_id;
682 	u8 pad;
683 	__le16 vlan_id;
684 };
685 
686 #endif /* _FSL_DPNI_CMD_H */
687