1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Amlogic Meson-AXG Clock Controller Driver
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2018 Amlogic, inc.
9 * Author: Qiufang Dai <qiufang.dai@amlogic.com>
10 * Author: Yixun Lan <yixun.lan@amlogic.com>
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/reset-controller.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/of.h>
17 #include <linux/module.h>
18
19 #include <linux/slab.h>
20 #include "meson-aoclk.h"
21
meson_aoclk_do_reset(struct reset_controller_dev * rcdev,unsigned long id)22 static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
23 unsigned long id)
24 {
25 struct meson_aoclk_reset_controller *rstc =
26 container_of(rcdev, struct meson_aoclk_reset_controller, reset);
27
28 return regmap_write(rstc->regmap, rstc->data->reset_reg,
29 BIT(rstc->data->reset[id]));
30 }
31
32 static const struct reset_control_ops meson_aoclk_reset_ops = {
33 .reset = meson_aoclk_do_reset,
34 };
35
meson_aoclkc_probe(struct platform_device * pdev)36 int meson_aoclkc_probe(struct platform_device *pdev)
37 {
38 struct meson_aoclk_reset_controller *rstc;
39 struct meson_aoclk_data *data;
40 struct device *dev = &pdev->dev;
41 struct device_node *np;
42 struct regmap *regmap;
43 int ret, clkid;
44
45 data = (struct meson_aoclk_data *) of_device_get_match_data(dev);
46 if (!data)
47 return -ENODEV;
48
49 rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
50 if (!rstc)
51 return -ENOMEM;
52
53 np = of_get_parent(dev->of_node);
54 regmap = syscon_node_to_regmap(np);
55 of_node_put(np);
56 if (IS_ERR(regmap)) {
57 dev_err(dev, "failed to get regmap\n");
58 return PTR_ERR(regmap);
59 }
60
61 /* Reset Controller */
62 rstc->data = data;
63 rstc->regmap = regmap;
64 rstc->reset.ops = &meson_aoclk_reset_ops;
65 rstc->reset.nr_resets = data->num_reset;
66 rstc->reset.of_node = dev->of_node;
67 ret = devm_reset_controller_register(dev, &rstc->reset);
68 if (ret) {
69 dev_err(dev, "failed to register reset controller\n");
70 return ret;
71 }
72
73 /* Populate regmap */
74 for (clkid = 0; clkid < data->num_clks; clkid++)
75 data->clks[clkid]->map = regmap;
76
77 /* Register all clks */
78 for (clkid = 0; clkid < data->hw_clks.num; clkid++) {
79 if (!data->hw_clks.hws[clkid])
80 continue;
81
82 ret = devm_clk_hw_register(dev, data->hw_clks.hws[clkid]);
83 if (ret) {
84 dev_err(dev, "Clock registration failed\n");
85 return ret;
86 }
87 }
88
89 return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get, (void *)&data->hw_clks);
90 }
91 EXPORT_SYMBOL_GPL(meson_aoclkc_probe);
92 MODULE_LICENSE("GPL v2");
93