1 /*
2  * Copyright © 2010 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  * Jim Liu <jim.liu@intel.com>
25  * Jackie Li<yaodong.li@intel.com>
26  * Gideon Eaton <eaton.
27  * Scott Rowe <scott.m.rowe@intel.com>
28  */
29 
30 #include "mdfld_dsi_dpi.h"
31 #include "mdfld_dsi_pkg_sender.h"
32 
tmd_vid_get_config_mode(struct drm_device * dev)33 static struct drm_display_mode *tmd_vid_get_config_mode(struct drm_device *dev)
34 {
35 	struct drm_display_mode *mode;
36 	struct drm_psb_private *dev_priv = dev->dev_private;
37 	struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
38 	bool use_gct = false; /*Disable GCT for now*/
39 
40 	mode = kzalloc(sizeof(*mode), GFP_KERNEL);
41 	if (!mode)
42 		return NULL;
43 
44 	if (use_gct) {
45 		mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
46 		mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
47 		mode->hsync_start = mode->hdisplay + \
48 				((ti->hsync_offset_hi << 8) | \
49 				ti->hsync_offset_lo);
50 		mode->hsync_end = mode->hsync_start + \
51 				((ti->hsync_pulse_width_hi << 8) | \
52 				ti->hsync_pulse_width_lo);
53 		mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \
54 								ti->hblank_lo);
55 		mode->vsync_start = \
56 			mode->vdisplay + ((ti->vsync_offset_hi << 8) | \
57 						ti->vsync_offset_lo);
58 		mode->vsync_end = \
59 			mode->vsync_start + ((ti->vsync_pulse_width_hi << 8) | \
60 						ti->vsync_pulse_width_lo);
61 		mode->vtotal = mode->vdisplay + \
62 				((ti->vblank_hi << 8) | ti->vblank_lo);
63 		mode->clock = ti->pixel_clock * 10;
64 
65 		dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay);
66 		dev_dbg(dev->dev, "vdisplay is %d\n", mode->vdisplay);
67 		dev_dbg(dev->dev, "HSS is %d\n", mode->hsync_start);
68 		dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end);
69 		dev_dbg(dev->dev, "htotal is %d\n", mode->htotal);
70 		dev_dbg(dev->dev, "VSS is %d\n", mode->vsync_start);
71 		dev_dbg(dev->dev, "VSE is %d\n", mode->vsync_end);
72 		dev_dbg(dev->dev, "vtotal is %d\n", mode->vtotal);
73 		dev_dbg(dev->dev, "clock is %d\n", mode->clock);
74 	} else {
75 		mode->hdisplay = 480;
76 		mode->vdisplay = 854;
77 		mode->hsync_start = 487;
78 		mode->hsync_end = 490;
79 		mode->htotal = 499;
80 		mode->vsync_start = 861;
81 		mode->vsync_end = 865;
82 		mode->vtotal = 873;
83 		mode->clock = 33264;
84 	}
85 
86 	drm_mode_set_name(mode);
87 	drm_mode_set_crtcinfo(mode, 0);
88 
89 	mode->type |= DRM_MODE_TYPE_PREFERRED;
90 
91 	return mode;
92 }
93 
tmd_vid_get_panel_info(struct drm_device * dev,int pipe,struct panel_info * pi)94 static int tmd_vid_get_panel_info(struct drm_device *dev,
95 				int pipe,
96 				struct panel_info *pi)
97 {
98 	if (!dev || !pi)
99 		return -EINVAL;
100 
101 	pi->width_mm = TMD_PANEL_WIDTH;
102 	pi->height_mm = TMD_PANEL_HEIGHT;
103 
104 	return 0;
105 }
106 
107 /* ************************************************************************* *\
108  * FUNCTION: mdfld_init_TMD_MIPI
109  *
110  * DESCRIPTION:  This function is called only by mrst_dsi_mode_set and
111  *               restore_display_registers.  since this function does not
112  *               acquire the mutex, it is important that the calling function
113  *               does!
114 \* ************************************************************************* */
115 
116 /* FIXME: make the below data u8 instead of u32; note byte order! */
117 static u32 tmd_cmd_mcap_off[] = {0x000000b2};
118 static u32 tmd_cmd_enable_lane_switch[] = {0x000101ef};
119 static u32 tmd_cmd_set_lane_num[] = {0x006360ef};
120 static u32 tmd_cmd_pushing_clock0[] = {0x00cc2fef};
121 static u32 tmd_cmd_pushing_clock1[] = {0x00dd6eef};
122 static u32 tmd_cmd_set_mode[] = {0x000000b3};
123 static u32 tmd_cmd_set_sync_pulse_mode[] = {0x000961ef};
124 static u32 tmd_cmd_set_column[] = {0x0100002a, 0x000000df};
125 static u32 tmd_cmd_set_page[] = {0x0300002b, 0x00000055};
126 static u32 tmd_cmd_set_video_mode[] = {0x00000153};
127 /*no auto_bl,need add in furture*/
128 static u32 tmd_cmd_enable_backlight[] = {0x00005ab4};
129 static u32 tmd_cmd_set_backlight_dimming[] = {0x00000ebd};
130 
mdfld_dsi_tmd_drv_ic_init(struct mdfld_dsi_config * dsi_config,int pipe)131 static void mdfld_dsi_tmd_drv_ic_init(struct mdfld_dsi_config *dsi_config,
132 				      int pipe)
133 {
134 	struct mdfld_dsi_pkg_sender *sender
135 			= mdfld_dsi_get_pkg_sender(dsi_config);
136 
137 	DRM_INFO("Enter mdfld init TMD MIPI display.\n");
138 
139 	if (!sender) {
140 		DRM_ERROR("Cannot get sender\n");
141 		return;
142 	}
143 
144 	if (dsi_config->dvr_ic_inited)
145 		return;
146 
147 	msleep(3);
148 
149 	/* FIXME: make the below data u8 instead of u32; note byte order! */
150 
151 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_mcap_off,
152 				sizeof(tmd_cmd_mcap_off), false);
153 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_enable_lane_switch,
154 				sizeof(tmd_cmd_enable_lane_switch), false);
155 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_lane_num,
156 				sizeof(tmd_cmd_set_lane_num), false);
157 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_pushing_clock0,
158 				sizeof(tmd_cmd_pushing_clock0), false);
159 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_pushing_clock1,
160 				sizeof(tmd_cmd_pushing_clock1), false);
161 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_mode,
162 				sizeof(tmd_cmd_set_mode), false);
163 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_sync_pulse_mode,
164 				sizeof(tmd_cmd_set_sync_pulse_mode), false);
165 	mdfld_dsi_send_mcs_long(sender, (u8 *) tmd_cmd_set_column,
166 				sizeof(tmd_cmd_set_column), false);
167 	mdfld_dsi_send_mcs_long(sender, (u8 *) tmd_cmd_set_page,
168 				sizeof(tmd_cmd_set_page), false);
169 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_video_mode,
170 				sizeof(tmd_cmd_set_video_mode), false);
171 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_enable_backlight,
172 				sizeof(tmd_cmd_enable_backlight), false);
173 	mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_backlight_dimming,
174 				sizeof(tmd_cmd_set_backlight_dimming), false);
175 
176 	dsi_config->dvr_ic_inited = 1;
177 }
178 
179 /*TPO DPI encoder helper funcs*/
180 static const struct drm_encoder_helper_funcs
181 				mdfld_tpo_dpi_encoder_helper_funcs = {
182 	.dpms = mdfld_dsi_dpi_dpms,
183 	.mode_fixup = mdfld_dsi_dpi_mode_fixup,
184 	.prepare = mdfld_dsi_dpi_prepare,
185 	.mode_set = mdfld_dsi_dpi_mode_set,
186 	.commit = mdfld_dsi_dpi_commit,
187 };
188 
189 /*TPO DPI encoder funcs*/
190 static const struct drm_encoder_funcs mdfld_tpo_dpi_encoder_funcs = {
191 	.destroy = drm_encoder_cleanup,
192 };
193 
194 const struct panel_funcs mdfld_tmd_vid_funcs = {
195 	.encoder_funcs = &mdfld_tpo_dpi_encoder_funcs,
196 	.encoder_helper_funcs = &mdfld_tpo_dpi_encoder_helper_funcs,
197 	.get_config_mode = &tmd_vid_get_config_mode,
198 	.get_panel_info = tmd_vid_get_panel_info,
199 	.reset = mdfld_dsi_panel_reset,
200 	.drv_ic_init = mdfld_dsi_tmd_drv_ic_init,
201 };
202