1 /* $Id: hfc_2bs0.c,v 1.1.4.1 2001/11/20 14:19:35 kai Exp $
2 *
3 * specific routines for CCD's HFC 2BS0
4 *
5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 *
8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference.
10 *
11 */
12
13 #define __NO_VERSION__
14 #include <linux/init.h>
15 #include "hisax.h"
16 #include "hfc_2bs0.h"
17 #include "isac.h"
18 #include "isdnl1.h"
19 #include <linux/interrupt.h>
20
21 static inline int
WaitForBusy(struct IsdnCardState * cs)22 WaitForBusy(struct IsdnCardState *cs)
23 {
24 int to = 130;
25 long flags;
26 u_char val;
27
28 save_flags(flags);
29 cli();
30 while (!(cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
31 val = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2 |
32 (cs->hw.hfc.cip & 3));
33 udelay(1);
34 to--;
35 }
36 restore_flags(flags);
37 if (!to) {
38 printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
39 return (0);
40 } else
41 return (to);
42 }
43
44 static inline int
WaitNoBusy(struct IsdnCardState * cs)45 WaitNoBusy(struct IsdnCardState *cs)
46 {
47 int to = 125;
48
49 while ((cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
50 udelay(1);
51 to--;
52 }
53 if (!to) {
54 printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
55 return (0);
56 } else
57 return (to);
58 }
59
60 int
GetFreeFifoBytes(struct BCState * bcs)61 GetFreeFifoBytes(struct BCState *bcs)
62 {
63 int s;
64
65 if (bcs->hw.hfc.f1 == bcs->hw.hfc.f2)
66 return (bcs->cs->hw.hfc.fifosize);
67 s = bcs->hw.hfc.send[bcs->hw.hfc.f1] - bcs->hw.hfc.send[bcs->hw.hfc.f2];
68 if (s <= 0)
69 s += bcs->cs->hw.hfc.fifosize;
70 s = bcs->cs->hw.hfc.fifosize - s;
71 return (s);
72 }
73
74 int
ReadZReg(struct BCState * bcs,u_char reg)75 ReadZReg(struct BCState *bcs, u_char reg)
76 {
77 int val;
78
79 WaitNoBusy(bcs->cs);
80 val = 256 * bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_HIGH);
81 WaitNoBusy(bcs->cs);
82 val += bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_LOW);
83 return (val);
84 }
85
86 void
hfc_sched_event(struct BCState * bcs,int event)87 hfc_sched_event(struct BCState *bcs, int event)
88 {
89 bcs->event |= 1 << event;
90 queue_task(&bcs->tqueue, &tq_immediate);
91 mark_bh(IMMEDIATE_BH);
92 }
93
94 static void
hfc_clear_fifo(struct BCState * bcs)95 hfc_clear_fifo(struct BCState *bcs)
96 {
97 struct IsdnCardState *cs = bcs->cs;
98 long flags;
99 int idx, cnt;
100 int rcnt, z1, z2;
101 u_char cip, f1, f2;
102
103 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
104 debugl1(cs, "hfc_clear_fifo");
105 save_flags(flags);
106 cli();
107 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
108 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
109 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
110 WaitForBusy(cs);
111 }
112 WaitNoBusy(cs);
113 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
114 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
115 WaitNoBusy(cs);
116 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
117 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
118 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
119 cnt = 32;
120 while (((f1 != f2) || (z1 != z2)) && cnt--) {
121 if (cs->debug & L1_DEB_HSCX)
122 debugl1(cs, "hfc clear %d f1(%d) f2(%d)",
123 bcs->channel, f1, f2);
124 rcnt = z1 - z2;
125 if (rcnt < 0)
126 rcnt += cs->hw.hfc.fifosize;
127 if (rcnt)
128 rcnt++;
129 if (cs->debug & L1_DEB_HSCX)
130 debugl1(cs, "hfc clear %d z1(%x) z2(%x) cnt(%d)",
131 bcs->channel, z1, z2, rcnt);
132 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
133 idx = 0;
134 while ((idx < rcnt) && WaitNoBusy(cs)) {
135 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
136 idx++;
137 }
138 if (f1 != f2) {
139 WaitNoBusy(cs);
140 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
141 HFC_CHANNEL(bcs->channel));
142 WaitForBusy(cs);
143 }
144 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
145 WaitNoBusy(cs);
146 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
147 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
148 WaitNoBusy(cs);
149 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
150 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
151 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
152 }
153 restore_flags(flags);
154 return;
155 }
156
157
158 static struct sk_buff
159 *
hfc_empty_fifo(struct BCState * bcs,int count)160 hfc_empty_fifo(struct BCState *bcs, int count)
161 {
162 u_char *ptr;
163 struct sk_buff *skb;
164 struct IsdnCardState *cs = bcs->cs;
165 int idx;
166 int chksum;
167 u_char stat, cip;
168
169 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
170 debugl1(cs, "hfc_empty_fifo");
171 idx = 0;
172 if (count > HSCX_BUFMAX + 3) {
173 if (cs->debug & L1_DEB_WARN)
174 debugl1(cs, "hfc_empty_fifo: incoming packet too large");
175 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
176 while ((idx++ < count) && WaitNoBusy(cs))
177 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
178 WaitNoBusy(cs);
179 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
180 HFC_CHANNEL(bcs->channel));
181 WaitForBusy(cs);
182 return (NULL);
183 }
184 if ((count < 4) && (bcs->mode != L1_MODE_TRANS)) {
185 if (cs->debug & L1_DEB_WARN)
186 debugl1(cs, "hfc_empty_fifo: incoming packet too small");
187 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
188 while ((idx++ < count) && WaitNoBusy(cs))
189 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
190 WaitNoBusy(cs);
191 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
192 HFC_CHANNEL(bcs->channel));
193 WaitForBusy(cs);
194 #ifdef ERROR_STATISTIC
195 bcs->err_inv++;
196 #endif
197 return (NULL);
198 }
199 if (bcs->mode == L1_MODE_TRANS)
200 count -= 1;
201 else
202 count -= 3;
203 if (!(skb = dev_alloc_skb(count)))
204 printk(KERN_WARNING "HFC: receive out of memory\n");
205 else {
206 ptr = skb_put(skb, count);
207 idx = 0;
208 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
209 while ((idx < count) && WaitNoBusy(cs)) {
210 *ptr++ = cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
211 idx++;
212 }
213 if (idx != count) {
214 debugl1(cs, "RFIFO BUSY error");
215 printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel);
216 dev_kfree_skb_any(skb);
217 if (bcs->mode != L1_MODE_TRANS) {
218 WaitNoBusy(cs);
219 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
220 HFC_CHANNEL(bcs->channel));
221 WaitForBusy(cs);
222 }
223 return (NULL);
224 }
225 if (bcs->mode != L1_MODE_TRANS) {
226 WaitNoBusy(cs);
227 chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8);
228 WaitNoBusy(cs);
229 chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip);
230 WaitNoBusy(cs);
231 stat = cs->BC_Read_Reg(cs, HFC_DATA, cip);
232 if (cs->debug & L1_DEB_HSCX)
233 debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
234 bcs->channel, chksum, stat);
235 if (stat) {
236 debugl1(cs, "FIFO CRC error");
237 dev_kfree_skb_any(skb);
238 skb = NULL;
239 #ifdef ERROR_STATISTIC
240 bcs->err_crc++;
241 #endif
242 }
243 WaitNoBusy(cs);
244 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
245 HFC_CHANNEL(bcs->channel));
246 WaitForBusy(cs);
247 }
248 }
249 return (skb);
250 }
251
252 static void
hfc_fill_fifo(struct BCState * bcs)253 hfc_fill_fifo(struct BCState *bcs)
254 {
255 struct IsdnCardState *cs = bcs->cs;
256 long flags;
257 int idx, fcnt;
258 int count;
259 int z1, z2;
260 u_char cip;
261
262 if (!bcs->tx_skb)
263 return;
264 if (bcs->tx_skb->len <= 0)
265 return;
266
267 save_flags(flags);
268 cli();
269 cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel);
270 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
271 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
272 WaitForBusy(cs);
273 }
274 WaitNoBusy(cs);
275 if (bcs->mode != L1_MODE_TRANS) {
276 bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
277 cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel);
278 WaitNoBusy(cs);
279 bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
280 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel));
281 if (cs->debug & L1_DEB_HSCX)
282 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
283 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
284 bcs->hw.hfc.send[bcs->hw.hfc.f1]);
285 fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2;
286 if (fcnt < 0)
287 fcnt += 32;
288 if (fcnt > 30) {
289 if (cs->debug & L1_DEB_HSCX)
290 debugl1(cs, "hfc_fill_fifo more as 30 frames");
291 restore_flags(flags);
292 return;
293 }
294 count = GetFreeFifoBytes(bcs);
295 }
296 else {
297 WaitForBusy(cs);
298 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
299 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
300 count = z1 - z2;
301 if (count < 0)
302 count += cs->hw.hfc.fifosize;
303 } /* L1_MODE_TRANS */
304 if (cs->debug & L1_DEB_HSCX)
305 debugl1(cs, "hfc_fill_fifo %d count(%ld/%d)",
306 bcs->channel, bcs->tx_skb->len,
307 count);
308 if (count < bcs->tx_skb->len) {
309 if (cs->debug & L1_DEB_HSCX)
310 debugl1(cs, "hfc_fill_fifo no fifo mem");
311 restore_flags(flags);
312 return;
313 }
314 cip = HFC_CIP | HFC_FIFO_IN | HFC_SEND | HFC_CHANNEL(bcs->channel);
315 idx = 0;
316 while ((idx < bcs->tx_skb->len) && WaitNoBusy(cs))
317 cs->BC_Write_Reg(cs, HFC_DATA_NODEB, cip, bcs->tx_skb->data[idx++]);
318 if (idx != bcs->tx_skb->len) {
319 debugl1(cs, "FIFO Send BUSY error");
320 printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel);
321 } else {
322 count = bcs->tx_skb->len;
323 bcs->tx_cnt -= count;
324 if (PACKET_NOACK == bcs->tx_skb->pkt_type)
325 count = -1;
326 dev_kfree_skb_any(bcs->tx_skb);
327 bcs->tx_skb = NULL;
328 if (bcs->mode != L1_MODE_TRANS) {
329 WaitForBusy(cs);
330 WaitNoBusy(cs);
331 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel));
332 }
333 if (bcs->st->lli.l1writewakeup && (count >= 0))
334 bcs->st->lli.l1writewakeup(bcs->st, count);
335 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
336 }
337 restore_flags(flags);
338 return;
339 }
340
341 void
main_irq_hfc(struct BCState * bcs)342 main_irq_hfc(struct BCState *bcs)
343 {
344 long flags;
345 struct IsdnCardState *cs = bcs->cs;
346 int z1, z2, rcnt;
347 u_char f1, f2, cip;
348 int receive, transmit, count = 5;
349 struct sk_buff *skb;
350
351 save_flags(flags);
352 Begin:
353 cli();
354 count--;
355 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
356 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
357 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
358 WaitForBusy(cs);
359 }
360 WaitNoBusy(cs);
361 receive = 0;
362 if (bcs->mode == L1_MODE_HDLC) {
363 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
364 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
365 WaitNoBusy(cs);
366 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
367 if (f1 != f2) {
368 if (cs->debug & L1_DEB_HSCX)
369 debugl1(cs, "hfc rec %d f1(%d) f2(%d)",
370 bcs->channel, f1, f2);
371 receive = 1;
372 }
373 }
374 if (receive || (bcs->mode == L1_MODE_TRANS)) {
375 WaitForBusy(cs);
376 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
377 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
378 rcnt = z1 - z2;
379 if (rcnt < 0)
380 rcnt += cs->hw.hfc.fifosize;
381 if ((bcs->mode == L1_MODE_HDLC) || (rcnt)) {
382 rcnt++;
383 if (cs->debug & L1_DEB_HSCX)
384 debugl1(cs, "hfc rec %d z1(%x) z2(%x) cnt(%d)",
385 bcs->channel, z1, z2, rcnt);
386 /* sti(); */
387 if ((skb = hfc_empty_fifo(bcs, rcnt))) {
388 skb_queue_tail(&bcs->rqueue, skb);
389 hfc_sched_event(bcs, B_RCVBUFREADY);
390 }
391 }
392 receive = 1;
393 }
394 restore_flags(flags);
395 udelay(1);
396 cli();
397 if (bcs->tx_skb) {
398 transmit = 1;
399 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
400 hfc_fill_fifo(bcs);
401 if (test_bit(BC_FLG_BUSY, &bcs->Flag))
402 transmit = 0;
403 } else {
404 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
405 transmit = 1;
406 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
407 hfc_fill_fifo(bcs);
408 if (test_bit(BC_FLG_BUSY, &bcs->Flag))
409 transmit = 0;
410 } else {
411 transmit = 0;
412 hfc_sched_event(bcs, B_XMTBUFREADY);
413 }
414 }
415 restore_flags(flags);
416 if ((receive || transmit) && count)
417 goto Begin;
418 return;
419 }
420
421 void
mode_hfc(struct BCState * bcs,int mode,int bc)422 mode_hfc(struct BCState *bcs, int mode, int bc)
423 {
424 struct IsdnCardState *cs = bcs->cs;
425
426 if (cs->debug & L1_DEB_HSCX)
427 debugl1(cs, "HFC 2BS0 mode %d bchan %d/%d",
428 mode, bc, bcs->channel);
429 bcs->mode = mode;
430 bcs->channel = bc;
431
432 switch (mode) {
433 case (L1_MODE_NULL):
434 if (bc) {
435 cs->hw.hfc.ctmt &= ~1;
436 cs->hw.hfc.isac_spcr &= ~0x03;
437 }
438 else {
439 cs->hw.hfc.ctmt &= ~2;
440 cs->hw.hfc.isac_spcr &= ~0x0c;
441 }
442 break;
443 case (L1_MODE_TRANS):
444 cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */
445 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
446 hfc_clear_fifo(bcs); /* complete fifo clear */
447 if (bc) {
448 cs->hw.hfc.ctmt |= 1;
449 cs->hw.hfc.isac_spcr &= ~0x03;
450 cs->hw.hfc.isac_spcr |= 0x02;
451 } else {
452 cs->hw.hfc.ctmt |= 2;
453 cs->hw.hfc.isac_spcr &= ~0x0c;
454 cs->hw.hfc.isac_spcr |= 0x08;
455 }
456 break;
457 case (L1_MODE_HDLC):
458 if (bc) {
459 cs->hw.hfc.ctmt &= ~1;
460 cs->hw.hfc.isac_spcr &= ~0x03;
461 cs->hw.hfc.isac_spcr |= 0x02;
462 } else {
463 cs->hw.hfc.ctmt &= ~2;
464 cs->hw.hfc.isac_spcr &= ~0x0c;
465 cs->hw.hfc.isac_spcr |= 0x08;
466 }
467 break;
468 }
469 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
470 cs->writeisac(cs, ISAC_SPCR, cs->hw.hfc.isac_spcr);
471 if (mode == L1_MODE_HDLC)
472 hfc_clear_fifo(bcs);
473 }
474
475 static void
hfc_l2l1(struct PStack * st,int pr,void * arg)476 hfc_l2l1(struct PStack *st, int pr, void *arg)
477 {
478 struct sk_buff *skb = arg;
479 long flags;
480
481 switch (pr) {
482 case (PH_DATA | REQUEST):
483 save_flags(flags);
484 cli();
485 if (st->l1.bcs->tx_skb) {
486 skb_queue_tail(&st->l1.bcs->squeue, skb);
487 restore_flags(flags);
488 } else {
489 st->l1.bcs->tx_skb = skb;
490 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
491 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
492 restore_flags(flags);
493 }
494 break;
495 case (PH_PULL | INDICATION):
496 if (st->l1.bcs->tx_skb) {
497 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
498 break;
499 }
500 save_flags(flags);
501 cli();
502 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
503 st->l1.bcs->tx_skb = skb;
504 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
505 restore_flags(flags);
506 break;
507 case (PH_PULL | REQUEST):
508 if (!st->l1.bcs->tx_skb) {
509 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
510 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
511 } else
512 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
513 break;
514 case (PH_ACTIVATE | REQUEST):
515 test_and_set_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
516 mode_hfc(st->l1.bcs, st->l1.mode, st->l1.bc);
517 l1_msg_b(st, pr, arg);
518 break;
519 case (PH_DEACTIVATE | REQUEST):
520 l1_msg_b(st, pr, arg);
521 break;
522 case (PH_DEACTIVATE | CONFIRM):
523 test_and_clear_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
524 test_and_clear_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
525 mode_hfc(st->l1.bcs, 0, st->l1.bc);
526 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
527 break;
528 }
529 }
530
531
532 void
close_hfcstate(struct BCState * bcs)533 close_hfcstate(struct BCState *bcs)
534 {
535 mode_hfc(bcs, 0, bcs->channel);
536 if (test_bit(BC_FLG_INIT, &bcs->Flag)) {
537 skb_queue_purge(&bcs->rqueue);
538 skb_queue_purge(&bcs->squeue);
539 if (bcs->tx_skb) {
540 dev_kfree_skb_any(bcs->tx_skb);
541 bcs->tx_skb = NULL;
542 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
543 }
544 }
545 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
546 }
547
548 static int
open_hfcstate(struct IsdnCardState * cs,struct BCState * bcs)549 open_hfcstate(struct IsdnCardState *cs, struct BCState *bcs)
550 {
551 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
552 skb_queue_head_init(&bcs->rqueue);
553 skb_queue_head_init(&bcs->squeue);
554 }
555 bcs->tx_skb = NULL;
556 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
557 bcs->event = 0;
558 bcs->tx_cnt = 0;
559 return (0);
560 }
561
562 int
setstack_hfc(struct PStack * st,struct BCState * bcs)563 setstack_hfc(struct PStack *st, struct BCState *bcs)
564 {
565 bcs->channel = st->l1.bc;
566 if (open_hfcstate(st->l1.hardware, bcs))
567 return (-1);
568 st->l1.bcs = bcs;
569 st->l2.l2l1 = hfc_l2l1;
570 setstack_manager(st);
571 bcs->st = st;
572 setstack_l1_B(st);
573 return (0);
574 }
575
576 void __init
init_send(struct BCState * bcs)577 init_send(struct BCState *bcs)
578 {
579 int i;
580
581 if (!(bcs->hw.hfc.send = kmalloc(32 * sizeof(unsigned int), GFP_ATOMIC))) {
582 printk(KERN_WARNING
583 "HiSax: No memory for hfc.send\n");
584 return;
585 }
586 for (i = 0; i < 32; i++)
587 bcs->hw.hfc.send[i] = 0x1fff;
588 }
589
590 void __init
inithfc(struct IsdnCardState * cs)591 inithfc(struct IsdnCardState *cs)
592 {
593 init_send(&cs->bcs[0]);
594 init_send(&cs->bcs[1]);
595 cs->BC_Send_Data = &hfc_fill_fifo;
596 cs->bcs[0].BC_SetStack = setstack_hfc;
597 cs->bcs[1].BC_SetStack = setstack_hfc;
598 cs->bcs[0].BC_Close = close_hfcstate;
599 cs->bcs[1].BC_Close = close_hfcstate;
600 mode_hfc(cs->bcs, 0, 0);
601 mode_hfc(cs->bcs + 1, 0, 0);
602 }
603
604 void
releasehfc(struct IsdnCardState * cs)605 releasehfc(struct IsdnCardState *cs)
606 {
607 if (cs->bcs[0].hw.hfc.send) {
608 kfree(cs->bcs[0].hw.hfc.send);
609 cs->bcs[0].hw.hfc.send = NULL;
610 }
611 if (cs->bcs[1].hw.hfc.send) {
612 kfree(cs->bcs[1].hw.hfc.send);
613 cs->bcs[1].hw.hfc.send = NULL;
614 }
615 }
616