1 /*
2  *  madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
3  *
4  *  Written 2000 by Adam Fritzler
5  *
6  *  This software may be used and distributed according to the terms
7  *  of the GNU General Public License, incorporated herein by reference.
8  *
9  *  This driver module supports the following cards:
10  *      - Madge Smart 16/4 Ringnode MC16
11  *	- Madge Smart 16/4 Ringnode MC32 (??)
12  *
13  *  Maintainer(s):
14  *    AF	Adam Fritzler		mid@auk.cx
15  *
16  *  Modification History:
17  *	16-Jan-00	AF	Created
18  *
19  */
20 static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
21 
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/errno.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 
30 #include <asm/system.h>
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 
34 #include <linux/netdevice.h>
35 #include <linux/trdevice.h>
36 #include "tms380tr.h"
37 #include "madgemc.h"            /* Madge-specific constants */
38 
39 #define MADGEMC_IO_EXTENT 32
40 #define MADGEMC_SIF_OFFSET 0x08
41 
42 struct madgemc_card {
43 	struct net_device *dev;
44 
45 	/*
46 	 * These are read from the BIA ROM.
47 	 */
48 	unsigned int manid;
49 	unsigned int cardtype;
50 	unsigned int cardrev;
51 	unsigned int ramsize;
52 
53 	/*
54 	 * These are read from the MCA POS registers.
55 	 */
56 	unsigned int burstmode:2;
57 	unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */
58 	unsigned int arblevel:4;
59 	unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
60 	unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */
61 
62 	struct madgemc_card *next;
63 };
64 static struct madgemc_card *madgemc_card_list;
65 
66 
67 int madgemc_probe(void);
68 static int madgemc_open(struct net_device *dev);
69 static int madgemc_close(struct net_device *dev);
70 static int madgemc_chipset_init(struct net_device *dev);
71 static void madgemc_read_rom(struct madgemc_card *card);
72 static unsigned short madgemc_setnselout_pins(struct net_device *dev);
73 static void madgemc_setcabletype(struct net_device *dev, int type);
74 
75 static int madgemc_mcaproc(char *buf, int slot, void *d);
76 
77 static void madgemc_setregpage(struct net_device *dev, int page);
78 static void madgemc_setsifsel(struct net_device *dev, int val);
79 static void madgemc_setint(struct net_device *dev, int val);
80 
81 static void madgemc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
82 
83 /*
84  * These work around paging, however they dont guarentee you're on the
85  * right page.
86  */
87 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
88 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
89 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
90 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
91 
92 /*
93  * Read a byte-length value from the register.
94  */
madgemc_sifreadb(struct net_device * dev,unsigned short reg)95 static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg)
96 {
97 	unsigned short ret;
98 	if (reg<0x8)
99 		ret = SIFREADB(reg);
100 	else {
101 		madgemc_setregpage(dev, 1);
102 		ret = SIFREADB(reg);
103 		madgemc_setregpage(dev, 0);
104 	}
105 	return ret;
106 }
107 
108 /*
109  * Write a byte-length value to a register.
110  */
madgemc_sifwriteb(struct net_device * dev,unsigned short val,unsigned short reg)111 static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
112 {
113 	if (reg<0x8)
114 		SIFWRITEB(val, reg);
115 	else {
116 		madgemc_setregpage(dev, 1);
117 		SIFWRITEB(val, reg);
118 		madgemc_setregpage(dev, 0);
119 	}
120 	return;
121 }
122 
123 /*
124  * Read a word-length value from a register
125  */
madgemc_sifreadw(struct net_device * dev,unsigned short reg)126 static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg)
127 {
128 	unsigned short ret;
129 	if (reg<0x8)
130 		ret = SIFREADW(reg);
131 	else {
132 		madgemc_setregpage(dev, 1);
133 		ret = SIFREADW(reg);
134 		madgemc_setregpage(dev, 0);
135 	}
136 	return ret;
137 }
138 
139 /*
140  * Write a word-length value to a register.
141  */
madgemc_sifwritew(struct net_device * dev,unsigned short val,unsigned short reg)142 static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
143 {
144 	if (reg<0x8)
145 		SIFWRITEW(val, reg);
146 	else {
147 		madgemc_setregpage(dev, 1);
148 		SIFWRITEW(val, reg);
149 		madgemc_setregpage(dev, 0);
150 	}
151 	return;
152 }
153 
154 
155 
madgemc_probe(void)156 int __init madgemc_probe(void)
157 {
158 	static int versionprinted;
159 	struct net_device *dev;
160 	struct net_local *tp;
161 	struct madgemc_card *card;
162 	int i,slot = 0;
163 	__u8 posreg[4];
164 
165 	if (!MCA_bus)
166 		return -1;
167 
168 	while (slot != MCA_NOTFOUND) {
169 		/*
170 		 * Currently we only support the MC16/32 (MCA ID 002d)
171 		 */
172 		slot = mca_find_unused_adapter(0x002d, slot);
173 		if (slot == MCA_NOTFOUND)
174 			break;
175 
176 		/*
177 		 * If we get here, we have an adapter.
178 		 */
179 		if (versionprinted++ == 0)
180 			printk("%s", version);
181 
182 		if ((dev = init_trdev(NULL, 0))==NULL) {
183 			printk("madgemc: unable to allocate dev space\n");
184 			if (madgemc_card_list)
185 				return 0;
186 			return -1;
187 		}
188 		SET_MODULE_OWNER(dev);
189 		dev->dma = 0;
190 
191 		/*
192 		 * Fetch MCA config registers
193 		 */
194 		for(i=0;i<4;i++)
195 			posreg[i] = mca_read_stored_pos(slot, i+2);
196 
197 		card = kmalloc(sizeof(struct madgemc_card), GFP_KERNEL);
198 		if (card==NULL) {
199 			printk("madgemc: unable to allocate card struct\n");
200 			kfree(dev); /* release_trdev? */
201 			if (madgemc_card_list)
202 				return 0;
203 			return -1;
204 		}
205 		card->dev = dev;
206 
207 		/*
208 		 * Parse configuration information.  This all comes
209 		 * directly from the publicly available @002d.ADF.
210 		 * Get it from Madge or your local ADF library.
211 		 */
212 
213 		/*
214 		 * Base address
215 		 */
216 		dev->base_addr = 0x0a20 +
217 			((posreg[2] & MC16_POS2_ADDR2)?0x0400:0) +
218 			((posreg[0] & MC16_POS0_ADDR1)?0x1000:0) +
219 			((posreg[3] & MC16_POS3_ADDR3)?0x2000:0);
220 
221 		/*
222 		 * Interrupt line
223 		 */
224 		switch(posreg[0] >> 6) { /* upper two bits */
225 		case 0x1: dev->irq = 3; break;
226 		case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */
227 		case 0x3: dev->irq = 10; break;
228 		default: dev->irq = 0; break;
229 		}
230 
231 		if (dev->irq == 0) {
232 			printk("%s: invalid IRQ\n", dev->name);
233 			goto getout1;
234 		}
235 
236 		if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT,
237 				   "madgemc")) {
238 			printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", slot, dev->base_addr);
239 			dev->base_addr += MADGEMC_SIF_OFFSET;
240 			goto getout1;
241 		}
242 		dev->base_addr += MADGEMC_SIF_OFFSET;
243 
244 		/*
245 		 * Arbitration Level
246 		 */
247 		card->arblevel = ((posreg[0] >> 1) & 0x7) + 8;
248 
249 		/*
250 		 * Burst mode and Fairness
251 		 */
252 		card->burstmode = ((posreg[2] >> 6) & 0x3);
253 		card->fairness = ((posreg[2] >> 4) & 0x1);
254 
255 		/*
256 		 * Ring Speed
257 		 */
258 		if ((posreg[1] >> 2)&0x1)
259 			card->ringspeed = 2; /* not selected */
260 		else if ((posreg[2] >> 5) & 0x1)
261 			card->ringspeed = 1; /* 16Mb */
262 		else
263 			card->ringspeed = 0; /* 4Mb */
264 
265 		/*
266 		 * Cable type
267 		 */
268 		if ((posreg[1] >> 6)&0x1)
269 			card->cabletype = 1; /* STP/DB9 */
270 		else
271 			card->cabletype = 0; /* UTP/RJ-45 */
272 
273 
274 		/*
275 		 * ROM Info. This requires us to actually twiddle
276 		 * bits on the card, so we must ensure above that
277 		 * the base address is free of conflict (request_region above).
278 		 */
279 		madgemc_read_rom(card);
280 
281 		if (card->manid != 0x4d) { /* something went wrong */
282 			printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid);
283 			goto getout;
284 		}
285 
286 		if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) {
287 			printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype);
288 			goto getout;
289 		}
290 
291 		/* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
292 		if ((card->cardtype == 0x08) && (card->cardrev <= 0x01))
293 			card->ramsize = 128;
294 		else
295 			card->ramsize = 256;
296 
297 		printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
298 		       dev->name,
299 		       (card->cardtype == 0x08)?MADGEMC16_CARDNAME:
300 		       MADGEMC32_CARDNAME, card->cardrev,
301 		       dev->base_addr, dev->irq);
302 
303 		if (card->cardtype == 0x0d)
304 			printk("%s:     Warning: MC32 support is experimental and highly untested\n", dev->name);
305 
306 		if (card->ringspeed==2) { /* Unknown */
307 			printk("%s:     Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name);
308 			card->ringspeed = 1; /* default to 16mb */
309 		}
310 
311 		printk("%s:     RAM Size: %dKB\n", dev->name, card->ramsize);
312 
313 		printk("%s:     Ring Speed: %dMb/sec on %s\n", dev->name,
314 		       (card->ringspeed)?16:4,
315 		       card->cabletype?"STP/DB9":"UTP/RJ-45");
316 		printk("%s:     Arbitration Level: %d\n", dev->name,
317 		       card->arblevel);
318 
319 		printk("%s:     Burst Mode: ", dev->name);
320 		switch(card->burstmode) {
321 		case 0: printk("Cycle steal"); break;
322 		case 1: printk("Limited burst"); break;
323 		case 2: printk("Delayed release"); break;
324 		case 3: printk("Immediate release"); break;
325 		}
326 		printk(" (%s)\n", (card->fairness)?"Unfair":"Fair");
327 
328 
329 		/*
330 		 * Enable SIF before we assign the interrupt handler,
331 		 * just in case we get spurious interrupts that need
332 		 * handling.
333 		 */
334 		outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */
335 		madgemc_setsifsel(dev, 1);
336 		if(request_irq(dev->irq, madgemc_interrupt, SA_SHIRQ,
337 			       "madgemc", dev))
338 			goto getout;
339 
340 		madgemc_chipset_init(dev); /* enables interrupts! */
341 		madgemc_setcabletype(dev, card->cabletype);
342 
343 		/* Setup MCA structures */
344 		mca_set_adapter_name(slot, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME);
345 		mca_set_adapter_procfn(slot, madgemc_mcaproc, dev);
346 		mca_mark_as_used(slot);
347 
348 		printk("%s:     Ring Station Address: ", dev->name);
349 		printk("%2.2x", dev->dev_addr[0]);
350 		for (i = 1; i < 6; i++)
351 			printk(":%2.2x", dev->dev_addr[i]);
352 		printk("\n");
353 
354 		/* XXX is ISA_MAX_ADDRESS correct here? */
355 		if (tmsdev_init(dev, ISA_MAX_ADDRESS, NULL)) {
356 			printk("%s: unable to get memory for dev->priv.\n",
357 			       dev->name);
358 			release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
359 			       MADGEMC_IO_EXTENT);
360 
361 			kfree(card);
362 			tmsdev_term(dev);
363 			kfree(dev);
364 			if (madgemc_card_list)
365 				return 0;
366 			return -1;
367 		}
368 		tp = (struct net_local *)dev->priv;
369 
370 		/*
371 		 * The MC16 is physically a 32bit card.  However, Madge
372 		 * insists on calling it 16bit, so I'll assume here that
373 		 * they know what they're talking about.  Cut off DMA
374 		 * at 16mb.
375 		 */
376 		tp->setnselout = madgemc_setnselout_pins;
377 		tp->sifwriteb = madgemc_sifwriteb;
378 		tp->sifreadb = madgemc_sifreadb;
379 		tp->sifwritew = madgemc_sifwritew;
380 		tp->sifreadw = madgemc_sifreadw;
381 		tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4;
382 
383 		memcpy(tp->ProductID, "Madge MCA 16/4    ", PROD_ID_SIZE + 1);
384 
385 		dev->open = madgemc_open;
386 		dev->stop = madgemc_close;
387 
388 		if (register_trdev(dev) == 0) {
389 			/* Enlist in the card list */
390 			card->next = madgemc_card_list;
391 			madgemc_card_list = card;
392 		} else {
393 			printk("madgemc: register_trdev() returned non-zero.\n");
394 			release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
395 			       MADGEMC_IO_EXTENT);
396 
397 			kfree(card);
398 			tmsdev_term(dev);
399 			kfree(dev);
400 			if (madgemc_card_list)
401 				return 0;
402 			return -1;
403 		}
404 
405 		slot++;
406 		continue; /* successful, try to find another */
407 
408 	getout:
409 		release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
410 			       MADGEMC_IO_EXTENT);
411 	getout1:
412 		kfree(card);
413 		kfree(dev); /* release_trdev? */
414 		slot++;
415 	}
416 
417 	if (madgemc_card_list)
418 		return 0;
419 	return -1;
420 }
421 
422 /*
423  * Handle interrupts generated by the card
424  *
425  * The MicroChannel Madge cards need slightly more handling
426  * after an interrupt than other TMS380 cards do.
427  *
428  * First we must make sure it was this card that generated the
429  * interrupt (since interrupt sharing is allowed).  Then,
430  * because we're using level-triggered interrupts (as is
431  * standard on MCA), we must toggle the interrupt line
432  * on the card in order to claim and acknowledge the interrupt.
433  * Once that is done, the interrupt should be handlable in
434  * the normal tms380tr_interrupt() routine.
435  *
436  * There's two ways we can check to see if the interrupt is ours,
437  * both with their own disadvantages...
438  *
439  * 1)  	Read in the SIFSTS register from the TMS controller.  This
440  *	is guarenteed to be accurate, however, there's a fairly
441  *	large performance penalty for doing so: the Madge chips
442  *	must request the register from the Eagle, the Eagle must
443  *	read them from its internal bus, and then take the route
444  *	back out again, for a 16bit read.
445  *
446  * 2)	Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
447  *	The major disadvantage here is that the accuracy of the
448  *	bit is in question.  However, it cuts out the extra read
449  *	cycles it takes to read the Eagle's SIF, as its only an
450  *	8bit read, and theoretically the Madge bit is directly
451  *	connected to the interrupt latch coming out of the Eagle
452  *	hardware (that statement is not verified).
453  *
454  * I can't determine which of these methods has the best win.  For now,
455  * we make a compromise.  Use the Madge way for the first interrupt,
456  * which should be the fast-path, and then once we hit the first
457  * interrupt, keep on trying using the SIF method until we've
458  * exhausted all contiguous interrupts.
459  *
460  */
madgemc_interrupt(int irq,void * dev_id,struct pt_regs * regs)461 static void madgemc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
462 {
463 	int pending,reg1;
464 	struct net_device *dev;
465 
466 	if (!dev_id) {
467 		printk("madgemc_interrupt: was not passed a dev_id!\n");
468 		return;
469 	}
470 
471 	dev = (struct net_device *)dev_id;
472 
473 	/* Make sure its really us. -- the Madge way */
474 	pending = inb(dev->base_addr + MC_CONTROL_REG0);
475 	if (!(pending & MC_CONTROL_REG0_SINTR))
476 		return; /* not our interrupt */
477 
478 	/*
479 	 * Since we're level-triggered, we may miss the rising edge
480 	 * of the next interrupt while we're off handling this one,
481 	 * so keep checking until the SIF verifies that it has nothing
482 	 * left for us to do.
483 	 */
484 	pending = STS_SYSTEM_IRQ;
485 	do {
486 		if (pending & STS_SYSTEM_IRQ) {
487 
488 			/* Toggle the interrupt to reset the latch on card */
489 			reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
490 			outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
491 			     dev->base_addr + MC_CONTROL_REG1);
492 			outb(reg1, dev->base_addr + MC_CONTROL_REG1);
493 
494 			/* Continue handling as normal */
495 			tms380tr_interrupt(irq, dev_id, regs);
496 
497 			pending = SIFREADW(SIFSTS); /* restart - the SIF way */
498 
499 		} else
500 			return;
501 	} while (1);
502 
503 	return; /* not reachable */
504 }
505 
506 /*
507  * Set the card to the prefered ring speed.
508  *
509  * Unlike newer cards, the MC16/32 have their speed selection
510  * circuit connected to the Madge ASICs and not to the TMS380
511  * NSELOUT pins. Set the ASIC bits correctly here, and return
512  * zero to leave the TMS NSELOUT bits unaffected.
513  *
514  */
madgemc_setnselout_pins(struct net_device * dev)515 unsigned short madgemc_setnselout_pins(struct net_device *dev)
516 {
517 	unsigned char reg1;
518 	struct net_local *tp = (struct net_local *)dev->priv;
519 
520 	reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
521 
522 	if(tp->DataRate == SPEED_16)
523 		reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */
524 	else if (reg1 & MC_CONTROL_REG1_SPEED_SEL)
525 		reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */
526 	outb(reg1, dev->base_addr + MC_CONTROL_REG1);
527 
528 	return 0; /* no change */
529 }
530 
531 /*
532  * Set the register page.  This equates to the SRSX line
533  * on the TMS380Cx6.
534  *
535  * Register selection is normally done via three contiguous
536  * bits.  However, some boards (such as the MC16/32) use only
537  * two bits, plus a separate bit in the glue chip.  This
538  * sets the SRSX bit (the top bit).  See page 4-17 in the
539  * Yellow Book for which registers are affected.
540  *
541  */
madgemc_setregpage(struct net_device * dev,int page)542 static void madgemc_setregpage(struct net_device *dev, int page)
543 {
544 	static int reg1;
545 
546 	reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
547 	if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) {
548 		outb(reg1 ^ MC_CONTROL_REG1_SRSX,
549 		     dev->base_addr + MC_CONTROL_REG1);
550 	}
551 	else if (page == 1) {
552 		outb(reg1 | MC_CONTROL_REG1_SRSX,
553 		     dev->base_addr + MC_CONTROL_REG1);
554 	}
555 	reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
556 
557 	return;
558 }
559 
560 /*
561  * The SIF registers are not mapped into register space by default
562  * Set this to 1 to map them, 0 to map the BIA ROM.
563  *
564  */
madgemc_setsifsel(struct net_device * dev,int val)565 static void madgemc_setsifsel(struct net_device *dev, int val)
566 {
567 	unsigned int reg0;
568 
569 	reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
570 	if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) {
571 		outb(reg0 ^ MC_CONTROL_REG0_SIFSEL,
572 		     dev->base_addr + MC_CONTROL_REG0);
573 	} else if (val == 1) {
574 		outb(reg0 | MC_CONTROL_REG0_SIFSEL,
575 		     dev->base_addr + MC_CONTROL_REG0);
576 	}
577 	reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
578 
579 	return;
580 }
581 
582 /*
583  * Enable SIF interrupts
584  *
585  * This does not enable interrupts in the SIF, but rather
586  * enables SIF interrupts to be passed onto the host.
587  *
588  */
madgemc_setint(struct net_device * dev,int val)589 static void madgemc_setint(struct net_device *dev, int val)
590 {
591 	unsigned int reg1;
592 
593 	reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
594 	if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) {
595 		outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
596 		     dev->base_addr + MC_CONTROL_REG1);
597 	} else if (val == 1) {
598 		outb(reg1 | MC_CONTROL_REG1_SINTEN,
599 		     dev->base_addr + MC_CONTROL_REG1);
600 	}
601 
602 	return;
603 }
604 
605 /*
606  * Cable type is set via control register 7. Bit zero high
607  * for UTP, low for STP.
608  */
madgemc_setcabletype(struct net_device * dev,int type)609 static void madgemc_setcabletype(struct net_device *dev, int type)
610 {
611 	outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP,
612 	     dev->base_addr + MC_CONTROL_REG7);
613 }
614 
615 /*
616  * Enable the functions of the Madge chipset needed for
617  * full working order.
618  */
madgemc_chipset_init(struct net_device * dev)619 static int madgemc_chipset_init(struct net_device *dev)
620 {
621 	outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */
622 	tms380tr_wait(100); /* wait for card to reset */
623 
624 	/* bring back into normal operating mode */
625 	outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1);
626 
627 	/* map SIF registers */
628 	madgemc_setsifsel(dev, 1);
629 
630 	/* enable SIF interrupts */
631 	madgemc_setint(dev, 1);
632 
633 	return 0;
634 }
635 
636 /*
637  * Disable the board, and put back into power-up state.
638  */
madgemc_chipset_close(struct net_device * dev)639 void madgemc_chipset_close(struct net_device *dev)
640 {
641 	/* disable interrupts */
642 	madgemc_setint(dev, 0);
643 	/* unmap SIF registers */
644 	madgemc_setsifsel(dev, 0);
645 
646 	return;
647 }
648 
649 /*
650  * Read the card type (MC16 or MC32) from the card.
651  *
652  * The configuration registers are stored in two separate
653  * pages.  Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
654  * for page zero, or setting bit 3 for page one.
655  *
656  * Page zero contains the following data:
657  *	Byte 0: Manufacturer ID (0x4D -- ASCII "M")
658  *	Byte 1: Card type:
659  *			0x08 for MC16
660  *			0x0D for MC32
661  *	Byte 2: Card revision
662  *	Byte 3: Mirror of POS config register 0
663  *	Byte 4: Mirror of POS 1
664  *	Byte 5: Mirror of POS 2
665  *
666  * Page one contains the following data:
667  *	Byte 0: Unused
668  *	Byte 1-6: BIA, MSB to LSB.
669  *
670  * Note that to read the BIA, we must unmap the SIF registers
671  * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
672  * will reside in the same logical location.  For this reason,
673  * _never_ read the BIA while the Eagle processor is running!
674  * The SIF will be completely inaccessible until the BIA operation
675  * is complete.
676  *
677  */
madgemc_read_rom(struct madgemc_card * card)678 static void madgemc_read_rom(struct madgemc_card *card)
679 {
680 	unsigned long ioaddr;
681 	unsigned char reg0, reg1, tmpreg0, i;
682 
683 	ioaddr = card->dev->base_addr;
684 
685 	reg0 = inb(ioaddr + MC_CONTROL_REG0);
686 	reg1 = inb(ioaddr + MC_CONTROL_REG1);
687 
688 	/* Switch to page zero and unmap SIF */
689 	tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL);
690 	outb(tmpreg0, ioaddr + MC_CONTROL_REG0);
691 
692 	card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID);
693 	card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID);
694 	card->cardrev = inb(ioaddr + MC_ROM_REVISION);
695 
696 	/* Switch to rom page one */
697 	outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0);
698 
699 	/* Read BIA */
700 	card->dev->addr_len = 6;
701 	for (i = 0; i < 6; i++)
702 		card->dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i);
703 
704 	/* Restore original register values */
705 	outb(reg0, ioaddr + MC_CONTROL_REG0);
706 	outb(reg1, ioaddr + MC_CONTROL_REG1);
707 
708 	return;
709 }
710 
madgemc_open(struct net_device * dev)711 static int madgemc_open(struct net_device *dev)
712 {
713 	/*
714 	 * Go ahead and reinitialize the chipset again, just to
715 	 * make sure we didn't get left in a bad state.
716 	 */
717 	madgemc_chipset_init(dev);
718 	tms380tr_open(dev);
719 	return 0;
720 }
721 
madgemc_close(struct net_device * dev)722 static int madgemc_close(struct net_device *dev)
723 {
724 	tms380tr_close(dev);
725 	madgemc_chipset_close(dev);
726 	return 0;
727 }
728 
729 /*
730  * Give some details available from /proc/mca/slotX
731  */
madgemc_mcaproc(char * buf,int slot,void * d)732 static int madgemc_mcaproc(char *buf, int slot, void *d)
733 {
734 	struct net_device *dev = (struct net_device *)d;
735 	struct madgemc_card *curcard = madgemc_card_list;
736 	int len = 0;
737 
738 	while (curcard) { /* search for card struct */
739 		if (curcard->dev == dev)
740 			break;
741 		curcard = curcard->next;
742 	}
743 	len += sprintf(buf+len, "-------\n");
744 	if (curcard) {
745 		struct net_local *tp = (struct net_local *)dev->priv;
746 		int i;
747 
748 		len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev);
749 		len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize);
750 		len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45");
751 		len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4);
752 		len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4);
753 		len += sprintf(buf+len, "Device: %s\n", dev->name);
754 		len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr);
755 		len += sprintf(buf+len, "IRQ: %d\n", dev->irq);
756 		len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel);
757 		len += sprintf(buf+len, "Burst Mode: ");
758 		switch(curcard->burstmode) {
759 		case 0: len += sprintf(buf+len, "Cycle steal"); break;
760 		case 1: len += sprintf(buf+len, "Limited burst"); break;
761 		case 2: len += sprintf(buf+len, "Delayed release"); break;
762 		case 3: len += sprintf(buf+len, "Immediate release"); break;
763 		}
764 		len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair");
765 
766 		len += sprintf(buf+len, "Ring Station Address: ");
767 		len += sprintf(buf+len, "%2.2x", dev->dev_addr[0]);
768 		for (i = 1; i < 6; i++)
769 			len += sprintf(buf+len, " %2.2x", dev->dev_addr[i]);
770 		len += sprintf(buf+len, "\n");
771 	} else
772 		len += sprintf(buf+len, "Card not configured\n");
773 
774 	return len;
775 }
776 
777 #ifdef MODULE
778 
init_module(void)779 int init_module(void)
780 {
781 	/* Probe for cards. */
782 	if (madgemc_probe()) {
783 		printk(KERN_NOTICE "madgemc.c: No cards found.\n");
784 	}
785 	/* lock_tms380_module(); */
786 	return (0);
787 }
788 
cleanup_module(void)789 void cleanup_module(void)
790 {
791 	struct net_device *dev;
792 	struct madgemc_card *this_card;
793 
794 	while (madgemc_card_list) {
795 		dev = madgemc_card_list->dev;
796 		unregister_trdev(dev);
797 		release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT);
798 		free_irq(dev->irq, dev);
799 		tmsdev_term(dev);
800 		kfree(dev);
801 		this_card = madgemc_card_list;
802 		madgemc_card_list = this_card->next;
803 		kfree(this_card);
804 	}
805 	/* unlock_tms380_module(); */
806 }
807 #endif /* MODULE */
808 
809 MODULE_LICENSE("GPL");
810 
811 
812 /*
813  * Local variables:
814  *  compile-command: "gcc -DMODVERSIONS  -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c"
815  *  alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c"
816  *  c-set-style "K&R"
817  *  c-indent-level: 8
818  *  c-basic-offset: 8
819  *  tab-width: 8
820  * End:
821  */
822 
823