1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * Copyright(c) 2018 Intel Corporation. All rights reserved.
7  *
8  * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9  */
10 
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
13 
14 #include <linux/device.h>
15 #include <sound/hdaudio.h>
16 #include <sound/sof.h>
17 #include <sound/sof/info.h>
18 #include <sound/sof/pm.h>
19 #include <sound/sof/trace.h>
20 #include <uapi/sound/sof/fw.h>
21 #include <sound/sof/ext_manifest.h>
22 
23 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */
24 #define SOF_DBG_ENABLE_TRACE	BIT(0)
25 #define SOF_DBG_RETAIN_CTX	BIT(1)	/* prevent DSP D3 on FW exception */
26 #define SOF_DBG_VERIFY_TPLG	BIT(2) /* verify topology during load */
27 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE	BIT(3) /* 0: use topology token
28 							* 1: override topology
29 							*/
30 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE	BIT(4) /* 0: use static pipelines
31 							* 1: use dynamic pipelines
32 							*/
33 #define SOF_DBG_DISABLE_MULTICORE		BIT(5) /* schedule all pipelines/widgets
34 							* on primary core
35 							*/
36 #define SOF_DBG_PRINT_ALL_DUMPS		BIT(6) /* Print all ipc and dsp dumps */
37 #define SOF_DBG_IGNORE_D3_PERSISTENT		BIT(7) /* ignore the DSP D3 persistent capability
38 							* and always download firmware upon D3 exit
39 							*/
40 #define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS	BIT(8) /* print DMA position updates
41 							* in dmesg logs
42 							*/
43 #define SOF_DBG_PRINT_IPC_SUCCESS_LOGS		BIT(9) /* print IPC success
44 							* in dmesg logs
45 							*/
46 
47 /* Flag definitions used for controlling the DSP dump behavior */
48 #define SOF_DBG_DUMP_REGS		BIT(0)
49 #define SOF_DBG_DUMP_MBOX		BIT(1)
50 #define SOF_DBG_DUMP_TEXT		BIT(2)
51 #define SOF_DBG_DUMP_PCI		BIT(3)
52 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */
53 #define SOF_DBG_DUMP_OPTIONAL		BIT(4)
54 
55 /* global debug state set by SOF_DBG_ flags */
56 bool sof_debug_check_flag(int mask);
57 
58 /* max BARs mmaped devices can use */
59 #define SND_SOF_BARS	8
60 
61 /* time in ms for runtime suspend delay */
62 #define SND_SOF_SUSPEND_DELAY_MS	2000
63 
64 /* DMA buffer size for trace */
65 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
66 
67 #define SOF_IPC_DSP_REPLY		0
68 #define SOF_IPC_HOST_REPLY		1
69 
70 /* convenience constructor for DAI driver streams */
71 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
72 	{.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
73 	 .rates = srates, .formats = sfmt}
74 
75 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
76 	SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
77 
78 /* So far the primary core on all DSPs has ID 0 */
79 #define SOF_DSP_PRIMARY_CORE 0
80 
81 /* max number of DSP cores */
82 #define SOF_MAX_DSP_NUM_CORES 8
83 
84 struct sof_dsp_power_state {
85 	u32 state;
86 	u32 substate; /* platform-specific */
87 };
88 
89 /* System suspend target state */
90 enum sof_system_suspend_state {
91 	SOF_SUSPEND_NONE = 0,
92 	SOF_SUSPEND_S0IX,
93 	SOF_SUSPEND_S3,
94 	SOF_SUSPEND_S4,
95 	SOF_SUSPEND_S5,
96 };
97 
98 enum sof_dfsentry_type {
99 	SOF_DFSENTRY_TYPE_IOMEM = 0,
100 	SOF_DFSENTRY_TYPE_BUF,
101 };
102 
103 enum sof_debugfs_access_type {
104 	SOF_DEBUGFS_ACCESS_ALWAYS = 0,
105 	SOF_DEBUGFS_ACCESS_D0_ONLY,
106 };
107 
108 struct sof_compr_stream {
109 	u64 copied_total;
110 	u32 sampling_rate;
111 	u16 channels;
112 	u16 sample_container_bytes;
113 };
114 
115 struct snd_sof_dev;
116 struct snd_sof_ipc_msg;
117 struct snd_sof_ipc;
118 struct snd_sof_debugfs_map;
119 struct snd_soc_tplg_ops;
120 struct snd_soc_component;
121 struct snd_sof_pdata;
122 
123 /**
124  * struct snd_sof_platform_stream_params - platform dependent stream parameters
125  * @stream_tag:		Stream tag to use
126  * @use_phy_addr:	Use the provided @phy_addr for configuration
127  * @phy_addr:		Platform dependent address to be used, if  @use_phy_addr
128  *			is true
129  * @no_ipc_position:	Disable position update IPC from firmware
130  */
131 struct snd_sof_platform_stream_params {
132 	u16 stream_tag;
133 	bool use_phy_address;
134 	u32 phy_addr;
135 	bool no_ipc_position;
136 	bool cont_update_posn;
137 };
138 
139 /*
140  * SOF DSP HW abstraction operations.
141  * Used to abstract DSP HW architecture and any IO busses between host CPU
142  * and DSP device(s).
143  */
144 struct snd_sof_dsp_ops {
145 
146 	/* probe/remove/shutdown */
147 	int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
148 	int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
149 	int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
150 
151 	/* DSP core boot / reset */
152 	int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
153 	int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
154 	int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
155 	int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */
156 	int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */
157 
158 	/*
159 	 * Register IO: only used by respective drivers themselves,
160 	 * TODO: consider removing these operations and calling respective
161 	 * implementations directly
162 	 */
163 	void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
164 		      u32 value); /* optional */
165 	u32 (*read)(struct snd_sof_dev *sof_dev,
166 		    void __iomem *addr); /* optional */
167 	void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
168 			u64 value); /* optional */
169 	u64 (*read64)(struct snd_sof_dev *sof_dev,
170 		      void __iomem *addr); /* optional */
171 
172 	/* memcpy IO */
173 	int (*block_read)(struct snd_sof_dev *sof_dev,
174 			  enum snd_sof_fw_blk_type type, u32 offset,
175 			  void *dest, size_t size); /* mandatory */
176 	int (*block_write)(struct snd_sof_dev *sof_dev,
177 			   enum snd_sof_fw_blk_type type, u32 offset,
178 			   void *src, size_t size); /* mandatory */
179 
180 	/* Mailbox IO */
181 	void (*mailbox_read)(struct snd_sof_dev *sof_dev,
182 			     u32 offset, void *dest,
183 			     size_t size); /* optional */
184 	void (*mailbox_write)(struct snd_sof_dev *sof_dev,
185 			      u32 offset, void *src,
186 			      size_t size); /* optional */
187 
188 	/* doorbell */
189 	irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
190 	irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
191 
192 	/* ipc */
193 	int (*send_msg)(struct snd_sof_dev *sof_dev,
194 			struct snd_sof_ipc_msg *msg); /* mandatory */
195 
196 	/* FW loading */
197 	int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
198 	int (*load_module)(struct snd_sof_dev *sof_dev,
199 			   struct snd_sof_mod_hdr *hdr); /* optional */
200 
201 	/* connect pcm substream to a host stream */
202 	int (*pcm_open)(struct snd_sof_dev *sdev,
203 			struct snd_pcm_substream *substream); /* optional */
204 	/* disconnect pcm substream to a host stream */
205 	int (*pcm_close)(struct snd_sof_dev *sdev,
206 			 struct snd_pcm_substream *substream); /* optional */
207 
208 	/* host stream hw params */
209 	int (*pcm_hw_params)(struct snd_sof_dev *sdev,
210 			     struct snd_pcm_substream *substream,
211 			     struct snd_pcm_hw_params *params,
212 			     struct snd_sof_platform_stream_params *platform_params); /* optional */
213 
214 	/* host stream hw_free */
215 	int (*pcm_hw_free)(struct snd_sof_dev *sdev,
216 			   struct snd_pcm_substream *substream); /* optional */
217 
218 	/* host stream trigger */
219 	int (*pcm_trigger)(struct snd_sof_dev *sdev,
220 			   struct snd_pcm_substream *substream,
221 			   int cmd); /* optional */
222 
223 	/* host stream pointer */
224 	snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
225 					 struct snd_pcm_substream *substream); /* optional */
226 
227 	/* pcm ack */
228 	int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */
229 
230 	/* host read DSP stream data */
231 	int (*ipc_msg_data)(struct snd_sof_dev *sdev,
232 			    struct snd_pcm_substream *substream,
233 			    void *p, size_t sz); /* mandatory */
234 
235 	/* host side configuration of the stream's data offset in stream mailbox area */
236 	int (*set_stream_data_offset)(struct snd_sof_dev *sdev,
237 				      struct snd_pcm_substream *substream,
238 				      size_t posn_offset); /* optional */
239 
240 	/* pre/post firmware run */
241 	int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
242 	int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
243 
244 	/* parse platform specific extended manifest, optional */
245 	int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
246 					   const struct sof_ext_man_elem_header *hdr);
247 
248 	/* DSP PM */
249 	int (*suspend)(struct snd_sof_dev *sof_dev,
250 		       u32 target_state); /* optional */
251 	int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
252 	int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
253 	int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
254 	int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
255 	int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
256 	int (*set_power_state)(struct snd_sof_dev *sdev,
257 			       const struct sof_dsp_power_state *target_state); /* optional */
258 
259 	/* DSP clocking */
260 	int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
261 
262 	/* debug */
263 	const struct snd_sof_debugfs_map *debug_map; /* optional */
264 	int debug_map_count; /* optional */
265 	void (*dbg_dump)(struct snd_sof_dev *sof_dev,
266 			 u32 flags); /* optional */
267 	void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
268 	int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
269 				       enum snd_sof_fw_blk_type blk_type, u32 offset,
270 				       size_t size, const char *name,
271 				       enum sof_debugfs_access_type access_type); /* optional */
272 
273 	/* host DMA trace (IPC3) */
274 	int (*trace_init)(struct snd_sof_dev *sdev,
275 			  struct snd_dma_buffer *dmatb,
276 			  struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */
277 	int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
278 	int (*trace_trigger)(struct snd_sof_dev *sdev,
279 			     int cmd); /* optional */
280 
281 	/* misc */
282 	int (*get_bar_index)(struct snd_sof_dev *sdev,
283 			     u32 type); /* optional */
284 	int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
285 	int (*get_window_offset)(struct snd_sof_dev *sdev,
286 				 u32 id);/* mandatory for common loader code */
287 
288 	/* machine driver ops */
289 	int (*machine_register)(struct snd_sof_dev *sdev,
290 				void *pdata); /* optional */
291 	void (*machine_unregister)(struct snd_sof_dev *sdev,
292 				   void *pdata); /* optional */
293 	struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */
294 	void (*set_mach_params)(struct snd_soc_acpi_mach *mach,
295 				struct snd_sof_dev *sdev); /* optional */
296 
297 	/* IPC client ops */
298 	int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
299 	void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
300 
301 	/* DAI ops */
302 	struct snd_soc_dai_driver *drv;
303 	int num_drv;
304 
305 	/* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
306 	u32 hw_info;
307 
308 	const struct dsp_arch_ops *dsp_arch_ops;
309 };
310 
311 /* DSP architecture specific callbacks for oops and stack dumps */
312 struct dsp_arch_ops {
313 	void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops);
314 	void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops,
315 			  u32 *stack, u32 stack_words);
316 };
317 
318 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
319 
320 /* FS entry for debug files that can expose DSP memories, registers */
321 struct snd_sof_dfsentry {
322 	size_t size;
323 	size_t buf_data_size;  /* length of buffered data for file read operation */
324 	enum sof_dfsentry_type type;
325 	/*
326 	 * access_type specifies if the
327 	 * memory -> DSP resource (memory, register etc) is always accessible
328 	 * or if it is accessible only when the DSP is in D0.
329 	 */
330 	enum sof_debugfs_access_type access_type;
331 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE)
332 	char *cache_buf; /* buffer to cache the contents of debugfs memory */
333 #endif
334 	struct snd_sof_dev *sdev;
335 	struct list_head list;  /* list in sdev dfsentry list */
336 	union {
337 		void __iomem *io_mem;
338 		void *buf;
339 	};
340 };
341 
342 /* Debug mapping for any DSP memory or registers that can used for debug */
343 struct snd_sof_debugfs_map {
344 	const char *name;
345 	u32 bar;
346 	u32 offset;
347 	u32 size;
348 	/*
349 	 * access_type specifies if the memory is always accessible
350 	 * or if it is accessible only when the DSP is in D0.
351 	 */
352 	enum sof_debugfs_access_type access_type;
353 };
354 
355 /* mailbox descriptor, used for host <-> DSP IPC */
356 struct snd_sof_mailbox {
357 	u32 offset;
358 	size_t size;
359 };
360 
361 /* IPC message descriptor for host <-> DSP IO */
362 struct snd_sof_ipc_msg {
363 	/* message data */
364 	void *msg_data;
365 	void *reply_data;
366 	size_t msg_size;
367 	size_t reply_size;
368 	int reply_error;
369 
370 	/* notification, firmware initiated messages */
371 	void *rx_data;
372 
373 	wait_queue_head_t waitq;
374 	bool ipc_complete;
375 };
376 
377 /**
378  * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops
379  * @init:	Function pointer for initialization of the tracing
380  * @free:	Optional function pointer for freeing of the tracing
381  * @fw_crashed:	Optional function pointer to notify the tracing of a firmware crash
382  * @suspend:	Function pointer for system/runtime suspend
383  * @resume:	Function pointer for system/runtime resume
384  */
385 struct sof_ipc_fw_tracing_ops {
386 	int (*init)(struct snd_sof_dev *sdev);
387 	void (*free)(struct snd_sof_dev *sdev);
388 	void (*fw_crashed)(struct snd_sof_dev *sdev);
389 	void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state);
390 	int (*resume)(struct snd_sof_dev *sdev);
391 };
392 
393 /**
394  * struct sof_ipc_pm_ops - IPC-specific PM ops
395  * @ctx_save:		Optional function pointer for context save
396  * @ctx_restore:	Optional function pointer for context restore
397  * @set_core_state:	Optional function pointer for turning on/off a DSP core
398  */
399 struct sof_ipc_pm_ops {
400 	int (*ctx_save)(struct snd_sof_dev *sdev);
401 	int (*ctx_restore)(struct snd_sof_dev *sdev);
402 	int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on);
403 };
404 
405 /**
406  * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops
407  * @validate:		Function pointer for validating the firmware image
408  * @parse_ext_manifest:	Function pointer for parsing the manifest of the firmware
409  * @load_fw_to_dsp:	Optional function pointer for loading the firmware to the
410  *			DSP.
411  *			The function implements generic, hardware independent way
412  *			of loading the initial firmware and its modules (if any).
413  * @query_fw_configuration: Optional function pointer to query information and
414  *			configuration from the booted firmware.
415  *			Executed after the first successful firmware boot.
416  */
417 struct sof_ipc_fw_loader_ops {
418 	int (*validate)(struct snd_sof_dev *sdev);
419 	size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev);
420 	int (*load_fw_to_dsp)(struct snd_sof_dev *sdev);
421 	int (*query_fw_configuration)(struct snd_sof_dev *sdev);
422 };
423 
424 struct sof_ipc_tplg_ops;
425 struct sof_ipc_pcm_ops;
426 
427 /**
428  * struct sof_ipc_ops - IPC-specific ops
429  * @tplg:	Pointer to IPC-specific topology ops
430  * @pm:		Pointer to PM ops
431  * @pcm:	Pointer to PCM ops
432  * @fw_loader:	Pointer to Firmware Loader ops
433  * @fw_tracing:	Pointer to Firmware tracing ops
434  *
435  * @tx_msg:	Function pointer for sending a 'short' IPC message
436  * @set_get_data: Function pointer for set/get data ('large' IPC message). This
437  *		function may split up the 'large' message and use the @tx_msg
438  *		path to transfer individual chunks, or use other means to transfer
439  *		the message.
440  * @get_reply:	Function pointer for fetching the reply to
441  *		sdev->ipc->msg.reply_data
442  * @rx_msg:	Function pointer for handling a received message
443  *
444  * Note: both @tx_msg and @set_get_data considered as TX functions and they are
445  * serialized for the duration of the instructed transfer. A large message sent
446  * via @set_get_data is a single transfer even if at the hardware level it is
447  * handled with multiple chunks.
448  */
449 struct sof_ipc_ops {
450 	const struct sof_ipc_tplg_ops *tplg;
451 	const struct sof_ipc_pm_ops *pm;
452 	const struct sof_ipc_pcm_ops *pcm;
453 	const struct sof_ipc_fw_loader_ops *fw_loader;
454 	const struct sof_ipc_fw_tracing_ops *fw_tracing;
455 
456 	int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
457 		      void *reply_data, size_t reply_bytes, bool no_pm);
458 	int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
459 			    bool set);
460 	int (*get_reply)(struct snd_sof_dev *sdev);
461 	void (*rx_msg)(struct snd_sof_dev *sdev);
462 };
463 
464 /* SOF generic IPC data */
465 struct snd_sof_ipc {
466 	struct snd_sof_dev *sdev;
467 
468 	/* protects messages and the disable flag */
469 	struct mutex tx_mutex;
470 	/* disables further sending of ipc's */
471 	bool disable_ipc_tx;
472 
473 	/* Maximum allowed size of a single IPC message/reply */
474 	size_t max_payload_size;
475 
476 	struct snd_sof_ipc_msg msg;
477 
478 	/* IPC ops based on version */
479 	const struct sof_ipc_ops *ops;
480 };
481 
482 /*
483  * SOF Device Level.
484  */
485 struct snd_sof_dev {
486 	struct device *dev;
487 	spinlock_t ipc_lock;	/* lock for IPC users */
488 	spinlock_t hw_lock;	/* lock for HW IO access */
489 
490 	/*
491 	 * ASoC components. plat_drv fields are set dynamically so
492 	 * can't use const
493 	 */
494 	struct snd_soc_component_driver plat_drv;
495 
496 	/* current DSP power state */
497 	struct sof_dsp_power_state dsp_power_state;
498 	/* mutex to protect the dsp_power_state access */
499 	struct mutex power_state_access;
500 
501 	/* Intended power target of system suspend */
502 	enum sof_system_suspend_state system_suspend_target;
503 
504 	/* DSP firmware boot */
505 	wait_queue_head_t boot_wait;
506 	enum sof_fw_state fw_state;
507 	bool first_boot;
508 
509 	/* work queue in case the probe is implemented in two steps */
510 	struct work_struct probe_work;
511 	bool probe_completed;
512 
513 	/* DSP HW differentiation */
514 	struct snd_sof_pdata *pdata;
515 
516 	/* IPC */
517 	struct snd_sof_ipc *ipc;
518 	struct snd_sof_mailbox dsp_box;		/* DSP initiated IPC */
519 	struct snd_sof_mailbox host_box;	/* Host initiated IPC */
520 	struct snd_sof_mailbox stream_box;	/* Stream position update */
521 	struct snd_sof_mailbox debug_box;	/* Debug info updates */
522 	struct snd_sof_ipc_msg *msg;
523 	int ipc_irq;
524 	u32 next_comp_id; /* monotonic - reset during S3 */
525 
526 	/* memory bases for mmaped DSPs - set by dsp_init() */
527 	void __iomem *bar[SND_SOF_BARS];	/* DSP base address */
528 	int mmio_bar;
529 	int mailbox_bar;
530 	size_t dsp_oops_offset;
531 
532 	/* debug */
533 	struct dentry *debugfs_root;
534 	struct list_head dfsentry_list;
535 	bool dbg_dump_printed;
536 	bool ipc_dump_printed;
537 
538 	/* firmware loader */
539 	struct sof_ipc_fw_ready fw_ready;
540 	struct sof_ipc_fw_version fw_version;
541 	struct sof_ipc_cc_version *cc_version;
542 
543 	/* topology */
544 	struct snd_soc_tplg_ops *tplg_ops;
545 	struct list_head pcm_list;
546 	struct list_head kcontrol_list;
547 	struct list_head widget_list;
548 	struct list_head dai_list;
549 	struct list_head dai_link_list;
550 	struct list_head route_list;
551 	struct snd_soc_component *component;
552 	u32 enabled_cores_mask; /* keep track of enabled cores */
553 	bool led_present;
554 
555 	/* FW configuration */
556 	struct sof_ipc_window *info_window;
557 
558 	/* IPC timeouts in ms */
559 	int ipc_timeout;
560 	int boot_timeout;
561 
562 	/* firmwre tracing */
563 	bool fw_trace_is_supported; /* set with Kconfig or module parameter */
564 	void *fw_trace_data; /* private data used by firmware tracing implementation */
565 
566 	bool msi_enabled;
567 
568 	/* DSP core context */
569 	u32 num_cores;
570 
571 	/*
572 	 * ref count per core that will be modified during system suspend/resume and during pcm
573 	 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm
574 	 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in
575 	 * sound/core/ when streams are active and during system suspend/resume, streams are
576 	 * already suspended.
577 	 */
578 	int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES];
579 
580 	/*
581 	 * Used to keep track of registered IPC client devices so that they can
582 	 * be removed when the parent SOF module is removed.
583 	 */
584 	struct list_head ipc_client_list;
585 
586 	/* mutex to protect client list */
587 	struct mutex ipc_client_mutex;
588 
589 	/*
590 	 * Used for tracking the IPC client's RX registration for DSP initiated
591 	 * message handling.
592 	 */
593 	struct list_head ipc_rx_handler_list;
594 
595 	/*
596 	 * Used for tracking the IPC client's registration for DSP state change
597 	 * notification
598 	 */
599 	struct list_head fw_state_handler_list;
600 
601 	/* to protect the ipc_rx_handler_list  and  dsp_state_handler_list list */
602 	struct mutex client_event_handler_mutex;
603 
604 	/* quirks to override topology values */
605 	bool mclk_id_override;
606 	u16  mclk_id_quirk; /* same size as in IPC3 definitions */
607 
608 	void *private;			/* core does not touch this */
609 };
610 
611 /*
612  * Device Level.
613  */
614 
615 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
616 int snd_sof_device_remove(struct device *dev);
617 int snd_sof_device_shutdown(struct device *dev);
618 bool snd_sof_device_probe_completed(struct device *dev);
619 
620 int snd_sof_runtime_suspend(struct device *dev);
621 int snd_sof_runtime_resume(struct device *dev);
622 int snd_sof_runtime_idle(struct device *dev);
623 int snd_sof_resume(struct device *dev);
624 int snd_sof_suspend(struct device *dev);
625 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
626 int snd_sof_prepare(struct device *dev);
627 void snd_sof_complete(struct device *dev);
628 
629 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
630 
631 /*
632  * Compress support
633  */
634 extern struct snd_compress_ops sof_compressed_ops;
635 
636 /*
637  * Firmware loading.
638  */
639 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
640 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
641 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
642 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
643 
644 /*
645  * IPC low level APIs.
646  */
647 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
648 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
649 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev);
650 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
snd_sof_ipc_msgs_rx(struct snd_sof_dev * sdev)651 static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
652 {
653 	sdev->ipc->ops->rx_msg(sdev);
654 }
655 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
656 		       void *reply_data, size_t reply_bytes);
657 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
658 			     void *reply_data, size_t reply_bytes);
659 int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
660 		     size_t reply_bytes);
661 
snd_sof_ipc_process_reply(struct snd_sof_dev * sdev,u32 msg_id)662 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id)
663 {
664 	snd_sof_ipc_get_reply(sdev);
665 	snd_sof_ipc_reply(sdev, msg_id);
666 }
667 
668 /*
669  * Trace/debug
670  */
671 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
672 void snd_sof_free_debug(struct snd_sof_dev *sdev);
673 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
674 			     void *base, size_t size,
675 			     const char *name, mode_t mode);
676 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level,
677 			      u32 panic_code, u32 tracep_code, void *oops,
678 			      struct sof_ipc_panic_info *panic_info,
679 			      void *stack, size_t stack_words);
680 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg);
681 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
682 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
683 		enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
684 		const char *name, enum sof_debugfs_access_type access_type);
685 /* Firmware tracing */
686 int sof_fw_trace_init(struct snd_sof_dev *sdev);
687 void sof_fw_trace_free(struct snd_sof_dev *sdev);
688 void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev);
689 void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state);
690 int sof_fw_trace_resume(struct snd_sof_dev *sdev);
691 
692 /*
693  * DSP Architectures.
694  */
sof_stack(struct snd_sof_dev * sdev,const char * level,void * oops,u32 * stack,u32 stack_words)695 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level,
696 			     void *oops, u32 *stack, u32 stack_words)
697 {
698 		sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level,  oops, stack,
699 						  stack_words);
700 }
701 
sof_oops(struct snd_sof_dev * sdev,const char * level,void * oops)702 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops)
703 {
704 	if (sof_dsp_arch_ops(sdev)->dsp_oops)
705 		sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops);
706 }
707 
708 extern const struct dsp_arch_ops sof_xtensa_arch_ops;
709 
710 /*
711  * Firmware state tracking
712  */
713 void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state);
714 
715 /*
716  * Utilities
717  */
718 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
719 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
720 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
721 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
722 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
723 		       void *message, size_t bytes);
724 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
725 		      void *message, size_t bytes);
726 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
727 		    u32 offset, void *src, size_t size);
728 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
729 		   u32 offset, void *dest, size_t size);
730 
731 int sof_ipc_msg_data(struct snd_sof_dev *sdev,
732 		     struct snd_pcm_substream *substream,
733 		     void *p, size_t sz);
734 int sof_set_stream_data_offset(struct snd_sof_dev *sdev,
735 			       struct snd_pcm_substream *substream,
736 			       size_t posn_offset);
737 
738 int sof_stream_pcm_open(struct snd_sof_dev *sdev,
739 			struct snd_pcm_substream *substream);
740 int sof_stream_pcm_close(struct snd_sof_dev *sdev,
741 			 struct snd_pcm_substream *substream);
742 
743 int sof_machine_check(struct snd_sof_dev *sdev);
744 
745 /* SOF client support */
746 #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT)
747 int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id,
748 			    const void *data, size_t size);
749 void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id);
750 int sof_register_clients(struct snd_sof_dev *sdev);
751 void sof_unregister_clients(struct snd_sof_dev *sdev);
752 void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf);
753 void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev);
754 int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state);
755 int sof_resume_clients(struct snd_sof_dev *sdev);
756 #else /* CONFIG_SND_SOC_SOF_CLIENT */
sof_client_dev_register(struct snd_sof_dev * sdev,const char * name,u32 id,const void * data,size_t size)757 static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name,
758 					  u32 id, const void *data, size_t size)
759 {
760 	return 0;
761 }
762 
sof_client_dev_unregister(struct snd_sof_dev * sdev,const char * name,u32 id)763 static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev,
764 					     const char *name, u32 id)
765 {
766 }
767 
sof_register_clients(struct snd_sof_dev * sdev)768 static inline int sof_register_clients(struct snd_sof_dev *sdev)
769 {
770 	return 0;
771 }
772 
sof_unregister_clients(struct snd_sof_dev * sdev)773 static inline  void sof_unregister_clients(struct snd_sof_dev *sdev)
774 {
775 }
776 
sof_client_ipc_rx_dispatcher(struct snd_sof_dev * sdev,void * msg_buf)777 static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf)
778 {
779 }
780 
sof_client_fw_state_dispatcher(struct snd_sof_dev * sdev)781 static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev)
782 {
783 }
784 
sof_suspend_clients(struct snd_sof_dev * sdev,pm_message_t state)785 static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state)
786 {
787 	return 0;
788 }
789 
sof_resume_clients(struct snd_sof_dev * sdev)790 static inline int sof_resume_clients(struct snd_sof_dev *sdev)
791 {
792 	return 0;
793 }
794 #endif /* CONFIG_SND_SOC_SOF_CLIENT */
795 
796 /* Main ops for IPC implementations */
797 extern const struct sof_ipc_ops ipc3_ops;
798 extern const struct sof_ipc_ops ipc4_ops;
799 
800 #endif
801