1 /*
2 * PS3 GPU declarations.
3 *
4 * Copyright 2009 Sony Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program.
17 * If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef _ASM_POWERPC_PS3GPU_H
21 #define _ASM_POWERPC_PS3GPU_H
22
23 #include <linux/mutex.h>
24
25 #include <asm/lv1call.h>
26
27
28 #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
29 #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
30
31 #define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
32 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
33 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
34 #define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603
35
36 #define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32)
37
38 #define L1GPU_DISPLAY_SYNC_HSYNC 1
39 #define L1GPU_DISPLAY_SYNC_VSYNC 2
40
41
42 /* mutex synchronizing GPU accesses and video mode changes */
43 extern struct mutex ps3_gpu_mutex;
44
45
lv1_gpu_display_sync(u64 context_handle,u64 head,u64 ddr_offset)46 static inline int lv1_gpu_display_sync(u64 context_handle, u64 head,
47 u64 ddr_offset)
48 {
49 return lv1_gpu_context_attribute(context_handle,
50 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
51 head, ddr_offset, 0, 0);
52 }
53
lv1_gpu_display_flip(u64 context_handle,u64 head,u64 ddr_offset)54 static inline int lv1_gpu_display_flip(u64 context_handle, u64 head,
55 u64 ddr_offset)
56 {
57 return lv1_gpu_context_attribute(context_handle,
58 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
59 head, ddr_offset, 0, 0);
60 }
61
lv1_gpu_fb_setup(u64 context_handle,u64 xdr_lpar,u64 xdr_size,u64 ioif_offset)62 static inline int lv1_gpu_fb_setup(u64 context_handle, u64 xdr_lpar,
63 u64 xdr_size, u64 ioif_offset)
64 {
65 return lv1_gpu_context_attribute(context_handle,
66 L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
67 xdr_lpar, xdr_size, ioif_offset, 0);
68 }
69
lv1_gpu_fb_blit(u64 context_handle,u64 ddr_offset,u64 ioif_offset,u64 sync_width,u64 pitch)70 static inline int lv1_gpu_fb_blit(u64 context_handle, u64 ddr_offset,
71 u64 ioif_offset, u64 sync_width, u64 pitch)
72 {
73 return lv1_gpu_context_attribute(context_handle,
74 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
75 ddr_offset, ioif_offset, sync_width,
76 pitch);
77 }
78
lv1_gpu_fb_close(u64 context_handle)79 static inline int lv1_gpu_fb_close(u64 context_handle)
80 {
81 return lv1_gpu_context_attribute(context_handle,
82 L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0,
83 0, 0, 0);
84 }
85
86 #endif /* _ASM_POWERPC_PS3GPU_H */
87