1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <linux/blkdev.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/kthread.h>
31 #include <linux/pci.h>
32 #include <linux/spinlock.h>
33 #include <linux/ctype.h>
34 #include <linux/aer.h>
35 #include <linux/slab.h>
36 #include <linux/firmware.h>
37 #include <linux/miscdevice.h>
38 #include <linux/percpu.h>
39 #include <linux/msi.h>
40 #include <linux/irq.h>
41 #include <linux/bitops.h>
42 #include <linux/crash_dump.h>
43 #include <linux/cpu.h>
44 #include <linux/cpuhotplug.h>
45
46 #include <scsi/scsi.h>
47 #include <scsi/scsi_device.h>
48 #include <scsi/scsi_host.h>
49 #include <scsi/scsi_transport_fc.h>
50 #include <scsi/scsi_tcq.h>
51 #include <scsi/fc/fc_fs.h>
52
53 #include "lpfc_hw4.h"
54 #include "lpfc_hw.h"
55 #include "lpfc_sli.h"
56 #include "lpfc_sli4.h"
57 #include "lpfc_nl.h"
58 #include "lpfc_disc.h"
59 #include "lpfc.h"
60 #include "lpfc_scsi.h"
61 #include "lpfc_nvme.h"
62 #include "lpfc_logmsg.h"
63 #include "lpfc_crtn.h"
64 #include "lpfc_vport.h"
65 #include "lpfc_version.h"
66 #include "lpfc_ids.h"
67
68 static enum cpuhp_state lpfc_cpuhp_state;
69 /* Used when mapping IRQ vectors in a driver centric manner */
70 static uint32_t lpfc_present_cpu;
71 static bool lpfc_pldv_detect;
72
73 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
74 static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
75 static void lpfc_cpuhp_add(struct lpfc_hba *phba);
76 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
77 static int lpfc_post_rcv_buf(struct lpfc_hba *);
78 static int lpfc_sli4_queue_verify(struct lpfc_hba *);
79 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
80 static int lpfc_setup_endian_order(struct lpfc_hba *);
81 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
82 static void lpfc_free_els_sgl_list(struct lpfc_hba *);
83 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
84 static void lpfc_init_sgl_list(struct lpfc_hba *);
85 static int lpfc_init_active_sgl_array(struct lpfc_hba *);
86 static void lpfc_free_active_sgl(struct lpfc_hba *);
87 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
88 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
89 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
90 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
91 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
92 static void lpfc_sli4_disable_intr(struct lpfc_hba *);
93 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
94 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
95 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
96 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
97 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *);
98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba);
99
100 static struct scsi_transport_template *lpfc_transport_template = NULL;
101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
102 static DEFINE_IDR(lpfc_hba_index);
103 #define LPFC_NVMET_BUF_POST 254
104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport);
105
106 /**
107 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
108 * @phba: pointer to lpfc hba data structure.
109 *
110 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
111 * mailbox command. It retrieves the revision information from the HBA and
112 * collects the Vital Product Data (VPD) about the HBA for preparing the
113 * configuration of the HBA.
114 *
115 * Return codes:
116 * 0 - success.
117 * -ERESTART - requests the SLI layer to reset the HBA and try again.
118 * Any other value - indicates an error.
119 **/
120 int
lpfc_config_port_prep(struct lpfc_hba * phba)121 lpfc_config_port_prep(struct lpfc_hba *phba)
122 {
123 lpfc_vpd_t *vp = &phba->vpd;
124 int i = 0, rc;
125 LPFC_MBOXQ_t *pmb;
126 MAILBOX_t *mb;
127 char *lpfc_vpd_data = NULL;
128 uint16_t offset = 0;
129 static char licensed[56] =
130 "key unlock for use with gnu public licensed code only\0";
131 static int init_key = 1;
132
133 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
134 if (!pmb) {
135 phba->link_state = LPFC_HBA_ERROR;
136 return -ENOMEM;
137 }
138
139 mb = &pmb->u.mb;
140 phba->link_state = LPFC_INIT_MBX_CMDS;
141
142 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
143 if (init_key) {
144 uint32_t *ptext = (uint32_t *) licensed;
145
146 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
147 *ptext = cpu_to_be32(*ptext);
148 init_key = 0;
149 }
150
151 lpfc_read_nv(phba, pmb);
152 memset((char*)mb->un.varRDnvp.rsvd3, 0,
153 sizeof (mb->un.varRDnvp.rsvd3));
154 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
155 sizeof (licensed));
156
157 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
158
159 if (rc != MBX_SUCCESS) {
160 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
161 "0324 Config Port initialization "
162 "error, mbxCmd x%x READ_NVPARM, "
163 "mbxStatus x%x\n",
164 mb->mbxCommand, mb->mbxStatus);
165 mempool_free(pmb, phba->mbox_mem_pool);
166 return -ERESTART;
167 }
168 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
169 sizeof(phba->wwnn));
170 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
171 sizeof(phba->wwpn));
172 }
173
174 /*
175 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
176 * which was already set in lpfc_get_cfgparam()
177 */
178 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
179
180 /* Setup and issue mailbox READ REV command */
181 lpfc_read_rev(phba, pmb);
182 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
183 if (rc != MBX_SUCCESS) {
184 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
185 "0439 Adapter failed to init, mbxCmd x%x "
186 "READ_REV, mbxStatus x%x\n",
187 mb->mbxCommand, mb->mbxStatus);
188 mempool_free( pmb, phba->mbox_mem_pool);
189 return -ERESTART;
190 }
191
192
193 /*
194 * The value of rr must be 1 since the driver set the cv field to 1.
195 * This setting requires the FW to set all revision fields.
196 */
197 if (mb->un.varRdRev.rr == 0) {
198 vp->rev.rBit = 0;
199 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
200 "0440 Adapter failed to init, READ_REV has "
201 "missing revision information.\n");
202 mempool_free(pmb, phba->mbox_mem_pool);
203 return -ERESTART;
204 }
205
206 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
207 mempool_free(pmb, phba->mbox_mem_pool);
208 return -EINVAL;
209 }
210
211 /* Save information as VPD data */
212 vp->rev.rBit = 1;
213 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
214 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
215 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
216 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
217 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
218 vp->rev.biuRev = mb->un.varRdRev.biuRev;
219 vp->rev.smRev = mb->un.varRdRev.smRev;
220 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
221 vp->rev.endecRev = mb->un.varRdRev.endecRev;
222 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
223 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
224 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
225 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
226 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
227 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
228
229 /* If the sli feature level is less then 9, we must
230 * tear down all RPIs and VPIs on link down if NPIV
231 * is enabled.
232 */
233 if (vp->rev.feaLevelHigh < 9)
234 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
235
236 if (lpfc_is_LC_HBA(phba->pcidev->device))
237 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
238 sizeof (phba->RandomData));
239
240 /* Get adapter VPD information */
241 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
242 if (!lpfc_vpd_data)
243 goto out_free_mbox;
244 do {
245 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
246 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
247
248 if (rc != MBX_SUCCESS) {
249 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
250 "0441 VPD not present on adapter, "
251 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
252 mb->mbxCommand, mb->mbxStatus);
253 mb->un.varDmp.word_cnt = 0;
254 }
255 /* dump mem may return a zero when finished or we got a
256 * mailbox error, either way we are done.
257 */
258 if (mb->un.varDmp.word_cnt == 0)
259 break;
260
261 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
262 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
263 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
264 lpfc_vpd_data + offset,
265 mb->un.varDmp.word_cnt);
266 offset += mb->un.varDmp.word_cnt;
267 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
268
269 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
270
271 kfree(lpfc_vpd_data);
272 out_free_mbox:
273 mempool_free(pmb, phba->mbox_mem_pool);
274 return 0;
275 }
276
277 /**
278 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
279 * @phba: pointer to lpfc hba data structure.
280 * @pmboxq: pointer to the driver internal queue element for mailbox command.
281 *
282 * This is the completion handler for driver's configuring asynchronous event
283 * mailbox command to the device. If the mailbox command returns successfully,
284 * it will set internal async event support flag to 1; otherwise, it will
285 * set internal async event support flag to 0.
286 **/
287 static void
lpfc_config_async_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)288 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
289 {
290 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
291 phba->temp_sensor_support = 1;
292 else
293 phba->temp_sensor_support = 0;
294 mempool_free(pmboxq, phba->mbox_mem_pool);
295 return;
296 }
297
298 /**
299 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
300 * @phba: pointer to lpfc hba data structure.
301 * @pmboxq: pointer to the driver internal queue element for mailbox command.
302 *
303 * This is the completion handler for dump mailbox command for getting
304 * wake up parameters. When this command complete, the response contain
305 * Option rom version of the HBA. This function translate the version number
306 * into a human readable string and store it in OptionROMVersion.
307 **/
308 static void
lpfc_dump_wakeup_param_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)309 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
310 {
311 struct prog_id *prg;
312 uint32_t prog_id_word;
313 char dist = ' ';
314 /* character array used for decoding dist type. */
315 char dist_char[] = "nabx";
316
317 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
318 mempool_free(pmboxq, phba->mbox_mem_pool);
319 return;
320 }
321
322 prg = (struct prog_id *) &prog_id_word;
323
324 /* word 7 contain option rom version */
325 prog_id_word = pmboxq->u.mb.un.varWords[7];
326
327 /* Decode the Option rom version word to a readable string */
328 dist = dist_char[prg->dist];
329
330 if ((prg->dist == 3) && (prg->num == 0))
331 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
332 prg->ver, prg->rev, prg->lev);
333 else
334 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
335 prg->ver, prg->rev, prg->lev,
336 dist, prg->num);
337 mempool_free(pmboxq, phba->mbox_mem_pool);
338 return;
339 }
340
341 /**
342 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
343 * @vport: pointer to lpfc vport data structure.
344 *
345 *
346 * Return codes
347 * None.
348 **/
349 void
lpfc_update_vport_wwn(struct lpfc_vport * vport)350 lpfc_update_vport_wwn(struct lpfc_vport *vport)
351 {
352 struct lpfc_hba *phba = vport->phba;
353
354 /*
355 * If the name is empty or there exists a soft name
356 * then copy the service params name, otherwise use the fc name
357 */
358 if (vport->fc_nodename.u.wwn[0] == 0)
359 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
360 sizeof(struct lpfc_name));
361 else
362 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
363 sizeof(struct lpfc_name));
364
365 /*
366 * If the port name has changed, then set the Param changes flag
367 * to unreg the login
368 */
369 if (vport->fc_portname.u.wwn[0] != 0 &&
370 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
371 sizeof(struct lpfc_name))) {
372 vport->vport_flag |= FAWWPN_PARAM_CHG;
373
374 if (phba->sli_rev == LPFC_SLI_REV4 &&
375 vport->port_type == LPFC_PHYSICAL_PORT &&
376 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
377 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
378 phba->sli4_hba.fawwpn_flag &=
379 ~LPFC_FAWWPN_FABRIC;
380 lpfc_printf_log(phba, KERN_INFO,
381 LOG_SLI | LOG_DISCOVERY | LOG_ELS,
382 "2701 FA-PWWN change WWPN from %llx to "
383 "%llx: vflag x%x fawwpn_flag x%x\n",
384 wwn_to_u64(vport->fc_portname.u.wwn),
385 wwn_to_u64
386 (vport->fc_sparam.portName.u.wwn),
387 vport->vport_flag,
388 phba->sli4_hba.fawwpn_flag);
389 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
390 sizeof(struct lpfc_name));
391 }
392 }
393
394 if (vport->fc_portname.u.wwn[0] == 0)
395 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
396 sizeof(struct lpfc_name));
397 else
398 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
399 sizeof(struct lpfc_name));
400 }
401
402 /**
403 * lpfc_config_port_post - Perform lpfc initialization after config port
404 * @phba: pointer to lpfc hba data structure.
405 *
406 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
407 * command call. It performs all internal resource and state setups on the
408 * port: post IOCB buffers, enable appropriate host interrupt attentions,
409 * ELS ring timers, etc.
410 *
411 * Return codes
412 * 0 - success.
413 * Any other value - error.
414 **/
415 int
lpfc_config_port_post(struct lpfc_hba * phba)416 lpfc_config_port_post(struct lpfc_hba *phba)
417 {
418 struct lpfc_vport *vport = phba->pport;
419 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
420 LPFC_MBOXQ_t *pmb;
421 MAILBOX_t *mb;
422 struct lpfc_dmabuf *mp;
423 struct lpfc_sli *psli = &phba->sli;
424 uint32_t status, timeout;
425 int i, j;
426 int rc;
427
428 spin_lock_irq(&phba->hbalock);
429 /*
430 * If the Config port completed correctly the HBA is not
431 * over heated any more.
432 */
433 if (phba->over_temp_state == HBA_OVER_TEMP)
434 phba->over_temp_state = HBA_NORMAL_TEMP;
435 spin_unlock_irq(&phba->hbalock);
436
437 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
438 if (!pmb) {
439 phba->link_state = LPFC_HBA_ERROR;
440 return -ENOMEM;
441 }
442 mb = &pmb->u.mb;
443
444 /* Get login parameters for NID. */
445 rc = lpfc_read_sparam(phba, pmb, 0);
446 if (rc) {
447 mempool_free(pmb, phba->mbox_mem_pool);
448 return -ENOMEM;
449 }
450
451 pmb->vport = vport;
452 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
453 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
454 "0448 Adapter failed init, mbxCmd x%x "
455 "READ_SPARM mbxStatus x%x\n",
456 mb->mbxCommand, mb->mbxStatus);
457 phba->link_state = LPFC_HBA_ERROR;
458 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
459 return -EIO;
460 }
461
462 mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
463
464 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no
465 * longer needed. Prevent unintended ctx_buf access as the mbox is
466 * reused.
467 */
468 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
469 lpfc_mbuf_free(phba, mp->virt, mp->phys);
470 kfree(mp);
471 pmb->ctx_buf = NULL;
472 lpfc_update_vport_wwn(vport);
473
474 /* Update the fc_host data structures with new wwn. */
475 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
476 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
477 fc_host_max_npiv_vports(shost) = phba->max_vpi;
478
479 /* If no serial number in VPD data, use low 6 bytes of WWNN */
480 /* This should be consolidated into parse_vpd ? - mr */
481 if (phba->SerialNumber[0] == 0) {
482 uint8_t *outptr;
483
484 outptr = &vport->fc_nodename.u.s.IEEE[0];
485 for (i = 0; i < 12; i++) {
486 status = *outptr++;
487 j = ((status & 0xf0) >> 4);
488 if (j <= 9)
489 phba->SerialNumber[i] =
490 (char)((uint8_t) 0x30 + (uint8_t) j);
491 else
492 phba->SerialNumber[i] =
493 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
494 i++;
495 j = (status & 0xf);
496 if (j <= 9)
497 phba->SerialNumber[i] =
498 (char)((uint8_t) 0x30 + (uint8_t) j);
499 else
500 phba->SerialNumber[i] =
501 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
502 }
503 }
504
505 lpfc_read_config(phba, pmb);
506 pmb->vport = vport;
507 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
508 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
509 "0453 Adapter failed to init, mbxCmd x%x "
510 "READ_CONFIG, mbxStatus x%x\n",
511 mb->mbxCommand, mb->mbxStatus);
512 phba->link_state = LPFC_HBA_ERROR;
513 mempool_free( pmb, phba->mbox_mem_pool);
514 return -EIO;
515 }
516
517 /* Check if the port is disabled */
518 lpfc_sli_read_link_ste(phba);
519
520 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
521 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
522 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
523 "3359 HBA queue depth changed from %d to %d\n",
524 phba->cfg_hba_queue_depth,
525 mb->un.varRdConfig.max_xri);
526 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
527 }
528
529 phba->lmt = mb->un.varRdConfig.lmt;
530
531 /* Get the default values for Model Name and Description */
532 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
533
534 phba->link_state = LPFC_LINK_DOWN;
535
536 /* Only process IOCBs on ELS ring till hba_state is READY */
537 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
538 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
539 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
540 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
541
542 /* Post receive buffers for desired rings */
543 if (phba->sli_rev != 3)
544 lpfc_post_rcv_buf(phba);
545
546 /*
547 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
548 */
549 if (phba->intr_type == MSIX) {
550 rc = lpfc_config_msi(phba, pmb);
551 if (rc) {
552 mempool_free(pmb, phba->mbox_mem_pool);
553 return -EIO;
554 }
555 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
556 if (rc != MBX_SUCCESS) {
557 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
558 "0352 Config MSI mailbox command "
559 "failed, mbxCmd x%x, mbxStatus x%x\n",
560 pmb->u.mb.mbxCommand,
561 pmb->u.mb.mbxStatus);
562 mempool_free(pmb, phba->mbox_mem_pool);
563 return -EIO;
564 }
565 }
566
567 spin_lock_irq(&phba->hbalock);
568 /* Initialize ERATT handling flag */
569 phba->hba_flag &= ~HBA_ERATT_HANDLED;
570
571 /* Enable appropriate host interrupts */
572 if (lpfc_readl(phba->HCregaddr, &status)) {
573 spin_unlock_irq(&phba->hbalock);
574 return -EIO;
575 }
576 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
577 if (psli->num_rings > 0)
578 status |= HC_R0INT_ENA;
579 if (psli->num_rings > 1)
580 status |= HC_R1INT_ENA;
581 if (psli->num_rings > 2)
582 status |= HC_R2INT_ENA;
583 if (psli->num_rings > 3)
584 status |= HC_R3INT_ENA;
585
586 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
587 (phba->cfg_poll & DISABLE_FCP_RING_INT))
588 status &= ~(HC_R0INT_ENA);
589
590 writel(status, phba->HCregaddr);
591 readl(phba->HCregaddr); /* flush */
592 spin_unlock_irq(&phba->hbalock);
593
594 /* Set up ring-0 (ELS) timer */
595 timeout = phba->fc_ratov * 2;
596 mod_timer(&vport->els_tmofunc,
597 jiffies + msecs_to_jiffies(1000 * timeout));
598 /* Set up heart beat (HB) timer */
599 mod_timer(&phba->hb_tmofunc,
600 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
601 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO);
602 phba->last_completion_time = jiffies;
603 /* Set up error attention (ERATT) polling timer */
604 mod_timer(&phba->eratt_poll,
605 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
606
607 if (phba->hba_flag & LINK_DISABLED) {
608 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
609 "2598 Adapter Link is disabled.\n");
610 lpfc_down_link(phba, pmb);
611 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
612 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
613 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
614 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
615 "2599 Adapter failed to issue DOWN_LINK"
616 " mbox command rc 0x%x\n", rc);
617
618 mempool_free(pmb, phba->mbox_mem_pool);
619 return -EIO;
620 }
621 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
622 mempool_free(pmb, phba->mbox_mem_pool);
623 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
624 if (rc)
625 return rc;
626 }
627 /* MBOX buffer will be freed in mbox compl */
628 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
629 if (!pmb) {
630 phba->link_state = LPFC_HBA_ERROR;
631 return -ENOMEM;
632 }
633
634 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
635 pmb->mbox_cmpl = lpfc_config_async_cmpl;
636 pmb->vport = phba->pport;
637 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
638
639 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
640 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
641 "0456 Adapter failed to issue "
642 "ASYNCEVT_ENABLE mbox status x%x\n",
643 rc);
644 mempool_free(pmb, phba->mbox_mem_pool);
645 }
646
647 /* Get Option rom version */
648 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
649 if (!pmb) {
650 phba->link_state = LPFC_HBA_ERROR;
651 return -ENOMEM;
652 }
653
654 lpfc_dump_wakeup_param(phba, pmb);
655 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
656 pmb->vport = phba->pport;
657 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
658
659 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
660 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
661 "0435 Adapter failed "
662 "to get Option ROM version status x%x\n", rc);
663 mempool_free(pmb, phba->mbox_mem_pool);
664 }
665
666 return 0;
667 }
668
669 /**
670 * lpfc_sli4_refresh_params - update driver copy of params.
671 * @phba: Pointer to HBA context object.
672 *
673 * This is called to refresh driver copy of dynamic fields from the
674 * common_get_sli4_parameters descriptor.
675 **/
676 int
lpfc_sli4_refresh_params(struct lpfc_hba * phba)677 lpfc_sli4_refresh_params(struct lpfc_hba *phba)
678 {
679 LPFC_MBOXQ_t *mboxq;
680 struct lpfc_mqe *mqe;
681 struct lpfc_sli4_parameters *mbx_sli4_parameters;
682 int length, rc;
683
684 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
685 if (!mboxq)
686 return -ENOMEM;
687
688 mqe = &mboxq->u.mqe;
689 /* Read the port's SLI4 Config Parameters */
690 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
691 sizeof(struct lpfc_sli4_cfg_mhdr));
692 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
693 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
694 length, LPFC_SLI4_MBX_EMBED);
695
696 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
697 if (unlikely(rc)) {
698 mempool_free(mboxq, phba->mbox_mem_pool);
699 return rc;
700 }
701 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
702
703 /* Are we forcing MI off via module parameter? */
704 if (phba->cfg_enable_mi)
705 phba->sli4_hba.pc_sli4_params.mi_ver =
706 bf_get(cfg_mi_ver, mbx_sli4_parameters);
707 else
708 phba->sli4_hba.pc_sli4_params.mi_ver = 0;
709
710 phba->sli4_hba.pc_sli4_params.cmf =
711 bf_get(cfg_cmf, mbx_sli4_parameters);
712 phba->sli4_hba.pc_sli4_params.pls =
713 bf_get(cfg_pvl, mbx_sli4_parameters);
714
715 mempool_free(mboxq, phba->mbox_mem_pool);
716 return rc;
717 }
718
719 /**
720 * lpfc_hba_init_link - Initialize the FC link
721 * @phba: pointer to lpfc hba data structure.
722 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
723 *
724 * This routine will issue the INIT_LINK mailbox command call.
725 * It is available to other drivers through the lpfc_hba data
726 * structure for use as a delayed link up mechanism with the
727 * module parameter lpfc_suppress_link_up.
728 *
729 * Return code
730 * 0 - success
731 * Any other value - error
732 **/
733 static int
lpfc_hba_init_link(struct lpfc_hba * phba,uint32_t flag)734 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
735 {
736 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
737 }
738
739 /**
740 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
741 * @phba: pointer to lpfc hba data structure.
742 * @fc_topology: desired fc topology.
743 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
744 *
745 * This routine will issue the INIT_LINK mailbox command call.
746 * It is available to other drivers through the lpfc_hba data
747 * structure for use as a delayed link up mechanism with the
748 * module parameter lpfc_suppress_link_up.
749 *
750 * Return code
751 * 0 - success
752 * Any other value - error
753 **/
754 int
lpfc_hba_init_link_fc_topology(struct lpfc_hba * phba,uint32_t fc_topology,uint32_t flag)755 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
756 uint32_t flag)
757 {
758 struct lpfc_vport *vport = phba->pport;
759 LPFC_MBOXQ_t *pmb;
760 MAILBOX_t *mb;
761 int rc;
762
763 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
764 if (!pmb) {
765 phba->link_state = LPFC_HBA_ERROR;
766 return -ENOMEM;
767 }
768 mb = &pmb->u.mb;
769 pmb->vport = vport;
770
771 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
772 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
773 !(phba->lmt & LMT_1Gb)) ||
774 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
775 !(phba->lmt & LMT_2Gb)) ||
776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
777 !(phba->lmt & LMT_4Gb)) ||
778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
779 !(phba->lmt & LMT_8Gb)) ||
780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
781 !(phba->lmt & LMT_10Gb)) ||
782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
783 !(phba->lmt & LMT_16Gb)) ||
784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
785 !(phba->lmt & LMT_32Gb)) ||
786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
787 !(phba->lmt & LMT_64Gb))) {
788 /* Reset link speed to auto */
789 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
790 "1302 Invalid speed for this board:%d "
791 "Reset link speed to auto.\n",
792 phba->cfg_link_speed);
793 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
794 }
795 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
796 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
797 if (phba->sli_rev < LPFC_SLI_REV4)
798 lpfc_set_loopback_flag(phba);
799 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
800 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
801 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
802 "0498 Adapter failed to init, mbxCmd x%x "
803 "INIT_LINK, mbxStatus x%x\n",
804 mb->mbxCommand, mb->mbxStatus);
805 if (phba->sli_rev <= LPFC_SLI_REV3) {
806 /* Clear all interrupt enable conditions */
807 writel(0, phba->HCregaddr);
808 readl(phba->HCregaddr); /* flush */
809 /* Clear all pending interrupts */
810 writel(0xffffffff, phba->HAregaddr);
811 readl(phba->HAregaddr); /* flush */
812 }
813 phba->link_state = LPFC_HBA_ERROR;
814 if (rc != MBX_BUSY || flag == MBX_POLL)
815 mempool_free(pmb, phba->mbox_mem_pool);
816 return -EIO;
817 }
818 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
819 if (flag == MBX_POLL)
820 mempool_free(pmb, phba->mbox_mem_pool);
821
822 return 0;
823 }
824
825 /**
826 * lpfc_hba_down_link - this routine downs the FC link
827 * @phba: pointer to lpfc hba data structure.
828 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
829 *
830 * This routine will issue the DOWN_LINK mailbox command call.
831 * It is available to other drivers through the lpfc_hba data
832 * structure for use to stop the link.
833 *
834 * Return code
835 * 0 - success
836 * Any other value - error
837 **/
838 static int
lpfc_hba_down_link(struct lpfc_hba * phba,uint32_t flag)839 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
840 {
841 LPFC_MBOXQ_t *pmb;
842 int rc;
843
844 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
845 if (!pmb) {
846 phba->link_state = LPFC_HBA_ERROR;
847 return -ENOMEM;
848 }
849
850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
851 "0491 Adapter Link is disabled.\n");
852 lpfc_down_link(phba, pmb);
853 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
854 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
855 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
856 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
857 "2522 Adapter failed to issue DOWN_LINK"
858 " mbox command rc 0x%x\n", rc);
859
860 mempool_free(pmb, phba->mbox_mem_pool);
861 return -EIO;
862 }
863 if (flag == MBX_POLL)
864 mempool_free(pmb, phba->mbox_mem_pool);
865
866 return 0;
867 }
868
869 /**
870 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
871 * @phba: pointer to lpfc HBA data structure.
872 *
873 * This routine will do LPFC uninitialization before the HBA is reset when
874 * bringing down the SLI Layer.
875 *
876 * Return codes
877 * 0 - success.
878 * Any other value - error.
879 **/
880 int
lpfc_hba_down_prep(struct lpfc_hba * phba)881 lpfc_hba_down_prep(struct lpfc_hba *phba)
882 {
883 struct lpfc_vport **vports;
884 int i;
885
886 if (phba->sli_rev <= LPFC_SLI_REV3) {
887 /* Disable interrupts */
888 writel(0, phba->HCregaddr);
889 readl(phba->HCregaddr); /* flush */
890 }
891
892 if (phba->pport->load_flag & FC_UNLOADING)
893 lpfc_cleanup_discovery_resources(phba->pport);
894 else {
895 vports = lpfc_create_vport_work_array(phba);
896 if (vports != NULL)
897 for (i = 0; i <= phba->max_vports &&
898 vports[i] != NULL; i++)
899 lpfc_cleanup_discovery_resources(vports[i]);
900 lpfc_destroy_vport_work_array(phba, vports);
901 }
902 return 0;
903 }
904
905 /**
906 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
907 * rspiocb which got deferred
908 *
909 * @phba: pointer to lpfc HBA data structure.
910 *
911 * This routine will cleanup completed slow path events after HBA is reset
912 * when bringing down the SLI Layer.
913 *
914 *
915 * Return codes
916 * void.
917 **/
918 static void
lpfc_sli4_free_sp_events(struct lpfc_hba * phba)919 lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
920 {
921 struct lpfc_iocbq *rspiocbq;
922 struct hbq_dmabuf *dmabuf;
923 struct lpfc_cq_event *cq_event;
924
925 spin_lock_irq(&phba->hbalock);
926 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
927 spin_unlock_irq(&phba->hbalock);
928
929 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
930 /* Get the response iocb from the head of work queue */
931 spin_lock_irq(&phba->hbalock);
932 list_remove_head(&phba->sli4_hba.sp_queue_event,
933 cq_event, struct lpfc_cq_event, list);
934 spin_unlock_irq(&phba->hbalock);
935
936 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
937 case CQE_CODE_COMPL_WQE:
938 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
939 cq_event);
940 lpfc_sli_release_iocbq(phba, rspiocbq);
941 break;
942 case CQE_CODE_RECEIVE:
943 case CQE_CODE_RECEIVE_V1:
944 dmabuf = container_of(cq_event, struct hbq_dmabuf,
945 cq_event);
946 lpfc_in_buf_free(phba, &dmabuf->dbuf);
947 }
948 }
949 }
950
951 /**
952 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
953 * @phba: pointer to lpfc HBA data structure.
954 *
955 * This routine will cleanup posted ELS buffers after the HBA is reset
956 * when bringing down the SLI Layer.
957 *
958 *
959 * Return codes
960 * void.
961 **/
962 static void
lpfc_hba_free_post_buf(struct lpfc_hba * phba)963 lpfc_hba_free_post_buf(struct lpfc_hba *phba)
964 {
965 struct lpfc_sli *psli = &phba->sli;
966 struct lpfc_sli_ring *pring;
967 struct lpfc_dmabuf *mp, *next_mp;
968 LIST_HEAD(buflist);
969 int count;
970
971 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
972 lpfc_sli_hbqbuf_free_all(phba);
973 else {
974 /* Cleanup preposted buffers on the ELS ring */
975 pring = &psli->sli3_ring[LPFC_ELS_RING];
976 spin_lock_irq(&phba->hbalock);
977 list_splice_init(&pring->postbufq, &buflist);
978 spin_unlock_irq(&phba->hbalock);
979
980 count = 0;
981 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
982 list_del(&mp->list);
983 count++;
984 lpfc_mbuf_free(phba, mp->virt, mp->phys);
985 kfree(mp);
986 }
987
988 spin_lock_irq(&phba->hbalock);
989 pring->postbufq_cnt -= count;
990 spin_unlock_irq(&phba->hbalock);
991 }
992 }
993
994 /**
995 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
996 * @phba: pointer to lpfc HBA data structure.
997 *
998 * This routine will cleanup the txcmplq after the HBA is reset when bringing
999 * down the SLI Layer.
1000 *
1001 * Return codes
1002 * void
1003 **/
1004 static void
lpfc_hba_clean_txcmplq(struct lpfc_hba * phba)1005 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
1006 {
1007 struct lpfc_sli *psli = &phba->sli;
1008 struct lpfc_queue *qp = NULL;
1009 struct lpfc_sli_ring *pring;
1010 LIST_HEAD(completions);
1011 int i;
1012 struct lpfc_iocbq *piocb, *next_iocb;
1013
1014 if (phba->sli_rev != LPFC_SLI_REV4) {
1015 for (i = 0; i < psli->num_rings; i++) {
1016 pring = &psli->sli3_ring[i];
1017 spin_lock_irq(&phba->hbalock);
1018 /* At this point in time the HBA is either reset or DOA
1019 * Nothing should be on txcmplq as it will
1020 * NEVER complete.
1021 */
1022 list_splice_init(&pring->txcmplq, &completions);
1023 pring->txcmplq_cnt = 0;
1024 spin_unlock_irq(&phba->hbalock);
1025
1026 lpfc_sli_abort_iocb_ring(phba, pring);
1027 }
1028 /* Cancel all the IOCBs from the completions list */
1029 lpfc_sli_cancel_iocbs(phba, &completions,
1030 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1031 return;
1032 }
1033 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1034 pring = qp->pring;
1035 if (!pring)
1036 continue;
1037 spin_lock_irq(&pring->ring_lock);
1038 list_for_each_entry_safe(piocb, next_iocb,
1039 &pring->txcmplq, list)
1040 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ;
1041 list_splice_init(&pring->txcmplq, &completions);
1042 pring->txcmplq_cnt = 0;
1043 spin_unlock_irq(&pring->ring_lock);
1044 lpfc_sli_abort_iocb_ring(phba, pring);
1045 }
1046 /* Cancel all the IOCBs from the completions list */
1047 lpfc_sli_cancel_iocbs(phba, &completions,
1048 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1049 }
1050
1051 /**
1052 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1053 * @phba: pointer to lpfc HBA data structure.
1054 *
1055 * This routine will do uninitialization after the HBA is reset when bring
1056 * down the SLI Layer.
1057 *
1058 * Return codes
1059 * 0 - success.
1060 * Any other value - error.
1061 **/
1062 static int
lpfc_hba_down_post_s3(struct lpfc_hba * phba)1063 lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1064 {
1065 lpfc_hba_free_post_buf(phba);
1066 lpfc_hba_clean_txcmplq(phba);
1067 return 0;
1068 }
1069
1070 /**
1071 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1072 * @phba: pointer to lpfc HBA data structure.
1073 *
1074 * This routine will do uninitialization after the HBA is reset when bring
1075 * down the SLI Layer.
1076 *
1077 * Return codes
1078 * 0 - success.
1079 * Any other value - error.
1080 **/
1081 static int
lpfc_hba_down_post_s4(struct lpfc_hba * phba)1082 lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1083 {
1084 struct lpfc_io_buf *psb, *psb_next;
1085 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
1086 struct lpfc_sli4_hdw_queue *qp;
1087 LIST_HEAD(aborts);
1088 LIST_HEAD(nvme_aborts);
1089 LIST_HEAD(nvmet_aborts);
1090 struct lpfc_sglq *sglq_entry = NULL;
1091 int cnt, idx;
1092
1093
1094 lpfc_sli_hbqbuf_free_all(phba);
1095 lpfc_hba_clean_txcmplq(phba);
1096
1097 /* At this point in time the HBA is either reset or DOA. Either
1098 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1099 * on the lpfc_els_sgl_list so that it can either be freed if the
1100 * driver is unloading or reposted if the driver is restarting
1101 * the port.
1102 */
1103
1104 /* sgl_list_lock required because worker thread uses this
1105 * list.
1106 */
1107 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1108 list_for_each_entry(sglq_entry,
1109 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1110 sglq_entry->state = SGL_FREED;
1111
1112 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1113 &phba->sli4_hba.lpfc_els_sgl_list);
1114
1115
1116 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1117
1118 /* abts_xxxx_buf_list_lock required because worker thread uses this
1119 * list.
1120 */
1121 spin_lock_irq(&phba->hbalock);
1122 cnt = 0;
1123 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1124 qp = &phba->sli4_hba.hdwq[idx];
1125
1126 spin_lock(&qp->abts_io_buf_list_lock);
1127 list_splice_init(&qp->lpfc_abts_io_buf_list,
1128 &aborts);
1129
1130 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1131 psb->pCmd = NULL;
1132 psb->status = IOSTAT_SUCCESS;
1133 cnt++;
1134 }
1135 spin_lock(&qp->io_buf_list_put_lock);
1136 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1137 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1138 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1139 qp->abts_scsi_io_bufs = 0;
1140 qp->abts_nvme_io_bufs = 0;
1141 spin_unlock(&qp->io_buf_list_put_lock);
1142 spin_unlock(&qp->abts_io_buf_list_lock);
1143 }
1144 spin_unlock_irq(&phba->hbalock);
1145
1146 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1147 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1148 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1149 &nvmet_aborts);
1150 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1151 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1152 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
1153 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1154 }
1155 }
1156
1157 lpfc_sli4_free_sp_events(phba);
1158 return cnt;
1159 }
1160
1161 /**
1162 * lpfc_hba_down_post - Wrapper func for hba down post routine
1163 * @phba: pointer to lpfc HBA data structure.
1164 *
1165 * This routine wraps the actual SLI3 or SLI4 routine for performing
1166 * uninitialization after the HBA is reset when bring down the SLI Layer.
1167 *
1168 * Return codes
1169 * 0 - success.
1170 * Any other value - error.
1171 **/
1172 int
lpfc_hba_down_post(struct lpfc_hba * phba)1173 lpfc_hba_down_post(struct lpfc_hba *phba)
1174 {
1175 return (*phba->lpfc_hba_down_post)(phba);
1176 }
1177
1178 /**
1179 * lpfc_hb_timeout - The HBA-timer timeout handler
1180 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1181 *
1182 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1183 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1184 * work-port-events bitmap and the worker thread is notified. This timeout
1185 * event will be used by the worker thread to invoke the actual timeout
1186 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1187 * be performed in the timeout handler and the HBA timeout event bit shall
1188 * be cleared by the worker thread after it has taken the event bitmap out.
1189 **/
1190 static void
lpfc_hb_timeout(struct timer_list * t)1191 lpfc_hb_timeout(struct timer_list *t)
1192 {
1193 struct lpfc_hba *phba;
1194 uint32_t tmo_posted;
1195 unsigned long iflag;
1196
1197 phba = from_timer(phba, t, hb_tmofunc);
1198
1199 /* Check for heart beat timeout conditions */
1200 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1201 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1202 if (!tmo_posted)
1203 phba->pport->work_port_events |= WORKER_HB_TMO;
1204 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1205
1206 /* Tell the worker thread there is work to do */
1207 if (!tmo_posted)
1208 lpfc_worker_wake_up(phba);
1209 return;
1210 }
1211
1212 /**
1213 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1214 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1215 *
1216 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1217 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1218 * work-port-events bitmap and the worker thread is notified. This timeout
1219 * event will be used by the worker thread to invoke the actual timeout
1220 * handler routine, lpfc_rrq_handler. Any periodical operations will
1221 * be performed in the timeout handler and the RRQ timeout event bit shall
1222 * be cleared by the worker thread after it has taken the event bitmap out.
1223 **/
1224 static void
lpfc_rrq_timeout(struct timer_list * t)1225 lpfc_rrq_timeout(struct timer_list *t)
1226 {
1227 struct lpfc_hba *phba;
1228 unsigned long iflag;
1229
1230 phba = from_timer(phba, t, rrq_tmr);
1231 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1232 if (!(phba->pport->load_flag & FC_UNLOADING))
1233 phba->hba_flag |= HBA_RRQ_ACTIVE;
1234 else
1235 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1236 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1237
1238 if (!(phba->pport->load_flag & FC_UNLOADING))
1239 lpfc_worker_wake_up(phba);
1240 }
1241
1242 /**
1243 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1244 * @phba: pointer to lpfc hba data structure.
1245 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1246 *
1247 * This is the callback function to the lpfc heart-beat mailbox command.
1248 * If configured, the lpfc driver issues the heart-beat mailbox command to
1249 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1250 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1251 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1252 * heart-beat outstanding state. Once the mailbox command comes back and
1253 * no error conditions detected, the heart-beat mailbox command timer is
1254 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1255 * state is cleared for the next heart-beat. If the timer expired with the
1256 * heart-beat outstanding state set, the driver will put the HBA offline.
1257 **/
1258 static void
lpfc_hb_mbox_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)1259 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1260 {
1261 unsigned long drvr_flag;
1262
1263 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1264 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO);
1265 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1266
1267 /* Check and reset heart-beat timer if necessary */
1268 mempool_free(pmboxq, phba->mbox_mem_pool);
1269 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1270 !(phba->link_state == LPFC_HBA_ERROR) &&
1271 !(phba->pport->load_flag & FC_UNLOADING))
1272 mod_timer(&phba->hb_tmofunc,
1273 jiffies +
1274 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1275 return;
1276 }
1277
1278 /*
1279 * lpfc_idle_stat_delay_work - idle_stat tracking
1280 *
1281 * This routine tracks per-cq idle_stat and determines polling decisions.
1282 *
1283 * Return codes:
1284 * None
1285 **/
1286 static void
lpfc_idle_stat_delay_work(struct work_struct * work)1287 lpfc_idle_stat_delay_work(struct work_struct *work)
1288 {
1289 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1290 struct lpfc_hba,
1291 idle_stat_delay_work);
1292 struct lpfc_queue *cq;
1293 struct lpfc_sli4_hdw_queue *hdwq;
1294 struct lpfc_idle_stat *idle_stat;
1295 u32 i, idle_percent;
1296 u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
1297
1298 if (phba->pport->load_flag & FC_UNLOADING)
1299 return;
1300
1301 if (phba->link_state == LPFC_HBA_ERROR ||
1302 phba->pport->fc_flag & FC_OFFLINE_MODE ||
1303 phba->cmf_active_mode != LPFC_CFG_OFF)
1304 goto requeue;
1305
1306 for_each_present_cpu(i) {
1307 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1308 cq = hdwq->io_cq;
1309
1310 /* Skip if we've already handled this cq's primary CPU */
1311 if (cq->chann != i)
1312 continue;
1313
1314 idle_stat = &phba->sli4_hba.idle_stat[i];
1315
1316 /* get_cpu_idle_time returns values as running counters. Thus,
1317 * to know the amount for this period, the prior counter values
1318 * need to be subtracted from the current counter values.
1319 * From there, the idle time stat can be calculated as a
1320 * percentage of 100 - the sum of the other consumption times.
1321 */
1322 wall_idle = get_cpu_idle_time(i, &wall, 1);
1323 diff_idle = wall_idle - idle_stat->prev_idle;
1324 diff_wall = wall - idle_stat->prev_wall;
1325
1326 if (diff_wall <= diff_idle)
1327 busy_time = 0;
1328 else
1329 busy_time = diff_wall - diff_idle;
1330
1331 idle_percent = div64_u64(100 * busy_time, diff_wall);
1332 idle_percent = 100 - idle_percent;
1333
1334 if (idle_percent < 15)
1335 cq->poll_mode = LPFC_QUEUE_WORK;
1336 else
1337 cq->poll_mode = LPFC_IRQ_POLL;
1338
1339 idle_stat->prev_idle = wall_idle;
1340 idle_stat->prev_wall = wall;
1341 }
1342
1343 requeue:
1344 schedule_delayed_work(&phba->idle_stat_delay_work,
1345 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
1346 }
1347
1348 static void
lpfc_hb_eq_delay_work(struct work_struct * work)1349 lpfc_hb_eq_delay_work(struct work_struct *work)
1350 {
1351 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1352 struct lpfc_hba, eq_delay_work);
1353 struct lpfc_eq_intr_info *eqi, *eqi_new;
1354 struct lpfc_queue *eq, *eq_next;
1355 unsigned char *ena_delay = NULL;
1356 uint32_t usdelay;
1357 int i;
1358
1359 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING)
1360 return;
1361
1362 if (phba->link_state == LPFC_HBA_ERROR ||
1363 phba->pport->fc_flag & FC_OFFLINE_MODE)
1364 goto requeue;
1365
1366 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1367 GFP_KERNEL);
1368 if (!ena_delay)
1369 goto requeue;
1370
1371 for (i = 0; i < phba->cfg_irq_chann; i++) {
1372 /* Get the EQ corresponding to the IRQ vector */
1373 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1374 if (!eq)
1375 continue;
1376 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
1377 eq->q_flag &= ~HBA_EQ_DELAY_CHK;
1378 ena_delay[eq->last_cpu] = 1;
1379 }
1380 }
1381
1382 for_each_present_cpu(i) {
1383 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1384 if (ena_delay[i]) {
1385 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
1386 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1387 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1388 } else {
1389 usdelay = 0;
1390 }
1391
1392 eqi->icnt = 0;
1393
1394 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1395 if (unlikely(eq->last_cpu != i)) {
1396 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1397 eq->last_cpu);
1398 list_move_tail(&eq->cpu_list, &eqi_new->list);
1399 continue;
1400 }
1401 if (usdelay != eq->q_mode)
1402 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1403 usdelay);
1404 }
1405 }
1406
1407 kfree(ena_delay);
1408
1409 requeue:
1410 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1411 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1412 }
1413
1414 /**
1415 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1416 * @phba: pointer to lpfc hba data structure.
1417 *
1418 * For each heartbeat, this routine does some heuristic methods to adjust
1419 * XRI distribution. The goal is to fully utilize free XRIs.
1420 **/
lpfc_hb_mxp_handler(struct lpfc_hba * phba)1421 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1422 {
1423 u32 i;
1424 u32 hwq_count;
1425
1426 hwq_count = phba->cfg_hdw_queue;
1427 for (i = 0; i < hwq_count; i++) {
1428 /* Adjust XRIs in private pool */
1429 lpfc_adjust_pvt_pool_count(phba, i);
1430
1431 /* Adjust high watermark */
1432 lpfc_adjust_high_watermark(phba, i);
1433
1434 #ifdef LPFC_MXP_STAT
1435 /* Snapshot pbl, pvt and busy count */
1436 lpfc_snapshot_mxp(phba, i);
1437 #endif
1438 }
1439 }
1440
1441 /**
1442 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command
1443 * @phba: pointer to lpfc hba data structure.
1444 *
1445 * If a HB mbox is not already in progrees, this routine will allocate
1446 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command,
1447 * and issue it. The HBA_HBEAT_INP flag means the command is in progress.
1448 **/
1449 int
lpfc_issue_hb_mbox(struct lpfc_hba * phba)1450 lpfc_issue_hb_mbox(struct lpfc_hba *phba)
1451 {
1452 LPFC_MBOXQ_t *pmboxq;
1453 int retval;
1454
1455 /* Is a Heartbeat mbox already in progress */
1456 if (phba->hba_flag & HBA_HBEAT_INP)
1457 return 0;
1458
1459 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1460 if (!pmboxq)
1461 return -ENOMEM;
1462
1463 lpfc_heart_beat(phba, pmboxq);
1464 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1465 pmboxq->vport = phba->pport;
1466 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
1467
1468 if (retval != MBX_BUSY && retval != MBX_SUCCESS) {
1469 mempool_free(pmboxq, phba->mbox_mem_pool);
1470 return -ENXIO;
1471 }
1472 phba->hba_flag |= HBA_HBEAT_INP;
1473
1474 return 0;
1475 }
1476
1477 /**
1478 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command
1479 * @phba: pointer to lpfc hba data structure.
1480 *
1481 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO
1482 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless
1483 * of the value of lpfc_enable_hba_heartbeat.
1484 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always
1485 * try to issue a MBX_HEARTBEAT mbox command.
1486 **/
1487 void
lpfc_issue_hb_tmo(struct lpfc_hba * phba)1488 lpfc_issue_hb_tmo(struct lpfc_hba *phba)
1489 {
1490 if (phba->cfg_enable_hba_heartbeat)
1491 return;
1492 phba->hba_flag |= HBA_HBEAT_TMO;
1493 }
1494
1495 /**
1496 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1497 * @phba: pointer to lpfc hba data structure.
1498 *
1499 * This is the actual HBA-timer timeout handler to be invoked by the worker
1500 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1501 * handler performs any periodic operations needed for the device. If such
1502 * periodic event has already been attended to either in the interrupt handler
1503 * or by processing slow-ring or fast-ring events within the HBA-timer
1504 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1505 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1506 * is configured and there is no heart-beat mailbox command outstanding, a
1507 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1508 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1509 * to offline.
1510 **/
1511 void
lpfc_hb_timeout_handler(struct lpfc_hba * phba)1512 lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1513 {
1514 struct lpfc_vport **vports;
1515 struct lpfc_dmabuf *buf_ptr;
1516 int retval = 0;
1517 int i, tmo;
1518 struct lpfc_sli *psli = &phba->sli;
1519 LIST_HEAD(completions);
1520
1521 if (phba->cfg_xri_rebalancing) {
1522 /* Multi-XRI pools handler */
1523 lpfc_hb_mxp_handler(phba);
1524 }
1525
1526 vports = lpfc_create_vport_work_array(phba);
1527 if (vports != NULL)
1528 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1529 lpfc_rcv_seq_check_edtov(vports[i]);
1530 lpfc_fdmi_change_check(vports[i]);
1531 }
1532 lpfc_destroy_vport_work_array(phba, vports);
1533
1534 if ((phba->link_state == LPFC_HBA_ERROR) ||
1535 (phba->pport->load_flag & FC_UNLOADING) ||
1536 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1537 return;
1538
1539 if (phba->elsbuf_cnt &&
1540 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1541 spin_lock_irq(&phba->hbalock);
1542 list_splice_init(&phba->elsbuf, &completions);
1543 phba->elsbuf_cnt = 0;
1544 phba->elsbuf_prev_cnt = 0;
1545 spin_unlock_irq(&phba->hbalock);
1546
1547 while (!list_empty(&completions)) {
1548 list_remove_head(&completions, buf_ptr,
1549 struct lpfc_dmabuf, list);
1550 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1551 kfree(buf_ptr);
1552 }
1553 }
1554 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1555
1556 /* If there is no heart beat outstanding, issue a heartbeat command */
1557 if (phba->cfg_enable_hba_heartbeat) {
1558 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */
1559 spin_lock_irq(&phba->pport->work_port_lock);
1560 if (time_after(phba->last_completion_time +
1561 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1562 jiffies)) {
1563 spin_unlock_irq(&phba->pport->work_port_lock);
1564 if (phba->hba_flag & HBA_HBEAT_INP)
1565 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1566 else
1567 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1568 goto out;
1569 }
1570 spin_unlock_irq(&phba->pport->work_port_lock);
1571
1572 /* Check if a MBX_HEARTBEAT is already in progress */
1573 if (phba->hba_flag & HBA_HBEAT_INP) {
1574 /*
1575 * If heart beat timeout called with HBA_HBEAT_INP set
1576 * we need to give the hb mailbox cmd a chance to
1577 * complete or TMO.
1578 */
1579 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1580 "0459 Adapter heartbeat still outstanding: "
1581 "last compl time was %d ms.\n",
1582 jiffies_to_msecs(jiffies
1583 - phba->last_completion_time));
1584 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1585 } else {
1586 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1587 (list_empty(&psli->mboxq))) {
1588
1589 retval = lpfc_issue_hb_mbox(phba);
1590 if (retval) {
1591 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1592 goto out;
1593 }
1594 phba->skipped_hb = 0;
1595 } else if (time_before_eq(phba->last_completion_time,
1596 phba->skipped_hb)) {
1597 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1598 "2857 Last completion time not "
1599 " updated in %d ms\n",
1600 jiffies_to_msecs(jiffies
1601 - phba->last_completion_time));
1602 } else
1603 phba->skipped_hb = jiffies;
1604
1605 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1606 goto out;
1607 }
1608 } else {
1609 /* Check to see if we want to force a MBX_HEARTBEAT */
1610 if (phba->hba_flag & HBA_HBEAT_TMO) {
1611 retval = lpfc_issue_hb_mbox(phba);
1612 if (retval)
1613 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1614 else
1615 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1616 goto out;
1617 }
1618 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1619 }
1620 out:
1621 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo));
1622 }
1623
1624 /**
1625 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1626 * @phba: pointer to lpfc hba data structure.
1627 *
1628 * This routine is called to bring the HBA offline when HBA hardware error
1629 * other than Port Error 6 has been detected.
1630 **/
1631 static void
lpfc_offline_eratt(struct lpfc_hba * phba)1632 lpfc_offline_eratt(struct lpfc_hba *phba)
1633 {
1634 struct lpfc_sli *psli = &phba->sli;
1635
1636 spin_lock_irq(&phba->hbalock);
1637 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1638 spin_unlock_irq(&phba->hbalock);
1639 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1640
1641 lpfc_offline(phba);
1642 lpfc_reset_barrier(phba);
1643 spin_lock_irq(&phba->hbalock);
1644 lpfc_sli_brdreset(phba);
1645 spin_unlock_irq(&phba->hbalock);
1646 lpfc_hba_down_post(phba);
1647 lpfc_sli_brdready(phba, HS_MBRDY);
1648 lpfc_unblock_mgmt_io(phba);
1649 phba->link_state = LPFC_HBA_ERROR;
1650 return;
1651 }
1652
1653 /**
1654 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1655 * @phba: pointer to lpfc hba data structure.
1656 *
1657 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1658 * other than Port Error 6 has been detected.
1659 **/
1660 void
lpfc_sli4_offline_eratt(struct lpfc_hba * phba)1661 lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1662 {
1663 spin_lock_irq(&phba->hbalock);
1664 if (phba->link_state == LPFC_HBA_ERROR &&
1665 test_bit(HBA_PCI_ERR, &phba->bit_flags)) {
1666 spin_unlock_irq(&phba->hbalock);
1667 return;
1668 }
1669 phba->link_state = LPFC_HBA_ERROR;
1670 spin_unlock_irq(&phba->hbalock);
1671
1672 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1673 lpfc_sli_flush_io_rings(phba);
1674 lpfc_offline(phba);
1675 lpfc_hba_down_post(phba);
1676 lpfc_unblock_mgmt_io(phba);
1677 }
1678
1679 /**
1680 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1681 * @phba: pointer to lpfc hba data structure.
1682 *
1683 * This routine is invoked to handle the deferred HBA hardware error
1684 * conditions. This type of error is indicated by HBA by setting ER1
1685 * and another ER bit in the host status register. The driver will
1686 * wait until the ER1 bit clears before handling the error condition.
1687 **/
1688 static void
lpfc_handle_deferred_eratt(struct lpfc_hba * phba)1689 lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1690 {
1691 uint32_t old_host_status = phba->work_hs;
1692 struct lpfc_sli *psli = &phba->sli;
1693
1694 /* If the pci channel is offline, ignore possible errors,
1695 * since we cannot communicate with the pci card anyway.
1696 */
1697 if (pci_channel_offline(phba->pcidev)) {
1698 spin_lock_irq(&phba->hbalock);
1699 phba->hba_flag &= ~DEFER_ERATT;
1700 spin_unlock_irq(&phba->hbalock);
1701 return;
1702 }
1703
1704 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1705 "0479 Deferred Adapter Hardware Error "
1706 "Data: x%x x%x x%x\n",
1707 phba->work_hs, phba->work_status[0],
1708 phba->work_status[1]);
1709
1710 spin_lock_irq(&phba->hbalock);
1711 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1712 spin_unlock_irq(&phba->hbalock);
1713
1714
1715 /*
1716 * Firmware stops when it triggred erratt. That could cause the I/Os
1717 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1718 * SCSI layer retry it after re-establishing link.
1719 */
1720 lpfc_sli_abort_fcp_rings(phba);
1721
1722 /*
1723 * There was a firmware error. Take the hba offline and then
1724 * attempt to restart it.
1725 */
1726 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1727 lpfc_offline(phba);
1728
1729 /* Wait for the ER1 bit to clear.*/
1730 while (phba->work_hs & HS_FFER1) {
1731 msleep(100);
1732 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1733 phba->work_hs = UNPLUG_ERR ;
1734 break;
1735 }
1736 /* If driver is unloading let the worker thread continue */
1737 if (phba->pport->load_flag & FC_UNLOADING) {
1738 phba->work_hs = 0;
1739 break;
1740 }
1741 }
1742
1743 /*
1744 * This is to ptrotect against a race condition in which
1745 * first write to the host attention register clear the
1746 * host status register.
1747 */
1748 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1749 phba->work_hs = old_host_status & ~HS_FFER1;
1750
1751 spin_lock_irq(&phba->hbalock);
1752 phba->hba_flag &= ~DEFER_ERATT;
1753 spin_unlock_irq(&phba->hbalock);
1754 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1755 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1756 }
1757
1758 static void
lpfc_board_errevt_to_mgmt(struct lpfc_hba * phba)1759 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1760 {
1761 struct lpfc_board_event_header board_event;
1762 struct Scsi_Host *shost;
1763
1764 board_event.event_type = FC_REG_BOARD_EVENT;
1765 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1766 shost = lpfc_shost_from_vport(phba->pport);
1767 fc_host_post_vendor_event(shost, fc_get_event_number(),
1768 sizeof(board_event),
1769 (char *) &board_event,
1770 LPFC_NL_VENDOR_ID);
1771 }
1772
1773 /**
1774 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1775 * @phba: pointer to lpfc hba data structure.
1776 *
1777 * This routine is invoked to handle the following HBA hardware error
1778 * conditions:
1779 * 1 - HBA error attention interrupt
1780 * 2 - DMA ring index out of range
1781 * 3 - Mailbox command came back as unknown
1782 **/
1783 static void
lpfc_handle_eratt_s3(struct lpfc_hba * phba)1784 lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1785 {
1786 struct lpfc_vport *vport = phba->pport;
1787 struct lpfc_sli *psli = &phba->sli;
1788 uint32_t event_data;
1789 unsigned long temperature;
1790 struct temp_event temp_event_data;
1791 struct Scsi_Host *shost;
1792
1793 /* If the pci channel is offline, ignore possible errors,
1794 * since we cannot communicate with the pci card anyway.
1795 */
1796 if (pci_channel_offline(phba->pcidev)) {
1797 spin_lock_irq(&phba->hbalock);
1798 phba->hba_flag &= ~DEFER_ERATT;
1799 spin_unlock_irq(&phba->hbalock);
1800 return;
1801 }
1802
1803 /* If resets are disabled then leave the HBA alone and return */
1804 if (!phba->cfg_enable_hba_reset)
1805 return;
1806
1807 /* Send an internal error event to mgmt application */
1808 lpfc_board_errevt_to_mgmt(phba);
1809
1810 if (phba->hba_flag & DEFER_ERATT)
1811 lpfc_handle_deferred_eratt(phba);
1812
1813 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1814 if (phba->work_hs & HS_FFER6)
1815 /* Re-establishing Link */
1816 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1817 "1301 Re-establishing Link "
1818 "Data: x%x x%x x%x\n",
1819 phba->work_hs, phba->work_status[0],
1820 phba->work_status[1]);
1821 if (phba->work_hs & HS_FFER8)
1822 /* Device Zeroization */
1823 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1824 "2861 Host Authentication device "
1825 "zeroization Data:x%x x%x x%x\n",
1826 phba->work_hs, phba->work_status[0],
1827 phba->work_status[1]);
1828
1829 spin_lock_irq(&phba->hbalock);
1830 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1831 spin_unlock_irq(&phba->hbalock);
1832
1833 /*
1834 * Firmware stops when it triggled erratt with HS_FFER6.
1835 * That could cause the I/Os dropped by the firmware.
1836 * Error iocb (I/O) on txcmplq and let the SCSI layer
1837 * retry it after re-establishing link.
1838 */
1839 lpfc_sli_abort_fcp_rings(phba);
1840
1841 /*
1842 * There was a firmware error. Take the hba offline and then
1843 * attempt to restart it.
1844 */
1845 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1846 lpfc_offline(phba);
1847 lpfc_sli_brdrestart(phba);
1848 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
1849 lpfc_unblock_mgmt_io(phba);
1850 return;
1851 }
1852 lpfc_unblock_mgmt_io(phba);
1853 } else if (phba->work_hs & HS_CRIT_TEMP) {
1854 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1855 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1856 temp_event_data.event_code = LPFC_CRIT_TEMP;
1857 temp_event_data.data = (uint32_t)temperature;
1858
1859 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1860 "0406 Adapter maximum temperature exceeded "
1861 "(%ld), taking this port offline "
1862 "Data: x%x x%x x%x\n",
1863 temperature, phba->work_hs,
1864 phba->work_status[0], phba->work_status[1]);
1865
1866 shost = lpfc_shost_from_vport(phba->pport);
1867 fc_host_post_vendor_event(shost, fc_get_event_number(),
1868 sizeof(temp_event_data),
1869 (char *) &temp_event_data,
1870 SCSI_NL_VID_TYPE_PCI
1871 | PCI_VENDOR_ID_EMULEX);
1872
1873 spin_lock_irq(&phba->hbalock);
1874 phba->over_temp_state = HBA_OVER_TEMP;
1875 spin_unlock_irq(&phba->hbalock);
1876 lpfc_offline_eratt(phba);
1877
1878 } else {
1879 /* The if clause above forces this code path when the status
1880 * failure is a value other than FFER6. Do not call the offline
1881 * twice. This is the adapter hardware error path.
1882 */
1883 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1884 "0457 Adapter Hardware Error "
1885 "Data: x%x x%x x%x\n",
1886 phba->work_hs,
1887 phba->work_status[0], phba->work_status[1]);
1888
1889 event_data = FC_REG_DUMP_EVENT;
1890 shost = lpfc_shost_from_vport(vport);
1891 fc_host_post_vendor_event(shost, fc_get_event_number(),
1892 sizeof(event_data), (char *) &event_data,
1893 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1894
1895 lpfc_offline_eratt(phba);
1896 }
1897 return;
1898 }
1899
1900 /**
1901 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1902 * @phba: pointer to lpfc hba data structure.
1903 * @mbx_action: flag for mailbox shutdown action.
1904 * @en_rn_msg: send reset/port recovery message.
1905 * This routine is invoked to perform an SLI4 port PCI function reset in
1906 * response to port status register polling attention. It waits for port
1907 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1908 * During this process, interrupt vectors are freed and later requested
1909 * for handling possible port resource change.
1910 **/
1911 static int
lpfc_sli4_port_sta_fn_reset(struct lpfc_hba * phba,int mbx_action,bool en_rn_msg)1912 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1913 bool en_rn_msg)
1914 {
1915 int rc;
1916 uint32_t intr_mode;
1917 LPFC_MBOXQ_t *mboxq;
1918
1919 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1920 LPFC_SLI_INTF_IF_TYPE_2) {
1921 /*
1922 * On error status condition, driver need to wait for port
1923 * ready before performing reset.
1924 */
1925 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1926 if (rc)
1927 return rc;
1928 }
1929
1930 /* need reset: attempt for port recovery */
1931 if (en_rn_msg)
1932 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1933 "2887 Reset Needed: Attempting Port "
1934 "Recovery...\n");
1935
1936 /* If we are no wait, the HBA has been reset and is not
1937 * functional, thus we should clear
1938 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags.
1939 */
1940 if (mbx_action == LPFC_MBX_NO_WAIT) {
1941 spin_lock_irq(&phba->hbalock);
1942 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
1943 if (phba->sli.mbox_active) {
1944 mboxq = phba->sli.mbox_active;
1945 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
1946 __lpfc_mbox_cmpl_put(phba, mboxq);
1947 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1948 phba->sli.mbox_active = NULL;
1949 }
1950 spin_unlock_irq(&phba->hbalock);
1951 }
1952
1953 lpfc_offline_prep(phba, mbx_action);
1954 lpfc_sli_flush_io_rings(phba);
1955 lpfc_offline(phba);
1956 /* release interrupt for possible resource change */
1957 lpfc_sli4_disable_intr(phba);
1958 rc = lpfc_sli_brdrestart(phba);
1959 if (rc) {
1960 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1961 "6309 Failed to restart board\n");
1962 return rc;
1963 }
1964 /* request and enable interrupt */
1965 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1966 if (intr_mode == LPFC_INTR_ERROR) {
1967 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1968 "3175 Failed to enable interrupt\n");
1969 return -EIO;
1970 }
1971 phba->intr_mode = intr_mode;
1972 rc = lpfc_online(phba);
1973 if (rc == 0)
1974 lpfc_unblock_mgmt_io(phba);
1975
1976 return rc;
1977 }
1978
1979 /**
1980 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1981 * @phba: pointer to lpfc hba data structure.
1982 *
1983 * This routine is invoked to handle the SLI4 HBA hardware error attention
1984 * conditions.
1985 **/
1986 static void
lpfc_handle_eratt_s4(struct lpfc_hba * phba)1987 lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1988 {
1989 struct lpfc_vport *vport = phba->pport;
1990 uint32_t event_data;
1991 struct Scsi_Host *shost;
1992 uint32_t if_type;
1993 struct lpfc_register portstat_reg = {0};
1994 uint32_t reg_err1, reg_err2;
1995 uint32_t uerrlo_reg, uemasklo_reg;
1996 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1997 bool en_rn_msg = true;
1998 struct temp_event temp_event_data;
1999 struct lpfc_register portsmphr_reg;
2000 int rc, i;
2001
2002 /* If the pci channel is offline, ignore possible errors, since
2003 * we cannot communicate with the pci card anyway.
2004 */
2005 if (pci_channel_offline(phba->pcidev)) {
2006 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2007 "3166 pci channel is offline\n");
2008 lpfc_sli_flush_io_rings(phba);
2009 return;
2010 }
2011
2012 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2013 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2014 switch (if_type) {
2015 case LPFC_SLI_INTF_IF_TYPE_0:
2016 pci_rd_rc1 = lpfc_readl(
2017 phba->sli4_hba.u.if_type0.UERRLOregaddr,
2018 &uerrlo_reg);
2019 pci_rd_rc2 = lpfc_readl(
2020 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2021 &uemasklo_reg);
2022 /* consider PCI bus read error as pci_channel_offline */
2023 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
2024 return;
2025 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
2026 lpfc_sli4_offline_eratt(phba);
2027 return;
2028 }
2029 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2030 "7623 Checking UE recoverable");
2031
2032 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2033 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2034 &portsmphr_reg.word0))
2035 continue;
2036
2037 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
2038 &portsmphr_reg);
2039 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2040 LPFC_PORT_SEM_UE_RECOVERABLE)
2041 break;
2042 /*Sleep for 1Sec, before checking SEMAPHORE */
2043 msleep(1000);
2044 }
2045
2046 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2047 "4827 smphr_port_status x%x : Waited %dSec",
2048 smphr_port_status, i);
2049
2050 /* Recoverable UE, reset the HBA device */
2051 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2052 LPFC_PORT_SEM_UE_RECOVERABLE) {
2053 for (i = 0; i < 20; i++) {
2054 msleep(1000);
2055 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2056 &portsmphr_reg.word0) &&
2057 (LPFC_POST_STAGE_PORT_READY ==
2058 bf_get(lpfc_port_smphr_port_status,
2059 &portsmphr_reg))) {
2060 rc = lpfc_sli4_port_sta_fn_reset(phba,
2061 LPFC_MBX_NO_WAIT, en_rn_msg);
2062 if (rc == 0)
2063 return;
2064 lpfc_printf_log(phba, KERN_ERR,
2065 LOG_TRACE_EVENT,
2066 "4215 Failed to recover UE");
2067 break;
2068 }
2069 }
2070 }
2071 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2072 "7624 Firmware not ready: Failing UE recovery,"
2073 " waited %dSec", i);
2074 phba->link_state = LPFC_HBA_ERROR;
2075 break;
2076
2077 case LPFC_SLI_INTF_IF_TYPE_2:
2078 case LPFC_SLI_INTF_IF_TYPE_6:
2079 pci_rd_rc1 = lpfc_readl(
2080 phba->sli4_hba.u.if_type2.STATUSregaddr,
2081 &portstat_reg.word0);
2082 /* consider PCI bus read error as pci_channel_offline */
2083 if (pci_rd_rc1 == -EIO) {
2084 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2085 "3151 PCI bus read access failure: x%x\n",
2086 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2087 lpfc_sli4_offline_eratt(phba);
2088 return;
2089 }
2090 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2091 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2092 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2093 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2094 "2889 Port Overtemperature event, "
2095 "taking port offline Data: x%x x%x\n",
2096 reg_err1, reg_err2);
2097
2098 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
2099 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2100 temp_event_data.event_code = LPFC_CRIT_TEMP;
2101 temp_event_data.data = 0xFFFFFFFF;
2102
2103 shost = lpfc_shost_from_vport(phba->pport);
2104 fc_host_post_vendor_event(shost, fc_get_event_number(),
2105 sizeof(temp_event_data),
2106 (char *)&temp_event_data,
2107 SCSI_NL_VID_TYPE_PCI
2108 | PCI_VENDOR_ID_EMULEX);
2109
2110 spin_lock_irq(&phba->hbalock);
2111 phba->over_temp_state = HBA_OVER_TEMP;
2112 spin_unlock_irq(&phba->hbalock);
2113 lpfc_sli4_offline_eratt(phba);
2114 return;
2115 }
2116 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2117 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2118 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2119 "3143 Port Down: Firmware Update "
2120 "Detected\n");
2121 en_rn_msg = false;
2122 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2123 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2124 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2125 "3144 Port Down: Debug Dump\n");
2126 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2127 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
2128 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2129 "3145 Port Down: Provisioning\n");
2130
2131 /* If resets are disabled then leave the HBA alone and return */
2132 if (!phba->cfg_enable_hba_reset)
2133 return;
2134
2135 /* Check port status register for function reset */
2136 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
2137 en_rn_msg);
2138 if (rc == 0) {
2139 /* don't report event on forced debug dump */
2140 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2141 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2142 return;
2143 else
2144 break;
2145 }
2146 /* fall through for not able to recover */
2147 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2148 "3152 Unrecoverable error\n");
2149 phba->link_state = LPFC_HBA_ERROR;
2150 break;
2151 case LPFC_SLI_INTF_IF_TYPE_1:
2152 default:
2153 break;
2154 }
2155 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2156 "3123 Report dump event to upper layer\n");
2157 /* Send an internal error event to mgmt application */
2158 lpfc_board_errevt_to_mgmt(phba);
2159
2160 event_data = FC_REG_DUMP_EVENT;
2161 shost = lpfc_shost_from_vport(vport);
2162 fc_host_post_vendor_event(shost, fc_get_event_number(),
2163 sizeof(event_data), (char *) &event_data,
2164 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2165 }
2166
2167 /**
2168 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2169 * @phba: pointer to lpfc HBA data structure.
2170 *
2171 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2172 * routine from the API jump table function pointer from the lpfc_hba struct.
2173 *
2174 * Return codes
2175 * 0 - success.
2176 * Any other value - error.
2177 **/
2178 void
lpfc_handle_eratt(struct lpfc_hba * phba)2179 lpfc_handle_eratt(struct lpfc_hba *phba)
2180 {
2181 (*phba->lpfc_handle_eratt)(phba);
2182 }
2183
2184 /**
2185 * lpfc_handle_latt - The HBA link event handler
2186 * @phba: pointer to lpfc hba data structure.
2187 *
2188 * This routine is invoked from the worker thread to handle a HBA host
2189 * attention link event. SLI3 only.
2190 **/
2191 void
lpfc_handle_latt(struct lpfc_hba * phba)2192 lpfc_handle_latt(struct lpfc_hba *phba)
2193 {
2194 struct lpfc_vport *vport = phba->pport;
2195 struct lpfc_sli *psli = &phba->sli;
2196 LPFC_MBOXQ_t *pmb;
2197 volatile uint32_t control;
2198 int rc = 0;
2199
2200 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2201 if (!pmb) {
2202 rc = 1;
2203 goto lpfc_handle_latt_err_exit;
2204 }
2205
2206 rc = lpfc_mbox_rsrc_prep(phba, pmb);
2207 if (rc) {
2208 rc = 2;
2209 mempool_free(pmb, phba->mbox_mem_pool);
2210 goto lpfc_handle_latt_err_exit;
2211 }
2212
2213 /* Cleanup any outstanding ELS commands */
2214 lpfc_els_flush_all_cmd(phba);
2215 psli->slistat.link_event++;
2216 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf);
2217 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2218 pmb->vport = vport;
2219 /* Block ELS IOCBs until we have processed this mbox command */
2220 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2221 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2222 if (rc == MBX_NOT_FINISHED) {
2223 rc = 4;
2224 goto lpfc_handle_latt_free_mbuf;
2225 }
2226
2227 /* Clear Link Attention in HA REG */
2228 spin_lock_irq(&phba->hbalock);
2229 writel(HA_LATT, phba->HAregaddr);
2230 readl(phba->HAregaddr); /* flush */
2231 spin_unlock_irq(&phba->hbalock);
2232
2233 return;
2234
2235 lpfc_handle_latt_free_mbuf:
2236 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2237 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
2238 lpfc_handle_latt_err_exit:
2239 /* Enable Link attention interrupts */
2240 spin_lock_irq(&phba->hbalock);
2241 psli->sli_flag |= LPFC_PROCESS_LA;
2242 control = readl(phba->HCregaddr);
2243 control |= HC_LAINT_ENA;
2244 writel(control, phba->HCregaddr);
2245 readl(phba->HCregaddr); /* flush */
2246
2247 /* Clear Link Attention in HA REG */
2248 writel(HA_LATT, phba->HAregaddr);
2249 readl(phba->HAregaddr); /* flush */
2250 spin_unlock_irq(&phba->hbalock);
2251 lpfc_linkdown(phba);
2252 phba->link_state = LPFC_HBA_ERROR;
2253
2254 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2255 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2256
2257 return;
2258 }
2259
2260 static void
lpfc_fill_vpd(struct lpfc_hba * phba,uint8_t * vpd,int length,int * pindex)2261 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex)
2262 {
2263 int i, j;
2264
2265 while (length > 0) {
2266 /* Look for Serial Number */
2267 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) {
2268 *pindex += 2;
2269 i = vpd[*pindex];
2270 *pindex += 1;
2271 j = 0;
2272 length -= (3+i);
2273 while (i--) {
2274 phba->SerialNumber[j++] = vpd[(*pindex)++];
2275 if (j == 31)
2276 break;
2277 }
2278 phba->SerialNumber[j] = 0;
2279 continue;
2280 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) {
2281 phba->vpd_flag |= VPD_MODEL_DESC;
2282 *pindex += 2;
2283 i = vpd[*pindex];
2284 *pindex += 1;
2285 j = 0;
2286 length -= (3+i);
2287 while (i--) {
2288 phba->ModelDesc[j++] = vpd[(*pindex)++];
2289 if (j == 255)
2290 break;
2291 }
2292 phba->ModelDesc[j] = 0;
2293 continue;
2294 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) {
2295 phba->vpd_flag |= VPD_MODEL_NAME;
2296 *pindex += 2;
2297 i = vpd[*pindex];
2298 *pindex += 1;
2299 j = 0;
2300 length -= (3+i);
2301 while (i--) {
2302 phba->ModelName[j++] = vpd[(*pindex)++];
2303 if (j == 79)
2304 break;
2305 }
2306 phba->ModelName[j] = 0;
2307 continue;
2308 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) {
2309 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2310 *pindex += 2;
2311 i = vpd[*pindex];
2312 *pindex += 1;
2313 j = 0;
2314 length -= (3+i);
2315 while (i--) {
2316 phba->ProgramType[j++] = vpd[(*pindex)++];
2317 if (j == 255)
2318 break;
2319 }
2320 phba->ProgramType[j] = 0;
2321 continue;
2322 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) {
2323 phba->vpd_flag |= VPD_PORT;
2324 *pindex += 2;
2325 i = vpd[*pindex];
2326 *pindex += 1;
2327 j = 0;
2328 length -= (3 + i);
2329 while (i--) {
2330 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2331 (phba->sli4_hba.pport_name_sta ==
2332 LPFC_SLI4_PPNAME_GET)) {
2333 j++;
2334 (*pindex)++;
2335 } else
2336 phba->Port[j++] = vpd[(*pindex)++];
2337 if (j == 19)
2338 break;
2339 }
2340 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2341 (phba->sli4_hba.pport_name_sta ==
2342 LPFC_SLI4_PPNAME_NON))
2343 phba->Port[j] = 0;
2344 continue;
2345 } else {
2346 *pindex += 2;
2347 i = vpd[*pindex];
2348 *pindex += 1;
2349 *pindex += i;
2350 length -= (3 + i);
2351 }
2352 }
2353 }
2354
2355 /**
2356 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2357 * @phba: pointer to lpfc hba data structure.
2358 * @vpd: pointer to the vital product data.
2359 * @len: length of the vital product data in bytes.
2360 *
2361 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2362 * an array of characters. In this routine, the ModelName, ProgramType, and
2363 * ModelDesc, etc. fields of the phba data structure will be populated.
2364 *
2365 * Return codes
2366 * 0 - pointer to the VPD passed in is NULL
2367 * 1 - success
2368 **/
2369 int
lpfc_parse_vpd(struct lpfc_hba * phba,uint8_t * vpd,int len)2370 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2371 {
2372 uint8_t lenlo, lenhi;
2373 int Length;
2374 int i;
2375 int finished = 0;
2376 int index = 0;
2377
2378 if (!vpd)
2379 return 0;
2380
2381 /* Vital Product */
2382 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2383 "0455 Vital Product Data: x%x x%x x%x x%x\n",
2384 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2385 (uint32_t) vpd[3]);
2386 while (!finished && (index < (len - 4))) {
2387 switch (vpd[index]) {
2388 case 0x82:
2389 case 0x91:
2390 index += 1;
2391 lenlo = vpd[index];
2392 index += 1;
2393 lenhi = vpd[index];
2394 index += 1;
2395 i = ((((unsigned short)lenhi) << 8) + lenlo);
2396 index += i;
2397 break;
2398 case 0x90:
2399 index += 1;
2400 lenlo = vpd[index];
2401 index += 1;
2402 lenhi = vpd[index];
2403 index += 1;
2404 Length = ((((unsigned short)lenhi) << 8) + lenlo);
2405 if (Length > len - index)
2406 Length = len - index;
2407
2408 lpfc_fill_vpd(phba, vpd, Length, &index);
2409 finished = 0;
2410 break;
2411 case 0x78:
2412 finished = 1;
2413 break;
2414 default:
2415 index ++;
2416 break;
2417 }
2418 }
2419
2420 return(1);
2421 }
2422
2423 /**
2424 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description
2425 * @phba: pointer to lpfc hba data structure.
2426 * @mdp: pointer to the data structure to hold the derived model name.
2427 * @descp: pointer to the data structure to hold the derived description.
2428 *
2429 * This routine retrieves HBA's description based on its registered PCI device
2430 * ID. The @descp passed into this function points to an array of 256 chars. It
2431 * shall be returned with the model name, maximum speed, and the host bus type.
2432 * The @mdp passed into this function points to an array of 80 chars. When the
2433 * function returns, the @mdp will be filled with the model name.
2434 **/
2435 static void
lpfc_get_atto_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2436 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2437 {
2438 uint16_t sub_dev_id = phba->pcidev->subsystem_device;
2439 char *model = "<Unknown>";
2440 int tbolt = 0;
2441
2442 switch (sub_dev_id) {
2443 case PCI_DEVICE_ID_CLRY_161E:
2444 model = "161E";
2445 break;
2446 case PCI_DEVICE_ID_CLRY_162E:
2447 model = "162E";
2448 break;
2449 case PCI_DEVICE_ID_CLRY_164E:
2450 model = "164E";
2451 break;
2452 case PCI_DEVICE_ID_CLRY_161P:
2453 model = "161P";
2454 break;
2455 case PCI_DEVICE_ID_CLRY_162P:
2456 model = "162P";
2457 break;
2458 case PCI_DEVICE_ID_CLRY_164P:
2459 model = "164P";
2460 break;
2461 case PCI_DEVICE_ID_CLRY_321E:
2462 model = "321E";
2463 break;
2464 case PCI_DEVICE_ID_CLRY_322E:
2465 model = "322E";
2466 break;
2467 case PCI_DEVICE_ID_CLRY_324E:
2468 model = "324E";
2469 break;
2470 case PCI_DEVICE_ID_CLRY_321P:
2471 model = "321P";
2472 break;
2473 case PCI_DEVICE_ID_CLRY_322P:
2474 model = "322P";
2475 break;
2476 case PCI_DEVICE_ID_CLRY_324P:
2477 model = "324P";
2478 break;
2479 case PCI_DEVICE_ID_TLFC_2XX2:
2480 model = "2XX2";
2481 tbolt = 1;
2482 break;
2483 case PCI_DEVICE_ID_TLFC_3162:
2484 model = "3162";
2485 tbolt = 1;
2486 break;
2487 case PCI_DEVICE_ID_TLFC_3322:
2488 model = "3322";
2489 tbolt = 1;
2490 break;
2491 default:
2492 model = "Unknown";
2493 break;
2494 }
2495
2496 if (mdp && mdp[0] == '\0')
2497 snprintf(mdp, 79, "%s", model);
2498
2499 if (descp && descp[0] == '\0')
2500 snprintf(descp, 255,
2501 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s",
2502 (tbolt) ? "ThunderLink FC " : "Celerity FC-",
2503 model,
2504 phba->Port);
2505 }
2506
2507 /**
2508 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2509 * @phba: pointer to lpfc hba data structure.
2510 * @mdp: pointer to the data structure to hold the derived model name.
2511 * @descp: pointer to the data structure to hold the derived description.
2512 *
2513 * This routine retrieves HBA's description based on its registered PCI device
2514 * ID. The @descp passed into this function points to an array of 256 chars. It
2515 * shall be returned with the model name, maximum speed, and the host bus type.
2516 * The @mdp passed into this function points to an array of 80 chars. When the
2517 * function returns, the @mdp will be filled with the model name.
2518 **/
2519 static void
lpfc_get_hba_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2520 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2521 {
2522 lpfc_vpd_t *vp;
2523 uint16_t dev_id = phba->pcidev->device;
2524 int max_speed;
2525 int GE = 0;
2526 int oneConnect = 0; /* default is not a oneConnect */
2527 struct {
2528 char *name;
2529 char *bus;
2530 char *function;
2531 } m = {"<Unknown>", "", ""};
2532
2533 if (mdp && mdp[0] != '\0'
2534 && descp && descp[0] != '\0')
2535 return;
2536
2537 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
2538 lpfc_get_atto_model_desc(phba, mdp, descp);
2539 return;
2540 }
2541
2542 if (phba->lmt & LMT_64Gb)
2543 max_speed = 64;
2544 else if (phba->lmt & LMT_32Gb)
2545 max_speed = 32;
2546 else if (phba->lmt & LMT_16Gb)
2547 max_speed = 16;
2548 else if (phba->lmt & LMT_10Gb)
2549 max_speed = 10;
2550 else if (phba->lmt & LMT_8Gb)
2551 max_speed = 8;
2552 else if (phba->lmt & LMT_4Gb)
2553 max_speed = 4;
2554 else if (phba->lmt & LMT_2Gb)
2555 max_speed = 2;
2556 else if (phba->lmt & LMT_1Gb)
2557 max_speed = 1;
2558 else
2559 max_speed = 0;
2560
2561 vp = &phba->vpd;
2562
2563 switch (dev_id) {
2564 case PCI_DEVICE_ID_FIREFLY:
2565 m = (typeof(m)){"LP6000", "PCI",
2566 "Obsolete, Unsupported Fibre Channel Adapter"};
2567 break;
2568 case PCI_DEVICE_ID_SUPERFLY:
2569 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2570 m = (typeof(m)){"LP7000", "PCI", ""};
2571 else
2572 m = (typeof(m)){"LP7000E", "PCI", ""};
2573 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2574 break;
2575 case PCI_DEVICE_ID_DRAGONFLY:
2576 m = (typeof(m)){"LP8000", "PCI",
2577 "Obsolete, Unsupported Fibre Channel Adapter"};
2578 break;
2579 case PCI_DEVICE_ID_CENTAUR:
2580 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2581 m = (typeof(m)){"LP9002", "PCI", ""};
2582 else
2583 m = (typeof(m)){"LP9000", "PCI", ""};
2584 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2585 break;
2586 case PCI_DEVICE_ID_RFLY:
2587 m = (typeof(m)){"LP952", "PCI",
2588 "Obsolete, Unsupported Fibre Channel Adapter"};
2589 break;
2590 case PCI_DEVICE_ID_PEGASUS:
2591 m = (typeof(m)){"LP9802", "PCI-X",
2592 "Obsolete, Unsupported Fibre Channel Adapter"};
2593 break;
2594 case PCI_DEVICE_ID_THOR:
2595 m = (typeof(m)){"LP10000", "PCI-X",
2596 "Obsolete, Unsupported Fibre Channel Adapter"};
2597 break;
2598 case PCI_DEVICE_ID_VIPER:
2599 m = (typeof(m)){"LPX1000", "PCI-X",
2600 "Obsolete, Unsupported Fibre Channel Adapter"};
2601 break;
2602 case PCI_DEVICE_ID_PFLY:
2603 m = (typeof(m)){"LP982", "PCI-X",
2604 "Obsolete, Unsupported Fibre Channel Adapter"};
2605 break;
2606 case PCI_DEVICE_ID_TFLY:
2607 m = (typeof(m)){"LP1050", "PCI-X",
2608 "Obsolete, Unsupported Fibre Channel Adapter"};
2609 break;
2610 case PCI_DEVICE_ID_HELIOS:
2611 m = (typeof(m)){"LP11000", "PCI-X2",
2612 "Obsolete, Unsupported Fibre Channel Adapter"};
2613 break;
2614 case PCI_DEVICE_ID_HELIOS_SCSP:
2615 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2616 "Obsolete, Unsupported Fibre Channel Adapter"};
2617 break;
2618 case PCI_DEVICE_ID_HELIOS_DCSP:
2619 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2620 "Obsolete, Unsupported Fibre Channel Adapter"};
2621 break;
2622 case PCI_DEVICE_ID_NEPTUNE:
2623 m = (typeof(m)){"LPe1000", "PCIe",
2624 "Obsolete, Unsupported Fibre Channel Adapter"};
2625 break;
2626 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2627 m = (typeof(m)){"LPe1000-SP", "PCIe",
2628 "Obsolete, Unsupported Fibre Channel Adapter"};
2629 break;
2630 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2631 m = (typeof(m)){"LPe1002-SP", "PCIe",
2632 "Obsolete, Unsupported Fibre Channel Adapter"};
2633 break;
2634 case PCI_DEVICE_ID_BMID:
2635 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
2636 break;
2637 case PCI_DEVICE_ID_BSMB:
2638 m = (typeof(m)){"LP111", "PCI-X2",
2639 "Obsolete, Unsupported Fibre Channel Adapter"};
2640 break;
2641 case PCI_DEVICE_ID_ZEPHYR:
2642 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2643 break;
2644 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2645 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2646 break;
2647 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2648 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
2649 GE = 1;
2650 break;
2651 case PCI_DEVICE_ID_ZMID:
2652 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
2653 break;
2654 case PCI_DEVICE_ID_ZSMB:
2655 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
2656 break;
2657 case PCI_DEVICE_ID_LP101:
2658 m = (typeof(m)){"LP101", "PCI-X",
2659 "Obsolete, Unsupported Fibre Channel Adapter"};
2660 break;
2661 case PCI_DEVICE_ID_LP10000S:
2662 m = (typeof(m)){"LP10000-S", "PCI",
2663 "Obsolete, Unsupported Fibre Channel Adapter"};
2664 break;
2665 case PCI_DEVICE_ID_LP11000S:
2666 m = (typeof(m)){"LP11000-S", "PCI-X2",
2667 "Obsolete, Unsupported Fibre Channel Adapter"};
2668 break;
2669 case PCI_DEVICE_ID_LPE11000S:
2670 m = (typeof(m)){"LPe11000-S", "PCIe",
2671 "Obsolete, Unsupported Fibre Channel Adapter"};
2672 break;
2673 case PCI_DEVICE_ID_SAT:
2674 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
2675 break;
2676 case PCI_DEVICE_ID_SAT_MID:
2677 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
2678 break;
2679 case PCI_DEVICE_ID_SAT_SMB:
2680 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
2681 break;
2682 case PCI_DEVICE_ID_SAT_DCSP:
2683 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
2684 break;
2685 case PCI_DEVICE_ID_SAT_SCSP:
2686 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
2687 break;
2688 case PCI_DEVICE_ID_SAT_S:
2689 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
2690 break;
2691 case PCI_DEVICE_ID_PROTEUS_VF:
2692 m = (typeof(m)){"LPev12000", "PCIe IOV",
2693 "Obsolete, Unsupported Fibre Channel Adapter"};
2694 break;
2695 case PCI_DEVICE_ID_PROTEUS_PF:
2696 m = (typeof(m)){"LPev12000", "PCIe IOV",
2697 "Obsolete, Unsupported Fibre Channel Adapter"};
2698 break;
2699 case PCI_DEVICE_ID_PROTEUS_S:
2700 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2701 "Obsolete, Unsupported Fibre Channel Adapter"};
2702 break;
2703 case PCI_DEVICE_ID_TIGERSHARK:
2704 oneConnect = 1;
2705 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
2706 break;
2707 case PCI_DEVICE_ID_TOMCAT:
2708 oneConnect = 1;
2709 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2710 break;
2711 case PCI_DEVICE_ID_FALCON:
2712 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2713 "EmulexSecure Fibre"};
2714 break;
2715 case PCI_DEVICE_ID_BALIUS:
2716 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2717 "Obsolete, Unsupported Fibre Channel Adapter"};
2718 break;
2719 case PCI_DEVICE_ID_LANCER_FC:
2720 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
2721 break;
2722 case PCI_DEVICE_ID_LANCER_FC_VF:
2723 m = (typeof(m)){"LPe16000", "PCIe",
2724 "Obsolete, Unsupported Fibre Channel Adapter"};
2725 break;
2726 case PCI_DEVICE_ID_LANCER_FCOE:
2727 oneConnect = 1;
2728 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
2729 break;
2730 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2731 oneConnect = 1;
2732 m = (typeof(m)){"OCe15100", "PCIe",
2733 "Obsolete, Unsupported FCoE"};
2734 break;
2735 case PCI_DEVICE_ID_LANCER_G6_FC:
2736 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2737 break;
2738 case PCI_DEVICE_ID_LANCER_G7_FC:
2739 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2740 break;
2741 case PCI_DEVICE_ID_LANCER_G7P_FC:
2742 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"};
2743 break;
2744 case PCI_DEVICE_ID_SKYHAWK:
2745 case PCI_DEVICE_ID_SKYHAWK_VF:
2746 oneConnect = 1;
2747 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2748 break;
2749 default:
2750 m = (typeof(m)){"Unknown", "", ""};
2751 break;
2752 }
2753
2754 if (mdp && mdp[0] == '\0')
2755 snprintf(mdp, 79,"%s", m.name);
2756 /*
2757 * oneConnect hba requires special processing, they are all initiators
2758 * and we put the port number on the end
2759 */
2760 if (descp && descp[0] == '\0') {
2761 if (oneConnect)
2762 snprintf(descp, 255,
2763 "Emulex OneConnect %s, %s Initiator %s",
2764 m.name, m.function,
2765 phba->Port);
2766 else if (max_speed == 0)
2767 snprintf(descp, 255,
2768 "Emulex %s %s %s",
2769 m.name, m.bus, m.function);
2770 else
2771 snprintf(descp, 255,
2772 "Emulex %s %d%s %s %s",
2773 m.name, max_speed, (GE) ? "GE" : "Gb",
2774 m.bus, m.function);
2775 }
2776 }
2777
2778 /**
2779 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2780 * @phba: pointer to lpfc hba data structure.
2781 * @pring: pointer to a IOCB ring.
2782 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2783 *
2784 * This routine posts a given number of IOCBs with the associated DMA buffer
2785 * descriptors specified by the cnt argument to the given IOCB ring.
2786 *
2787 * Return codes
2788 * The number of IOCBs NOT able to be posted to the IOCB ring.
2789 **/
2790 int
lpfc_sli3_post_buffer(struct lpfc_hba * phba,struct lpfc_sli_ring * pring,int cnt)2791 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2792 {
2793 IOCB_t *icmd;
2794 struct lpfc_iocbq *iocb;
2795 struct lpfc_dmabuf *mp1, *mp2;
2796
2797 cnt += pring->missbufcnt;
2798
2799 /* While there are buffers to post */
2800 while (cnt > 0) {
2801 /* Allocate buffer for command iocb */
2802 iocb = lpfc_sli_get_iocbq(phba);
2803 if (iocb == NULL) {
2804 pring->missbufcnt = cnt;
2805 return cnt;
2806 }
2807 icmd = &iocb->iocb;
2808
2809 /* 2 buffers can be posted per command */
2810 /* Allocate buffer to post */
2811 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2812 if (mp1)
2813 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2814 if (!mp1 || !mp1->virt) {
2815 kfree(mp1);
2816 lpfc_sli_release_iocbq(phba, iocb);
2817 pring->missbufcnt = cnt;
2818 return cnt;
2819 }
2820
2821 INIT_LIST_HEAD(&mp1->list);
2822 /* Allocate buffer to post */
2823 if (cnt > 1) {
2824 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2825 if (mp2)
2826 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2827 &mp2->phys);
2828 if (!mp2 || !mp2->virt) {
2829 kfree(mp2);
2830 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2831 kfree(mp1);
2832 lpfc_sli_release_iocbq(phba, iocb);
2833 pring->missbufcnt = cnt;
2834 return cnt;
2835 }
2836
2837 INIT_LIST_HEAD(&mp2->list);
2838 } else {
2839 mp2 = NULL;
2840 }
2841
2842 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2843 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2844 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2845 icmd->ulpBdeCount = 1;
2846 cnt--;
2847 if (mp2) {
2848 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2849 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2850 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2851 cnt--;
2852 icmd->ulpBdeCount = 2;
2853 }
2854
2855 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2856 icmd->ulpLe = 1;
2857
2858 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2859 IOCB_ERROR) {
2860 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2861 kfree(mp1);
2862 cnt++;
2863 if (mp2) {
2864 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2865 kfree(mp2);
2866 cnt++;
2867 }
2868 lpfc_sli_release_iocbq(phba, iocb);
2869 pring->missbufcnt = cnt;
2870 return cnt;
2871 }
2872 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2873 if (mp2)
2874 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2875 }
2876 pring->missbufcnt = 0;
2877 return 0;
2878 }
2879
2880 /**
2881 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2882 * @phba: pointer to lpfc hba data structure.
2883 *
2884 * This routine posts initial receive IOCB buffers to the ELS ring. The
2885 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2886 * set to 64 IOCBs. SLI3 only.
2887 *
2888 * Return codes
2889 * 0 - success (currently always success)
2890 **/
2891 static int
lpfc_post_rcv_buf(struct lpfc_hba * phba)2892 lpfc_post_rcv_buf(struct lpfc_hba *phba)
2893 {
2894 struct lpfc_sli *psli = &phba->sli;
2895
2896 /* Ring 0, ELS / CT buffers */
2897 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2898 /* Ring 2 - FCP no buffers needed */
2899
2900 return 0;
2901 }
2902
2903 #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2904
2905 /**
2906 * lpfc_sha_init - Set up initial array of hash table entries
2907 * @HashResultPointer: pointer to an array as hash table.
2908 *
2909 * This routine sets up the initial values to the array of hash table entries
2910 * for the LC HBAs.
2911 **/
2912 static void
lpfc_sha_init(uint32_t * HashResultPointer)2913 lpfc_sha_init(uint32_t * HashResultPointer)
2914 {
2915 HashResultPointer[0] = 0x67452301;
2916 HashResultPointer[1] = 0xEFCDAB89;
2917 HashResultPointer[2] = 0x98BADCFE;
2918 HashResultPointer[3] = 0x10325476;
2919 HashResultPointer[4] = 0xC3D2E1F0;
2920 }
2921
2922 /**
2923 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2924 * @HashResultPointer: pointer to an initial/result hash table.
2925 * @HashWorkingPointer: pointer to an working hash table.
2926 *
2927 * This routine iterates an initial hash table pointed by @HashResultPointer
2928 * with the values from the working hash table pointeed by @HashWorkingPointer.
2929 * The results are putting back to the initial hash table, returned through
2930 * the @HashResultPointer as the result hash table.
2931 **/
2932 static void
lpfc_sha_iterate(uint32_t * HashResultPointer,uint32_t * HashWorkingPointer)2933 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2934 {
2935 int t;
2936 uint32_t TEMP;
2937 uint32_t A, B, C, D, E;
2938 t = 16;
2939 do {
2940 HashWorkingPointer[t] =
2941 S(1,
2942 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2943 8] ^
2944 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2945 } while (++t <= 79);
2946 t = 0;
2947 A = HashResultPointer[0];
2948 B = HashResultPointer[1];
2949 C = HashResultPointer[2];
2950 D = HashResultPointer[3];
2951 E = HashResultPointer[4];
2952
2953 do {
2954 if (t < 20) {
2955 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2956 } else if (t < 40) {
2957 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2958 } else if (t < 60) {
2959 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2960 } else {
2961 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2962 }
2963 TEMP += S(5, A) + E + HashWorkingPointer[t];
2964 E = D;
2965 D = C;
2966 C = S(30, B);
2967 B = A;
2968 A = TEMP;
2969 } while (++t <= 79);
2970
2971 HashResultPointer[0] += A;
2972 HashResultPointer[1] += B;
2973 HashResultPointer[2] += C;
2974 HashResultPointer[3] += D;
2975 HashResultPointer[4] += E;
2976
2977 }
2978
2979 /**
2980 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2981 * @RandomChallenge: pointer to the entry of host challenge random number array.
2982 * @HashWorking: pointer to the entry of the working hash array.
2983 *
2984 * This routine calculates the working hash array referred by @HashWorking
2985 * from the challenge random numbers associated with the host, referred by
2986 * @RandomChallenge. The result is put into the entry of the working hash
2987 * array and returned by reference through @HashWorking.
2988 **/
2989 static void
lpfc_challenge_key(uint32_t * RandomChallenge,uint32_t * HashWorking)2990 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2991 {
2992 *HashWorking = (*RandomChallenge ^ *HashWorking);
2993 }
2994
2995 /**
2996 * lpfc_hba_init - Perform special handling for LC HBA initialization
2997 * @phba: pointer to lpfc hba data structure.
2998 * @hbainit: pointer to an array of unsigned 32-bit integers.
2999 *
3000 * This routine performs the special handling for LC HBA initialization.
3001 **/
3002 void
lpfc_hba_init(struct lpfc_hba * phba,uint32_t * hbainit)3003 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
3004 {
3005 int t;
3006 uint32_t *HashWorking;
3007 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
3008
3009 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
3010 if (!HashWorking)
3011 return;
3012
3013 HashWorking[0] = HashWorking[78] = *pwwnn++;
3014 HashWorking[1] = HashWorking[79] = *pwwnn;
3015
3016 for (t = 0; t < 7; t++)
3017 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
3018
3019 lpfc_sha_init(hbainit);
3020 lpfc_sha_iterate(hbainit, HashWorking);
3021 kfree(HashWorking);
3022 }
3023
3024 /**
3025 * lpfc_cleanup - Performs vport cleanups before deleting a vport
3026 * @vport: pointer to a virtual N_Port data structure.
3027 *
3028 * This routine performs the necessary cleanups before deleting the @vport.
3029 * It invokes the discovery state machine to perform necessary state
3030 * transitions and to release the ndlps associated with the @vport. Note,
3031 * the physical port is treated as @vport 0.
3032 **/
3033 void
lpfc_cleanup(struct lpfc_vport * vport)3034 lpfc_cleanup(struct lpfc_vport *vport)
3035 {
3036 struct lpfc_hba *phba = vport->phba;
3037 struct lpfc_nodelist *ndlp, *next_ndlp;
3038 int i = 0;
3039
3040 if (phba->link_state > LPFC_LINK_DOWN)
3041 lpfc_port_link_failure(vport);
3042
3043 /* Clean up VMID resources */
3044 if (lpfc_is_vmid_enabled(phba))
3045 lpfc_vmid_vport_cleanup(vport);
3046
3047 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
3048 if (vport->port_type != LPFC_PHYSICAL_PORT &&
3049 ndlp->nlp_DID == Fabric_DID) {
3050 /* Just free up ndlp with Fabric_DID for vports */
3051 lpfc_nlp_put(ndlp);
3052 continue;
3053 }
3054
3055 if (ndlp->nlp_DID == Fabric_Cntl_DID &&
3056 ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
3057 lpfc_nlp_put(ndlp);
3058 continue;
3059 }
3060
3061 /* Fabric Ports not in UNMAPPED state are cleaned up in the
3062 * DEVICE_RM event.
3063 */
3064 if (ndlp->nlp_type & NLP_FABRIC &&
3065 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE)
3066 lpfc_disc_state_machine(vport, ndlp, NULL,
3067 NLP_EVT_DEVICE_RECOVERY);
3068
3069 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD)))
3070 lpfc_disc_state_machine(vport, ndlp, NULL,
3071 NLP_EVT_DEVICE_RM);
3072 }
3073
3074 /* This is a special case flush to return all
3075 * IOs before entering this loop. There are
3076 * two points in the code where a flush is
3077 * avoided if the FC_UNLOADING flag is set.
3078 * one is in the multipool destroy,
3079 * (this prevents a crash) and the other is
3080 * in the nvme abort handler, ( also prevents
3081 * a crash). Both of these exceptions are
3082 * cases where the slot is still accessible.
3083 * The flush here is only when the pci slot
3084 * is offline.
3085 */
3086 if (vport->load_flag & FC_UNLOADING &&
3087 pci_channel_offline(phba->pcidev))
3088 lpfc_sli_flush_io_rings(vport->phba);
3089
3090 /* At this point, ALL ndlp's should be gone
3091 * because of the previous NLP_EVT_DEVICE_RM.
3092 * Lets wait for this to happen, if needed.
3093 */
3094 while (!list_empty(&vport->fc_nodes)) {
3095 if (i++ > 3000) {
3096 lpfc_printf_vlog(vport, KERN_ERR,
3097 LOG_TRACE_EVENT,
3098 "0233 Nodelist not empty\n");
3099 list_for_each_entry_safe(ndlp, next_ndlp,
3100 &vport->fc_nodes, nlp_listp) {
3101 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
3102 LOG_DISCOVERY,
3103 "0282 did:x%x ndlp:x%px "
3104 "refcnt:%d xflags x%x nflag x%x\n",
3105 ndlp->nlp_DID, (void *)ndlp,
3106 kref_read(&ndlp->kref),
3107 ndlp->fc4_xpt_flags,
3108 ndlp->nlp_flag);
3109 }
3110 break;
3111 }
3112
3113 /* Wait for any activity on ndlps to settle */
3114 msleep(10);
3115 }
3116 lpfc_cleanup_vports_rrqs(vport, NULL);
3117 }
3118
3119 /**
3120 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
3121 * @vport: pointer to a virtual N_Port data structure.
3122 *
3123 * This routine stops all the timers associated with a @vport. This function
3124 * is invoked before disabling or deleting a @vport. Note that the physical
3125 * port is treated as @vport 0.
3126 **/
3127 void
lpfc_stop_vport_timers(struct lpfc_vport * vport)3128 lpfc_stop_vport_timers(struct lpfc_vport *vport)
3129 {
3130 del_timer_sync(&vport->els_tmofunc);
3131 del_timer_sync(&vport->delayed_disc_tmo);
3132 lpfc_can_disctmo(vport);
3133 return;
3134 }
3135
3136 /**
3137 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3138 * @phba: pointer to lpfc hba data structure.
3139 *
3140 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
3141 * caller of this routine should already hold the host lock.
3142 **/
3143 void
__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3144 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3145 {
3146 /* Clear pending FCF rediscovery wait flag */
3147 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3148
3149 /* Now, try to stop the timer */
3150 del_timer(&phba->fcf.redisc_wait);
3151 }
3152
3153 /**
3154 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3155 * @phba: pointer to lpfc hba data structure.
3156 *
3157 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
3158 * checks whether the FCF rediscovery wait timer is pending with the host
3159 * lock held before proceeding with disabling the timer and clearing the
3160 * wait timer pendig flag.
3161 **/
3162 void
lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3163 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3164 {
3165 spin_lock_irq(&phba->hbalock);
3166 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3167 /* FCF rediscovery timer already fired or stopped */
3168 spin_unlock_irq(&phba->hbalock);
3169 return;
3170 }
3171 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3172 /* Clear failover in progress flags */
3173 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
3174 spin_unlock_irq(&phba->hbalock);
3175 }
3176
3177 /**
3178 * lpfc_cmf_stop - Stop CMF processing
3179 * @phba: pointer to lpfc hba data structure.
3180 *
3181 * This is called when the link goes down or if CMF mode is turned OFF.
3182 * It is also called when going offline or unloaded just before the
3183 * congestion info buffer is unregistered.
3184 **/
3185 void
lpfc_cmf_stop(struct lpfc_hba * phba)3186 lpfc_cmf_stop(struct lpfc_hba *phba)
3187 {
3188 int cpu;
3189 struct lpfc_cgn_stat *cgs;
3190
3191 /* We only do something if CMF is enabled */
3192 if (!phba->sli4_hba.pc_sli4_params.cmf)
3193 return;
3194
3195 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3196 "6221 Stop CMF / Cancel Timer\n");
3197
3198 /* Cancel the CMF timer */
3199 hrtimer_cancel(&phba->cmf_timer);
3200
3201 /* Zero CMF counters */
3202 atomic_set(&phba->cmf_busy, 0);
3203 for_each_present_cpu(cpu) {
3204 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3205 atomic64_set(&cgs->total_bytes, 0);
3206 atomic64_set(&cgs->rcv_bytes, 0);
3207 atomic_set(&cgs->rx_io_cnt, 0);
3208 atomic64_set(&cgs->rx_latency, 0);
3209 }
3210 atomic_set(&phba->cmf_bw_wait, 0);
3211
3212 /* Resume any blocked IO - Queue unblock on workqueue */
3213 queue_work(phba->wq, &phba->unblock_request_work);
3214 }
3215
3216 static inline uint64_t
lpfc_get_max_line_rate(struct lpfc_hba * phba)3217 lpfc_get_max_line_rate(struct lpfc_hba *phba)
3218 {
3219 uint64_t rate = lpfc_sli_port_speed_get(phba);
3220
3221 return ((((unsigned long)rate) * 1024 * 1024) / 10);
3222 }
3223
3224 void
lpfc_cmf_signal_init(struct lpfc_hba * phba)3225 lpfc_cmf_signal_init(struct lpfc_hba *phba)
3226 {
3227 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3228 "6223 Signal CMF init\n");
3229
3230 /* Use the new fc_linkspeed to recalculate */
3231 phba->cmf_interval_rate = LPFC_CMF_INTERVAL;
3232 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba);
3233 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
3234 phba->cmf_interval_rate, 1000);
3235 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count;
3236
3237 /* This is a signal to firmware to sync up CMF BW with link speed */
3238 lpfc_issue_cmf_sync_wqe(phba, 0, 0);
3239 }
3240
3241 /**
3242 * lpfc_cmf_start - Start CMF processing
3243 * @phba: pointer to lpfc hba data structure.
3244 *
3245 * This is called when the link comes up or if CMF mode is turned OFF
3246 * to Monitor or Managed.
3247 **/
3248 void
lpfc_cmf_start(struct lpfc_hba * phba)3249 lpfc_cmf_start(struct lpfc_hba *phba)
3250 {
3251 struct lpfc_cgn_stat *cgs;
3252 int cpu;
3253
3254 /* We only do something if CMF is enabled */
3255 if (!phba->sli4_hba.pc_sli4_params.cmf ||
3256 phba->cmf_active_mode == LPFC_CFG_OFF)
3257 return;
3258
3259 /* Reinitialize congestion buffer info */
3260 lpfc_init_congestion_buf(phba);
3261
3262 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
3263 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
3264 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
3265 atomic_set(&phba->cgn_sync_warn_cnt, 0);
3266
3267 atomic_set(&phba->cmf_busy, 0);
3268 for_each_present_cpu(cpu) {
3269 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3270 atomic64_set(&cgs->total_bytes, 0);
3271 atomic64_set(&cgs->rcv_bytes, 0);
3272 atomic_set(&cgs->rx_io_cnt, 0);
3273 atomic64_set(&cgs->rx_latency, 0);
3274 }
3275 phba->cmf_latency.tv_sec = 0;
3276 phba->cmf_latency.tv_nsec = 0;
3277
3278 lpfc_cmf_signal_init(phba);
3279
3280 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3281 "6222 Start CMF / Timer\n");
3282
3283 phba->cmf_timer_cnt = 0;
3284 hrtimer_start(&phba->cmf_timer,
3285 ktime_set(0, LPFC_CMF_INTERVAL * 1000000),
3286 HRTIMER_MODE_REL);
3287 /* Setup for latency check in IO cmpl routines */
3288 ktime_get_real_ts64(&phba->cmf_latency);
3289
3290 atomic_set(&phba->cmf_bw_wait, 0);
3291 atomic_set(&phba->cmf_stop_io, 0);
3292 }
3293
3294 /**
3295 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
3296 * @phba: pointer to lpfc hba data structure.
3297 *
3298 * This routine stops all the timers associated with a HBA. This function is
3299 * invoked before either putting a HBA offline or unloading the driver.
3300 **/
3301 void
lpfc_stop_hba_timers(struct lpfc_hba * phba)3302 lpfc_stop_hba_timers(struct lpfc_hba *phba)
3303 {
3304 if (phba->pport)
3305 lpfc_stop_vport_timers(phba->pport);
3306 cancel_delayed_work_sync(&phba->eq_delay_work);
3307 cancel_delayed_work_sync(&phba->idle_stat_delay_work);
3308 del_timer_sync(&phba->sli.mbox_tmo);
3309 del_timer_sync(&phba->fabric_block_timer);
3310 del_timer_sync(&phba->eratt_poll);
3311 del_timer_sync(&phba->hb_tmofunc);
3312 if (phba->sli_rev == LPFC_SLI_REV4) {
3313 del_timer_sync(&phba->rrq_tmr);
3314 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
3315 }
3316 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO);
3317
3318 switch (phba->pci_dev_grp) {
3319 case LPFC_PCI_DEV_LP:
3320 /* Stop any LightPulse device specific driver timers */
3321 del_timer_sync(&phba->fcp_poll_timer);
3322 break;
3323 case LPFC_PCI_DEV_OC:
3324 /* Stop any OneConnect device specific driver timers */
3325 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3326 break;
3327 default:
3328 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3329 "0297 Invalid device group (x%x)\n",
3330 phba->pci_dev_grp);
3331 break;
3332 }
3333 return;
3334 }
3335
3336 /**
3337 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
3338 * @phba: pointer to lpfc hba data structure.
3339 * @mbx_action: flag for mailbox no wait action.
3340 *
3341 * This routine marks a HBA's management interface as blocked. Once the HBA's
3342 * management interface is marked as blocked, all the user space access to
3343 * the HBA, whether they are from sysfs interface or libdfc interface will
3344 * all be blocked. The HBA is set to block the management interface when the
3345 * driver prepares the HBA interface for online or offline.
3346 **/
3347 static void
lpfc_block_mgmt_io(struct lpfc_hba * phba,int mbx_action)3348 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
3349 {
3350 unsigned long iflag;
3351 uint8_t actcmd = MBX_HEARTBEAT;
3352 unsigned long timeout;
3353
3354 spin_lock_irqsave(&phba->hbalock, iflag);
3355 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
3356 spin_unlock_irqrestore(&phba->hbalock, iflag);
3357 if (mbx_action == LPFC_MBX_NO_WAIT)
3358 return;
3359 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
3360 spin_lock_irqsave(&phba->hbalock, iflag);
3361 if (phba->sli.mbox_active) {
3362 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
3363 /* Determine how long we might wait for the active mailbox
3364 * command to be gracefully completed by firmware.
3365 */
3366 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
3367 phba->sli.mbox_active) * 1000) + jiffies;
3368 }
3369 spin_unlock_irqrestore(&phba->hbalock, iflag);
3370
3371 /* Wait for the outstnading mailbox command to complete */
3372 while (phba->sli.mbox_active) {
3373 /* Check active mailbox complete status every 2ms */
3374 msleep(2);
3375 if (time_after(jiffies, timeout)) {
3376 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3377 "2813 Mgmt IO is Blocked %x "
3378 "- mbox cmd %x still active\n",
3379 phba->sli.sli_flag, actcmd);
3380 break;
3381 }
3382 }
3383 }
3384
3385 /**
3386 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
3387 * @phba: pointer to lpfc hba data structure.
3388 *
3389 * Allocate RPIs for all active remote nodes. This is needed whenever
3390 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3391 * is to fixup the temporary rpi assignments.
3392 **/
3393 void
lpfc_sli4_node_prep(struct lpfc_hba * phba)3394 lpfc_sli4_node_prep(struct lpfc_hba *phba)
3395 {
3396 struct lpfc_nodelist *ndlp, *next_ndlp;
3397 struct lpfc_vport **vports;
3398 int i, rpi;
3399
3400 if (phba->sli_rev != LPFC_SLI_REV4)
3401 return;
3402
3403 vports = lpfc_create_vport_work_array(phba);
3404 if (vports == NULL)
3405 return;
3406
3407 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3408 if (vports[i]->load_flag & FC_UNLOADING)
3409 continue;
3410
3411 list_for_each_entry_safe(ndlp, next_ndlp,
3412 &vports[i]->fc_nodes,
3413 nlp_listp) {
3414 rpi = lpfc_sli4_alloc_rpi(phba);
3415 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3416 /* TODO print log? */
3417 continue;
3418 }
3419 ndlp->nlp_rpi = rpi;
3420 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3421 LOG_NODE | LOG_DISCOVERY,
3422 "0009 Assign RPI x%x to ndlp x%px "
3423 "DID:x%06x flg:x%x\n",
3424 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
3425 ndlp->nlp_flag);
3426 }
3427 }
3428 lpfc_destroy_vport_work_array(phba, vports);
3429 }
3430
3431 /**
3432 * lpfc_create_expedite_pool - create expedite pool
3433 * @phba: pointer to lpfc hba data structure.
3434 *
3435 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3436 * to expedite pool. Mark them as expedite.
3437 **/
lpfc_create_expedite_pool(struct lpfc_hba * phba)3438 static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3439 {
3440 struct lpfc_sli4_hdw_queue *qp;
3441 struct lpfc_io_buf *lpfc_ncmd;
3442 struct lpfc_io_buf *lpfc_ncmd_next;
3443 struct lpfc_epd_pool *epd_pool;
3444 unsigned long iflag;
3445
3446 epd_pool = &phba->epd_pool;
3447 qp = &phba->sli4_hba.hdwq[0];
3448
3449 spin_lock_init(&epd_pool->lock);
3450 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3451 spin_lock(&epd_pool->lock);
3452 INIT_LIST_HEAD(&epd_pool->list);
3453 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3454 &qp->lpfc_io_buf_list_put, list) {
3455 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3456 lpfc_ncmd->expedite = true;
3457 qp->put_io_bufs--;
3458 epd_pool->count++;
3459 if (epd_pool->count >= XRI_BATCH)
3460 break;
3461 }
3462 spin_unlock(&epd_pool->lock);
3463 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3464 }
3465
3466 /**
3467 * lpfc_destroy_expedite_pool - destroy expedite pool
3468 * @phba: pointer to lpfc hba data structure.
3469 *
3470 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3471 * of HWQ 0. Clear the mark.
3472 **/
lpfc_destroy_expedite_pool(struct lpfc_hba * phba)3473 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3474 {
3475 struct lpfc_sli4_hdw_queue *qp;
3476 struct lpfc_io_buf *lpfc_ncmd;
3477 struct lpfc_io_buf *lpfc_ncmd_next;
3478 struct lpfc_epd_pool *epd_pool;
3479 unsigned long iflag;
3480
3481 epd_pool = &phba->epd_pool;
3482 qp = &phba->sli4_hba.hdwq[0];
3483
3484 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3485 spin_lock(&epd_pool->lock);
3486 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3487 &epd_pool->list, list) {
3488 list_move_tail(&lpfc_ncmd->list,
3489 &qp->lpfc_io_buf_list_put);
3490 lpfc_ncmd->flags = false;
3491 qp->put_io_bufs++;
3492 epd_pool->count--;
3493 }
3494 spin_unlock(&epd_pool->lock);
3495 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3496 }
3497
3498 /**
3499 * lpfc_create_multixri_pools - create multi-XRI pools
3500 * @phba: pointer to lpfc hba data structure.
3501 *
3502 * This routine initialize public, private per HWQ. Then, move XRIs from
3503 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3504 * Initialized.
3505 **/
lpfc_create_multixri_pools(struct lpfc_hba * phba)3506 void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3507 {
3508 u32 i, j;
3509 u32 hwq_count;
3510 u32 count_per_hwq;
3511 struct lpfc_io_buf *lpfc_ncmd;
3512 struct lpfc_io_buf *lpfc_ncmd_next;
3513 unsigned long iflag;
3514 struct lpfc_sli4_hdw_queue *qp;
3515 struct lpfc_multixri_pool *multixri_pool;
3516 struct lpfc_pbl_pool *pbl_pool;
3517 struct lpfc_pvt_pool *pvt_pool;
3518
3519 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3520 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3521 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3522 phba->sli4_hba.io_xri_cnt);
3523
3524 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3525 lpfc_create_expedite_pool(phba);
3526
3527 hwq_count = phba->cfg_hdw_queue;
3528 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3529
3530 for (i = 0; i < hwq_count; i++) {
3531 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
3532
3533 if (!multixri_pool) {
3534 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3535 "1238 Failed to allocate memory for "
3536 "multixri_pool\n");
3537
3538 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3539 lpfc_destroy_expedite_pool(phba);
3540
3541 j = 0;
3542 while (j < i) {
3543 qp = &phba->sli4_hba.hdwq[j];
3544 kfree(qp->p_multixri_pool);
3545 j++;
3546 }
3547 phba->cfg_xri_rebalancing = 0;
3548 return;
3549 }
3550
3551 qp = &phba->sli4_hba.hdwq[i];
3552 qp->p_multixri_pool = multixri_pool;
3553
3554 multixri_pool->xri_limit = count_per_hwq;
3555 multixri_pool->rrb_next_hwqid = i;
3556
3557 /* Deal with public free xri pool */
3558 pbl_pool = &multixri_pool->pbl_pool;
3559 spin_lock_init(&pbl_pool->lock);
3560 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3561 spin_lock(&pbl_pool->lock);
3562 INIT_LIST_HEAD(&pbl_pool->list);
3563 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3564 &qp->lpfc_io_buf_list_put, list) {
3565 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3566 qp->put_io_bufs--;
3567 pbl_pool->count++;
3568 }
3569 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3570 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3571 pbl_pool->count, i);
3572 spin_unlock(&pbl_pool->lock);
3573 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3574
3575 /* Deal with private free xri pool */
3576 pvt_pool = &multixri_pool->pvt_pool;
3577 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3578 pvt_pool->low_watermark = XRI_BATCH;
3579 spin_lock_init(&pvt_pool->lock);
3580 spin_lock_irqsave(&pvt_pool->lock, iflag);
3581 INIT_LIST_HEAD(&pvt_pool->list);
3582 pvt_pool->count = 0;
3583 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3584 }
3585 }
3586
3587 /**
3588 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3589 * @phba: pointer to lpfc hba data structure.
3590 *
3591 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3592 **/
lpfc_destroy_multixri_pools(struct lpfc_hba * phba)3593 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3594 {
3595 u32 i;
3596 u32 hwq_count;
3597 struct lpfc_io_buf *lpfc_ncmd;
3598 struct lpfc_io_buf *lpfc_ncmd_next;
3599 unsigned long iflag;
3600 struct lpfc_sli4_hdw_queue *qp;
3601 struct lpfc_multixri_pool *multixri_pool;
3602 struct lpfc_pbl_pool *pbl_pool;
3603 struct lpfc_pvt_pool *pvt_pool;
3604
3605 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3606 lpfc_destroy_expedite_pool(phba);
3607
3608 if (!(phba->pport->load_flag & FC_UNLOADING))
3609 lpfc_sli_flush_io_rings(phba);
3610
3611 hwq_count = phba->cfg_hdw_queue;
3612
3613 for (i = 0; i < hwq_count; i++) {
3614 qp = &phba->sli4_hba.hdwq[i];
3615 multixri_pool = qp->p_multixri_pool;
3616 if (!multixri_pool)
3617 continue;
3618
3619 qp->p_multixri_pool = NULL;
3620
3621 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3622
3623 /* Deal with public free xri pool */
3624 pbl_pool = &multixri_pool->pbl_pool;
3625 spin_lock(&pbl_pool->lock);
3626
3627 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3628 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3629 pbl_pool->count, i);
3630
3631 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3632 &pbl_pool->list, list) {
3633 list_move_tail(&lpfc_ncmd->list,
3634 &qp->lpfc_io_buf_list_put);
3635 qp->put_io_bufs++;
3636 pbl_pool->count--;
3637 }
3638
3639 INIT_LIST_HEAD(&pbl_pool->list);
3640 pbl_pool->count = 0;
3641
3642 spin_unlock(&pbl_pool->lock);
3643
3644 /* Deal with private free xri pool */
3645 pvt_pool = &multixri_pool->pvt_pool;
3646 spin_lock(&pvt_pool->lock);
3647
3648 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3649 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3650 pvt_pool->count, i);
3651
3652 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3653 &pvt_pool->list, list) {
3654 list_move_tail(&lpfc_ncmd->list,
3655 &qp->lpfc_io_buf_list_put);
3656 qp->put_io_bufs++;
3657 pvt_pool->count--;
3658 }
3659
3660 INIT_LIST_HEAD(&pvt_pool->list);
3661 pvt_pool->count = 0;
3662
3663 spin_unlock(&pvt_pool->lock);
3664 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3665
3666 kfree(multixri_pool);
3667 }
3668 }
3669
3670 /**
3671 * lpfc_online - Initialize and bring a HBA online
3672 * @phba: pointer to lpfc hba data structure.
3673 *
3674 * This routine initializes the HBA and brings a HBA online. During this
3675 * process, the management interface is blocked to prevent user space access
3676 * to the HBA interfering with the driver initialization.
3677 *
3678 * Return codes
3679 * 0 - successful
3680 * 1 - failed
3681 **/
3682 int
lpfc_online(struct lpfc_hba * phba)3683 lpfc_online(struct lpfc_hba *phba)
3684 {
3685 struct lpfc_vport *vport;
3686 struct lpfc_vport **vports;
3687 int i, error = 0;
3688 bool vpis_cleared = false;
3689
3690 if (!phba)
3691 return 0;
3692 vport = phba->pport;
3693
3694 if (!(vport->fc_flag & FC_OFFLINE_MODE))
3695 return 0;
3696
3697 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3698 "0458 Bring Adapter online\n");
3699
3700 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3701
3702 if (phba->sli_rev == LPFC_SLI_REV4) {
3703 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3704 lpfc_unblock_mgmt_io(phba);
3705 return 1;
3706 }
3707 spin_lock_irq(&phba->hbalock);
3708 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3709 vpis_cleared = true;
3710 spin_unlock_irq(&phba->hbalock);
3711
3712 /* Reestablish the local initiator port.
3713 * The offline process destroyed the previous lport.
3714 */
3715 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3716 !phba->nvmet_support) {
3717 error = lpfc_nvme_create_localport(phba->pport);
3718 if (error)
3719 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3720 "6132 NVME restore reg failed "
3721 "on nvmei error x%x\n", error);
3722 }
3723 } else {
3724 lpfc_sli_queue_init(phba);
3725 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3726 lpfc_unblock_mgmt_io(phba);
3727 return 1;
3728 }
3729 }
3730
3731 vports = lpfc_create_vport_work_array(phba);
3732 if (vports != NULL) {
3733 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3734 struct Scsi_Host *shost;
3735 shost = lpfc_shost_from_vport(vports[i]);
3736 spin_lock_irq(shost->host_lock);
3737 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3738 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3739 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3740 if (phba->sli_rev == LPFC_SLI_REV4) {
3741 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
3742 if ((vpis_cleared) &&
3743 (vports[i]->port_type !=
3744 LPFC_PHYSICAL_PORT))
3745 vports[i]->vpi = 0;
3746 }
3747 spin_unlock_irq(shost->host_lock);
3748 }
3749 }
3750 lpfc_destroy_vport_work_array(phba, vports);
3751
3752 if (phba->cfg_xri_rebalancing)
3753 lpfc_create_multixri_pools(phba);
3754
3755 lpfc_cpuhp_add(phba);
3756
3757 lpfc_unblock_mgmt_io(phba);
3758 return 0;
3759 }
3760
3761 /**
3762 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3763 * @phba: pointer to lpfc hba data structure.
3764 *
3765 * This routine marks a HBA's management interface as not blocked. Once the
3766 * HBA's management interface is marked as not blocked, all the user space
3767 * access to the HBA, whether they are from sysfs interface or libdfc
3768 * interface will be allowed. The HBA is set to block the management interface
3769 * when the driver prepares the HBA interface for online or offline and then
3770 * set to unblock the management interface afterwards.
3771 **/
3772 void
lpfc_unblock_mgmt_io(struct lpfc_hba * phba)3773 lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3774 {
3775 unsigned long iflag;
3776
3777 spin_lock_irqsave(&phba->hbalock, iflag);
3778 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3779 spin_unlock_irqrestore(&phba->hbalock, iflag);
3780 }
3781
3782 /**
3783 * lpfc_offline_prep - Prepare a HBA to be brought offline
3784 * @phba: pointer to lpfc hba data structure.
3785 * @mbx_action: flag for mailbox shutdown action.
3786 *
3787 * This routine is invoked to prepare a HBA to be brought offline. It performs
3788 * unregistration login to all the nodes on all vports and flushes the mailbox
3789 * queue to make it ready to be brought offline.
3790 **/
3791 void
lpfc_offline_prep(struct lpfc_hba * phba,int mbx_action)3792 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3793 {
3794 struct lpfc_vport *vport = phba->pport;
3795 struct lpfc_nodelist *ndlp, *next_ndlp;
3796 struct lpfc_vport **vports;
3797 struct Scsi_Host *shost;
3798 int i;
3799 int offline;
3800 bool hba_pci_err;
3801
3802 if (vport->fc_flag & FC_OFFLINE_MODE)
3803 return;
3804
3805 lpfc_block_mgmt_io(phba, mbx_action);
3806
3807 lpfc_linkdown(phba);
3808
3809 offline = pci_channel_offline(phba->pcidev);
3810 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags);
3811
3812 /* Issue an unreg_login to all nodes on all vports */
3813 vports = lpfc_create_vport_work_array(phba);
3814 if (vports != NULL) {
3815 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3816 if (vports[i]->load_flag & FC_UNLOADING)
3817 continue;
3818 shost = lpfc_shost_from_vport(vports[i]);
3819 spin_lock_irq(shost->host_lock);
3820 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3821 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3822 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
3823 spin_unlock_irq(shost->host_lock);
3824
3825 shost = lpfc_shost_from_vport(vports[i]);
3826 list_for_each_entry_safe(ndlp, next_ndlp,
3827 &vports[i]->fc_nodes,
3828 nlp_listp) {
3829
3830 spin_lock_irq(&ndlp->lock);
3831 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
3832 spin_unlock_irq(&ndlp->lock);
3833
3834 if (offline || hba_pci_err) {
3835 spin_lock_irq(&ndlp->lock);
3836 ndlp->nlp_flag &= ~(NLP_UNREG_INP |
3837 NLP_RPI_REGISTERED);
3838 spin_unlock_irq(&ndlp->lock);
3839 if (phba->sli_rev == LPFC_SLI_REV4)
3840 lpfc_sli_rpi_release(vports[i],
3841 ndlp);
3842 } else {
3843 lpfc_unreg_rpi(vports[i], ndlp);
3844 }
3845 /*
3846 * Whenever an SLI4 port goes offline, free the
3847 * RPI. Get a new RPI when the adapter port
3848 * comes back online.
3849 */
3850 if (phba->sli_rev == LPFC_SLI_REV4) {
3851 lpfc_printf_vlog(vports[i], KERN_INFO,
3852 LOG_NODE | LOG_DISCOVERY,
3853 "0011 Free RPI x%x on "
3854 "ndlp: x%px did x%x\n",
3855 ndlp->nlp_rpi, ndlp,
3856 ndlp->nlp_DID);
3857 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
3858 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
3859 }
3860
3861 if (ndlp->nlp_type & NLP_FABRIC) {
3862 lpfc_disc_state_machine(vports[i], ndlp,
3863 NULL, NLP_EVT_DEVICE_RECOVERY);
3864
3865 /* Don't remove the node unless the node
3866 * has been unregistered with the
3867 * transport, and we're not in recovery
3868 * before dev_loss_tmo triggered.
3869 * Otherwise, let dev_loss take care of
3870 * the node.
3871 */
3872 if (!(ndlp->save_flags &
3873 NLP_IN_RECOV_POST_DEV_LOSS) &&
3874 !(ndlp->fc4_xpt_flags &
3875 (NVME_XPT_REGD | SCSI_XPT_REGD)))
3876 lpfc_disc_state_machine
3877 (vports[i], ndlp,
3878 NULL,
3879 NLP_EVT_DEVICE_RM);
3880 }
3881 }
3882 }
3883 }
3884 lpfc_destroy_vport_work_array(phba, vports);
3885
3886 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3887
3888 if (phba->wq)
3889 flush_workqueue(phba->wq);
3890 }
3891
3892 /**
3893 * lpfc_offline - Bring a HBA offline
3894 * @phba: pointer to lpfc hba data structure.
3895 *
3896 * This routine actually brings a HBA offline. It stops all the timers
3897 * associated with the HBA, brings down the SLI layer, and eventually
3898 * marks the HBA as in offline state for the upper layer protocol.
3899 **/
3900 void
lpfc_offline(struct lpfc_hba * phba)3901 lpfc_offline(struct lpfc_hba *phba)
3902 {
3903 struct Scsi_Host *shost;
3904 struct lpfc_vport **vports;
3905 int i;
3906
3907 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
3908 return;
3909
3910 /* stop port and all timers associated with this hba */
3911 lpfc_stop_port(phba);
3912
3913 /* Tear down the local and target port registrations. The
3914 * nvme transports need to cleanup.
3915 */
3916 lpfc_nvmet_destroy_targetport(phba);
3917 lpfc_nvme_destroy_localport(phba->pport);
3918
3919 vports = lpfc_create_vport_work_array(phba);
3920 if (vports != NULL)
3921 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3922 lpfc_stop_vport_timers(vports[i]);
3923 lpfc_destroy_vport_work_array(phba, vports);
3924 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3925 "0460 Bring Adapter offline\n");
3926 /* Bring down the SLI Layer and cleanup. The HBA is offline
3927 now. */
3928 lpfc_sli_hba_down(phba);
3929 spin_lock_irq(&phba->hbalock);
3930 phba->work_ha = 0;
3931 spin_unlock_irq(&phba->hbalock);
3932 vports = lpfc_create_vport_work_array(phba);
3933 if (vports != NULL)
3934 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3935 shost = lpfc_shost_from_vport(vports[i]);
3936 spin_lock_irq(shost->host_lock);
3937 vports[i]->work_port_events = 0;
3938 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3939 spin_unlock_irq(shost->host_lock);
3940 }
3941 lpfc_destroy_vport_work_array(phba, vports);
3942 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled
3943 * in hba_unset
3944 */
3945 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
3946 __lpfc_cpuhp_remove(phba);
3947
3948 if (phba->cfg_xri_rebalancing)
3949 lpfc_destroy_multixri_pools(phba);
3950 }
3951
3952 /**
3953 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3954 * @phba: pointer to lpfc hba data structure.
3955 *
3956 * This routine is to free all the SCSI buffers and IOCBs from the driver
3957 * list back to kernel. It is called from lpfc_pci_remove_one to free
3958 * the internal resources before the device is removed from the system.
3959 **/
3960 static void
lpfc_scsi_free(struct lpfc_hba * phba)3961 lpfc_scsi_free(struct lpfc_hba *phba)
3962 {
3963 struct lpfc_io_buf *sb, *sb_next;
3964
3965 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3966 return;
3967
3968 spin_lock_irq(&phba->hbalock);
3969
3970 /* Release all the lpfc_scsi_bufs maintained by this host. */
3971
3972 spin_lock(&phba->scsi_buf_list_put_lock);
3973 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3974 list) {
3975 list_del(&sb->list);
3976 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3977 sb->dma_handle);
3978 kfree(sb);
3979 phba->total_scsi_bufs--;
3980 }
3981 spin_unlock(&phba->scsi_buf_list_put_lock);
3982
3983 spin_lock(&phba->scsi_buf_list_get_lock);
3984 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3985 list) {
3986 list_del(&sb->list);
3987 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3988 sb->dma_handle);
3989 kfree(sb);
3990 phba->total_scsi_bufs--;
3991 }
3992 spin_unlock(&phba->scsi_buf_list_get_lock);
3993 spin_unlock_irq(&phba->hbalock);
3994 }
3995
3996 /**
3997 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
3998 * @phba: pointer to lpfc hba data structure.
3999 *
4000 * This routine is to free all the IO buffers and IOCBs from the driver
4001 * list back to kernel. It is called from lpfc_pci_remove_one to free
4002 * the internal resources before the device is removed from the system.
4003 **/
4004 void
lpfc_io_free(struct lpfc_hba * phba)4005 lpfc_io_free(struct lpfc_hba *phba)
4006 {
4007 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
4008 struct lpfc_sli4_hdw_queue *qp;
4009 int idx;
4010
4011 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4012 qp = &phba->sli4_hba.hdwq[idx];
4013 /* Release all the lpfc_nvme_bufs maintained by this host. */
4014 spin_lock(&qp->io_buf_list_put_lock);
4015 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4016 &qp->lpfc_io_buf_list_put,
4017 list) {
4018 list_del(&lpfc_ncmd->list);
4019 qp->put_io_bufs--;
4020 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4021 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4022 if (phba->cfg_xpsgl && !phba->nvmet_support)
4023 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4024 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4025 kfree(lpfc_ncmd);
4026 qp->total_io_bufs--;
4027 }
4028 spin_unlock(&qp->io_buf_list_put_lock);
4029
4030 spin_lock(&qp->io_buf_list_get_lock);
4031 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4032 &qp->lpfc_io_buf_list_get,
4033 list) {
4034 list_del(&lpfc_ncmd->list);
4035 qp->get_io_bufs--;
4036 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4037 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4038 if (phba->cfg_xpsgl && !phba->nvmet_support)
4039 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4040 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4041 kfree(lpfc_ncmd);
4042 qp->total_io_bufs--;
4043 }
4044 spin_unlock(&qp->io_buf_list_get_lock);
4045 }
4046 }
4047
4048 /**
4049 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
4050 * @phba: pointer to lpfc hba data structure.
4051 *
4052 * This routine first calculates the sizes of the current els and allocated
4053 * scsi sgl lists, and then goes through all sgls to updates the physical
4054 * XRIs assigned due to port function reset. During port initialization, the
4055 * current els and allocated scsi sgl lists are 0s.
4056 *
4057 * Return codes
4058 * 0 - successful (for now, it always returns 0)
4059 **/
4060 int
lpfc_sli4_els_sgl_update(struct lpfc_hba * phba)4061 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
4062 {
4063 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4064 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4065 LIST_HEAD(els_sgl_list);
4066 int rc;
4067
4068 /*
4069 * update on pci function's els xri-sgl list
4070 */
4071 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4072
4073 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4074 /* els xri-sgl expanded */
4075 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4076 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4077 "3157 ELS xri-sgl count increased from "
4078 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4079 els_xri_cnt);
4080 /* allocate the additional els sgls */
4081 for (i = 0; i < xri_cnt; i++) {
4082 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4083 GFP_KERNEL);
4084 if (sglq_entry == NULL) {
4085 lpfc_printf_log(phba, KERN_ERR,
4086 LOG_TRACE_EVENT,
4087 "2562 Failure to allocate an "
4088 "ELS sgl entry:%d\n", i);
4089 rc = -ENOMEM;
4090 goto out_free_mem;
4091 }
4092 sglq_entry->buff_type = GEN_BUFF_TYPE;
4093 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
4094 &sglq_entry->phys);
4095 if (sglq_entry->virt == NULL) {
4096 kfree(sglq_entry);
4097 lpfc_printf_log(phba, KERN_ERR,
4098 LOG_TRACE_EVENT,
4099 "2563 Failure to allocate an "
4100 "ELS mbuf:%d\n", i);
4101 rc = -ENOMEM;
4102 goto out_free_mem;
4103 }
4104 sglq_entry->sgl = sglq_entry->virt;
4105 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
4106 sglq_entry->state = SGL_FREED;
4107 list_add_tail(&sglq_entry->list, &els_sgl_list);
4108 }
4109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4110 list_splice_init(&els_sgl_list,
4111 &phba->sli4_hba.lpfc_els_sgl_list);
4112 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4113 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4114 /* els xri-sgl shrinked */
4115 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4116 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4117 "3158 ELS xri-sgl count decreased from "
4118 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4119 els_xri_cnt);
4120 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4121 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4122 &els_sgl_list);
4123 /* release extra els sgls from list */
4124 for (i = 0; i < xri_cnt; i++) {
4125 list_remove_head(&els_sgl_list,
4126 sglq_entry, struct lpfc_sglq, list);
4127 if (sglq_entry) {
4128 __lpfc_mbuf_free(phba, sglq_entry->virt,
4129 sglq_entry->phys);
4130 kfree(sglq_entry);
4131 }
4132 }
4133 list_splice_init(&els_sgl_list,
4134 &phba->sli4_hba.lpfc_els_sgl_list);
4135 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4136 } else
4137 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4138 "3163 ELS xri-sgl count unchanged: %d\n",
4139 els_xri_cnt);
4140 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4141
4142 /* update xris to els sgls on the list */
4143 sglq_entry = NULL;
4144 sglq_entry_next = NULL;
4145 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4146 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4147 lxri = lpfc_sli4_next_xritag(phba);
4148 if (lxri == NO_XRI) {
4149 lpfc_printf_log(phba, KERN_ERR,
4150 LOG_TRACE_EVENT,
4151 "2400 Failed to allocate xri for "
4152 "ELS sgl\n");
4153 rc = -ENOMEM;
4154 goto out_free_mem;
4155 }
4156 sglq_entry->sli4_lxritag = lxri;
4157 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4158 }
4159 return 0;
4160
4161 out_free_mem:
4162 lpfc_free_els_sgl_list(phba);
4163 return rc;
4164 }
4165
4166 /**
4167 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
4168 * @phba: pointer to lpfc hba data structure.
4169 *
4170 * This routine first calculates the sizes of the current els and allocated
4171 * scsi sgl lists, and then goes through all sgls to updates the physical
4172 * XRIs assigned due to port function reset. During port initialization, the
4173 * current els and allocated scsi sgl lists are 0s.
4174 *
4175 * Return codes
4176 * 0 - successful (for now, it always returns 0)
4177 **/
4178 int
lpfc_sli4_nvmet_sgl_update(struct lpfc_hba * phba)4179 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
4180 {
4181 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4182 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4183 uint16_t nvmet_xri_cnt;
4184 LIST_HEAD(nvmet_sgl_list);
4185 int rc;
4186
4187 /*
4188 * update on pci function's nvmet xri-sgl list
4189 */
4190 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4191
4192 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
4193 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4194 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4195 /* els xri-sgl expanded */
4196 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4197 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4198 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
4199 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4200 /* allocate the additional nvmet sgls */
4201 for (i = 0; i < xri_cnt; i++) {
4202 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4203 GFP_KERNEL);
4204 if (sglq_entry == NULL) {
4205 lpfc_printf_log(phba, KERN_ERR,
4206 LOG_TRACE_EVENT,
4207 "6303 Failure to allocate an "
4208 "NVMET sgl entry:%d\n", i);
4209 rc = -ENOMEM;
4210 goto out_free_mem;
4211 }
4212 sglq_entry->buff_type = NVMET_BUFF_TYPE;
4213 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
4214 &sglq_entry->phys);
4215 if (sglq_entry->virt == NULL) {
4216 kfree(sglq_entry);
4217 lpfc_printf_log(phba, KERN_ERR,
4218 LOG_TRACE_EVENT,
4219 "6304 Failure to allocate an "
4220 "NVMET buf:%d\n", i);
4221 rc = -ENOMEM;
4222 goto out_free_mem;
4223 }
4224 sglq_entry->sgl = sglq_entry->virt;
4225 memset(sglq_entry->sgl, 0,
4226 phba->cfg_sg_dma_buf_size);
4227 sglq_entry->state = SGL_FREED;
4228 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
4229 }
4230 spin_lock_irq(&phba->hbalock);
4231 spin_lock(&phba->sli4_hba.sgl_list_lock);
4232 list_splice_init(&nvmet_sgl_list,
4233 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4234 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4235 spin_unlock_irq(&phba->hbalock);
4236 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4237 /* nvmet xri-sgl shrunk */
4238 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4239 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4240 "6305 NVMET xri-sgl count decreased from "
4241 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4242 nvmet_xri_cnt);
4243 spin_lock_irq(&phba->hbalock);
4244 spin_lock(&phba->sli4_hba.sgl_list_lock);
4245 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4246 &nvmet_sgl_list);
4247 /* release extra nvmet sgls from list */
4248 for (i = 0; i < xri_cnt; i++) {
4249 list_remove_head(&nvmet_sgl_list,
4250 sglq_entry, struct lpfc_sglq, list);
4251 if (sglq_entry) {
4252 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
4253 sglq_entry->phys);
4254 kfree(sglq_entry);
4255 }
4256 }
4257 list_splice_init(&nvmet_sgl_list,
4258 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4259 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4260 spin_unlock_irq(&phba->hbalock);
4261 } else
4262 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4263 "6306 NVMET xri-sgl count unchanged: %d\n",
4264 nvmet_xri_cnt);
4265 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4266
4267 /* update xris to nvmet sgls on the list */
4268 sglq_entry = NULL;
4269 sglq_entry_next = NULL;
4270 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4271 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4272 lxri = lpfc_sli4_next_xritag(phba);
4273 if (lxri == NO_XRI) {
4274 lpfc_printf_log(phba, KERN_ERR,
4275 LOG_TRACE_EVENT,
4276 "6307 Failed to allocate xri for "
4277 "NVMET sgl\n");
4278 rc = -ENOMEM;
4279 goto out_free_mem;
4280 }
4281 sglq_entry->sli4_lxritag = lxri;
4282 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4283 }
4284 return 0;
4285
4286 out_free_mem:
4287 lpfc_free_nvmet_sgl_list(phba);
4288 return rc;
4289 }
4290
4291 int
lpfc_io_buf_flush(struct lpfc_hba * phba,struct list_head * cbuf)4292 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
4293 {
4294 LIST_HEAD(blist);
4295 struct lpfc_sli4_hdw_queue *qp;
4296 struct lpfc_io_buf *lpfc_cmd;
4297 struct lpfc_io_buf *iobufp, *prev_iobufp;
4298 int idx, cnt, xri, inserted;
4299
4300 cnt = 0;
4301 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4302 qp = &phba->sli4_hba.hdwq[idx];
4303 spin_lock_irq(&qp->io_buf_list_get_lock);
4304 spin_lock(&qp->io_buf_list_put_lock);
4305
4306 /* Take everything off the get and put lists */
4307 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
4308 list_splice(&qp->lpfc_io_buf_list_put, &blist);
4309 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
4310 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
4311 cnt += qp->get_io_bufs + qp->put_io_bufs;
4312 qp->get_io_bufs = 0;
4313 qp->put_io_bufs = 0;
4314 qp->total_io_bufs = 0;
4315 spin_unlock(&qp->io_buf_list_put_lock);
4316 spin_unlock_irq(&qp->io_buf_list_get_lock);
4317 }
4318
4319 /*
4320 * Take IO buffers off blist and put on cbuf sorted by XRI.
4321 * This is because POST_SGL takes a sequential range of XRIs
4322 * to post to the firmware.
4323 */
4324 for (idx = 0; idx < cnt; idx++) {
4325 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
4326 if (!lpfc_cmd)
4327 return cnt;
4328 if (idx == 0) {
4329 list_add_tail(&lpfc_cmd->list, cbuf);
4330 continue;
4331 }
4332 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
4333 inserted = 0;
4334 prev_iobufp = NULL;
4335 list_for_each_entry(iobufp, cbuf, list) {
4336 if (xri < iobufp->cur_iocbq.sli4_xritag) {
4337 if (prev_iobufp)
4338 list_add(&lpfc_cmd->list,
4339 &prev_iobufp->list);
4340 else
4341 list_add(&lpfc_cmd->list, cbuf);
4342 inserted = 1;
4343 break;
4344 }
4345 prev_iobufp = iobufp;
4346 }
4347 if (!inserted)
4348 list_add_tail(&lpfc_cmd->list, cbuf);
4349 }
4350 return cnt;
4351 }
4352
4353 int
lpfc_io_buf_replenish(struct lpfc_hba * phba,struct list_head * cbuf)4354 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
4355 {
4356 struct lpfc_sli4_hdw_queue *qp;
4357 struct lpfc_io_buf *lpfc_cmd;
4358 int idx, cnt;
4359
4360 qp = phba->sli4_hba.hdwq;
4361 cnt = 0;
4362 while (!list_empty(cbuf)) {
4363 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4364 list_remove_head(cbuf, lpfc_cmd,
4365 struct lpfc_io_buf, list);
4366 if (!lpfc_cmd)
4367 return cnt;
4368 cnt++;
4369 qp = &phba->sli4_hba.hdwq[idx];
4370 lpfc_cmd->hdwq_no = idx;
4371 lpfc_cmd->hdwq = qp;
4372 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL;
4373 spin_lock(&qp->io_buf_list_put_lock);
4374 list_add_tail(&lpfc_cmd->list,
4375 &qp->lpfc_io_buf_list_put);
4376 qp->put_io_bufs++;
4377 qp->total_io_bufs++;
4378 spin_unlock(&qp->io_buf_list_put_lock);
4379 }
4380 }
4381 return cnt;
4382 }
4383
4384 /**
4385 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
4386 * @phba: pointer to lpfc hba data structure.
4387 *
4388 * This routine first calculates the sizes of the current els and allocated
4389 * scsi sgl lists, and then goes through all sgls to updates the physical
4390 * XRIs assigned due to port function reset. During port initialization, the
4391 * current els and allocated scsi sgl lists are 0s.
4392 *
4393 * Return codes
4394 * 0 - successful (for now, it always returns 0)
4395 **/
4396 int
lpfc_sli4_io_sgl_update(struct lpfc_hba * phba)4397 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
4398 {
4399 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4400 uint16_t i, lxri, els_xri_cnt;
4401 uint16_t io_xri_cnt, io_xri_max;
4402 LIST_HEAD(io_sgl_list);
4403 int rc, cnt;
4404
4405 /*
4406 * update on pci function's allocated nvme xri-sgl list
4407 */
4408
4409 /* maximum number of xris available for nvme buffers */
4410 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4411 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4412 phba->sli4_hba.io_xri_max = io_xri_max;
4413
4414 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4415 "6074 Current allocated XRI sgl count:%d, "
4416 "maximum XRI count:%d els_xri_cnt:%d\n\n",
4417 phba->sli4_hba.io_xri_cnt,
4418 phba->sli4_hba.io_xri_max,
4419 els_xri_cnt);
4420
4421 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4422
4423 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4424 /* max nvme xri shrunk below the allocated nvme buffers */
4425 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4426 phba->sli4_hba.io_xri_max;
4427 /* release the extra allocated nvme buffers */
4428 for (i = 0; i < io_xri_cnt; i++) {
4429 list_remove_head(&io_sgl_list, lpfc_ncmd,
4430 struct lpfc_io_buf, list);
4431 if (lpfc_ncmd) {
4432 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4433 lpfc_ncmd->data,
4434 lpfc_ncmd->dma_handle);
4435 kfree(lpfc_ncmd);
4436 }
4437 }
4438 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4439 }
4440
4441 /* update xris associated to remaining allocated nvme buffers */
4442 lpfc_ncmd = NULL;
4443 lpfc_ncmd_next = NULL;
4444 phba->sli4_hba.io_xri_cnt = cnt;
4445 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4446 &io_sgl_list, list) {
4447 lxri = lpfc_sli4_next_xritag(phba);
4448 if (lxri == NO_XRI) {
4449 lpfc_printf_log(phba, KERN_ERR,
4450 LOG_TRACE_EVENT,
4451 "6075 Failed to allocate xri for "
4452 "nvme buffer\n");
4453 rc = -ENOMEM;
4454 goto out_free_mem;
4455 }
4456 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4457 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4458 }
4459 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
4460 return 0;
4461
4462 out_free_mem:
4463 lpfc_io_free(phba);
4464 return rc;
4465 }
4466
4467 /**
4468 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4469 * @phba: Pointer to lpfc hba data structure.
4470 * @num_to_alloc: The requested number of buffers to allocate.
4471 *
4472 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4473 * the nvme buffer contains all the necessary information needed to initiate
4474 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4475 * them on a list, it post them to the port by using SGL block post.
4476 *
4477 * Return codes:
4478 * int - number of IO buffers that were allocated and posted.
4479 * 0 = failure, less than num_to_alloc is a partial failure.
4480 **/
4481 int
lpfc_new_io_buf(struct lpfc_hba * phba,int num_to_alloc)4482 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4483 {
4484 struct lpfc_io_buf *lpfc_ncmd;
4485 struct lpfc_iocbq *pwqeq;
4486 uint16_t iotag, lxri = 0;
4487 int bcnt, num_posted;
4488 LIST_HEAD(prep_nblist);
4489 LIST_HEAD(post_nblist);
4490 LIST_HEAD(nvme_nblist);
4491
4492 phba->sli4_hba.io_xri_cnt = 0;
4493 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4494 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL);
4495 if (!lpfc_ncmd)
4496 break;
4497 /*
4498 * Get memory from the pci pool to map the virt space to
4499 * pci bus space for an I/O. The DMA buffer includes the
4500 * number of SGE's necessary to support the sg_tablesize.
4501 */
4502 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4503 GFP_KERNEL,
4504 &lpfc_ncmd->dma_handle);
4505 if (!lpfc_ncmd->data) {
4506 kfree(lpfc_ncmd);
4507 break;
4508 }
4509
4510 if (phba->cfg_xpsgl && !phba->nvmet_support) {
4511 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4512 } else {
4513 /*
4514 * 4K Page alignment is CRITICAL to BlockGuard, double
4515 * check to be sure.
4516 */
4517 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4518 (((unsigned long)(lpfc_ncmd->data) &
4519 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4520 lpfc_printf_log(phba, KERN_ERR,
4521 LOG_TRACE_EVENT,
4522 "3369 Memory alignment err: "
4523 "addr=%lx\n",
4524 (unsigned long)lpfc_ncmd->data);
4525 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4526 lpfc_ncmd->data,
4527 lpfc_ncmd->dma_handle);
4528 kfree(lpfc_ncmd);
4529 break;
4530 }
4531 }
4532
4533 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4534
4535 lxri = lpfc_sli4_next_xritag(phba);
4536 if (lxri == NO_XRI) {
4537 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4538 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4539 kfree(lpfc_ncmd);
4540 break;
4541 }
4542 pwqeq = &lpfc_ncmd->cur_iocbq;
4543
4544 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4545 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4546 if (iotag == 0) {
4547 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4548 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4549 kfree(lpfc_ncmd);
4550 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4551 "6121 Failed to allocate IOTAG for"
4552 " XRI:0x%x\n", lxri);
4553 lpfc_sli4_free_xri(phba, lxri);
4554 break;
4555 }
4556 pwqeq->sli4_lxritag = lxri;
4557 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4558
4559 /* Initialize local short-hand pointers. */
4560 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4561 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4562 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd;
4563 spin_lock_init(&lpfc_ncmd->buf_lock);
4564
4565 /* add the nvme buffer to a post list */
4566 list_add_tail(&lpfc_ncmd->list, &post_nblist);
4567 phba->sli4_hba.io_xri_cnt++;
4568 }
4569 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4570 "6114 Allocate %d out of %d requested new NVME "
4571 "buffers of size x%zu bytes\n", bcnt, num_to_alloc,
4572 sizeof(*lpfc_ncmd));
4573
4574
4575 /* post the list of nvme buffer sgls to port if available */
4576 if (!list_empty(&post_nblist))
4577 num_posted = lpfc_sli4_post_io_sgl_list(
4578 phba, &post_nblist, bcnt);
4579 else
4580 num_posted = 0;
4581
4582 return num_posted;
4583 }
4584
4585 static uint64_t
lpfc_get_wwpn(struct lpfc_hba * phba)4586 lpfc_get_wwpn(struct lpfc_hba *phba)
4587 {
4588 uint64_t wwn;
4589 int rc;
4590 LPFC_MBOXQ_t *mboxq;
4591 MAILBOX_t *mb;
4592
4593 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4594 GFP_KERNEL);
4595 if (!mboxq)
4596 return (uint64_t)-1;
4597
4598 /* First get WWN of HBA instance */
4599 lpfc_read_nv(phba, mboxq);
4600 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4601 if (rc != MBX_SUCCESS) {
4602 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4603 "6019 Mailbox failed , mbxCmd x%x "
4604 "READ_NV, mbxStatus x%x\n",
4605 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4606 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4607 mempool_free(mboxq, phba->mbox_mem_pool);
4608 return (uint64_t) -1;
4609 }
4610 mb = &mboxq->u.mb;
4611 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4612 /* wwn is WWPN of HBA instance */
4613 mempool_free(mboxq, phba->mbox_mem_pool);
4614 if (phba->sli_rev == LPFC_SLI_REV4)
4615 return be64_to_cpu(wwn);
4616 else
4617 return rol64(wwn, 32);
4618 }
4619
lpfc_get_sg_tablesize(struct lpfc_hba * phba)4620 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba)
4621 {
4622 if (phba->sli_rev == LPFC_SLI_REV4)
4623 if (phba->cfg_xpsgl && !phba->nvmet_support)
4624 return LPFC_MAX_SG_TABLESIZE;
4625 else
4626 return phba->cfg_scsi_seg_cnt;
4627 else
4628 return phba->cfg_sg_seg_cnt;
4629 }
4630
4631 /**
4632 * lpfc_vmid_res_alloc - Allocates resources for VMID
4633 * @phba: pointer to lpfc hba data structure.
4634 * @vport: pointer to vport data structure
4635 *
4636 * This routine allocated the resources needed for the VMID.
4637 *
4638 * Return codes
4639 * 0 on Success
4640 * Non-0 on Failure
4641 */
4642 static int
lpfc_vmid_res_alloc(struct lpfc_hba * phba,struct lpfc_vport * vport)4643 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport)
4644 {
4645 /* VMID feature is supported only on SLI4 */
4646 if (phba->sli_rev == LPFC_SLI_REV3) {
4647 phba->cfg_vmid_app_header = 0;
4648 phba->cfg_vmid_priority_tagging = 0;
4649 }
4650
4651 if (lpfc_is_vmid_enabled(phba)) {
4652 vport->vmid =
4653 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid),
4654 GFP_KERNEL);
4655 if (!vport->vmid)
4656 return -ENOMEM;
4657
4658 rwlock_init(&vport->vmid_lock);
4659
4660 /* Set the VMID parameters for the vport */
4661 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging;
4662 vport->vmid_inactivity_timeout =
4663 phba->cfg_vmid_inactivity_timeout;
4664 vport->max_vmid = phba->cfg_max_vmid;
4665 vport->cur_vmid_cnt = 0;
4666
4667 vport->vmid_priority_range = bitmap_zalloc
4668 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL);
4669
4670 if (!vport->vmid_priority_range) {
4671 kfree(vport->vmid);
4672 return -ENOMEM;
4673 }
4674
4675 hash_init(vport->hash_table);
4676 }
4677 return 0;
4678 }
4679
4680 /**
4681 * lpfc_create_port - Create an FC port
4682 * @phba: pointer to lpfc hba data structure.
4683 * @instance: a unique integer ID to this FC port.
4684 * @dev: pointer to the device data structure.
4685 *
4686 * This routine creates a FC port for the upper layer protocol. The FC port
4687 * can be created on top of either a physical port or a virtual port provided
4688 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4689 * and associates the FC port created before adding the shost into the SCSI
4690 * layer.
4691 *
4692 * Return codes
4693 * @vport - pointer to the virtual N_Port data structure.
4694 * NULL - port create failed.
4695 **/
4696 struct lpfc_vport *
lpfc_create_port(struct lpfc_hba * phba,int instance,struct device * dev)4697 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4698 {
4699 struct lpfc_vport *vport;
4700 struct Scsi_Host *shost = NULL;
4701 struct scsi_host_template *template;
4702 int error = 0;
4703 int i;
4704 uint64_t wwn;
4705 bool use_no_reset_hba = false;
4706 int rc;
4707
4708 if (lpfc_no_hba_reset_cnt) {
4709 if (phba->sli_rev < LPFC_SLI_REV4 &&
4710 dev == &phba->pcidev->dev) {
4711 /* Reset the port first */
4712 lpfc_sli_brdrestart(phba);
4713 rc = lpfc_sli_chipset_init(phba);
4714 if (rc)
4715 return NULL;
4716 }
4717 wwn = lpfc_get_wwpn(phba);
4718 }
4719
4720 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4721 if (wwn == lpfc_no_hba_reset[i]) {
4722 lpfc_printf_log(phba, KERN_ERR,
4723 LOG_TRACE_EVENT,
4724 "6020 Setting use_no_reset port=%llx\n",
4725 wwn);
4726 use_no_reset_hba = true;
4727 break;
4728 }
4729 }
4730
4731 /* Seed template for SCSI host registration */
4732 if (dev == &phba->pcidev->dev) {
4733 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4734 /* Seed physical port template */
4735 template = &lpfc_template;
4736
4737 if (use_no_reset_hba)
4738 /* template is for a no reset SCSI Host */
4739 template->eh_host_reset_handler = NULL;
4740
4741 /* Seed updated value of sg_tablesize */
4742 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4743 } else {
4744 /* NVMET is for physical port only */
4745 template = &lpfc_template_nvme;
4746 }
4747 } else {
4748 /* Seed vport template */
4749 template = &lpfc_vport_template;
4750
4751 /* Seed updated value of sg_tablesize */
4752 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4753 }
4754
4755 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
4756 if (!shost)
4757 goto out;
4758
4759 vport = (struct lpfc_vport *) shost->hostdata;
4760 vport->phba = phba;
4761 vport->load_flag |= FC_LOADING;
4762 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
4763 vport->fc_rscn_flush = 0;
4764 lpfc_get_vport_cfgparam(vport);
4765
4766 /* Adjust value in vport */
4767 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4768
4769 shost->unique_id = instance;
4770 shost->max_id = LPFC_MAX_TARGET;
4771 shost->max_lun = vport->cfg_max_luns;
4772 shost->this_id = -1;
4773 shost->max_cmd_len = 16;
4774
4775 if (phba->sli_rev == LPFC_SLI_REV4) {
4776 if (!phba->cfg_fcp_mq_threshold ||
4777 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4778 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4779
4780 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4781 phba->cfg_fcp_mq_threshold);
4782
4783 shost->dma_boundary =
4784 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4785 } else
4786 /* SLI-3 has a limited number of hardware queues (3),
4787 * thus there is only one for FCP processing.
4788 */
4789 shost->nr_hw_queues = 1;
4790
4791 /*
4792 * Set initial can_queue value since 0 is no longer supported and
4793 * scsi_add_host will fail. This will be adjusted later based on the
4794 * max xri value determined in hba setup.
4795 */
4796 shost->can_queue = phba->cfg_hba_queue_depth - 10;
4797 if (dev != &phba->pcidev->dev) {
4798 shost->transportt = lpfc_vport_transport_template;
4799 vport->port_type = LPFC_NPIV_PORT;
4800 } else {
4801 shost->transportt = lpfc_transport_template;
4802 vport->port_type = LPFC_PHYSICAL_PORT;
4803 }
4804
4805 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
4806 "9081 CreatePort TMPLATE type %x TBLsize %d "
4807 "SEGcnt %d/%d\n",
4808 vport->port_type, shost->sg_tablesize,
4809 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
4810
4811 /* Allocate the resources for VMID */
4812 rc = lpfc_vmid_res_alloc(phba, vport);
4813
4814 if (rc)
4815 goto out_put_shost;
4816
4817 /* Initialize all internally managed lists. */
4818 INIT_LIST_HEAD(&vport->fc_nodes);
4819 INIT_LIST_HEAD(&vport->rcv_buffer_list);
4820 spin_lock_init(&vport->work_port_lock);
4821
4822 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4823
4824 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4825
4826 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4827
4828 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4829 lpfc_setup_bg(phba, shost);
4830
4831 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4832 if (error)
4833 goto out_free_vmid;
4834
4835 spin_lock_irq(&phba->port_list_lock);
4836 list_add_tail(&vport->listentry, &phba->port_list);
4837 spin_unlock_irq(&phba->port_list_lock);
4838 return vport;
4839
4840 out_free_vmid:
4841 kfree(vport->vmid);
4842 bitmap_free(vport->vmid_priority_range);
4843 out_put_shost:
4844 scsi_host_put(shost);
4845 out:
4846 return NULL;
4847 }
4848
4849 /**
4850 * destroy_port - destroy an FC port
4851 * @vport: pointer to an lpfc virtual N_Port data structure.
4852 *
4853 * This routine destroys a FC port from the upper layer protocol. All the
4854 * resources associated with the port are released.
4855 **/
4856 void
destroy_port(struct lpfc_vport * vport)4857 destroy_port(struct lpfc_vport *vport)
4858 {
4859 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4860 struct lpfc_hba *phba = vport->phba;
4861
4862 lpfc_debugfs_terminate(vport);
4863 fc_remove_host(shost);
4864 scsi_remove_host(shost);
4865
4866 spin_lock_irq(&phba->port_list_lock);
4867 list_del_init(&vport->listentry);
4868 spin_unlock_irq(&phba->port_list_lock);
4869
4870 lpfc_cleanup(vport);
4871 return;
4872 }
4873
4874 /**
4875 * lpfc_get_instance - Get a unique integer ID
4876 *
4877 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4878 * uses the kernel idr facility to perform the task.
4879 *
4880 * Return codes:
4881 * instance - a unique integer ID allocated as the new instance.
4882 * -1 - lpfc get instance failed.
4883 **/
4884 int
lpfc_get_instance(void)4885 lpfc_get_instance(void)
4886 {
4887 int ret;
4888
4889 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4890 return ret < 0 ? -1 : ret;
4891 }
4892
4893 /**
4894 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4895 * @shost: pointer to SCSI host data structure.
4896 * @time: elapsed time of the scan in jiffies.
4897 *
4898 * This routine is called by the SCSI layer with a SCSI host to determine
4899 * whether the scan host is finished.
4900 *
4901 * Note: there is no scan_start function as adapter initialization will have
4902 * asynchronously kicked off the link initialization.
4903 *
4904 * Return codes
4905 * 0 - SCSI host scan is not over yet.
4906 * 1 - SCSI host scan is over.
4907 **/
lpfc_scan_finished(struct Scsi_Host * shost,unsigned long time)4908 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4909 {
4910 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4911 struct lpfc_hba *phba = vport->phba;
4912 int stat = 0;
4913
4914 spin_lock_irq(shost->host_lock);
4915
4916 if (vport->load_flag & FC_UNLOADING) {
4917 stat = 1;
4918 goto finished;
4919 }
4920 if (time >= msecs_to_jiffies(30 * 1000)) {
4921 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4922 "0461 Scanning longer than 30 "
4923 "seconds. Continuing initialization\n");
4924 stat = 1;
4925 goto finished;
4926 }
4927 if (time >= msecs_to_jiffies(15 * 1000) &&
4928 phba->link_state <= LPFC_LINK_DOWN) {
4929 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4930 "0465 Link down longer than 15 "
4931 "seconds. Continuing initialization\n");
4932 stat = 1;
4933 goto finished;
4934 }
4935
4936 if (vport->port_state != LPFC_VPORT_READY)
4937 goto finished;
4938 if (vport->num_disc_nodes || vport->fc_prli_sent)
4939 goto finished;
4940 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
4941 goto finished;
4942 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4943 goto finished;
4944
4945 stat = 1;
4946
4947 finished:
4948 spin_unlock_irq(shost->host_lock);
4949 return stat;
4950 }
4951
lpfc_host_supported_speeds_set(struct Scsi_Host * shost)4952 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4953 {
4954 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4955 struct lpfc_hba *phba = vport->phba;
4956
4957 fc_host_supported_speeds(shost) = 0;
4958 /*
4959 * Avoid reporting supported link speed for FCoE as it can't be
4960 * controlled via FCoE.
4961 */
4962 if (phba->hba_flag & HBA_FCOE_MODE)
4963 return;
4964
4965 if (phba->lmt & LMT_256Gb)
4966 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT;
4967 if (phba->lmt & LMT_128Gb)
4968 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4969 if (phba->lmt & LMT_64Gb)
4970 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4971 if (phba->lmt & LMT_32Gb)
4972 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4973 if (phba->lmt & LMT_16Gb)
4974 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4975 if (phba->lmt & LMT_10Gb)
4976 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4977 if (phba->lmt & LMT_8Gb)
4978 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4979 if (phba->lmt & LMT_4Gb)
4980 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4981 if (phba->lmt & LMT_2Gb)
4982 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4983 if (phba->lmt & LMT_1Gb)
4984 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4985 }
4986
4987 /**
4988 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
4989 * @shost: pointer to SCSI host data structure.
4990 *
4991 * This routine initializes a given SCSI host attributes on a FC port. The
4992 * SCSI host can be either on top of a physical port or a virtual port.
4993 **/
lpfc_host_attrib_init(struct Scsi_Host * shost)4994 void lpfc_host_attrib_init(struct Scsi_Host *shost)
4995 {
4996 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4997 struct lpfc_hba *phba = vport->phba;
4998 /*
4999 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
5000 */
5001
5002 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
5003 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
5004 fc_host_supported_classes(shost) = FC_COS_CLASS3;
5005
5006 memset(fc_host_supported_fc4s(shost), 0,
5007 sizeof(fc_host_supported_fc4s(shost)));
5008 fc_host_supported_fc4s(shost)[2] = 1;
5009 fc_host_supported_fc4s(shost)[7] = 1;
5010
5011 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
5012 sizeof fc_host_symbolic_name(shost));
5013
5014 lpfc_host_supported_speeds_set(shost);
5015
5016 fc_host_maxframe_size(shost) =
5017 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
5018 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
5019
5020 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
5021
5022 /* This value is also unchanging */
5023 memset(fc_host_active_fc4s(shost), 0,
5024 sizeof(fc_host_active_fc4s(shost)));
5025 fc_host_active_fc4s(shost)[2] = 1;
5026 fc_host_active_fc4s(shost)[7] = 1;
5027
5028 fc_host_max_npiv_vports(shost) = phba->max_vpi;
5029 spin_lock_irq(shost->host_lock);
5030 vport->load_flag &= ~FC_LOADING;
5031 spin_unlock_irq(shost->host_lock);
5032 }
5033
5034 /**
5035 * lpfc_stop_port_s3 - Stop SLI3 device port
5036 * @phba: pointer to lpfc hba data structure.
5037 *
5038 * This routine is invoked to stop an SLI3 device port, it stops the device
5039 * from generating interrupts and stops the device driver's timers for the
5040 * device.
5041 **/
5042 static void
lpfc_stop_port_s3(struct lpfc_hba * phba)5043 lpfc_stop_port_s3(struct lpfc_hba *phba)
5044 {
5045 /* Clear all interrupt enable conditions */
5046 writel(0, phba->HCregaddr);
5047 readl(phba->HCregaddr); /* flush */
5048 /* Clear all pending interrupts */
5049 writel(0xffffffff, phba->HAregaddr);
5050 readl(phba->HAregaddr); /* flush */
5051
5052 /* Reset some HBA SLI setup states */
5053 lpfc_stop_hba_timers(phba);
5054 phba->pport->work_port_events = 0;
5055 }
5056
5057 /**
5058 * lpfc_stop_port_s4 - Stop SLI4 device port
5059 * @phba: pointer to lpfc hba data structure.
5060 *
5061 * This routine is invoked to stop an SLI4 device port, it stops the device
5062 * from generating interrupts and stops the device driver's timers for the
5063 * device.
5064 **/
5065 static void
lpfc_stop_port_s4(struct lpfc_hba * phba)5066 lpfc_stop_port_s4(struct lpfc_hba *phba)
5067 {
5068 /* Reset some HBA SLI4 setup states */
5069 lpfc_stop_hba_timers(phba);
5070 if (phba->pport)
5071 phba->pport->work_port_events = 0;
5072 phba->sli4_hba.intr_enable = 0;
5073 }
5074
5075 /**
5076 * lpfc_stop_port - Wrapper function for stopping hba port
5077 * @phba: Pointer to HBA context object.
5078 *
5079 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
5080 * the API jump table function pointer from the lpfc_hba struct.
5081 **/
5082 void
lpfc_stop_port(struct lpfc_hba * phba)5083 lpfc_stop_port(struct lpfc_hba *phba)
5084 {
5085 phba->lpfc_stop_port(phba);
5086
5087 if (phba->wq)
5088 flush_workqueue(phba->wq);
5089 }
5090
5091 /**
5092 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
5093 * @phba: Pointer to hba for which this call is being executed.
5094 *
5095 * This routine starts the timer waiting for the FCF rediscovery to complete.
5096 **/
5097 void
lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba * phba)5098 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
5099 {
5100 unsigned long fcf_redisc_wait_tmo =
5101 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
5102 /* Start fcf rediscovery wait period timer */
5103 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
5104 spin_lock_irq(&phba->hbalock);
5105 /* Allow action to new fcf asynchronous event */
5106 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
5107 /* Mark the FCF rediscovery pending state */
5108 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
5109 spin_unlock_irq(&phba->hbalock);
5110 }
5111
5112 /**
5113 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
5114 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5115 *
5116 * This routine is invoked when waiting for FCF table rediscover has been
5117 * timed out. If new FCF record(s) has (have) been discovered during the
5118 * wait period, a new FCF event shall be added to the FCOE async event
5119 * list, and then worker thread shall be waked up for processing from the
5120 * worker thread context.
5121 **/
5122 static void
lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list * t)5123 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
5124 {
5125 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
5126
5127 /* Don't send FCF rediscovery event if timer cancelled */
5128 spin_lock_irq(&phba->hbalock);
5129 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
5130 spin_unlock_irq(&phba->hbalock);
5131 return;
5132 }
5133 /* Clear FCF rediscovery timer pending flag */
5134 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
5135 /* FCF rediscovery event to worker thread */
5136 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
5137 spin_unlock_irq(&phba->hbalock);
5138 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
5139 "2776 FCF rediscover quiescent timer expired\n");
5140 /* wake up worker thread */
5141 lpfc_worker_wake_up(phba);
5142 }
5143
5144 /**
5145 * lpfc_vmid_poll - VMID timeout detection
5146 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5147 *
5148 * This routine is invoked when there is no I/O on by a VM for the specified
5149 * amount of time. When this situation is detected, the VMID has to be
5150 * deregistered from the switch and all the local resources freed. The VMID
5151 * will be reassigned to the VM once the I/O begins.
5152 **/
5153 static void
lpfc_vmid_poll(struct timer_list * t)5154 lpfc_vmid_poll(struct timer_list *t)
5155 {
5156 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll);
5157 u32 wake_up = 0;
5158
5159 /* check if there is a need to issue QFPA */
5160 if (phba->pport->vmid_priority_tagging) {
5161 wake_up = 1;
5162 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA;
5163 }
5164
5165 /* Is the vmid inactivity timer enabled */
5166 if (phba->pport->vmid_inactivity_timeout ||
5167 phba->pport->load_flag & FC_DEREGISTER_ALL_APP_ID) {
5168 wake_up = 1;
5169 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID;
5170 }
5171
5172 if (wake_up)
5173 lpfc_worker_wake_up(phba);
5174
5175 /* restart the timer for the next iteration */
5176 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 *
5177 LPFC_VMID_TIMER));
5178 }
5179
5180 /**
5181 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
5182 * @phba: pointer to lpfc hba data structure.
5183 * @acqe_link: pointer to the async link completion queue entry.
5184 *
5185 * This routine is to parse the SLI4 link-attention link fault code.
5186 **/
5187 static void
lpfc_sli4_parse_latt_fault(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5188 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
5189 struct lpfc_acqe_link *acqe_link)
5190 {
5191 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
5192 case LPFC_ASYNC_LINK_FAULT_NONE:
5193 case LPFC_ASYNC_LINK_FAULT_LOCAL:
5194 case LPFC_ASYNC_LINK_FAULT_REMOTE:
5195 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
5196 break;
5197 default:
5198 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5199 "0398 Unknown link fault code: x%x\n",
5200 bf_get(lpfc_acqe_link_fault, acqe_link));
5201 break;
5202 }
5203 }
5204
5205 /**
5206 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5207 * @phba: pointer to lpfc hba data structure.
5208 * @acqe_link: pointer to the async link completion queue entry.
5209 *
5210 * This routine is to parse the SLI4 link attention type and translate it
5211 * into the base driver's link attention type coding.
5212 *
5213 * Return: Link attention type in terms of base driver's coding.
5214 **/
5215 static uint8_t
lpfc_sli4_parse_latt_type(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5216 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
5217 struct lpfc_acqe_link *acqe_link)
5218 {
5219 uint8_t att_type;
5220
5221 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
5222 case LPFC_ASYNC_LINK_STATUS_DOWN:
5223 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
5224 att_type = LPFC_ATT_LINK_DOWN;
5225 break;
5226 case LPFC_ASYNC_LINK_STATUS_UP:
5227 /* Ignore physical link up events - wait for logical link up */
5228 att_type = LPFC_ATT_RESERVED;
5229 break;
5230 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
5231 att_type = LPFC_ATT_LINK_UP;
5232 break;
5233 default:
5234 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5235 "0399 Invalid link attention type: x%x\n",
5236 bf_get(lpfc_acqe_link_status, acqe_link));
5237 att_type = LPFC_ATT_RESERVED;
5238 break;
5239 }
5240 return att_type;
5241 }
5242
5243 /**
5244 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
5245 * @phba: pointer to lpfc hba data structure.
5246 *
5247 * This routine is to get an SLI3 FC port's link speed in Mbps.
5248 *
5249 * Return: link speed in terms of Mbps.
5250 **/
5251 uint32_t
lpfc_sli_port_speed_get(struct lpfc_hba * phba)5252 lpfc_sli_port_speed_get(struct lpfc_hba *phba)
5253 {
5254 uint32_t link_speed;
5255
5256 if (!lpfc_is_link_up(phba))
5257 return 0;
5258
5259 if (phba->sli_rev <= LPFC_SLI_REV3) {
5260 switch (phba->fc_linkspeed) {
5261 case LPFC_LINK_SPEED_1GHZ:
5262 link_speed = 1000;
5263 break;
5264 case LPFC_LINK_SPEED_2GHZ:
5265 link_speed = 2000;
5266 break;
5267 case LPFC_LINK_SPEED_4GHZ:
5268 link_speed = 4000;
5269 break;
5270 case LPFC_LINK_SPEED_8GHZ:
5271 link_speed = 8000;
5272 break;
5273 case LPFC_LINK_SPEED_10GHZ:
5274 link_speed = 10000;
5275 break;
5276 case LPFC_LINK_SPEED_16GHZ:
5277 link_speed = 16000;
5278 break;
5279 default:
5280 link_speed = 0;
5281 }
5282 } else {
5283 if (phba->sli4_hba.link_state.logical_speed)
5284 link_speed =
5285 phba->sli4_hba.link_state.logical_speed;
5286 else
5287 link_speed = phba->sli4_hba.link_state.speed;
5288 }
5289 return link_speed;
5290 }
5291
5292 /**
5293 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
5294 * @phba: pointer to lpfc hba data structure.
5295 * @evt_code: asynchronous event code.
5296 * @speed_code: asynchronous event link speed code.
5297 *
5298 * This routine is to parse the giving SLI4 async event link speed code into
5299 * value of Mbps for the link speed.
5300 *
5301 * Return: link speed in terms of Mbps.
5302 **/
5303 static uint32_t
lpfc_sli4_port_speed_parse(struct lpfc_hba * phba,uint32_t evt_code,uint8_t speed_code)5304 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
5305 uint8_t speed_code)
5306 {
5307 uint32_t port_speed;
5308
5309 switch (evt_code) {
5310 case LPFC_TRAILER_CODE_LINK:
5311 switch (speed_code) {
5312 case LPFC_ASYNC_LINK_SPEED_ZERO:
5313 port_speed = 0;
5314 break;
5315 case LPFC_ASYNC_LINK_SPEED_10MBPS:
5316 port_speed = 10;
5317 break;
5318 case LPFC_ASYNC_LINK_SPEED_100MBPS:
5319 port_speed = 100;
5320 break;
5321 case LPFC_ASYNC_LINK_SPEED_1GBPS:
5322 port_speed = 1000;
5323 break;
5324 case LPFC_ASYNC_LINK_SPEED_10GBPS:
5325 port_speed = 10000;
5326 break;
5327 case LPFC_ASYNC_LINK_SPEED_20GBPS:
5328 port_speed = 20000;
5329 break;
5330 case LPFC_ASYNC_LINK_SPEED_25GBPS:
5331 port_speed = 25000;
5332 break;
5333 case LPFC_ASYNC_LINK_SPEED_40GBPS:
5334 port_speed = 40000;
5335 break;
5336 case LPFC_ASYNC_LINK_SPEED_100GBPS:
5337 port_speed = 100000;
5338 break;
5339 default:
5340 port_speed = 0;
5341 }
5342 break;
5343 case LPFC_TRAILER_CODE_FC:
5344 switch (speed_code) {
5345 case LPFC_FC_LA_SPEED_UNKNOWN:
5346 port_speed = 0;
5347 break;
5348 case LPFC_FC_LA_SPEED_1G:
5349 port_speed = 1000;
5350 break;
5351 case LPFC_FC_LA_SPEED_2G:
5352 port_speed = 2000;
5353 break;
5354 case LPFC_FC_LA_SPEED_4G:
5355 port_speed = 4000;
5356 break;
5357 case LPFC_FC_LA_SPEED_8G:
5358 port_speed = 8000;
5359 break;
5360 case LPFC_FC_LA_SPEED_10G:
5361 port_speed = 10000;
5362 break;
5363 case LPFC_FC_LA_SPEED_16G:
5364 port_speed = 16000;
5365 break;
5366 case LPFC_FC_LA_SPEED_32G:
5367 port_speed = 32000;
5368 break;
5369 case LPFC_FC_LA_SPEED_64G:
5370 port_speed = 64000;
5371 break;
5372 case LPFC_FC_LA_SPEED_128G:
5373 port_speed = 128000;
5374 break;
5375 case LPFC_FC_LA_SPEED_256G:
5376 port_speed = 256000;
5377 break;
5378 default:
5379 port_speed = 0;
5380 }
5381 break;
5382 default:
5383 port_speed = 0;
5384 }
5385 return port_speed;
5386 }
5387
5388 /**
5389 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
5390 * @phba: pointer to lpfc hba data structure.
5391 * @acqe_link: pointer to the async link completion queue entry.
5392 *
5393 * This routine is to handle the SLI4 asynchronous FCoE link event.
5394 **/
5395 static void
lpfc_sli4_async_link_evt(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5396 lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
5397 struct lpfc_acqe_link *acqe_link)
5398 {
5399 LPFC_MBOXQ_t *pmb;
5400 MAILBOX_t *mb;
5401 struct lpfc_mbx_read_top *la;
5402 uint8_t att_type;
5403 int rc;
5404
5405 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
5406 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
5407 return;
5408 phba->fcoe_eventtag = acqe_link->event_tag;
5409 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5410 if (!pmb) {
5411 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5412 "0395 The mboxq allocation failed\n");
5413 return;
5414 }
5415
5416 rc = lpfc_mbox_rsrc_prep(phba, pmb);
5417 if (rc) {
5418 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5419 "0396 mailbox allocation failed\n");
5420 goto out_free_pmb;
5421 }
5422
5423 /* Cleanup any outstanding ELS commands */
5424 lpfc_els_flush_all_cmd(phba);
5425
5426 /* Block ELS IOCBs until we have done process link event */
5427 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5428
5429 /* Update link event statistics */
5430 phba->sli.slistat.link_event++;
5431
5432 /* Create lpfc_handle_latt mailbox command from link ACQE */
5433 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf);
5434 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5435 pmb->vport = phba->pport;
5436
5437 /* Keep the link status for extra SLI4 state machine reference */
5438 phba->sli4_hba.link_state.speed =
5439 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
5440 bf_get(lpfc_acqe_link_speed, acqe_link));
5441 phba->sli4_hba.link_state.duplex =
5442 bf_get(lpfc_acqe_link_duplex, acqe_link);
5443 phba->sli4_hba.link_state.status =
5444 bf_get(lpfc_acqe_link_status, acqe_link);
5445 phba->sli4_hba.link_state.type =
5446 bf_get(lpfc_acqe_link_type, acqe_link);
5447 phba->sli4_hba.link_state.number =
5448 bf_get(lpfc_acqe_link_number, acqe_link);
5449 phba->sli4_hba.link_state.fault =
5450 bf_get(lpfc_acqe_link_fault, acqe_link);
5451 phba->sli4_hba.link_state.logical_speed =
5452 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
5453
5454 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5455 "2900 Async FC/FCoE Link event - Speed:%dGBit "
5456 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
5457 "Logical speed:%dMbps Fault:%d\n",
5458 phba->sli4_hba.link_state.speed,
5459 phba->sli4_hba.link_state.topology,
5460 phba->sli4_hba.link_state.status,
5461 phba->sli4_hba.link_state.type,
5462 phba->sli4_hba.link_state.number,
5463 phba->sli4_hba.link_state.logical_speed,
5464 phba->sli4_hba.link_state.fault);
5465 /*
5466 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
5467 * topology info. Note: Optional for non FC-AL ports.
5468 */
5469 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
5470 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5471 if (rc == MBX_NOT_FINISHED)
5472 goto out_free_pmb;
5473 return;
5474 }
5475 /*
5476 * For FCoE Mode: fill in all the topology information we need and call
5477 * the READ_TOPOLOGY completion routine to continue without actually
5478 * sending the READ_TOPOLOGY mailbox command to the port.
5479 */
5480 /* Initialize completion status */
5481 mb = &pmb->u.mb;
5482 mb->mbxStatus = MBX_SUCCESS;
5483
5484 /* Parse port fault information field */
5485 lpfc_sli4_parse_latt_fault(phba, acqe_link);
5486
5487 /* Parse and translate link attention fields */
5488 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
5489 la->eventTag = acqe_link->event_tag;
5490 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
5491 bf_set(lpfc_mbx_read_top_link_spd, la,
5492 (bf_get(lpfc_acqe_link_speed, acqe_link)));
5493
5494 /* Fake the the following irrelvant fields */
5495 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
5496 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
5497 bf_set(lpfc_mbx_read_top_il, la, 0);
5498 bf_set(lpfc_mbx_read_top_pb, la, 0);
5499 bf_set(lpfc_mbx_read_top_fa, la, 0);
5500 bf_set(lpfc_mbx_read_top_mm, la, 0);
5501
5502 /* Invoke the lpfc_handle_latt mailbox command callback function */
5503 lpfc_mbx_cmpl_read_topology(phba, pmb);
5504
5505 return;
5506
5507 out_free_pmb:
5508 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
5509 }
5510
5511 /**
5512 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
5513 * topology.
5514 * @phba: pointer to lpfc hba data structure.
5515 * @speed_code: asynchronous event link speed code.
5516 *
5517 * This routine is to parse the giving SLI4 async event link speed code into
5518 * value of Read topology link speed.
5519 *
5520 * Return: link speed in terms of Read topology.
5521 **/
5522 static uint8_t
lpfc_async_link_speed_to_read_top(struct lpfc_hba * phba,uint8_t speed_code)5523 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5524 {
5525 uint8_t port_speed;
5526
5527 switch (speed_code) {
5528 case LPFC_FC_LA_SPEED_1G:
5529 port_speed = LPFC_LINK_SPEED_1GHZ;
5530 break;
5531 case LPFC_FC_LA_SPEED_2G:
5532 port_speed = LPFC_LINK_SPEED_2GHZ;
5533 break;
5534 case LPFC_FC_LA_SPEED_4G:
5535 port_speed = LPFC_LINK_SPEED_4GHZ;
5536 break;
5537 case LPFC_FC_LA_SPEED_8G:
5538 port_speed = LPFC_LINK_SPEED_8GHZ;
5539 break;
5540 case LPFC_FC_LA_SPEED_16G:
5541 port_speed = LPFC_LINK_SPEED_16GHZ;
5542 break;
5543 case LPFC_FC_LA_SPEED_32G:
5544 port_speed = LPFC_LINK_SPEED_32GHZ;
5545 break;
5546 case LPFC_FC_LA_SPEED_64G:
5547 port_speed = LPFC_LINK_SPEED_64GHZ;
5548 break;
5549 case LPFC_FC_LA_SPEED_128G:
5550 port_speed = LPFC_LINK_SPEED_128GHZ;
5551 break;
5552 case LPFC_FC_LA_SPEED_256G:
5553 port_speed = LPFC_LINK_SPEED_256GHZ;
5554 break;
5555 default:
5556 port_speed = 0;
5557 break;
5558 }
5559
5560 return port_speed;
5561 }
5562
5563 void
lpfc_cgn_dump_rxmonitor(struct lpfc_hba * phba)5564 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba)
5565 {
5566 if (!phba->rx_monitor) {
5567 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5568 "4411 Rx Monitor Info is empty.\n");
5569 } else {
5570 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0,
5571 LPFC_MAX_RXMONITOR_DUMP);
5572 }
5573 }
5574
5575 /**
5576 * lpfc_cgn_update_stat - Save data into congestion stats buffer
5577 * @phba: pointer to lpfc hba data structure.
5578 * @dtag: FPIN descriptor received
5579 *
5580 * Increment the FPIN received counter/time when it happens.
5581 */
5582 void
lpfc_cgn_update_stat(struct lpfc_hba * phba,uint32_t dtag)5583 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag)
5584 {
5585 struct lpfc_cgn_info *cp;
5586 struct tm broken;
5587 struct timespec64 cur_time;
5588 u32 cnt;
5589 u32 value;
5590
5591 /* Make sure we have a congestion info buffer */
5592 if (!phba->cgn_i)
5593 return;
5594 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5595 ktime_get_real_ts64(&cur_time);
5596 time64_to_tm(cur_time.tv_sec, 0, &broken);
5597
5598 /* Update congestion statistics */
5599 switch (dtag) {
5600 case ELS_DTAG_LNK_INTEGRITY:
5601 cnt = le32_to_cpu(cp->link_integ_notification);
5602 cnt++;
5603 cp->link_integ_notification = cpu_to_le32(cnt);
5604
5605 cp->cgn_stat_lnk_month = broken.tm_mon + 1;
5606 cp->cgn_stat_lnk_day = broken.tm_mday;
5607 cp->cgn_stat_lnk_year = broken.tm_year - 100;
5608 cp->cgn_stat_lnk_hour = broken.tm_hour;
5609 cp->cgn_stat_lnk_min = broken.tm_min;
5610 cp->cgn_stat_lnk_sec = broken.tm_sec;
5611 break;
5612 case ELS_DTAG_DELIVERY:
5613 cnt = le32_to_cpu(cp->delivery_notification);
5614 cnt++;
5615 cp->delivery_notification = cpu_to_le32(cnt);
5616
5617 cp->cgn_stat_del_month = broken.tm_mon + 1;
5618 cp->cgn_stat_del_day = broken.tm_mday;
5619 cp->cgn_stat_del_year = broken.tm_year - 100;
5620 cp->cgn_stat_del_hour = broken.tm_hour;
5621 cp->cgn_stat_del_min = broken.tm_min;
5622 cp->cgn_stat_del_sec = broken.tm_sec;
5623 break;
5624 case ELS_DTAG_PEER_CONGEST:
5625 cnt = le32_to_cpu(cp->cgn_peer_notification);
5626 cnt++;
5627 cp->cgn_peer_notification = cpu_to_le32(cnt);
5628
5629 cp->cgn_stat_peer_month = broken.tm_mon + 1;
5630 cp->cgn_stat_peer_day = broken.tm_mday;
5631 cp->cgn_stat_peer_year = broken.tm_year - 100;
5632 cp->cgn_stat_peer_hour = broken.tm_hour;
5633 cp->cgn_stat_peer_min = broken.tm_min;
5634 cp->cgn_stat_peer_sec = broken.tm_sec;
5635 break;
5636 case ELS_DTAG_CONGESTION:
5637 cnt = le32_to_cpu(cp->cgn_notification);
5638 cnt++;
5639 cp->cgn_notification = cpu_to_le32(cnt);
5640
5641 cp->cgn_stat_cgn_month = broken.tm_mon + 1;
5642 cp->cgn_stat_cgn_day = broken.tm_mday;
5643 cp->cgn_stat_cgn_year = broken.tm_year - 100;
5644 cp->cgn_stat_cgn_hour = broken.tm_hour;
5645 cp->cgn_stat_cgn_min = broken.tm_min;
5646 cp->cgn_stat_cgn_sec = broken.tm_sec;
5647 }
5648 if (phba->cgn_fpin_frequency &&
5649 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5650 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5651 cp->cgn_stat_npm = value;
5652 }
5653 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5654 LPFC_CGN_CRC32_SEED);
5655 cp->cgn_info_crc = cpu_to_le32(value);
5656 }
5657
5658 /**
5659 * lpfc_cgn_save_evt_cnt - Save data into registered congestion buffer
5660 * @phba: pointer to lpfc hba data structure.
5661 *
5662 * Save the congestion event data every minute.
5663 * On the hour collapse all the minute data into hour data. Every day
5664 * collapse all the hour data into daily data. Separate driver
5665 * and fabrc congestion event counters that will be saved out
5666 * to the registered congestion buffer every minute.
5667 */
5668 static void
lpfc_cgn_save_evt_cnt(struct lpfc_hba * phba)5669 lpfc_cgn_save_evt_cnt(struct lpfc_hba *phba)
5670 {
5671 struct lpfc_cgn_info *cp;
5672 struct tm broken;
5673 struct timespec64 cur_time;
5674 uint32_t i, index;
5675 uint16_t value, mvalue;
5676 uint64_t bps;
5677 uint32_t mbps;
5678 uint32_t dvalue, wvalue, lvalue, avalue;
5679 uint64_t latsum;
5680 __le16 *ptr;
5681 __le32 *lptr;
5682 __le16 *mptr;
5683
5684 /* Make sure we have a congestion info buffer */
5685 if (!phba->cgn_i)
5686 return;
5687 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5688
5689 if (time_before(jiffies, phba->cgn_evt_timestamp))
5690 return;
5691 phba->cgn_evt_timestamp = jiffies +
5692 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
5693 phba->cgn_evt_minute++;
5694
5695 /* We should get to this point in the routine on 1 minute intervals */
5696
5697 ktime_get_real_ts64(&cur_time);
5698 time64_to_tm(cur_time.tv_sec, 0, &broken);
5699
5700 if (phba->cgn_fpin_frequency &&
5701 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5702 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5703 cp->cgn_stat_npm = value;
5704 }
5705
5706 /* Read and clear the latency counters for this minute */
5707 lvalue = atomic_read(&phba->cgn_latency_evt_cnt);
5708 latsum = atomic64_read(&phba->cgn_latency_evt);
5709 atomic_set(&phba->cgn_latency_evt_cnt, 0);
5710 atomic64_set(&phba->cgn_latency_evt, 0);
5711
5712 /* We need to store MB/sec bandwidth in the congestion information.
5713 * block_cnt is count of 512 byte blocks for the entire minute,
5714 * bps will get bytes per sec before finally converting to MB/sec.
5715 */
5716 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512;
5717 phba->rx_block_cnt = 0;
5718 mvalue = bps / (1024 * 1024); /* convert to MB/sec */
5719
5720 /* Every minute */
5721 /* cgn parameters */
5722 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
5723 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
5724 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
5725 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
5726
5727 /* Fill in default LUN qdepth */
5728 value = (uint16_t)(phba->pport->cfg_lun_queue_depth);
5729 cp->cgn_lunq = cpu_to_le16(value);
5730
5731 /* Record congestion buffer info - every minute
5732 * cgn_driver_evt_cnt (Driver events)
5733 * cgn_fabric_warn_cnt (Congestion Warnings)
5734 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency)
5735 * cgn_fabric_alarm_cnt (Congestion Alarms)
5736 */
5737 index = ++cp->cgn_index_minute;
5738 if (cp->cgn_index_minute == LPFC_MIN_HOUR) {
5739 cp->cgn_index_minute = 0;
5740 index = 0;
5741 }
5742
5743 /* Get the number of driver events in this sample and reset counter */
5744 dvalue = atomic_read(&phba->cgn_driver_evt_cnt);
5745 atomic_set(&phba->cgn_driver_evt_cnt, 0);
5746
5747 /* Get the number of warning events - FPIN and Signal for this minute */
5748 wvalue = 0;
5749 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) ||
5750 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
5751 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5752 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt);
5753 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
5754
5755 /* Get the number of alarm events - FPIN and Signal for this minute */
5756 avalue = 0;
5757 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) ||
5758 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5759 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt);
5760 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
5761
5762 /* Collect the driver, warning, alarm and latency counts for this
5763 * minute into the driver congestion buffer.
5764 */
5765 ptr = &cp->cgn_drvr_min[index];
5766 value = (uint16_t)dvalue;
5767 *ptr = cpu_to_le16(value);
5768
5769 ptr = &cp->cgn_warn_min[index];
5770 value = (uint16_t)wvalue;
5771 *ptr = cpu_to_le16(value);
5772
5773 ptr = &cp->cgn_alarm_min[index];
5774 value = (uint16_t)avalue;
5775 *ptr = cpu_to_le16(value);
5776
5777 lptr = &cp->cgn_latency_min[index];
5778 if (lvalue) {
5779 lvalue = (uint32_t)div_u64(latsum, lvalue);
5780 *lptr = cpu_to_le32(lvalue);
5781 } else {
5782 *lptr = 0;
5783 }
5784
5785 /* Collect the bandwidth value into the driver's congesion buffer. */
5786 mptr = &cp->cgn_bw_min[index];
5787 *mptr = cpu_to_le16(mvalue);
5788
5789 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5790 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n",
5791 index, dvalue, wvalue, *lptr, mvalue, avalue);
5792
5793 /* Every hour */
5794 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) {
5795 /* Record congestion buffer info - every hour
5796 * Collapse all minutes into an hour
5797 */
5798 index = ++cp->cgn_index_hour;
5799 if (cp->cgn_index_hour == LPFC_HOUR_DAY) {
5800 cp->cgn_index_hour = 0;
5801 index = 0;
5802 }
5803
5804 dvalue = 0;
5805 wvalue = 0;
5806 lvalue = 0;
5807 avalue = 0;
5808 mvalue = 0;
5809 mbps = 0;
5810 for (i = 0; i < LPFC_MIN_HOUR; i++) {
5811 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]);
5812 wvalue += le16_to_cpu(cp->cgn_warn_min[i]);
5813 lvalue += le32_to_cpu(cp->cgn_latency_min[i]);
5814 mbps += le16_to_cpu(cp->cgn_bw_min[i]);
5815 avalue += le16_to_cpu(cp->cgn_alarm_min[i]);
5816 }
5817 if (lvalue) /* Avg of latency averages */
5818 lvalue /= LPFC_MIN_HOUR;
5819 if (mbps) /* Avg of Bandwidth averages */
5820 mvalue = mbps / LPFC_MIN_HOUR;
5821
5822 lptr = &cp->cgn_drvr_hr[index];
5823 *lptr = cpu_to_le32(dvalue);
5824 lptr = &cp->cgn_warn_hr[index];
5825 *lptr = cpu_to_le32(wvalue);
5826 lptr = &cp->cgn_latency_hr[index];
5827 *lptr = cpu_to_le32(lvalue);
5828 mptr = &cp->cgn_bw_hr[index];
5829 *mptr = cpu_to_le16(mvalue);
5830 lptr = &cp->cgn_alarm_hr[index];
5831 *lptr = cpu_to_le32(avalue);
5832
5833 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5834 "2419 Congestion Info - hour "
5835 "(%d): %d %d %d %d %d\n",
5836 index, dvalue, wvalue, lvalue, mvalue, avalue);
5837 }
5838
5839 /* Every day */
5840 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) {
5841 /* Record congestion buffer info - every hour
5842 * Collapse all hours into a day. Rotate days
5843 * after LPFC_MAX_CGN_DAYS.
5844 */
5845 index = ++cp->cgn_index_day;
5846 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) {
5847 cp->cgn_index_day = 0;
5848 index = 0;
5849 }
5850
5851 /* Anytime we overwrite daily index 0, after we wrap,
5852 * we will be overwriting the oldest day, so we must
5853 * update the congestion data start time for that day.
5854 * That start time should have previously been saved after
5855 * we wrote the last days worth of data.
5856 */
5857 if ((phba->hba_flag & HBA_CGN_DAY_WRAP) && index == 0) {
5858 time64_to_tm(phba->cgn_daily_ts.tv_sec, 0, &broken);
5859
5860 cp->cgn_info_month = broken.tm_mon + 1;
5861 cp->cgn_info_day = broken.tm_mday;
5862 cp->cgn_info_year = broken.tm_year - 100;
5863 cp->cgn_info_hour = broken.tm_hour;
5864 cp->cgn_info_minute = broken.tm_min;
5865 cp->cgn_info_second = broken.tm_sec;
5866
5867 lpfc_printf_log
5868 (phba, KERN_INFO, LOG_CGN_MGMT,
5869 "2646 CGNInfo idx0 Start Time: "
5870 "%d/%d/%d %d:%d:%d\n",
5871 cp->cgn_info_day, cp->cgn_info_month,
5872 cp->cgn_info_year, cp->cgn_info_hour,
5873 cp->cgn_info_minute, cp->cgn_info_second);
5874 }
5875
5876 dvalue = 0;
5877 wvalue = 0;
5878 lvalue = 0;
5879 mvalue = 0;
5880 mbps = 0;
5881 avalue = 0;
5882 for (i = 0; i < LPFC_HOUR_DAY; i++) {
5883 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]);
5884 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]);
5885 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]);
5886 mbps += le16_to_cpu(cp->cgn_bw_hr[i]);
5887 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]);
5888 }
5889 if (lvalue) /* Avg of latency averages */
5890 lvalue /= LPFC_HOUR_DAY;
5891 if (mbps) /* Avg of Bandwidth averages */
5892 mvalue = mbps / LPFC_HOUR_DAY;
5893
5894 lptr = &cp->cgn_drvr_day[index];
5895 *lptr = cpu_to_le32(dvalue);
5896 lptr = &cp->cgn_warn_day[index];
5897 *lptr = cpu_to_le32(wvalue);
5898 lptr = &cp->cgn_latency_day[index];
5899 *lptr = cpu_to_le32(lvalue);
5900 mptr = &cp->cgn_bw_day[index];
5901 *mptr = cpu_to_le16(mvalue);
5902 lptr = &cp->cgn_alarm_day[index];
5903 *lptr = cpu_to_le32(avalue);
5904
5905 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5906 "2420 Congestion Info - daily (%d): "
5907 "%d %d %d %d %d\n",
5908 index, dvalue, wvalue, lvalue, mvalue, avalue);
5909
5910 /* We just wrote LPFC_MAX_CGN_DAYS of data,
5911 * so we are wrapped on any data after this.
5912 * Save this as the start time for the next day.
5913 */
5914 if (index == (LPFC_MAX_CGN_DAYS - 1)) {
5915 phba->hba_flag |= HBA_CGN_DAY_WRAP;
5916 ktime_get_real_ts64(&phba->cgn_daily_ts);
5917 }
5918 }
5919
5920 /* Use the frequency found in the last rcv'ed FPIN */
5921 value = phba->cgn_fpin_frequency;
5922 cp->cgn_warn_freq = cpu_to_le16(value);
5923 cp->cgn_alarm_freq = cpu_to_le16(value);
5924
5925 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5926 LPFC_CGN_CRC32_SEED);
5927 cp->cgn_info_crc = cpu_to_le32(lvalue);
5928 }
5929
5930 /**
5931 * lpfc_calc_cmf_latency - latency from start of rxate timer interval
5932 * @phba: The Hba for which this call is being executed.
5933 *
5934 * The routine calculates the latency from the beginning of the CMF timer
5935 * interval to the current point in time. It is called from IO completion
5936 * when we exceed our Bandwidth limitation for the time interval.
5937 */
5938 uint32_t
lpfc_calc_cmf_latency(struct lpfc_hba * phba)5939 lpfc_calc_cmf_latency(struct lpfc_hba *phba)
5940 {
5941 struct timespec64 cmpl_time;
5942 uint32_t msec = 0;
5943
5944 ktime_get_real_ts64(&cmpl_time);
5945
5946 /* This routine works on a ms granularity so sec and usec are
5947 * converted accordingly.
5948 */
5949 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) {
5950 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) /
5951 NSEC_PER_MSEC;
5952 } else {
5953 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) {
5954 msec = (cmpl_time.tv_sec -
5955 phba->cmf_latency.tv_sec) * MSEC_PER_SEC;
5956 msec += ((cmpl_time.tv_nsec -
5957 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC);
5958 } else {
5959 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec -
5960 1) * MSEC_PER_SEC;
5961 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) +
5962 cmpl_time.tv_nsec) / NSEC_PER_MSEC);
5963 }
5964 }
5965 return msec;
5966 }
5967
5968 /**
5969 * lpfc_cmf_timer - This is the timer function for one congestion
5970 * rate interval.
5971 * @timer: Pointer to the high resolution timer that expired
5972 */
5973 static enum hrtimer_restart
lpfc_cmf_timer(struct hrtimer * timer)5974 lpfc_cmf_timer(struct hrtimer *timer)
5975 {
5976 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba,
5977 cmf_timer);
5978 struct rx_info_entry entry;
5979 uint32_t io_cnt;
5980 uint32_t busy, max_read;
5981 uint64_t total, rcv, lat, mbpi, extra, cnt;
5982 int timer_interval = LPFC_CMF_INTERVAL;
5983 uint32_t ms;
5984 struct lpfc_cgn_stat *cgs;
5985 int cpu;
5986
5987 /* Only restart the timer if congestion mgmt is on */
5988 if (phba->cmf_active_mode == LPFC_CFG_OFF ||
5989 !phba->cmf_latency.tv_sec) {
5990 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5991 "6224 CMF timer exit: %d %lld\n",
5992 phba->cmf_active_mode,
5993 (uint64_t)phba->cmf_latency.tv_sec);
5994 return HRTIMER_NORESTART;
5995 }
5996
5997 /* If pport is not ready yet, just exit and wait for
5998 * the next timer cycle to hit.
5999 */
6000 if (!phba->pport)
6001 goto skip;
6002
6003 /* Do not block SCSI IO while in the timer routine since
6004 * total_bytes will be cleared
6005 */
6006 atomic_set(&phba->cmf_stop_io, 1);
6007
6008 /* First we need to calculate the actual ms between
6009 * the last timer interrupt and this one. We ask for
6010 * LPFC_CMF_INTERVAL, however the actual time may
6011 * vary depending on system overhead.
6012 */
6013 ms = lpfc_calc_cmf_latency(phba);
6014
6015
6016 /* Immediately after we calculate the time since the last
6017 * timer interrupt, set the start time for the next
6018 * interrupt
6019 */
6020 ktime_get_real_ts64(&phba->cmf_latency);
6021
6022 phba->cmf_link_byte_count =
6023 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000);
6024
6025 /* Collect all the stats from the prior timer interval */
6026 total = 0;
6027 io_cnt = 0;
6028 lat = 0;
6029 rcv = 0;
6030 for_each_present_cpu(cpu) {
6031 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
6032 total += atomic64_xchg(&cgs->total_bytes, 0);
6033 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0);
6034 lat += atomic64_xchg(&cgs->rx_latency, 0);
6035 rcv += atomic64_xchg(&cgs->rcv_bytes, 0);
6036 }
6037
6038 /* Before we issue another CMF_SYNC_WQE, retrieve the BW
6039 * returned from the last CMF_SYNC_WQE issued, from
6040 * cmf_last_sync_bw. This will be the target BW for
6041 * this next timer interval.
6042 */
6043 if (phba->cmf_active_mode == LPFC_CFG_MANAGED &&
6044 phba->link_state != LPFC_LINK_DOWN &&
6045 phba->hba_flag & HBA_SETUP) {
6046 mbpi = phba->cmf_last_sync_bw;
6047 phba->cmf_last_sync_bw = 0;
6048 extra = 0;
6049
6050 /* Calculate any extra bytes needed to account for the
6051 * timer accuracy. If we are less than LPFC_CMF_INTERVAL
6052 * calculate the adjustment needed for total to reflect
6053 * a full LPFC_CMF_INTERVAL.
6054 */
6055 if (ms && ms < LPFC_CMF_INTERVAL) {
6056 cnt = div_u64(total, ms); /* bytes per ms */
6057 cnt *= LPFC_CMF_INTERVAL; /* what total should be */
6058
6059 /* If the timeout is scheduled to be shorter,
6060 * this value may skew the data, so cap it at mbpi.
6061 */
6062 if ((phba->hba_flag & HBA_SHORT_CMF) && cnt > mbpi)
6063 cnt = mbpi;
6064
6065 extra = cnt - total;
6066 }
6067 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra);
6068 } else {
6069 /* For Monitor mode or link down we want mbpi
6070 * to be the full link speed
6071 */
6072 mbpi = phba->cmf_link_byte_count;
6073 extra = 0;
6074 }
6075 phba->cmf_timer_cnt++;
6076
6077 if (io_cnt) {
6078 /* Update congestion info buffer latency in us */
6079 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt);
6080 atomic64_add(lat, &phba->cgn_latency_evt);
6081 }
6082 busy = atomic_xchg(&phba->cmf_busy, 0);
6083 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0);
6084
6085 /* Calculate MBPI for the next timer interval */
6086 if (mbpi) {
6087 if (mbpi > phba->cmf_link_byte_count ||
6088 phba->cmf_active_mode == LPFC_CFG_MONITOR)
6089 mbpi = phba->cmf_link_byte_count;
6090
6091 /* Change max_bytes_per_interval to what the prior
6092 * CMF_SYNC_WQE cmpl indicated.
6093 */
6094 if (mbpi != phba->cmf_max_bytes_per_interval)
6095 phba->cmf_max_bytes_per_interval = mbpi;
6096 }
6097
6098 /* Save rxmonitor information for debug */
6099 if (phba->rx_monitor) {
6100 entry.total_bytes = total;
6101 entry.cmf_bytes = total + extra;
6102 entry.rcv_bytes = rcv;
6103 entry.cmf_busy = busy;
6104 entry.cmf_info = phba->cmf_active_info;
6105 if (io_cnt) {
6106 entry.avg_io_latency = div_u64(lat, io_cnt);
6107 entry.avg_io_size = div_u64(rcv, io_cnt);
6108 } else {
6109 entry.avg_io_latency = 0;
6110 entry.avg_io_size = 0;
6111 }
6112 entry.max_read_cnt = max_read;
6113 entry.io_cnt = io_cnt;
6114 entry.max_bytes_per_interval = mbpi;
6115 if (phba->cmf_active_mode == LPFC_CFG_MANAGED)
6116 entry.timer_utilization = phba->cmf_last_ts;
6117 else
6118 entry.timer_utilization = ms;
6119 entry.timer_interval = ms;
6120 phba->cmf_last_ts = 0;
6121
6122 lpfc_rx_monitor_record(phba->rx_monitor, &entry);
6123 }
6124
6125 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) {
6126 /* If Monitor mode, check if we are oversubscribed
6127 * against the full line rate.
6128 */
6129 if (mbpi && total > mbpi)
6130 atomic_inc(&phba->cgn_driver_evt_cnt);
6131 }
6132 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */
6133
6134 /* Each minute save Fabric and Driver congestion information */
6135 lpfc_cgn_save_evt_cnt(phba);
6136
6137 phba->hba_flag &= ~HBA_SHORT_CMF;
6138
6139 /* Since we need to call lpfc_cgn_save_evt_cnt every minute, on the
6140 * minute, adjust our next timer interval, if needed, to ensure a
6141 * 1 minute granularity when we get the next timer interrupt.
6142 */
6143 if (time_after(jiffies + msecs_to_jiffies(LPFC_CMF_INTERVAL),
6144 phba->cgn_evt_timestamp)) {
6145 timer_interval = jiffies_to_msecs(phba->cgn_evt_timestamp -
6146 jiffies);
6147 if (timer_interval <= 0)
6148 timer_interval = LPFC_CMF_INTERVAL;
6149 else
6150 phba->hba_flag |= HBA_SHORT_CMF;
6151
6152 /* If we adjust timer_interval, max_bytes_per_interval
6153 * needs to be adjusted as well.
6154 */
6155 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
6156 timer_interval, 1000);
6157 if (phba->cmf_active_mode == LPFC_CFG_MONITOR)
6158 phba->cmf_max_bytes_per_interval =
6159 phba->cmf_link_byte_count;
6160 }
6161
6162 /* Since total_bytes has already been zero'ed, its okay to unblock
6163 * after max_bytes_per_interval is setup.
6164 */
6165 if (atomic_xchg(&phba->cmf_bw_wait, 0))
6166 queue_work(phba->wq, &phba->unblock_request_work);
6167
6168 /* SCSI IO is now unblocked */
6169 atomic_set(&phba->cmf_stop_io, 0);
6170
6171 skip:
6172 hrtimer_forward_now(timer,
6173 ktime_set(0, timer_interval * NSEC_PER_MSEC));
6174 return HRTIMER_RESTART;
6175 }
6176
6177 #define trunk_link_status(__idx)\
6178 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6179 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
6180 "Link up" : "Link down") : "NA"
6181 /* Did port __idx reported an error */
6182 #define trunk_port_fault(__idx)\
6183 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6184 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
6185
6186 static void
lpfc_update_trunk_link_status(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6187 lpfc_update_trunk_link_status(struct lpfc_hba *phba,
6188 struct lpfc_acqe_fc_la *acqe_fc)
6189 {
6190 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
6191 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
6192 u8 cnt = 0;
6193
6194 phba->sli4_hba.link_state.speed =
6195 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6196 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6197
6198 phba->sli4_hba.link_state.logical_speed =
6199 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6200 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
6201 phba->fc_linkspeed =
6202 lpfc_async_link_speed_to_read_top(
6203 phba,
6204 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6205
6206 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
6207 phba->trunk_link.link0.state =
6208 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
6209 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6210 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
6211 cnt++;
6212 }
6213 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
6214 phba->trunk_link.link1.state =
6215 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
6216 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6217 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
6218 cnt++;
6219 }
6220 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
6221 phba->trunk_link.link2.state =
6222 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
6223 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6224 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
6225 cnt++;
6226 }
6227 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
6228 phba->trunk_link.link3.state =
6229 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
6230 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6231 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
6232 cnt++;
6233 }
6234
6235 if (cnt)
6236 phba->trunk_link.phy_lnk_speed =
6237 phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6238 else
6239 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN;
6240
6241 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6242 "2910 Async FC Trunking Event - Speed:%d\n"
6243 "\tLogical speed:%d "
6244 "port0: %s port1: %s port2: %s port3: %s\n",
6245 phba->sli4_hba.link_state.speed,
6246 phba->sli4_hba.link_state.logical_speed,
6247 trunk_link_status(0), trunk_link_status(1),
6248 trunk_link_status(2), trunk_link_status(3));
6249
6250 if (phba->cmf_active_mode != LPFC_CFG_OFF)
6251 lpfc_cmf_signal_init(phba);
6252
6253 if (port_fault)
6254 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6255 "3202 trunk error:0x%x (%s) seen on port0:%s "
6256 /*
6257 * SLI-4: We have only 0xA error codes
6258 * defined as of now. print an appropriate
6259 * message in case driver needs to be updated.
6260 */
6261 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
6262 "UNDEFINED. update driver." : trunk_errmsg[err],
6263 trunk_port_fault(0), trunk_port_fault(1),
6264 trunk_port_fault(2), trunk_port_fault(3));
6265 }
6266
6267
6268 /**
6269 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
6270 * @phba: pointer to lpfc hba data structure.
6271 * @acqe_fc: pointer to the async fc completion queue entry.
6272 *
6273 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
6274 * that the event was received and then issue a read_topology mailbox command so
6275 * that the rest of the driver will treat it the same as SLI3.
6276 **/
6277 static void
lpfc_sli4_async_fc_evt(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6278 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
6279 {
6280 LPFC_MBOXQ_t *pmb;
6281 MAILBOX_t *mb;
6282 struct lpfc_mbx_read_top *la;
6283 int rc;
6284
6285 if (bf_get(lpfc_trailer_type, acqe_fc) !=
6286 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
6287 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6288 "2895 Non FC link Event detected.(%d)\n",
6289 bf_get(lpfc_trailer_type, acqe_fc));
6290 return;
6291 }
6292
6293 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6294 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
6295 lpfc_update_trunk_link_status(phba, acqe_fc);
6296 return;
6297 }
6298
6299 /* Keep the link status for extra SLI4 state machine reference */
6300 phba->sli4_hba.link_state.speed =
6301 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6302 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6303 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6304 phba->sli4_hba.link_state.topology =
6305 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
6306 phba->sli4_hba.link_state.status =
6307 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
6308 phba->sli4_hba.link_state.type =
6309 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
6310 phba->sli4_hba.link_state.number =
6311 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
6312 phba->sli4_hba.link_state.fault =
6313 bf_get(lpfc_acqe_link_fault, acqe_fc);
6314
6315 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6316 LPFC_FC_LA_TYPE_LINK_DOWN)
6317 phba->sli4_hba.link_state.logical_speed = 0;
6318 else if (!phba->sli4_hba.conf_trunk)
6319 phba->sli4_hba.link_state.logical_speed =
6320 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6321
6322 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6323 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
6324 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
6325 "%dMbps Fault:%d\n",
6326 phba->sli4_hba.link_state.speed,
6327 phba->sli4_hba.link_state.topology,
6328 phba->sli4_hba.link_state.status,
6329 phba->sli4_hba.link_state.type,
6330 phba->sli4_hba.link_state.number,
6331 phba->sli4_hba.link_state.logical_speed,
6332 phba->sli4_hba.link_state.fault);
6333 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6334 if (!pmb) {
6335 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6336 "2897 The mboxq allocation failed\n");
6337 return;
6338 }
6339 rc = lpfc_mbox_rsrc_prep(phba, pmb);
6340 if (rc) {
6341 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6342 "2898 The mboxq prep failed\n");
6343 goto out_free_pmb;
6344 }
6345
6346 /* Cleanup any outstanding ELS commands */
6347 lpfc_els_flush_all_cmd(phba);
6348
6349 /* Block ELS IOCBs until we have done process link event */
6350 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6351
6352 /* Update link event statistics */
6353 phba->sli.slistat.link_event++;
6354
6355 /* Create lpfc_handle_latt mailbox command from link ACQE */
6356 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf);
6357 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
6358 pmb->vport = phba->pport;
6359
6360 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6361 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
6362
6363 switch (phba->sli4_hba.link_state.status) {
6364 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
6365 phba->link_flag |= LS_MDS_LINK_DOWN;
6366 break;
6367 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
6368 phba->link_flag |= LS_MDS_LOOPBACK;
6369 break;
6370 default:
6371 break;
6372 }
6373
6374 /* Initialize completion status */
6375 mb = &pmb->u.mb;
6376 mb->mbxStatus = MBX_SUCCESS;
6377
6378 /* Parse port fault information field */
6379 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
6380
6381 /* Parse and translate link attention fields */
6382 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
6383 la->eventTag = acqe_fc->event_tag;
6384
6385 if (phba->sli4_hba.link_state.status ==
6386 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
6387 bf_set(lpfc_mbx_read_top_att_type, la,
6388 LPFC_FC_LA_TYPE_UNEXP_WWPN);
6389 } else {
6390 bf_set(lpfc_mbx_read_top_att_type, la,
6391 LPFC_FC_LA_TYPE_LINK_DOWN);
6392 }
6393 /* Invoke the mailbox command callback function */
6394 lpfc_mbx_cmpl_read_topology(phba, pmb);
6395
6396 return;
6397 }
6398
6399 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
6400 if (rc == MBX_NOT_FINISHED)
6401 goto out_free_pmb;
6402 return;
6403
6404 out_free_pmb:
6405 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
6406 }
6407
6408 /**
6409 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
6410 * @phba: pointer to lpfc hba data structure.
6411 * @acqe_sli: pointer to the async SLI completion queue entry.
6412 *
6413 * This routine is to handle the SLI4 asynchronous SLI events.
6414 **/
6415 static void
lpfc_sli4_async_sli_evt(struct lpfc_hba * phba,struct lpfc_acqe_sli * acqe_sli)6416 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
6417 {
6418 char port_name;
6419 char message[128];
6420 uint8_t status;
6421 uint8_t evt_type;
6422 uint8_t operational = 0;
6423 struct temp_event temp_event_data;
6424 struct lpfc_acqe_misconfigured_event *misconfigured;
6425 struct lpfc_acqe_cgn_signal *cgn_signal;
6426 struct Scsi_Host *shost;
6427 struct lpfc_vport **vports;
6428 int rc, i, cnt;
6429
6430 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
6431
6432 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6433 "2901 Async SLI event - Type:%d, Event Data: x%08x "
6434 "x%08x x%08x x%08x\n", evt_type,
6435 acqe_sli->event_data1, acqe_sli->event_data2,
6436 acqe_sli->event_data3, acqe_sli->trailer);
6437
6438 port_name = phba->Port[0];
6439 if (port_name == 0x00)
6440 port_name = '?'; /* get port name is empty */
6441
6442 switch (evt_type) {
6443 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
6444 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6445 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
6446 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6447
6448 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6449 "3190 Over Temperature:%d Celsius- Port Name %c\n",
6450 acqe_sli->event_data1, port_name);
6451
6452 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
6453 shost = lpfc_shost_from_vport(phba->pport);
6454 fc_host_post_vendor_event(shost, fc_get_event_number(),
6455 sizeof(temp_event_data),
6456 (char *)&temp_event_data,
6457 SCSI_NL_VID_TYPE_PCI
6458 | PCI_VENDOR_ID_EMULEX);
6459 break;
6460 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
6461 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6462 temp_event_data.event_code = LPFC_NORMAL_TEMP;
6463 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6464
6465 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT,
6466 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
6467 acqe_sli->event_data1, port_name);
6468
6469 shost = lpfc_shost_from_vport(phba->pport);
6470 fc_host_post_vendor_event(shost, fc_get_event_number(),
6471 sizeof(temp_event_data),
6472 (char *)&temp_event_data,
6473 SCSI_NL_VID_TYPE_PCI
6474 | PCI_VENDOR_ID_EMULEX);
6475 break;
6476 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
6477 misconfigured = (struct lpfc_acqe_misconfigured_event *)
6478 &acqe_sli->event_data1;
6479
6480 /* fetch the status for this port */
6481 switch (phba->sli4_hba.lnk_info.lnk_no) {
6482 case LPFC_LINK_NUMBER_0:
6483 status = bf_get(lpfc_sli_misconfigured_port0_state,
6484 &misconfigured->theEvent);
6485 operational = bf_get(lpfc_sli_misconfigured_port0_op,
6486 &misconfigured->theEvent);
6487 break;
6488 case LPFC_LINK_NUMBER_1:
6489 status = bf_get(lpfc_sli_misconfigured_port1_state,
6490 &misconfigured->theEvent);
6491 operational = bf_get(lpfc_sli_misconfigured_port1_op,
6492 &misconfigured->theEvent);
6493 break;
6494 case LPFC_LINK_NUMBER_2:
6495 status = bf_get(lpfc_sli_misconfigured_port2_state,
6496 &misconfigured->theEvent);
6497 operational = bf_get(lpfc_sli_misconfigured_port2_op,
6498 &misconfigured->theEvent);
6499 break;
6500 case LPFC_LINK_NUMBER_3:
6501 status = bf_get(lpfc_sli_misconfigured_port3_state,
6502 &misconfigured->theEvent);
6503 operational = bf_get(lpfc_sli_misconfigured_port3_op,
6504 &misconfigured->theEvent);
6505 break;
6506 default:
6507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6508 "3296 "
6509 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
6510 "event: Invalid link %d",
6511 phba->sli4_hba.lnk_info.lnk_no);
6512 return;
6513 }
6514
6515 /* Skip if optic state unchanged */
6516 if (phba->sli4_hba.lnk_info.optic_state == status)
6517 return;
6518
6519 switch (status) {
6520 case LPFC_SLI_EVENT_STATUS_VALID:
6521 sprintf(message, "Physical Link is functional");
6522 break;
6523 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
6524 sprintf(message, "Optics faulted/incorrectly "
6525 "installed/not installed - Reseat optics, "
6526 "if issue not resolved, replace.");
6527 break;
6528 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
6529 sprintf(message,
6530 "Optics of two types installed - Remove one "
6531 "optic or install matching pair of optics.");
6532 break;
6533 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
6534 sprintf(message, "Incompatible optics - Replace with "
6535 "compatible optics for card to function.");
6536 break;
6537 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
6538 sprintf(message, "Unqualified optics - Replace with "
6539 "Avago optics for Warranty and Technical "
6540 "Support - Link is%s operational",
6541 (operational) ? " not" : "");
6542 break;
6543 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
6544 sprintf(message, "Uncertified optics - Replace with "
6545 "Avago-certified optics to enable link "
6546 "operation - Link is%s operational",
6547 (operational) ? " not" : "");
6548 break;
6549 default:
6550 /* firmware is reporting a status we don't know about */
6551 sprintf(message, "Unknown event status x%02x", status);
6552 break;
6553 }
6554
6555 /* Issue READ_CONFIG mbox command to refresh supported speeds */
6556 rc = lpfc_sli4_read_config(phba);
6557 if (rc) {
6558 phba->lmt = 0;
6559 lpfc_printf_log(phba, KERN_ERR,
6560 LOG_TRACE_EVENT,
6561 "3194 Unable to retrieve supported "
6562 "speeds, rc = 0x%x\n", rc);
6563 }
6564 rc = lpfc_sli4_refresh_params(phba);
6565 if (rc) {
6566 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6567 "3174 Unable to update pls support, "
6568 "rc x%x\n", rc);
6569 }
6570 vports = lpfc_create_vport_work_array(phba);
6571 if (vports != NULL) {
6572 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6573 i++) {
6574 shost = lpfc_shost_from_vport(vports[i]);
6575 lpfc_host_supported_speeds_set(shost);
6576 }
6577 }
6578 lpfc_destroy_vport_work_array(phba, vports);
6579
6580 phba->sli4_hba.lnk_info.optic_state = status;
6581 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6582 "3176 Port Name %c %s\n", port_name, message);
6583 break;
6584 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
6585 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6586 "3192 Remote DPort Test Initiated - "
6587 "Event Data1:x%08x Event Data2: x%08x\n",
6588 acqe_sli->event_data1, acqe_sli->event_data2);
6589 break;
6590 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG:
6591 /* Call FW to obtain active parms */
6592 lpfc_sli4_cgn_parm_chg_evt(phba);
6593 break;
6594 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
6595 /* Misconfigured WWN. Reports that the SLI Port is configured
6596 * to use FA-WWN, but the attached device doesn’t support it.
6597 * Event Data1 - N.A, Event Data2 - N.A
6598 * This event only happens on the physical port.
6599 */
6600 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY,
6601 "2699 Misconfigured FA-PWWN - Attached device "
6602 "does not support FA-PWWN\n");
6603 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
6604 memset(phba->pport->fc_portname.u.wwn, 0,
6605 sizeof(struct lpfc_name));
6606 break;
6607 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
6608 /* EEPROM failure. No driver action is required */
6609 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6610 "2518 EEPROM failure - "
6611 "Event Data1: x%08x Event Data2: x%08x\n",
6612 acqe_sli->event_data1, acqe_sli->event_data2);
6613 break;
6614 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL:
6615 if (phba->cmf_active_mode == LPFC_CFG_OFF)
6616 break;
6617 cgn_signal = (struct lpfc_acqe_cgn_signal *)
6618 &acqe_sli->event_data1;
6619 phba->cgn_acqe_cnt++;
6620
6621 cnt = bf_get(lpfc_warn_acqe, cgn_signal);
6622 atomic64_add(cnt, &phba->cgn_acqe_stat.warn);
6623 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm);
6624
6625 /* no threshold for CMF, even 1 signal will trigger an event */
6626
6627 /* Alarm overrides warning, so check that first */
6628 if (cgn_signal->alarm_cnt) {
6629 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6630 /* Keep track of alarm cnt for CMF_SYNC_WQE */
6631 atomic_add(cgn_signal->alarm_cnt,
6632 &phba->cgn_sync_alarm_cnt);
6633 }
6634 } else if (cnt) {
6635 /* signal action needs to be taken */
6636 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
6637 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6638 /* Keep track of warning cnt for CMF_SYNC_WQE */
6639 atomic_add(cnt, &phba->cgn_sync_warn_cnt);
6640 }
6641 }
6642 break;
6643 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL:
6644 /* May be accompanied by a temperature event */
6645 lpfc_printf_log(phba, KERN_INFO,
6646 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT,
6647 "2902 Remote Degrade Signaling: x%08x x%08x "
6648 "x%08x\n",
6649 acqe_sli->event_data1, acqe_sli->event_data2,
6650 acqe_sli->event_data3);
6651 break;
6652 default:
6653 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6654 "3193 Unrecognized SLI event, type: 0x%x",
6655 evt_type);
6656 break;
6657 }
6658 }
6659
6660 /**
6661 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
6662 * @vport: pointer to vport data structure.
6663 *
6664 * This routine is to perform Clear Virtual Link (CVL) on a vport in
6665 * response to a CVL event.
6666 *
6667 * Return the pointer to the ndlp with the vport if successful, otherwise
6668 * return NULL.
6669 **/
6670 static struct lpfc_nodelist *
lpfc_sli4_perform_vport_cvl(struct lpfc_vport * vport)6671 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
6672 {
6673 struct lpfc_nodelist *ndlp;
6674 struct Scsi_Host *shost;
6675 struct lpfc_hba *phba;
6676
6677 if (!vport)
6678 return NULL;
6679 phba = vport->phba;
6680 if (!phba)
6681 return NULL;
6682 ndlp = lpfc_findnode_did(vport, Fabric_DID);
6683 if (!ndlp) {
6684 /* Cannot find existing Fabric ndlp, so allocate a new one */
6685 ndlp = lpfc_nlp_init(vport, Fabric_DID);
6686 if (!ndlp)
6687 return NULL;
6688 /* Set the node type */
6689 ndlp->nlp_type |= NLP_FABRIC;
6690 /* Put ndlp onto node list */
6691 lpfc_enqueue_node(vport, ndlp);
6692 }
6693 if ((phba->pport->port_state < LPFC_FLOGI) &&
6694 (phba->pport->port_state != LPFC_VPORT_FAILED))
6695 return NULL;
6696 /* If virtual link is not yet instantiated ignore CVL */
6697 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
6698 && (vport->port_state != LPFC_VPORT_FAILED))
6699 return NULL;
6700 shost = lpfc_shost_from_vport(vport);
6701 if (!shost)
6702 return NULL;
6703 lpfc_linkdown_port(vport);
6704 lpfc_cleanup_pending_mbox(vport);
6705 spin_lock_irq(shost->host_lock);
6706 vport->fc_flag |= FC_VPORT_CVL_RCVD;
6707 spin_unlock_irq(shost->host_lock);
6708
6709 return ndlp;
6710 }
6711
6712 /**
6713 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
6714 * @phba: pointer to lpfc hba data structure.
6715 *
6716 * This routine is to perform Clear Virtual Link (CVL) on all vports in
6717 * response to a FCF dead event.
6718 **/
6719 static void
lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba * phba)6720 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
6721 {
6722 struct lpfc_vport **vports;
6723 int i;
6724
6725 vports = lpfc_create_vport_work_array(phba);
6726 if (vports)
6727 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
6728 lpfc_sli4_perform_vport_cvl(vports[i]);
6729 lpfc_destroy_vport_work_array(phba, vports);
6730 }
6731
6732 /**
6733 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
6734 * @phba: pointer to lpfc hba data structure.
6735 * @acqe_fip: pointer to the async fcoe completion queue entry.
6736 *
6737 * This routine is to handle the SLI4 asynchronous fcoe event.
6738 **/
6739 static void
lpfc_sli4_async_fip_evt(struct lpfc_hba * phba,struct lpfc_acqe_fip * acqe_fip)6740 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
6741 struct lpfc_acqe_fip *acqe_fip)
6742 {
6743 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
6744 int rc;
6745 struct lpfc_vport *vport;
6746 struct lpfc_nodelist *ndlp;
6747 int active_vlink_present;
6748 struct lpfc_vport **vports;
6749 int i;
6750
6751 phba->fc_eventTag = acqe_fip->event_tag;
6752 phba->fcoe_eventtag = acqe_fip->event_tag;
6753 switch (event_type) {
6754 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
6755 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
6756 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
6757 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6758 "2546 New FCF event, evt_tag:x%x, "
6759 "index:x%x\n",
6760 acqe_fip->event_tag,
6761 acqe_fip->index);
6762 else
6763 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
6764 LOG_DISCOVERY,
6765 "2788 FCF param modified event, "
6766 "evt_tag:x%x, index:x%x\n",
6767 acqe_fip->event_tag,
6768 acqe_fip->index);
6769 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6770 /*
6771 * During period of FCF discovery, read the FCF
6772 * table record indexed by the event to update
6773 * FCF roundrobin failover eligible FCF bmask.
6774 */
6775 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6776 LOG_DISCOVERY,
6777 "2779 Read FCF (x%x) for updating "
6778 "roundrobin FCF failover bmask\n",
6779 acqe_fip->index);
6780 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
6781 }
6782
6783 /* If the FCF discovery is in progress, do nothing. */
6784 spin_lock_irq(&phba->hbalock);
6785 if (phba->hba_flag & FCF_TS_INPROG) {
6786 spin_unlock_irq(&phba->hbalock);
6787 break;
6788 }
6789 /* If fast FCF failover rescan event is pending, do nothing */
6790 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
6791 spin_unlock_irq(&phba->hbalock);
6792 break;
6793 }
6794
6795 /* If the FCF has been in discovered state, do nothing. */
6796 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
6797 spin_unlock_irq(&phba->hbalock);
6798 break;
6799 }
6800 spin_unlock_irq(&phba->hbalock);
6801
6802 /* Otherwise, scan the entire FCF table and re-discover SAN */
6803 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6804 "2770 Start FCF table scan per async FCF "
6805 "event, evt_tag:x%x, index:x%x\n",
6806 acqe_fip->event_tag, acqe_fip->index);
6807 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
6808 LPFC_FCOE_FCF_GET_FIRST);
6809 if (rc)
6810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6811 "2547 Issue FCF scan read FCF mailbox "
6812 "command failed (x%x)\n", rc);
6813 break;
6814
6815 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
6816 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6817 "2548 FCF Table full count 0x%x tag 0x%x\n",
6818 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
6819 acqe_fip->event_tag);
6820 break;
6821
6822 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
6823 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6824 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6825 "2549 FCF (x%x) disconnected from network, "
6826 "tag:x%x\n", acqe_fip->index,
6827 acqe_fip->event_tag);
6828 /*
6829 * If we are in the middle of FCF failover process, clear
6830 * the corresponding FCF bit in the roundrobin bitmap.
6831 */
6832 spin_lock_irq(&phba->hbalock);
6833 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
6834 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
6835 spin_unlock_irq(&phba->hbalock);
6836 /* Update FLOGI FCF failover eligible FCF bmask */
6837 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
6838 break;
6839 }
6840 spin_unlock_irq(&phba->hbalock);
6841
6842 /* If the event is not for currently used fcf do nothing */
6843 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
6844 break;
6845
6846 /*
6847 * Otherwise, request the port to rediscover the entire FCF
6848 * table for a fast recovery from case that the current FCF
6849 * is no longer valid as we are not in the middle of FCF
6850 * failover process already.
6851 */
6852 spin_lock_irq(&phba->hbalock);
6853 /* Mark the fast failover process in progress */
6854 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
6855 spin_unlock_irq(&phba->hbalock);
6856
6857 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6858 "2771 Start FCF fast failover process due to "
6859 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
6860 "\n", acqe_fip->event_tag, acqe_fip->index);
6861 rc = lpfc_sli4_redisc_fcf_table(phba);
6862 if (rc) {
6863 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6864 LOG_TRACE_EVENT,
6865 "2772 Issue FCF rediscover mailbox "
6866 "command failed, fail through to FCF "
6867 "dead event\n");
6868 spin_lock_irq(&phba->hbalock);
6869 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
6870 spin_unlock_irq(&phba->hbalock);
6871 /*
6872 * Last resort will fail over by treating this
6873 * as a link down to FCF registration.
6874 */
6875 lpfc_sli4_fcf_dead_failthrough(phba);
6876 } else {
6877 /* Reset FCF roundrobin bmask for new discovery */
6878 lpfc_sli4_clear_fcf_rr_bmask(phba);
6879 /*
6880 * Handling fast FCF failover to a DEAD FCF event is
6881 * considered equalivant to receiving CVL to all vports.
6882 */
6883 lpfc_sli4_perform_all_vport_cvl(phba);
6884 }
6885 break;
6886 case LPFC_FIP_EVENT_TYPE_CVL:
6887 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6888 lpfc_printf_log(phba, KERN_ERR,
6889 LOG_TRACE_EVENT,
6890 "2718 Clear Virtual Link Received for VPI 0x%x"
6891 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6892
6893 vport = lpfc_find_vport_by_vpid(phba,
6894 acqe_fip->index);
6895 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6896 if (!ndlp)
6897 break;
6898 active_vlink_present = 0;
6899
6900 vports = lpfc_create_vport_work_array(phba);
6901 if (vports) {
6902 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6903 i++) {
6904 if ((!(vports[i]->fc_flag &
6905 FC_VPORT_CVL_RCVD)) &&
6906 (vports[i]->port_state > LPFC_FDISC)) {
6907 active_vlink_present = 1;
6908 break;
6909 }
6910 }
6911 lpfc_destroy_vport_work_array(phba, vports);
6912 }
6913
6914 /*
6915 * Don't re-instantiate if vport is marked for deletion.
6916 * If we are here first then vport_delete is going to wait
6917 * for discovery to complete.
6918 */
6919 if (!(vport->load_flag & FC_UNLOADING) &&
6920 active_vlink_present) {
6921 /*
6922 * If there are other active VLinks present,
6923 * re-instantiate the Vlink using FDISC.
6924 */
6925 mod_timer(&ndlp->nlp_delayfunc,
6926 jiffies + msecs_to_jiffies(1000));
6927 spin_lock_irq(&ndlp->lock);
6928 ndlp->nlp_flag |= NLP_DELAY_TMO;
6929 spin_unlock_irq(&ndlp->lock);
6930 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
6931 vport->port_state = LPFC_FDISC;
6932 } else {
6933 /*
6934 * Otherwise, we request port to rediscover
6935 * the entire FCF table for a fast recovery
6936 * from possible case that the current FCF
6937 * is no longer valid if we are not already
6938 * in the FCF failover process.
6939 */
6940 spin_lock_irq(&phba->hbalock);
6941 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6942 spin_unlock_irq(&phba->hbalock);
6943 break;
6944 }
6945 /* Mark the fast failover process in progress */
6946 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
6947 spin_unlock_irq(&phba->hbalock);
6948 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6949 LOG_DISCOVERY,
6950 "2773 Start FCF failover per CVL, "
6951 "evt_tag:x%x\n", acqe_fip->event_tag);
6952 rc = lpfc_sli4_redisc_fcf_table(phba);
6953 if (rc) {
6954 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6955 LOG_TRACE_EVENT,
6956 "2774 Issue FCF rediscover "
6957 "mailbox command failed, "
6958 "through to CVL event\n");
6959 spin_lock_irq(&phba->hbalock);
6960 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
6961 spin_unlock_irq(&phba->hbalock);
6962 /*
6963 * Last resort will be re-try on the
6964 * the current registered FCF entry.
6965 */
6966 lpfc_retry_pport_discovery(phba);
6967 } else
6968 /*
6969 * Reset FCF roundrobin bmask for new
6970 * discovery.
6971 */
6972 lpfc_sli4_clear_fcf_rr_bmask(phba);
6973 }
6974 break;
6975 default:
6976 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6977 "0288 Unknown FCoE event type 0x%x event tag "
6978 "0x%x\n", event_type, acqe_fip->event_tag);
6979 break;
6980 }
6981 }
6982
6983 /**
6984 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
6985 * @phba: pointer to lpfc hba data structure.
6986 * @acqe_dcbx: pointer to the async dcbx completion queue entry.
6987 *
6988 * This routine is to handle the SLI4 asynchronous dcbx event.
6989 **/
6990 static void
lpfc_sli4_async_dcbx_evt(struct lpfc_hba * phba,struct lpfc_acqe_dcbx * acqe_dcbx)6991 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
6992 struct lpfc_acqe_dcbx *acqe_dcbx)
6993 {
6994 phba->fc_eventTag = acqe_dcbx->event_tag;
6995 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6996 "0290 The SLI4 DCBX asynchronous event is not "
6997 "handled yet\n");
6998 }
6999
7000 /**
7001 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
7002 * @phba: pointer to lpfc hba data structure.
7003 * @acqe_grp5: pointer to the async grp5 completion queue entry.
7004 *
7005 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
7006 * is an asynchronous notified of a logical link speed change. The Port
7007 * reports the logical link speed in units of 10Mbps.
7008 **/
7009 static void
lpfc_sli4_async_grp5_evt(struct lpfc_hba * phba,struct lpfc_acqe_grp5 * acqe_grp5)7010 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
7011 struct lpfc_acqe_grp5 *acqe_grp5)
7012 {
7013 uint16_t prev_ll_spd;
7014
7015 phba->fc_eventTag = acqe_grp5->event_tag;
7016 phba->fcoe_eventtag = acqe_grp5->event_tag;
7017 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7018 phba->sli4_hba.link_state.logical_speed =
7019 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
7020 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7021 "2789 GRP5 Async Event: Updating logical link speed "
7022 "from %dMbps to %dMbps\n", prev_ll_spd,
7023 phba->sli4_hba.link_state.logical_speed);
7024 }
7025
7026 /**
7027 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event
7028 * @phba: pointer to lpfc hba data structure.
7029 *
7030 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event
7031 * is an asynchronous notification of a request to reset CM stats.
7032 **/
7033 static void
lpfc_sli4_async_cmstat_evt(struct lpfc_hba * phba)7034 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba)
7035 {
7036 if (!phba->cgn_i)
7037 return;
7038 lpfc_init_congestion_stat(phba);
7039 }
7040
7041 /**
7042 * lpfc_cgn_params_val - Validate FW congestion parameters.
7043 * @phba: pointer to lpfc hba data structure.
7044 * @p_cfg_param: pointer to FW provided congestion parameters.
7045 *
7046 * This routine validates the congestion parameters passed
7047 * by the FW to the driver via an ACQE event.
7048 **/
7049 static void
lpfc_cgn_params_val(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cfg_param)7050 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param)
7051 {
7052 spin_lock_irq(&phba->hbalock);
7053
7054 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF,
7055 LPFC_CFG_MONITOR)) {
7056 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT,
7057 "6225 CMF mode param out of range: %d\n",
7058 p_cfg_param->cgn_param_mode);
7059 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF;
7060 }
7061
7062 spin_unlock_irq(&phba->hbalock);
7063 }
7064
7065 static const char * const lpfc_cmf_mode_to_str[] = {
7066 "OFF",
7067 "MANAGED",
7068 "MONITOR",
7069 };
7070
7071 /**
7072 * lpfc_cgn_params_parse - Process a FW cong parm change event
7073 * @phba: pointer to lpfc hba data structure.
7074 * @p_cgn_param: pointer to a data buffer with the FW cong params.
7075 * @len: the size of pdata in bytes.
7076 *
7077 * This routine validates the congestion management buffer signature
7078 * from the FW, validates the contents and makes corrections for
7079 * valid, in-range values. If the signature magic is correct and
7080 * after parameter validation, the contents are copied to the driver's
7081 * @phba structure. If the magic is incorrect, an error message is
7082 * logged.
7083 **/
7084 static void
lpfc_cgn_params_parse(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cgn_param,uint32_t len)7085 lpfc_cgn_params_parse(struct lpfc_hba *phba,
7086 struct lpfc_cgn_param *p_cgn_param, uint32_t len)
7087 {
7088 struct lpfc_cgn_info *cp;
7089 uint32_t crc, oldmode;
7090 char acr_string[4] = {0};
7091
7092 /* Make sure the FW has encoded the correct magic number to
7093 * validate the congestion parameter in FW memory.
7094 */
7095 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) {
7096 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7097 "4668 FW cgn parm buffer data: "
7098 "magic 0x%x version %d mode %d "
7099 "level0 %d level1 %d "
7100 "level2 %d byte13 %d "
7101 "byte14 %d byte15 %d "
7102 "byte11 %d byte12 %d activeMode %d\n",
7103 p_cgn_param->cgn_param_magic,
7104 p_cgn_param->cgn_param_version,
7105 p_cgn_param->cgn_param_mode,
7106 p_cgn_param->cgn_param_level0,
7107 p_cgn_param->cgn_param_level1,
7108 p_cgn_param->cgn_param_level2,
7109 p_cgn_param->byte13,
7110 p_cgn_param->byte14,
7111 p_cgn_param->byte15,
7112 p_cgn_param->byte11,
7113 p_cgn_param->byte12,
7114 phba->cmf_active_mode);
7115
7116 oldmode = phba->cmf_active_mode;
7117
7118 /* Any parameters out of range are corrected to defaults
7119 * by this routine. No need to fail.
7120 */
7121 lpfc_cgn_params_val(phba, p_cgn_param);
7122
7123 /* Parameters are verified, move them into driver storage */
7124 spin_lock_irq(&phba->hbalock);
7125 memcpy(&phba->cgn_p, p_cgn_param,
7126 sizeof(struct lpfc_cgn_param));
7127
7128 /* Update parameters in congestion info buffer now */
7129 if (phba->cgn_i) {
7130 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
7131 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
7132 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
7133 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
7134 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
7135 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
7136 LPFC_CGN_CRC32_SEED);
7137 cp->cgn_info_crc = cpu_to_le32(crc);
7138 }
7139 spin_unlock_irq(&phba->hbalock);
7140
7141 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode;
7142
7143 switch (oldmode) {
7144 case LPFC_CFG_OFF:
7145 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) {
7146 /* Turning CMF on */
7147 lpfc_cmf_start(phba);
7148
7149 if (phba->link_state >= LPFC_LINK_UP) {
7150 phba->cgn_reg_fpin =
7151 phba->cgn_init_reg_fpin;
7152 phba->cgn_reg_signal =
7153 phba->cgn_init_reg_signal;
7154 lpfc_issue_els_edc(phba->pport, 0);
7155 }
7156 }
7157 break;
7158 case LPFC_CFG_MANAGED:
7159 switch (phba->cgn_p.cgn_param_mode) {
7160 case LPFC_CFG_OFF:
7161 /* Turning CMF off */
7162 lpfc_cmf_stop(phba);
7163 if (phba->link_state >= LPFC_LINK_UP)
7164 lpfc_issue_els_edc(phba->pport, 0);
7165 break;
7166 case LPFC_CFG_MONITOR:
7167 phba->cmf_max_bytes_per_interval =
7168 phba->cmf_link_byte_count;
7169
7170 /* Resume blocked IO - unblock on workqueue */
7171 queue_work(phba->wq,
7172 &phba->unblock_request_work);
7173 break;
7174 }
7175 break;
7176 case LPFC_CFG_MONITOR:
7177 switch (phba->cgn_p.cgn_param_mode) {
7178 case LPFC_CFG_OFF:
7179 /* Turning CMF off */
7180 lpfc_cmf_stop(phba);
7181 if (phba->link_state >= LPFC_LINK_UP)
7182 lpfc_issue_els_edc(phba->pport, 0);
7183 break;
7184 case LPFC_CFG_MANAGED:
7185 lpfc_cmf_signal_init(phba);
7186 break;
7187 }
7188 break;
7189 }
7190 if (oldmode != LPFC_CFG_OFF ||
7191 oldmode != phba->cgn_p.cgn_param_mode) {
7192 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED)
7193 scnprintf(acr_string, sizeof(acr_string), "%u",
7194 phba->cgn_p.cgn_param_level0);
7195 else
7196 scnprintf(acr_string, sizeof(acr_string), "NA");
7197
7198 dev_info(&phba->pcidev->dev, "%d: "
7199 "4663 CMF: Mode %s acr %s\n",
7200 phba->brd_no,
7201 lpfc_cmf_mode_to_str
7202 [phba->cgn_p.cgn_param_mode],
7203 acr_string);
7204 }
7205 } else {
7206 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7207 "4669 FW cgn parm buf wrong magic 0x%x "
7208 "version %d\n", p_cgn_param->cgn_param_magic,
7209 p_cgn_param->cgn_param_version);
7210 }
7211 }
7212
7213 /**
7214 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters.
7215 * @phba: pointer to lpfc hba data structure.
7216 *
7217 * This routine issues a read_object mailbox command to
7218 * get the congestion management parameters from the FW
7219 * parses it and updates the driver maintained values.
7220 *
7221 * Returns
7222 * 0 if the object was empty
7223 * -Eval if an error was encountered
7224 * Count if bytes were read from object
7225 **/
7226 int
lpfc_sli4_cgn_params_read(struct lpfc_hba * phba)7227 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba)
7228 {
7229 int ret = 0;
7230 struct lpfc_cgn_param *p_cgn_param = NULL;
7231 u32 *pdata = NULL;
7232 u32 len = 0;
7233
7234 /* Find out if the FW has a new set of congestion parameters. */
7235 len = sizeof(struct lpfc_cgn_param);
7236 pdata = kzalloc(len, GFP_KERNEL);
7237 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME,
7238 pdata, len);
7239
7240 /* 0 means no data. A negative means error. A positive means
7241 * bytes were copied.
7242 */
7243 if (!ret) {
7244 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7245 "4670 CGN RD OBJ returns no data\n");
7246 goto rd_obj_err;
7247 } else if (ret < 0) {
7248 /* Some error. Just exit and return it to the caller.*/
7249 goto rd_obj_err;
7250 }
7251
7252 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7253 "6234 READ CGN PARAMS Successful %d\n", len);
7254
7255 /* Parse data pointer over len and update the phba congestion
7256 * parameters with values passed back. The receive rate values
7257 * may have been altered in FW, but take no action here.
7258 */
7259 p_cgn_param = (struct lpfc_cgn_param *)pdata;
7260 lpfc_cgn_params_parse(phba, p_cgn_param, len);
7261
7262 rd_obj_err:
7263 kfree(pdata);
7264 return ret;
7265 }
7266
7267 /**
7268 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event
7269 * @phba: pointer to lpfc hba data structure.
7270 *
7271 * The FW generated Async ACQE SLI event calls this routine when
7272 * the event type is an SLI Internal Port Event and the Event Code
7273 * indicates a change to the FW maintained congestion parameters.
7274 *
7275 * This routine executes a Read_Object mailbox call to obtain the
7276 * current congestion parameters maintained in FW and corrects
7277 * the driver's active congestion parameters.
7278 *
7279 * The acqe event is not passed because there is no further data
7280 * required.
7281 *
7282 * Returns nonzero error if event processing encountered an error.
7283 * Zero otherwise for success.
7284 **/
7285 static int
lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba * phba)7286 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba)
7287 {
7288 int ret = 0;
7289
7290 if (!phba->sli4_hba.pc_sli4_params.cmf) {
7291 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7292 "4664 Cgn Evt when E2E off. Drop event\n");
7293 return -EACCES;
7294 }
7295
7296 /* If the event is claiming an empty object, it's ok. A write
7297 * could have cleared it. Only error is a negative return
7298 * status.
7299 */
7300 ret = lpfc_sli4_cgn_params_read(phba);
7301 if (ret < 0) {
7302 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7303 "4667 Error reading Cgn Params (%d)\n",
7304 ret);
7305 } else if (!ret) {
7306 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7307 "4673 CGN Event empty object.\n");
7308 }
7309 return ret;
7310 }
7311
7312 /**
7313 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
7314 * @phba: pointer to lpfc hba data structure.
7315 *
7316 * This routine is invoked by the worker thread to process all the pending
7317 * SLI4 asynchronous events.
7318 **/
lpfc_sli4_async_event_proc(struct lpfc_hba * phba)7319 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
7320 {
7321 struct lpfc_cq_event *cq_event;
7322 unsigned long iflags;
7323
7324 /* First, declare the async event has been handled */
7325 spin_lock_irqsave(&phba->hbalock, iflags);
7326 phba->hba_flag &= ~ASYNC_EVENT;
7327 spin_unlock_irqrestore(&phba->hbalock, iflags);
7328
7329 /* Now, handle all the async events */
7330 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7331 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7332 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7333 cq_event, struct lpfc_cq_event, list);
7334 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7335 iflags);
7336
7337 /* Process the asynchronous event */
7338 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
7339 case LPFC_TRAILER_CODE_LINK:
7340 lpfc_sli4_async_link_evt(phba,
7341 &cq_event->cqe.acqe_link);
7342 break;
7343 case LPFC_TRAILER_CODE_FCOE:
7344 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
7345 break;
7346 case LPFC_TRAILER_CODE_DCBX:
7347 lpfc_sli4_async_dcbx_evt(phba,
7348 &cq_event->cqe.acqe_dcbx);
7349 break;
7350 case LPFC_TRAILER_CODE_GRP5:
7351 lpfc_sli4_async_grp5_evt(phba,
7352 &cq_event->cqe.acqe_grp5);
7353 break;
7354 case LPFC_TRAILER_CODE_FC:
7355 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
7356 break;
7357 case LPFC_TRAILER_CODE_SLI:
7358 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
7359 break;
7360 case LPFC_TRAILER_CODE_CMSTAT:
7361 lpfc_sli4_async_cmstat_evt(phba);
7362 break;
7363 default:
7364 lpfc_printf_log(phba, KERN_ERR,
7365 LOG_TRACE_EVENT,
7366 "1804 Invalid asynchronous event code: "
7367 "x%x\n", bf_get(lpfc_trailer_code,
7368 &cq_event->cqe.mcqe_cmpl));
7369 break;
7370 }
7371
7372 /* Free the completion event processed to the free pool */
7373 lpfc_sli4_cq_event_release(phba, cq_event);
7374 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7375 }
7376 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7377 }
7378
7379 /**
7380 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
7381 * @phba: pointer to lpfc hba data structure.
7382 *
7383 * This routine is invoked by the worker thread to process FCF table
7384 * rediscovery pending completion event.
7385 **/
lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba * phba)7386 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
7387 {
7388 int rc;
7389
7390 spin_lock_irq(&phba->hbalock);
7391 /* Clear FCF rediscovery timeout event */
7392 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
7393 /* Clear driver fast failover FCF record flag */
7394 phba->fcf.failover_rec.flag = 0;
7395 /* Set state for FCF fast failover */
7396 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
7397 spin_unlock_irq(&phba->hbalock);
7398
7399 /* Scan FCF table from the first entry to re-discover SAN */
7400 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
7401 "2777 Start post-quiescent FCF table scan\n");
7402 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
7403 if (rc)
7404 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7405 "2747 Issue FCF scan read FCF mailbox "
7406 "command failed 0x%x\n", rc);
7407 }
7408
7409 /**
7410 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
7411 * @phba: pointer to lpfc hba data structure.
7412 * @dev_grp: The HBA PCI-Device group number.
7413 *
7414 * This routine is invoked to set up the per HBA PCI-Device group function
7415 * API jump table entries.
7416 *
7417 * Return: 0 if success, otherwise -ENODEV
7418 **/
7419 int
lpfc_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)7420 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
7421 {
7422 int rc;
7423
7424 /* Set up lpfc PCI-device group */
7425 phba->pci_dev_grp = dev_grp;
7426
7427 /* The LPFC_PCI_DEV_OC uses SLI4 */
7428 if (dev_grp == LPFC_PCI_DEV_OC)
7429 phba->sli_rev = LPFC_SLI_REV4;
7430
7431 /* Set up device INIT API function jump table */
7432 rc = lpfc_init_api_table_setup(phba, dev_grp);
7433 if (rc)
7434 return -ENODEV;
7435 /* Set up SCSI API function jump table */
7436 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
7437 if (rc)
7438 return -ENODEV;
7439 /* Set up SLI API function jump table */
7440 rc = lpfc_sli_api_table_setup(phba, dev_grp);
7441 if (rc)
7442 return -ENODEV;
7443 /* Set up MBOX API function jump table */
7444 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
7445 if (rc)
7446 return -ENODEV;
7447
7448 return 0;
7449 }
7450
7451 /**
7452 * lpfc_log_intr_mode - Log the active interrupt mode
7453 * @phba: pointer to lpfc hba data structure.
7454 * @intr_mode: active interrupt mode adopted.
7455 *
7456 * This routine it invoked to log the currently used active interrupt mode
7457 * to the device.
7458 **/
lpfc_log_intr_mode(struct lpfc_hba * phba,uint32_t intr_mode)7459 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
7460 {
7461 switch (intr_mode) {
7462 case 0:
7463 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7464 "0470 Enable INTx interrupt mode.\n");
7465 break;
7466 case 1:
7467 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7468 "0481 Enabled MSI interrupt mode.\n");
7469 break;
7470 case 2:
7471 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7472 "0480 Enabled MSI-X interrupt mode.\n");
7473 break;
7474 default:
7475 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7476 "0482 Illegal interrupt mode.\n");
7477 break;
7478 }
7479 return;
7480 }
7481
7482 /**
7483 * lpfc_enable_pci_dev - Enable a generic PCI device.
7484 * @phba: pointer to lpfc hba data structure.
7485 *
7486 * This routine is invoked to enable the PCI device that is common to all
7487 * PCI devices.
7488 *
7489 * Return codes
7490 * 0 - successful
7491 * other values - error
7492 **/
7493 static int
lpfc_enable_pci_dev(struct lpfc_hba * phba)7494 lpfc_enable_pci_dev(struct lpfc_hba *phba)
7495 {
7496 struct pci_dev *pdev;
7497
7498 /* Obtain PCI device reference */
7499 if (!phba->pcidev)
7500 goto out_error;
7501 else
7502 pdev = phba->pcidev;
7503 /* Enable PCI device */
7504 if (pci_enable_device_mem(pdev))
7505 goto out_error;
7506 /* Request PCI resource for the device */
7507 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
7508 goto out_disable_device;
7509 /* Set up device as PCI master and save state for EEH */
7510 pci_set_master(pdev);
7511 pci_try_set_mwi(pdev);
7512 pci_save_state(pdev);
7513
7514 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
7515 if (pci_is_pcie(pdev))
7516 pdev->needs_freset = 1;
7517
7518 return 0;
7519
7520 out_disable_device:
7521 pci_disable_device(pdev);
7522 out_error:
7523 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7524 "1401 Failed to enable pci device\n");
7525 return -ENODEV;
7526 }
7527
7528 /**
7529 * lpfc_disable_pci_dev - Disable a generic PCI device.
7530 * @phba: pointer to lpfc hba data structure.
7531 *
7532 * This routine is invoked to disable the PCI device that is common to all
7533 * PCI devices.
7534 **/
7535 static void
lpfc_disable_pci_dev(struct lpfc_hba * phba)7536 lpfc_disable_pci_dev(struct lpfc_hba *phba)
7537 {
7538 struct pci_dev *pdev;
7539
7540 /* Obtain PCI device reference */
7541 if (!phba->pcidev)
7542 return;
7543 else
7544 pdev = phba->pcidev;
7545 /* Release PCI resource and disable PCI device */
7546 pci_release_mem_regions(pdev);
7547 pci_disable_device(pdev);
7548
7549 return;
7550 }
7551
7552 /**
7553 * lpfc_reset_hba - Reset a hba
7554 * @phba: pointer to lpfc hba data structure.
7555 *
7556 * This routine is invoked to reset a hba device. It brings the HBA
7557 * offline, performs a board restart, and then brings the board back
7558 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
7559 * on outstanding mailbox commands.
7560 **/
7561 void
lpfc_reset_hba(struct lpfc_hba * phba)7562 lpfc_reset_hba(struct lpfc_hba *phba)
7563 {
7564 /* If resets are disabled then set error state and return. */
7565 if (!phba->cfg_enable_hba_reset) {
7566 phba->link_state = LPFC_HBA_ERROR;
7567 return;
7568 }
7569
7570 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */
7571 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) {
7572 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
7573 } else {
7574 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
7575 lpfc_sli_flush_io_rings(phba);
7576 }
7577 lpfc_offline(phba);
7578 lpfc_sli_brdrestart(phba);
7579 lpfc_online(phba);
7580 lpfc_unblock_mgmt_io(phba);
7581 }
7582
7583 /**
7584 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
7585 * @phba: pointer to lpfc hba data structure.
7586 *
7587 * This function enables the PCI SR-IOV virtual functions to a physical
7588 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7589 * enable the number of virtual functions to the physical function. As
7590 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7591 * API call does not considered as an error condition for most of the device.
7592 **/
7593 uint16_t
lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba * phba)7594 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
7595 {
7596 struct pci_dev *pdev = phba->pcidev;
7597 uint16_t nr_virtfn;
7598 int pos;
7599
7600 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
7601 if (pos == 0)
7602 return 0;
7603
7604 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
7605 return nr_virtfn;
7606 }
7607
7608 /**
7609 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
7610 * @phba: pointer to lpfc hba data structure.
7611 * @nr_vfn: number of virtual functions to be enabled.
7612 *
7613 * This function enables the PCI SR-IOV virtual functions to a physical
7614 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7615 * enable the number of virtual functions to the physical function. As
7616 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7617 * API call does not considered as an error condition for most of the device.
7618 **/
7619 int
lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba * phba,int nr_vfn)7620 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
7621 {
7622 struct pci_dev *pdev = phba->pcidev;
7623 uint16_t max_nr_vfn;
7624 int rc;
7625
7626 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
7627 if (nr_vfn > max_nr_vfn) {
7628 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7629 "3057 Requested vfs (%d) greater than "
7630 "supported vfs (%d)", nr_vfn, max_nr_vfn);
7631 return -EINVAL;
7632 }
7633
7634 rc = pci_enable_sriov(pdev, nr_vfn);
7635 if (rc) {
7636 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7637 "2806 Failed to enable sriov on this device "
7638 "with vfn number nr_vf:%d, rc:%d\n",
7639 nr_vfn, rc);
7640 } else
7641 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7642 "2807 Successful enable sriov on this device "
7643 "with vfn number nr_vf:%d\n", nr_vfn);
7644 return rc;
7645 }
7646
7647 static void
lpfc_unblock_requests_work(struct work_struct * work)7648 lpfc_unblock_requests_work(struct work_struct *work)
7649 {
7650 struct lpfc_hba *phba = container_of(work, struct lpfc_hba,
7651 unblock_request_work);
7652
7653 lpfc_unblock_requests(phba);
7654 }
7655
7656 /**
7657 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
7658 * @phba: pointer to lpfc hba data structure.
7659 *
7660 * This routine is invoked to set up the driver internal resources before the
7661 * device specific resource setup to support the HBA device it attached to.
7662 *
7663 * Return codes
7664 * 0 - successful
7665 * other values - error
7666 **/
7667 static int
lpfc_setup_driver_resource_phase1(struct lpfc_hba * phba)7668 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
7669 {
7670 struct lpfc_sli *psli = &phba->sli;
7671
7672 /*
7673 * Driver resources common to all SLI revisions
7674 */
7675 atomic_set(&phba->fast_event_count, 0);
7676 atomic_set(&phba->dbg_log_idx, 0);
7677 atomic_set(&phba->dbg_log_cnt, 0);
7678 atomic_set(&phba->dbg_log_dmping, 0);
7679 spin_lock_init(&phba->hbalock);
7680
7681 /* Initialize port_list spinlock */
7682 spin_lock_init(&phba->port_list_lock);
7683 INIT_LIST_HEAD(&phba->port_list);
7684
7685 INIT_LIST_HEAD(&phba->work_list);
7686
7687 /* Initialize the wait queue head for the kernel thread */
7688 init_waitqueue_head(&phba->work_waitq);
7689
7690 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7691 "1403 Protocols supported %s %s %s\n",
7692 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
7693 "SCSI" : " "),
7694 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
7695 "NVME" : " "),
7696 (phba->nvmet_support ? "NVMET" : " "));
7697
7698 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
7699 spin_lock_init(&phba->scsi_buf_list_get_lock);
7700 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
7701 spin_lock_init(&phba->scsi_buf_list_put_lock);
7702 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
7703
7704 /* Initialize the fabric iocb list */
7705 INIT_LIST_HEAD(&phba->fabric_iocb_list);
7706
7707 /* Initialize list to save ELS buffers */
7708 INIT_LIST_HEAD(&phba->elsbuf);
7709
7710 /* Initialize FCF connection rec list */
7711 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
7712
7713 /* Initialize OAS configuration list */
7714 spin_lock_init(&phba->devicelock);
7715 INIT_LIST_HEAD(&phba->luns);
7716
7717 /* MBOX heartbeat timer */
7718 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
7719 /* Fabric block timer */
7720 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
7721 /* EA polling mode timer */
7722 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
7723 /* Heartbeat timer */
7724 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
7725
7726 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
7727
7728 INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
7729 lpfc_idle_stat_delay_work);
7730 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work);
7731 return 0;
7732 }
7733
7734 /**
7735 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
7736 * @phba: pointer to lpfc hba data structure.
7737 *
7738 * This routine is invoked to set up the driver internal resources specific to
7739 * support the SLI-3 HBA device it attached to.
7740 *
7741 * Return codes
7742 * 0 - successful
7743 * other values - error
7744 **/
7745 static int
lpfc_sli_driver_resource_setup(struct lpfc_hba * phba)7746 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
7747 {
7748 int rc, entry_sz;
7749
7750 /*
7751 * Initialize timers used by driver
7752 */
7753
7754 /* FCP polling mode timer */
7755 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
7756
7757 /* Host attention work mask setup */
7758 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
7759 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
7760
7761 /* Get all the module params for configuring this host */
7762 lpfc_get_cfgparam(phba);
7763 /* Set up phase-1 common device driver resources */
7764
7765 rc = lpfc_setup_driver_resource_phase1(phba);
7766 if (rc)
7767 return -ENODEV;
7768
7769 if (!phba->sli.sli3_ring)
7770 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
7771 sizeof(struct lpfc_sli_ring),
7772 GFP_KERNEL);
7773 if (!phba->sli.sli3_ring)
7774 return -ENOMEM;
7775
7776 /*
7777 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
7778 * used to create the sg_dma_buf_pool must be dynamically calculated.
7779 */
7780
7781 if (phba->sli_rev == LPFC_SLI_REV4)
7782 entry_sz = sizeof(struct sli4_sge);
7783 else
7784 entry_sz = sizeof(struct ulp_bde64);
7785
7786 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
7787 if (phba->cfg_enable_bg) {
7788 /*
7789 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
7790 * the FCP rsp, and a BDE for each. Sice we have no control
7791 * over how many protection data segments the SCSI Layer
7792 * will hand us (ie: there could be one for every block
7793 * in the IO), we just allocate enough BDEs to accomidate
7794 * our max amount and we need to limit lpfc_sg_seg_cnt to
7795 * minimize the risk of running out.
7796 */
7797 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7798 sizeof(struct fcp_rsp) +
7799 (LPFC_MAX_SG_SEG_CNT * entry_sz);
7800
7801 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
7802 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
7803
7804 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
7805 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
7806 } else {
7807 /*
7808 * The scsi_buf for a regular I/O will hold the FCP cmnd,
7809 * the FCP rsp, a BDE for each, and a BDE for up to
7810 * cfg_sg_seg_cnt data segments.
7811 */
7812 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7813 sizeof(struct fcp_rsp) +
7814 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
7815
7816 /* Total BDEs in BPL for scsi_sg_list */
7817 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
7818 }
7819
7820 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
7821 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
7822 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
7823 phba->cfg_total_seg_cnt);
7824
7825 phba->max_vpi = LPFC_MAX_VPI;
7826 /* This will be set to correct value after config_port mbox */
7827 phba->max_vports = 0;
7828
7829 /*
7830 * Initialize the SLI Layer to run with lpfc HBAs.
7831 */
7832 lpfc_sli_setup(phba);
7833 lpfc_sli_queue_init(phba);
7834
7835 /* Allocate device driver memory */
7836 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
7837 return -ENOMEM;
7838
7839 phba->lpfc_sg_dma_buf_pool =
7840 dma_pool_create("lpfc_sg_dma_buf_pool",
7841 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
7842 BPL_ALIGN_SZ, 0);
7843
7844 if (!phba->lpfc_sg_dma_buf_pool)
7845 goto fail_free_mem;
7846
7847 phba->lpfc_cmd_rsp_buf_pool =
7848 dma_pool_create("lpfc_cmd_rsp_buf_pool",
7849 &phba->pcidev->dev,
7850 sizeof(struct fcp_cmnd) +
7851 sizeof(struct fcp_rsp),
7852 BPL_ALIGN_SZ, 0);
7853
7854 if (!phba->lpfc_cmd_rsp_buf_pool)
7855 goto fail_free_dma_buf_pool;
7856
7857 /*
7858 * Enable sr-iov virtual functions if supported and configured
7859 * through the module parameter.
7860 */
7861 if (phba->cfg_sriov_nr_virtfn > 0) {
7862 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
7863 phba->cfg_sriov_nr_virtfn);
7864 if (rc) {
7865 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7866 "2808 Requested number of SR-IOV "
7867 "virtual functions (%d) is not "
7868 "supported\n",
7869 phba->cfg_sriov_nr_virtfn);
7870 phba->cfg_sriov_nr_virtfn = 0;
7871 }
7872 }
7873
7874 return 0;
7875
7876 fail_free_dma_buf_pool:
7877 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
7878 phba->lpfc_sg_dma_buf_pool = NULL;
7879 fail_free_mem:
7880 lpfc_mem_free(phba);
7881 return -ENOMEM;
7882 }
7883
7884 /**
7885 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
7886 * @phba: pointer to lpfc hba data structure.
7887 *
7888 * This routine is invoked to unset the driver internal resources set up
7889 * specific for supporting the SLI-3 HBA device it attached to.
7890 **/
7891 static void
lpfc_sli_driver_resource_unset(struct lpfc_hba * phba)7892 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
7893 {
7894 /* Free device driver memory allocated */
7895 lpfc_mem_free_all(phba);
7896
7897 return;
7898 }
7899
7900 /**
7901 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
7902 * @phba: pointer to lpfc hba data structure.
7903 *
7904 * This routine is invoked to set up the driver internal resources specific to
7905 * support the SLI-4 HBA device it attached to.
7906 *
7907 * Return codes
7908 * 0 - successful
7909 * other values - error
7910 **/
7911 static int
lpfc_sli4_driver_resource_setup(struct lpfc_hba * phba)7912 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
7913 {
7914 LPFC_MBOXQ_t *mboxq;
7915 MAILBOX_t *mb;
7916 int rc, i, max_buf_size;
7917 int longs;
7918 int extra;
7919 uint64_t wwn;
7920 u32 if_type;
7921 u32 if_fam;
7922
7923 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7924 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7925 phba->sli4_hba.curr_disp_cpu = 0;
7926
7927 /* Get all the module params for configuring this host */
7928 lpfc_get_cfgparam(phba);
7929
7930 /* Set up phase-1 common device driver resources */
7931 rc = lpfc_setup_driver_resource_phase1(phba);
7932 if (rc)
7933 return -ENODEV;
7934
7935 /* Before proceed, wait for POST done and device ready */
7936 rc = lpfc_sli4_post_status_check(phba);
7937 if (rc)
7938 return -ENODEV;
7939
7940 /* Allocate all driver workqueues here */
7941
7942 /* The lpfc_wq workqueue for deferred irq use */
7943 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
7944 if (!phba->wq)
7945 return -ENOMEM;
7946
7947 /*
7948 * Initialize timers used by driver
7949 */
7950
7951 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
7952
7953 /* FCF rediscover timer */
7954 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
7955
7956 /* CMF congestion timer */
7957 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7958 phba->cmf_timer.function = lpfc_cmf_timer;
7959
7960 /*
7961 * Control structure for handling external multi-buffer mailbox
7962 * command pass-through.
7963 */
7964 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
7965 sizeof(struct lpfc_mbox_ext_buf_ctx));
7966 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
7967
7968 phba->max_vpi = LPFC_MAX_VPI;
7969
7970 /* This will be set to correct value after the read_config mbox */
7971 phba->max_vports = 0;
7972
7973 /* Program the default value of vlan_id and fc_map */
7974 phba->valid_vlan = 0;
7975 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
7976 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
7977 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
7978
7979 /*
7980 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
7981 * we will associate a new ring, for each EQ/CQ/WQ tuple.
7982 * The WQ create will allocate the ring.
7983 */
7984
7985 /* Initialize buffer queue management fields */
7986 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
7987 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
7988 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
7989
7990 /* for VMID idle timeout if VMID is enabled */
7991 if (lpfc_is_vmid_enabled(phba))
7992 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0);
7993
7994 /*
7995 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
7996 */
7997 /* Initialize the Abort buffer list used by driver */
7998 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
7999 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8000
8001 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8002 /* Initialize the Abort nvme buffer list used by driver */
8003 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8004 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8005 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8006 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8007 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8008 }
8009
8010 /* This abort list used by worker thread */
8011 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8012 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8013 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8014 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8015
8016 /*
8017 * Initialize driver internal slow-path work queues
8018 */
8019
8020 /* Driver internel slow-path CQ Event pool */
8021 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8022 /* Response IOCB work queue list */
8023 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8024 /* Asynchronous event CQ Event work queue list */
8025 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8026 /* Slow-path XRI aborted CQ Event work queue list */
8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8028 /* Receive queue CQ Event work queue list */
8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8030
8031 /* Initialize extent block lists. */
8032 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8033 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8034 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8035 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
8036
8037 /* Initialize mboxq lists. If the early init routines fail
8038 * these lists need to be correctly initialized.
8039 */
8040 INIT_LIST_HEAD(&phba->sli.mboxq);
8041 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
8042
8043 /* initialize optic_state to 0xFF */
8044 phba->sli4_hba.lnk_info.optic_state = 0xff;
8045
8046 /* Allocate device driver memory */
8047 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
8048 if (rc)
8049 goto out_destroy_workqueue;
8050
8051 /* IF Type 2 ports get initialized now. */
8052 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8053 LPFC_SLI_INTF_IF_TYPE_2) {
8054 rc = lpfc_pci_function_reset(phba);
8055 if (unlikely(rc)) {
8056 rc = -ENODEV;
8057 goto out_free_mem;
8058 }
8059 phba->temp_sensor_support = 1;
8060 }
8061
8062 /* Create the bootstrap mailbox command */
8063 rc = lpfc_create_bootstrap_mbox(phba);
8064 if (unlikely(rc))
8065 goto out_free_mem;
8066
8067 /* Set up the host's endian order with the device. */
8068 rc = lpfc_setup_endian_order(phba);
8069 if (unlikely(rc))
8070 goto out_free_bsmbx;
8071
8072 /* Set up the hba's configuration parameters. */
8073 rc = lpfc_sli4_read_config(phba);
8074 if (unlikely(rc))
8075 goto out_free_bsmbx;
8076
8077 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8078 /* Right now the link is down, if FA-PWWN is configured the
8079 * firmware will try FLOGI before the driver gets a link up.
8080 * If it fails, the driver should get a MISCONFIGURED async
8081 * event which will clear this flag. The only notification
8082 * the driver gets is if it fails, if it succeeds there is no
8083 * notification given. Assume success.
8084 */
8085 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8086 }
8087
8088 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
8089 if (unlikely(rc))
8090 goto out_free_bsmbx;
8091
8092 /* IF Type 0 ports get initialized now. */
8093 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8094 LPFC_SLI_INTF_IF_TYPE_0) {
8095 rc = lpfc_pci_function_reset(phba);
8096 if (unlikely(rc))
8097 goto out_free_bsmbx;
8098 }
8099
8100 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8101 GFP_KERNEL);
8102 if (!mboxq) {
8103 rc = -ENOMEM;
8104 goto out_free_bsmbx;
8105 }
8106
8107 /* Check for NVMET being configured */
8108 phba->nvmet_support = 0;
8109 if (lpfc_enable_nvmet_cnt) {
8110
8111 /* First get WWN of HBA instance */
8112 lpfc_read_nv(phba, mboxq);
8113 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8114 if (rc != MBX_SUCCESS) {
8115 lpfc_printf_log(phba, KERN_ERR,
8116 LOG_TRACE_EVENT,
8117 "6016 Mailbox failed , mbxCmd x%x "
8118 "READ_NV, mbxStatus x%x\n",
8119 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
8120 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
8121 mempool_free(mboxq, phba->mbox_mem_pool);
8122 rc = -EIO;
8123 goto out_free_bsmbx;
8124 }
8125 mb = &mboxq->u.mb;
8126 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
8127 sizeof(uint64_t));
8128 wwn = cpu_to_be64(wwn);
8129 phba->sli4_hba.wwnn.u.name = wwn;
8130 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
8131 sizeof(uint64_t));
8132 /* wwn is WWPN of HBA instance */
8133 wwn = cpu_to_be64(wwn);
8134 phba->sli4_hba.wwpn.u.name = wwn;
8135
8136 /* Check to see if it matches any module parameter */
8137 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
8138 if (wwn == lpfc_enable_nvmet[i]) {
8139 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
8140 if (lpfc_nvmet_mem_alloc(phba))
8141 break;
8142
8143 phba->nvmet_support = 1; /* a match */
8144
8145 lpfc_printf_log(phba, KERN_ERR,
8146 LOG_TRACE_EVENT,
8147 "6017 NVME Target %016llx\n",
8148 wwn);
8149 #else
8150 lpfc_printf_log(phba, KERN_ERR,
8151 LOG_TRACE_EVENT,
8152 "6021 Can't enable NVME Target."
8153 " NVME_TARGET_FC infrastructure"
8154 " is not in kernel\n");
8155 #endif
8156 /* Not supported for NVMET */
8157 phba->cfg_xri_rebalancing = 0;
8158 if (phba->irq_chann_mode == NHT_MODE) {
8159 phba->cfg_irq_chann =
8160 phba->sli4_hba.num_present_cpu;
8161 phba->cfg_hdw_queue =
8162 phba->sli4_hba.num_present_cpu;
8163 phba->irq_chann_mode = NORMAL_MODE;
8164 }
8165 break;
8166 }
8167 }
8168 }
8169
8170 lpfc_nvme_mod_param_dep(phba);
8171
8172 /*
8173 * Get sli4 parameters that override parameters from Port capabilities.
8174 * If this call fails, it isn't critical unless the SLI4 parameters come
8175 * back in conflict.
8176 */
8177 rc = lpfc_get_sli4_parameters(phba, mboxq);
8178 if (rc) {
8179 if_type = bf_get(lpfc_sli_intf_if_type,
8180 &phba->sli4_hba.sli_intf);
8181 if_fam = bf_get(lpfc_sli_intf_sli_family,
8182 &phba->sli4_hba.sli_intf);
8183 if (phba->sli4_hba.extents_in_use &&
8184 phba->sli4_hba.rpi_hdrs_in_use) {
8185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8186 "2999 Unsupported SLI4 Parameters "
8187 "Extents and RPI headers enabled.\n");
8188 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
8189 if_fam == LPFC_SLI_INTF_FAMILY_BE2) {
8190 mempool_free(mboxq, phba->mbox_mem_pool);
8191 rc = -EIO;
8192 goto out_free_bsmbx;
8193 }
8194 }
8195 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
8196 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) {
8197 mempool_free(mboxq, phba->mbox_mem_pool);
8198 rc = -EIO;
8199 goto out_free_bsmbx;
8200 }
8201 }
8202
8203 /*
8204 * 1 for cmd, 1 for rsp, NVME adds an extra one
8205 * for boundary conditions in its max_sgl_segment template.
8206 */
8207 extra = 2;
8208 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
8209 extra++;
8210
8211 /*
8212 * It doesn't matter what family our adapter is in, we are
8213 * limited to 2 Pages, 512 SGEs, for our SGL.
8214 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
8215 */
8216 max_buf_size = (2 * SLI4_PAGE_SIZE);
8217
8218 /*
8219 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
8220 * used to create the sg_dma_buf_pool must be calculated.
8221 */
8222 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
8223 /* Both cfg_enable_bg and cfg_external_dif code paths */
8224
8225 /*
8226 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
8227 * the FCP rsp, and a SGE. Sice we have no control
8228 * over how many protection segments the SCSI Layer
8229 * will hand us (ie: there could be one for every block
8230 * in the IO), just allocate enough SGEs to accomidate
8231 * our max amount and we need to limit lpfc_sg_seg_cnt
8232 * to minimize the risk of running out.
8233 */
8234 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
8235 sizeof(struct fcp_rsp) + max_buf_size;
8236
8237 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
8238 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
8239
8240 /*
8241 * If supporting DIF, reduce the seg count for scsi to
8242 * allow room for the DIF sges.
8243 */
8244 if (phba->cfg_enable_bg &&
8245 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
8246 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
8247 else
8248 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8249
8250 } else {
8251 /*
8252 * The scsi_buf for a regular I/O holds the FCP cmnd,
8253 * the FCP rsp, a SGE for each, and a SGE for up to
8254 * cfg_sg_seg_cnt data segments.
8255 */
8256 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
8257 sizeof(struct fcp_rsp) +
8258 ((phba->cfg_sg_seg_cnt + extra) *
8259 sizeof(struct sli4_sge));
8260
8261 /* Total SGEs for scsi_sg_list */
8262 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
8263 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8264
8265 /*
8266 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
8267 * need to post 1 page for the SGL.
8268 */
8269 }
8270
8271 if (phba->cfg_xpsgl && !phba->nvmet_support)
8272 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
8273 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
8274 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
8275 else
8276 phba->cfg_sg_dma_buf_size =
8277 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
8278
8279 phba->border_sge_num = phba->cfg_sg_dma_buf_size /
8280 sizeof(struct sli4_sge);
8281
8282 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
8283 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8284 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
8285 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
8286 "6300 Reducing NVME sg segment "
8287 "cnt to %d\n",
8288 LPFC_MAX_NVME_SEG_CNT);
8289 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
8290 } else
8291 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
8292 }
8293
8294 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
8295 "9087 sg_seg_cnt:%d dmabuf_size:%d "
8296 "total:%d scsi:%d nvme:%d\n",
8297 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
8298 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
8299 phba->cfg_nvme_seg_cnt);
8300
8301 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE)
8302 i = phba->cfg_sg_dma_buf_size;
8303 else
8304 i = SLI4_PAGE_SIZE;
8305
8306 phba->lpfc_sg_dma_buf_pool =
8307 dma_pool_create("lpfc_sg_dma_buf_pool",
8308 &phba->pcidev->dev,
8309 phba->cfg_sg_dma_buf_size,
8310 i, 0);
8311 if (!phba->lpfc_sg_dma_buf_pool) {
8312 rc = -ENOMEM;
8313 goto out_free_bsmbx;
8314 }
8315
8316 phba->lpfc_cmd_rsp_buf_pool =
8317 dma_pool_create("lpfc_cmd_rsp_buf_pool",
8318 &phba->pcidev->dev,
8319 sizeof(struct fcp_cmnd) +
8320 sizeof(struct fcp_rsp),
8321 i, 0);
8322 if (!phba->lpfc_cmd_rsp_buf_pool) {
8323 rc = -ENOMEM;
8324 goto out_free_sg_dma_buf;
8325 }
8326
8327 mempool_free(mboxq, phba->mbox_mem_pool);
8328
8329 /* Verify OAS is supported */
8330 lpfc_sli4_oas_verify(phba);
8331
8332 /* Verify RAS support on adapter */
8333 lpfc_sli4_ras_init(phba);
8334
8335 /* Verify all the SLI4 queues */
8336 rc = lpfc_sli4_queue_verify(phba);
8337 if (rc)
8338 goto out_free_cmd_rsp_buf;
8339
8340 /* Create driver internal CQE event pool */
8341 rc = lpfc_sli4_cq_event_pool_create(phba);
8342 if (rc)
8343 goto out_free_cmd_rsp_buf;
8344
8345 /* Initialize sgl lists per host */
8346 lpfc_init_sgl_list(phba);
8347
8348 /* Allocate and initialize active sgl array */
8349 rc = lpfc_init_active_sgl_array(phba);
8350 if (rc) {
8351 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8352 "1430 Failed to initialize sgl list.\n");
8353 goto out_destroy_cq_event_pool;
8354 }
8355 rc = lpfc_sli4_init_rpi_hdrs(phba);
8356 if (rc) {
8357 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8358 "1432 Failed to initialize rpi headers.\n");
8359 goto out_free_active_sgl;
8360 }
8361
8362 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
8363 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
8364 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
8365 GFP_KERNEL);
8366 if (!phba->fcf.fcf_rr_bmask) {
8367 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8368 "2759 Failed allocate memory for FCF round "
8369 "robin failover bmask\n");
8370 rc = -ENOMEM;
8371 goto out_remove_rpi_hdrs;
8372 }
8373
8374 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
8375 sizeof(struct lpfc_hba_eq_hdl),
8376 GFP_KERNEL);
8377 if (!phba->sli4_hba.hba_eq_hdl) {
8378 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8379 "2572 Failed allocate memory for "
8380 "fast-path per-EQ handle array\n");
8381 rc = -ENOMEM;
8382 goto out_free_fcf_rr_bmask;
8383 }
8384
8385 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
8386 sizeof(struct lpfc_vector_map_info),
8387 GFP_KERNEL);
8388 if (!phba->sli4_hba.cpu_map) {
8389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8390 "3327 Failed allocate memory for msi-x "
8391 "interrupt vector mapping\n");
8392 rc = -ENOMEM;
8393 goto out_free_hba_eq_hdl;
8394 }
8395
8396 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8397 if (!phba->sli4_hba.eq_info) {
8398 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8399 "3321 Failed allocation for per_cpu stats\n");
8400 rc = -ENOMEM;
8401 goto out_free_hba_cpu_map;
8402 }
8403
8404 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
8405 sizeof(*phba->sli4_hba.idle_stat),
8406 GFP_KERNEL);
8407 if (!phba->sli4_hba.idle_stat) {
8408 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8409 "3390 Failed allocation for idle_stat\n");
8410 rc = -ENOMEM;
8411 goto out_free_hba_eq_info;
8412 }
8413
8414 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8415 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8416 if (!phba->sli4_hba.c_stat) {
8417 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8418 "3332 Failed allocating per cpu hdwq stats\n");
8419 rc = -ENOMEM;
8420 goto out_free_hba_idle_stat;
8421 }
8422 #endif
8423
8424 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat);
8425 if (!phba->cmf_stat) {
8426 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8427 "3331 Failed allocating per cpu cgn stats\n");
8428 rc = -ENOMEM;
8429 goto out_free_hba_hdwq_info;
8430 }
8431
8432 /*
8433 * Enable sr-iov virtual functions if supported and configured
8434 * through the module parameter.
8435 */
8436 if (phba->cfg_sriov_nr_virtfn > 0) {
8437 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
8438 phba->cfg_sriov_nr_virtfn);
8439 if (rc) {
8440 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8441 "3020 Requested number of SR-IOV "
8442 "virtual functions (%d) is not "
8443 "supported\n",
8444 phba->cfg_sriov_nr_virtfn);
8445 phba->cfg_sriov_nr_virtfn = 0;
8446 }
8447 }
8448
8449 return 0;
8450
8451 out_free_hba_hdwq_info:
8452 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8453 free_percpu(phba->sli4_hba.c_stat);
8454 out_free_hba_idle_stat:
8455 #endif
8456 kfree(phba->sli4_hba.idle_stat);
8457 out_free_hba_eq_info:
8458 free_percpu(phba->sli4_hba.eq_info);
8459 out_free_hba_cpu_map:
8460 kfree(phba->sli4_hba.cpu_map);
8461 out_free_hba_eq_hdl:
8462 kfree(phba->sli4_hba.hba_eq_hdl);
8463 out_free_fcf_rr_bmask:
8464 kfree(phba->fcf.fcf_rr_bmask);
8465 out_remove_rpi_hdrs:
8466 lpfc_sli4_remove_rpi_hdrs(phba);
8467 out_free_active_sgl:
8468 lpfc_free_active_sgl(phba);
8469 out_destroy_cq_event_pool:
8470 lpfc_sli4_cq_event_pool_destroy(phba);
8471 out_free_cmd_rsp_buf:
8472 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
8473 phba->lpfc_cmd_rsp_buf_pool = NULL;
8474 out_free_sg_dma_buf:
8475 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
8476 phba->lpfc_sg_dma_buf_pool = NULL;
8477 out_free_bsmbx:
8478 lpfc_destroy_bootstrap_mbox(phba);
8479 out_free_mem:
8480 lpfc_mem_free(phba);
8481 out_destroy_workqueue:
8482 destroy_workqueue(phba->wq);
8483 phba->wq = NULL;
8484 return rc;
8485 }
8486
8487 /**
8488 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
8489 * @phba: pointer to lpfc hba data structure.
8490 *
8491 * This routine is invoked to unset the driver internal resources set up
8492 * specific for supporting the SLI-4 HBA device it attached to.
8493 **/
8494 static void
lpfc_sli4_driver_resource_unset(struct lpfc_hba * phba)8495 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
8496 {
8497 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
8498
8499 free_percpu(phba->sli4_hba.eq_info);
8500 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8501 free_percpu(phba->sli4_hba.c_stat);
8502 #endif
8503 free_percpu(phba->cmf_stat);
8504 kfree(phba->sli4_hba.idle_stat);
8505
8506 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
8507 kfree(phba->sli4_hba.cpu_map);
8508 phba->sli4_hba.num_possible_cpu = 0;
8509 phba->sli4_hba.num_present_cpu = 0;
8510 phba->sli4_hba.curr_disp_cpu = 0;
8511 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8512
8513 /* Free memory allocated for fast-path work queue handles */
8514 kfree(phba->sli4_hba.hba_eq_hdl);
8515
8516 /* Free the allocated rpi headers. */
8517 lpfc_sli4_remove_rpi_hdrs(phba);
8518 lpfc_sli4_remove_rpis(phba);
8519
8520 /* Free eligible FCF index bmask */
8521 kfree(phba->fcf.fcf_rr_bmask);
8522
8523 /* Free the ELS sgl list */
8524 lpfc_free_active_sgl(phba);
8525 lpfc_free_els_sgl_list(phba);
8526 lpfc_free_nvmet_sgl_list(phba);
8527
8528 /* Free the completion queue EQ event pool */
8529 lpfc_sli4_cq_event_release_all(phba);
8530 lpfc_sli4_cq_event_pool_destroy(phba);
8531
8532 /* Release resource identifiers. */
8533 lpfc_sli4_dealloc_resource_identifiers(phba);
8534
8535 /* Free the bsmbx region. */
8536 lpfc_destroy_bootstrap_mbox(phba);
8537
8538 /* Free the SLI Layer memory with SLI4 HBAs */
8539 lpfc_mem_free_all(phba);
8540
8541 /* Free the current connect table */
8542 list_for_each_entry_safe(conn_entry, next_conn_entry,
8543 &phba->fcf_conn_rec_list, list) {
8544 list_del_init(&conn_entry->list);
8545 kfree(conn_entry);
8546 }
8547
8548 return;
8549 }
8550
8551 /**
8552 * lpfc_init_api_table_setup - Set up init api function jump table
8553 * @phba: The hba struct for which this call is being executed.
8554 * @dev_grp: The HBA PCI-Device group number.
8555 *
8556 * This routine sets up the device INIT interface API function jump table
8557 * in @phba struct.
8558 *
8559 * Returns: 0 - success, -ENODEV - failure.
8560 **/
8561 int
lpfc_init_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)8562 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8563 {
8564 phba->lpfc_hba_init_link = lpfc_hba_init_link;
8565 phba->lpfc_hba_down_link = lpfc_hba_down_link;
8566 phba->lpfc_selective_reset = lpfc_selective_reset;
8567 switch (dev_grp) {
8568 case LPFC_PCI_DEV_LP:
8569 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
8570 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
8571 phba->lpfc_stop_port = lpfc_stop_port_s3;
8572 break;
8573 case LPFC_PCI_DEV_OC:
8574 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
8575 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
8576 phba->lpfc_stop_port = lpfc_stop_port_s4;
8577 break;
8578 default:
8579 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8580 "1431 Invalid HBA PCI-device group: 0x%x\n",
8581 dev_grp);
8582 return -ENODEV;
8583 }
8584 return 0;
8585 }
8586
8587 /**
8588 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
8589 * @phba: pointer to lpfc hba data structure.
8590 *
8591 * This routine is invoked to set up the driver internal resources after the
8592 * device specific resource setup to support the HBA device it attached to.
8593 *
8594 * Return codes
8595 * 0 - successful
8596 * other values - error
8597 **/
8598 static int
lpfc_setup_driver_resource_phase2(struct lpfc_hba * phba)8599 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
8600 {
8601 int error;
8602
8603 /* Startup the kernel thread for this host adapter. */
8604 phba->worker_thread = kthread_run(lpfc_do_work, phba,
8605 "lpfc_worker_%d", phba->brd_no);
8606 if (IS_ERR(phba->worker_thread)) {
8607 error = PTR_ERR(phba->worker_thread);
8608 return error;
8609 }
8610
8611 return 0;
8612 }
8613
8614 /**
8615 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
8616 * @phba: pointer to lpfc hba data structure.
8617 *
8618 * This routine is invoked to unset the driver internal resources set up after
8619 * the device specific resource setup for supporting the HBA device it
8620 * attached to.
8621 **/
8622 static void
lpfc_unset_driver_resource_phase2(struct lpfc_hba * phba)8623 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
8624 {
8625 if (phba->wq) {
8626 destroy_workqueue(phba->wq);
8627 phba->wq = NULL;
8628 }
8629
8630 /* Stop kernel worker thread */
8631 if (phba->worker_thread)
8632 kthread_stop(phba->worker_thread);
8633 }
8634
8635 /**
8636 * lpfc_free_iocb_list - Free iocb list.
8637 * @phba: pointer to lpfc hba data structure.
8638 *
8639 * This routine is invoked to free the driver's IOCB list and memory.
8640 **/
8641 void
lpfc_free_iocb_list(struct lpfc_hba * phba)8642 lpfc_free_iocb_list(struct lpfc_hba *phba)
8643 {
8644 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
8645
8646 spin_lock_irq(&phba->hbalock);
8647 list_for_each_entry_safe(iocbq_entry, iocbq_next,
8648 &phba->lpfc_iocb_list, list) {
8649 list_del(&iocbq_entry->list);
8650 kfree(iocbq_entry);
8651 phba->total_iocbq_bufs--;
8652 }
8653 spin_unlock_irq(&phba->hbalock);
8654
8655 return;
8656 }
8657
8658 /**
8659 * lpfc_init_iocb_list - Allocate and initialize iocb list.
8660 * @phba: pointer to lpfc hba data structure.
8661 * @iocb_count: number of requested iocbs
8662 *
8663 * This routine is invoked to allocate and initizlize the driver's IOCB
8664 * list and set up the IOCB tag array accordingly.
8665 *
8666 * Return codes
8667 * 0 - successful
8668 * other values - error
8669 **/
8670 int
lpfc_init_iocb_list(struct lpfc_hba * phba,int iocb_count)8671 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
8672 {
8673 struct lpfc_iocbq *iocbq_entry = NULL;
8674 uint16_t iotag;
8675 int i;
8676
8677 /* Initialize and populate the iocb list per host. */
8678 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
8679 for (i = 0; i < iocb_count; i++) {
8680 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
8681 if (iocbq_entry == NULL) {
8682 printk(KERN_ERR "%s: only allocated %d iocbs of "
8683 "expected %d count. Unloading driver.\n",
8684 __func__, i, iocb_count);
8685 goto out_free_iocbq;
8686 }
8687
8688 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
8689 if (iotag == 0) {
8690 kfree(iocbq_entry);
8691 printk(KERN_ERR "%s: failed to allocate IOTAG. "
8692 "Unloading driver.\n", __func__);
8693 goto out_free_iocbq;
8694 }
8695 iocbq_entry->sli4_lxritag = NO_XRI;
8696 iocbq_entry->sli4_xritag = NO_XRI;
8697
8698 spin_lock_irq(&phba->hbalock);
8699 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
8700 phba->total_iocbq_bufs++;
8701 spin_unlock_irq(&phba->hbalock);
8702 }
8703
8704 return 0;
8705
8706 out_free_iocbq:
8707 lpfc_free_iocb_list(phba);
8708
8709 return -ENOMEM;
8710 }
8711
8712 /**
8713 * lpfc_free_sgl_list - Free a given sgl list.
8714 * @phba: pointer to lpfc hba data structure.
8715 * @sglq_list: pointer to the head of sgl list.
8716 *
8717 * This routine is invoked to free a give sgl list and memory.
8718 **/
8719 void
lpfc_free_sgl_list(struct lpfc_hba * phba,struct list_head * sglq_list)8720 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
8721 {
8722 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8723
8724 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
8725 list_del(&sglq_entry->list);
8726 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
8727 kfree(sglq_entry);
8728 }
8729 }
8730
8731 /**
8732 * lpfc_free_els_sgl_list - Free els sgl list.
8733 * @phba: pointer to lpfc hba data structure.
8734 *
8735 * This routine is invoked to free the driver's els sgl list and memory.
8736 **/
8737 static void
lpfc_free_els_sgl_list(struct lpfc_hba * phba)8738 lpfc_free_els_sgl_list(struct lpfc_hba *phba)
8739 {
8740 LIST_HEAD(sglq_list);
8741
8742 /* Retrieve all els sgls from driver list */
8743 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8744 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8745 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8746
8747 /* Now free the sgl list */
8748 lpfc_free_sgl_list(phba, &sglq_list);
8749 }
8750
8751 /**
8752 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
8753 * @phba: pointer to lpfc hba data structure.
8754 *
8755 * This routine is invoked to free the driver's nvmet sgl list and memory.
8756 **/
8757 static void
lpfc_free_nvmet_sgl_list(struct lpfc_hba * phba)8758 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
8759 {
8760 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8761 LIST_HEAD(sglq_list);
8762
8763 /* Retrieve all nvmet sgls from driver list */
8764 spin_lock_irq(&phba->hbalock);
8765 spin_lock(&phba->sli4_hba.sgl_list_lock);
8766 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8767 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8768 spin_unlock_irq(&phba->hbalock);
8769
8770 /* Now free the sgl list */
8771 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
8772 list_del(&sglq_entry->list);
8773 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
8774 kfree(sglq_entry);
8775 }
8776
8777 /* Update the nvmet_xri_cnt to reflect no current sgls.
8778 * The next initialization cycle sets the count and allocates
8779 * the sgls over again.
8780 */
8781 phba->sli4_hba.nvmet_xri_cnt = 0;
8782 }
8783
8784 /**
8785 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
8786 * @phba: pointer to lpfc hba data structure.
8787 *
8788 * This routine is invoked to allocate the driver's active sgl memory.
8789 * This array will hold the sglq_entry's for active IOs.
8790 **/
8791 static int
lpfc_init_active_sgl_array(struct lpfc_hba * phba)8792 lpfc_init_active_sgl_array(struct lpfc_hba *phba)
8793 {
8794 int size;
8795 size = sizeof(struct lpfc_sglq *);
8796 size *= phba->sli4_hba.max_cfg_param.max_xri;
8797
8798 phba->sli4_hba.lpfc_sglq_active_list =
8799 kzalloc(size, GFP_KERNEL);
8800 if (!phba->sli4_hba.lpfc_sglq_active_list)
8801 return -ENOMEM;
8802 return 0;
8803 }
8804
8805 /**
8806 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
8807 * @phba: pointer to lpfc hba data structure.
8808 *
8809 * This routine is invoked to walk through the array of active sglq entries
8810 * and free all of the resources.
8811 * This is just a place holder for now.
8812 **/
8813 static void
lpfc_free_active_sgl(struct lpfc_hba * phba)8814 lpfc_free_active_sgl(struct lpfc_hba *phba)
8815 {
8816 kfree(phba->sli4_hba.lpfc_sglq_active_list);
8817 }
8818
8819 /**
8820 * lpfc_init_sgl_list - Allocate and initialize sgl list.
8821 * @phba: pointer to lpfc hba data structure.
8822 *
8823 * This routine is invoked to allocate and initizlize the driver's sgl
8824 * list and set up the sgl xritag tag array accordingly.
8825 *
8826 **/
8827 static void
lpfc_init_sgl_list(struct lpfc_hba * phba)8828 lpfc_init_sgl_list(struct lpfc_hba *phba)
8829 {
8830 /* Initialize and populate the sglq list per host/VF. */
8831 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8832 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8833 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8834 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8835
8836 /* els xri-sgl book keeping */
8837 phba->sli4_hba.els_xri_cnt = 0;
8838
8839 /* nvme xri-buffer book keeping */
8840 phba->sli4_hba.io_xri_cnt = 0;
8841 }
8842
8843 /**
8844 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
8845 * @phba: pointer to lpfc hba data structure.
8846 *
8847 * This routine is invoked to post rpi header templates to the
8848 * port for those SLI4 ports that do not support extents. This routine
8849 * posts a PAGE_SIZE memory region to the port to hold up to
8850 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
8851 * and should be called only when interrupts are disabled.
8852 *
8853 * Return codes
8854 * 0 - successful
8855 * -ERROR - otherwise.
8856 **/
8857 int
lpfc_sli4_init_rpi_hdrs(struct lpfc_hba * phba)8858 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
8859 {
8860 int rc = 0;
8861 struct lpfc_rpi_hdr *rpi_hdr;
8862
8863 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8864 if (!phba->sli4_hba.rpi_hdrs_in_use)
8865 return rc;
8866 if (phba->sli4_hba.extents_in_use)
8867 return -EIO;
8868
8869 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
8870 if (!rpi_hdr) {
8871 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8872 "0391 Error during rpi post operation\n");
8873 lpfc_sli4_remove_rpis(phba);
8874 rc = -ENODEV;
8875 }
8876
8877 return rc;
8878 }
8879
8880 /**
8881 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
8882 * @phba: pointer to lpfc hba data structure.
8883 *
8884 * This routine is invoked to allocate a single 4KB memory region to
8885 * support rpis and stores them in the phba. This single region
8886 * provides support for up to 64 rpis. The region is used globally
8887 * by the device.
8888 *
8889 * Returns:
8890 * A valid rpi hdr on success.
8891 * A NULL pointer on any failure.
8892 **/
8893 struct lpfc_rpi_hdr *
lpfc_sli4_create_rpi_hdr(struct lpfc_hba * phba)8894 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
8895 {
8896 uint16_t rpi_limit, curr_rpi_range;
8897 struct lpfc_dmabuf *dmabuf;
8898 struct lpfc_rpi_hdr *rpi_hdr;
8899
8900 /*
8901 * If the SLI4 port supports extents, posting the rpi header isn't
8902 * required. Set the expected maximum count and let the actual value
8903 * get set when extents are fully allocated.
8904 */
8905 if (!phba->sli4_hba.rpi_hdrs_in_use)
8906 return NULL;
8907 if (phba->sli4_hba.extents_in_use)
8908 return NULL;
8909
8910 /* The limit on the logical index is just the max_rpi count. */
8911 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8912
8913 spin_lock_irq(&phba->hbalock);
8914 /*
8915 * Establish the starting RPI in this header block. The starting
8916 * rpi is normalized to a zero base because the physical rpi is
8917 * port based.
8918 */
8919 curr_rpi_range = phba->sli4_hba.next_rpi;
8920 spin_unlock_irq(&phba->hbalock);
8921
8922 /* Reached full RPI range */
8923 if (curr_rpi_range == rpi_limit)
8924 return NULL;
8925
8926 /*
8927 * First allocate the protocol header region for the port. The
8928 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
8929 */
8930 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
8931 if (!dmabuf)
8932 return NULL;
8933
8934 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
8935 LPFC_HDR_TEMPLATE_SIZE,
8936 &dmabuf->phys, GFP_KERNEL);
8937 if (!dmabuf->virt) {
8938 rpi_hdr = NULL;
8939 goto err_free_dmabuf;
8940 }
8941
8942 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
8943 rpi_hdr = NULL;
8944 goto err_free_coherent;
8945 }
8946
8947 /* Save the rpi header data for cleanup later. */
8948 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
8949 if (!rpi_hdr)
8950 goto err_free_coherent;
8951
8952 rpi_hdr->dmabuf = dmabuf;
8953 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
8954 rpi_hdr->page_count = 1;
8955 spin_lock_irq(&phba->hbalock);
8956
8957 /* The rpi_hdr stores the logical index only. */
8958 rpi_hdr->start_rpi = curr_rpi_range;
8959 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8960 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8961
8962 spin_unlock_irq(&phba->hbalock);
8963 return rpi_hdr;
8964
8965 err_free_coherent:
8966 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
8967 dmabuf->virt, dmabuf->phys);
8968 err_free_dmabuf:
8969 kfree(dmabuf);
8970 return NULL;
8971 }
8972
8973 /**
8974 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
8975 * @phba: pointer to lpfc hba data structure.
8976 *
8977 * This routine is invoked to remove all memory resources allocated
8978 * to support rpis for SLI4 ports not supporting extents. This routine
8979 * presumes the caller has released all rpis consumed by fabric or port
8980 * logins and is prepared to have the header pages removed.
8981 **/
8982 void
lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba * phba)8983 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
8984 {
8985 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
8986
8987 if (!phba->sli4_hba.rpi_hdrs_in_use)
8988 goto exit;
8989
8990 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
8991 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
8992 list_del(&rpi_hdr->list);
8993 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
8994 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
8995 kfree(rpi_hdr->dmabuf);
8996 kfree(rpi_hdr);
8997 }
8998 exit:
8999 /* There are no rpis available to the port now. */
9000 phba->sli4_hba.next_rpi = 0;
9001 }
9002
9003 /**
9004 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
9005 * @pdev: pointer to pci device data structure.
9006 *
9007 * This routine is invoked to allocate the driver hba data structure for an
9008 * HBA device. If the allocation is successful, the phba reference to the
9009 * PCI device data structure is set.
9010 *
9011 * Return codes
9012 * pointer to @phba - successful
9013 * NULL - error
9014 **/
9015 static struct lpfc_hba *
lpfc_hba_alloc(struct pci_dev * pdev)9016 lpfc_hba_alloc(struct pci_dev *pdev)
9017 {
9018 struct lpfc_hba *phba;
9019
9020 /* Allocate memory for HBA structure */
9021 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
9022 if (!phba) {
9023 dev_err(&pdev->dev, "failed to allocate hba struct\n");
9024 return NULL;
9025 }
9026
9027 /* Set reference to PCI device in HBA structure */
9028 phba->pcidev = pdev;
9029
9030 /* Assign an unused board number */
9031 phba->brd_no = lpfc_get_instance();
9032 if (phba->brd_no < 0) {
9033 kfree(phba);
9034 return NULL;
9035 }
9036 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
9037
9038 spin_lock_init(&phba->ct_ev_lock);
9039 INIT_LIST_HEAD(&phba->ct_ev_waiters);
9040
9041 return phba;
9042 }
9043
9044 /**
9045 * lpfc_hba_free - Free driver hba data structure with a device.
9046 * @phba: pointer to lpfc hba data structure.
9047 *
9048 * This routine is invoked to free the driver hba data structure with an
9049 * HBA device.
9050 **/
9051 static void
lpfc_hba_free(struct lpfc_hba * phba)9052 lpfc_hba_free(struct lpfc_hba *phba)
9053 {
9054 if (phba->sli_rev == LPFC_SLI_REV4)
9055 kfree(phba->sli4_hba.hdwq);
9056
9057 /* Release the driver assigned board number */
9058 idr_remove(&lpfc_hba_index, phba->brd_no);
9059
9060 /* Free memory allocated with sli3 rings */
9061 kfree(phba->sli.sli3_ring);
9062 phba->sli.sli3_ring = NULL;
9063
9064 kfree(phba);
9065 return;
9066 }
9067
9068 /**
9069 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes
9070 * @vport: pointer to lpfc vport data structure.
9071 *
9072 * This routine is will setup initial FDMI attribute masks for
9073 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt
9074 * to get these attributes first before falling back, the attribute
9075 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1
9076 **/
9077 void
lpfc_setup_fdmi_mask(struct lpfc_vport * vport)9078 lpfc_setup_fdmi_mask(struct lpfc_vport *vport)
9079 {
9080 struct lpfc_hba *phba = vport->phba;
9081
9082 vport->load_flag |= FC_ALLOW_FDMI;
9083 if (phba->cfg_enable_SmartSAN ||
9084 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) {
9085 /* Setup appropriate attribute masks */
9086 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
9087 if (phba->cfg_enable_SmartSAN)
9088 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
9089 else
9090 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
9091 }
9092
9093 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
9094 "6077 Setup FDMI mask: hba x%x port x%x\n",
9095 vport->fdmi_hba_mask, vport->fdmi_port_mask);
9096 }
9097
9098 /**
9099 * lpfc_create_shost - Create hba physical port with associated scsi host.
9100 * @phba: pointer to lpfc hba data structure.
9101 *
9102 * This routine is invoked to create HBA physical port and associate a SCSI
9103 * host with it.
9104 *
9105 * Return codes
9106 * 0 - successful
9107 * other values - error
9108 **/
9109 static int
lpfc_create_shost(struct lpfc_hba * phba)9110 lpfc_create_shost(struct lpfc_hba *phba)
9111 {
9112 struct lpfc_vport *vport;
9113 struct Scsi_Host *shost;
9114
9115 /* Initialize HBA FC structure */
9116 phba->fc_edtov = FF_DEF_EDTOV;
9117 phba->fc_ratov = FF_DEF_RATOV;
9118 phba->fc_altov = FF_DEF_ALTOV;
9119 phba->fc_arbtov = FF_DEF_ARBTOV;
9120
9121 atomic_set(&phba->sdev_cnt, 0);
9122 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
9123 if (!vport)
9124 return -ENODEV;
9125
9126 shost = lpfc_shost_from_vport(vport);
9127 phba->pport = vport;
9128
9129 if (phba->nvmet_support) {
9130 /* Only 1 vport (pport) will support NVME target */
9131 phba->targetport = NULL;
9132 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
9133 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
9134 "6076 NVME Target Found\n");
9135 }
9136
9137 lpfc_debugfs_initialize(vport);
9138 /* Put reference to SCSI host to driver's device private data */
9139 pci_set_drvdata(phba->pcidev, shost);
9140
9141 lpfc_setup_fdmi_mask(vport);
9142
9143 /*
9144 * At this point we are fully registered with PSA. In addition,
9145 * any initial discovery should be completed.
9146 */
9147 return 0;
9148 }
9149
9150 /**
9151 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
9152 * @phba: pointer to lpfc hba data structure.
9153 *
9154 * This routine is invoked to destroy HBA physical port and the associated
9155 * SCSI host.
9156 **/
9157 static void
lpfc_destroy_shost(struct lpfc_hba * phba)9158 lpfc_destroy_shost(struct lpfc_hba *phba)
9159 {
9160 struct lpfc_vport *vport = phba->pport;
9161
9162 /* Destroy physical port that associated with the SCSI host */
9163 destroy_port(vport);
9164
9165 return;
9166 }
9167
9168 /**
9169 * lpfc_setup_bg - Setup Block guard structures and debug areas.
9170 * @phba: pointer to lpfc hba data structure.
9171 * @shost: the shost to be used to detect Block guard settings.
9172 *
9173 * This routine sets up the local Block guard protocol settings for @shost.
9174 * This routine also allocates memory for debugging bg buffers.
9175 **/
9176 static void
lpfc_setup_bg(struct lpfc_hba * phba,struct Scsi_Host * shost)9177 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
9178 {
9179 uint32_t old_mask;
9180 uint32_t old_guard;
9181
9182 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9183 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9184 "1478 Registering BlockGuard with the "
9185 "SCSI layer\n");
9186
9187 old_mask = phba->cfg_prot_mask;
9188 old_guard = phba->cfg_prot_guard;
9189
9190 /* Only allow supported values */
9191 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
9192 SHOST_DIX_TYPE0_PROTECTION |
9193 SHOST_DIX_TYPE1_PROTECTION);
9194 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
9195 SHOST_DIX_GUARD_CRC);
9196
9197 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
9198 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
9199 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
9200
9201 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9202 if ((old_mask != phba->cfg_prot_mask) ||
9203 (old_guard != phba->cfg_prot_guard))
9204 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9205 "1475 Registering BlockGuard with the "
9206 "SCSI layer: mask %d guard %d\n",
9207 phba->cfg_prot_mask,
9208 phba->cfg_prot_guard);
9209
9210 scsi_host_set_prot(shost, phba->cfg_prot_mask);
9211 scsi_host_set_guard(shost, phba->cfg_prot_guard);
9212 } else
9213 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9214 "1479 Not Registering BlockGuard with the SCSI "
9215 "layer, Bad protection parameters: %d %d\n",
9216 old_mask, old_guard);
9217 }
9218 }
9219
9220 /**
9221 * lpfc_post_init_setup - Perform necessary device post initialization setup.
9222 * @phba: pointer to lpfc hba data structure.
9223 *
9224 * This routine is invoked to perform all the necessary post initialization
9225 * setup for the device.
9226 **/
9227 static void
lpfc_post_init_setup(struct lpfc_hba * phba)9228 lpfc_post_init_setup(struct lpfc_hba *phba)
9229 {
9230 struct Scsi_Host *shost;
9231 struct lpfc_adapter_event_header adapter_event;
9232
9233 /* Get the default values for Model Name and Description */
9234 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9235
9236 /*
9237 * hba setup may have changed the hba_queue_depth so we need to
9238 * adjust the value of can_queue.
9239 */
9240 shost = pci_get_drvdata(phba->pcidev);
9241 shost->can_queue = phba->cfg_hba_queue_depth - 10;
9242
9243 lpfc_host_attrib_init(shost);
9244
9245 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9246 spin_lock_irq(shost->host_lock);
9247 lpfc_poll_start_timer(phba);
9248 spin_unlock_irq(shost->host_lock);
9249 }
9250
9251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9252 "0428 Perform SCSI scan\n");
9253 /* Send board arrival event to upper layer */
9254 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
9255 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
9256 fc_host_post_vendor_event(shost, fc_get_event_number(),
9257 sizeof(adapter_event),
9258 (char *) &adapter_event,
9259 LPFC_NL_VENDOR_ID);
9260 return;
9261 }
9262
9263 /**
9264 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
9265 * @phba: pointer to lpfc hba data structure.
9266 *
9267 * This routine is invoked to set up the PCI device memory space for device
9268 * with SLI-3 interface spec.
9269 *
9270 * Return codes
9271 * 0 - successful
9272 * other values - error
9273 **/
9274 static int
lpfc_sli_pci_mem_setup(struct lpfc_hba * phba)9275 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
9276 {
9277 struct pci_dev *pdev = phba->pcidev;
9278 unsigned long bar0map_len, bar2map_len;
9279 int i, hbq_count;
9280 void *ptr;
9281 int error;
9282
9283 if (!pdev)
9284 return -ENODEV;
9285
9286 /* Set the device DMA mask size */
9287 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9288 if (error)
9289 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9290 if (error)
9291 return error;
9292 error = -ENODEV;
9293
9294 /* Get the bus address of Bar0 and Bar2 and the number of bytes
9295 * required by each mapping.
9296 */
9297 phba->pci_bar0_map = pci_resource_start(pdev, 0);
9298 bar0map_len = pci_resource_len(pdev, 0);
9299
9300 phba->pci_bar2_map = pci_resource_start(pdev, 2);
9301 bar2map_len = pci_resource_len(pdev, 2);
9302
9303 /* Map HBA SLIM to a kernel virtual address. */
9304 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
9305 if (!phba->slim_memmap_p) {
9306 dev_printk(KERN_ERR, &pdev->dev,
9307 "ioremap failed for SLIM memory.\n");
9308 goto out;
9309 }
9310
9311 /* Map HBA Control Registers to a kernel virtual address. */
9312 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
9313 if (!phba->ctrl_regs_memmap_p) {
9314 dev_printk(KERN_ERR, &pdev->dev,
9315 "ioremap failed for HBA control registers.\n");
9316 goto out_iounmap_slim;
9317 }
9318
9319 /* Allocate memory for SLI-2 structures */
9320 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9321 &phba->slim2p.phys, GFP_KERNEL);
9322 if (!phba->slim2p.virt)
9323 goto out_iounmap;
9324
9325 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
9326 phba->mbox_ext = (phba->slim2p.virt +
9327 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
9328 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
9329 phba->IOCBs = (phba->slim2p.virt +
9330 offsetof(struct lpfc_sli2_slim, IOCBs));
9331
9332 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
9333 lpfc_sli_hbq_size(),
9334 &phba->hbqslimp.phys,
9335 GFP_KERNEL);
9336 if (!phba->hbqslimp.virt)
9337 goto out_free_slim;
9338
9339 hbq_count = lpfc_sli_hbq_count();
9340 ptr = phba->hbqslimp.virt;
9341 for (i = 0; i < hbq_count; ++i) {
9342 phba->hbqs[i].hbq_virt = ptr;
9343 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
9344 ptr += (lpfc_hbq_defs[i]->entry_count *
9345 sizeof(struct lpfc_hbq_entry));
9346 }
9347 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
9348 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
9349
9350 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
9351
9352 phba->MBslimaddr = phba->slim_memmap_p;
9353 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
9354 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
9355 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
9356 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
9357
9358 return 0;
9359
9360 out_free_slim:
9361 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9362 phba->slim2p.virt, phba->slim2p.phys);
9363 out_iounmap:
9364 iounmap(phba->ctrl_regs_memmap_p);
9365 out_iounmap_slim:
9366 iounmap(phba->slim_memmap_p);
9367 out:
9368 return error;
9369 }
9370
9371 /**
9372 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
9373 * @phba: pointer to lpfc hba data structure.
9374 *
9375 * This routine is invoked to unset the PCI device memory space for device
9376 * with SLI-3 interface spec.
9377 **/
9378 static void
lpfc_sli_pci_mem_unset(struct lpfc_hba * phba)9379 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
9380 {
9381 struct pci_dev *pdev;
9382
9383 /* Obtain PCI device reference */
9384 if (!phba->pcidev)
9385 return;
9386 else
9387 pdev = phba->pcidev;
9388
9389 /* Free coherent DMA memory allocated */
9390 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9391 phba->hbqslimp.virt, phba->hbqslimp.phys);
9392 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9393 phba->slim2p.virt, phba->slim2p.phys);
9394
9395 /* I/O memory unmap */
9396 iounmap(phba->ctrl_regs_memmap_p);
9397 iounmap(phba->slim_memmap_p);
9398
9399 return;
9400 }
9401
9402 /**
9403 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
9404 * @phba: pointer to lpfc hba data structure.
9405 *
9406 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
9407 * done and check status.
9408 *
9409 * Return 0 if successful, otherwise -ENODEV.
9410 **/
9411 int
lpfc_sli4_post_status_check(struct lpfc_hba * phba)9412 lpfc_sli4_post_status_check(struct lpfc_hba *phba)
9413 {
9414 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
9415 struct lpfc_register reg_data;
9416 int i, port_error = 0;
9417 uint32_t if_type;
9418
9419 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
9420 memset(®_data, 0, sizeof(reg_data));
9421 if (!phba->sli4_hba.PSMPHRregaddr)
9422 return -ENODEV;
9423
9424 /* Wait up to 30 seconds for the SLI Port POST done and ready */
9425 for (i = 0; i < 3000; i++) {
9426 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9427 &portsmphr_reg.word0) ||
9428 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
9429 /* Port has a fatal POST error, break out */
9430 port_error = -ENODEV;
9431 break;
9432 }
9433 if (LPFC_POST_STAGE_PORT_READY ==
9434 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
9435 break;
9436 msleep(10);
9437 }
9438
9439 /*
9440 * If there was a port error during POST, then don't proceed with
9441 * other register reads as the data may not be valid. Just exit.
9442 */
9443 if (port_error) {
9444 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9445 "1408 Port Failed POST - portsmphr=0x%x, "
9446 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
9447 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
9448 portsmphr_reg.word0,
9449 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
9450 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
9451 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
9452 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
9453 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
9454 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
9455 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
9456 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
9457 } else {
9458 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9459 "2534 Device Info: SLIFamily=0x%x, "
9460 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
9461 "SLIHint_2=0x%x, FT=0x%x\n",
9462 bf_get(lpfc_sli_intf_sli_family,
9463 &phba->sli4_hba.sli_intf),
9464 bf_get(lpfc_sli_intf_slirev,
9465 &phba->sli4_hba.sli_intf),
9466 bf_get(lpfc_sli_intf_if_type,
9467 &phba->sli4_hba.sli_intf),
9468 bf_get(lpfc_sli_intf_sli_hint1,
9469 &phba->sli4_hba.sli_intf),
9470 bf_get(lpfc_sli_intf_sli_hint2,
9471 &phba->sli4_hba.sli_intf),
9472 bf_get(lpfc_sli_intf_func_type,
9473 &phba->sli4_hba.sli_intf));
9474 /*
9475 * Check for other Port errors during the initialization
9476 * process. Fail the load if the port did not come up
9477 * correctly.
9478 */
9479 if_type = bf_get(lpfc_sli_intf_if_type,
9480 &phba->sli4_hba.sli_intf);
9481 switch (if_type) {
9482 case LPFC_SLI_INTF_IF_TYPE_0:
9483 phba->sli4_hba.ue_mask_lo =
9484 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9485 phba->sli4_hba.ue_mask_hi =
9486 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9487 uerrlo_reg.word0 =
9488 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9489 uerrhi_reg.word0 =
9490 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9491 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9492 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9493 lpfc_printf_log(phba, KERN_ERR,
9494 LOG_TRACE_EVENT,
9495 "1422 Unrecoverable Error "
9496 "Detected during POST "
9497 "uerr_lo_reg=0x%x, "
9498 "uerr_hi_reg=0x%x, "
9499 "ue_mask_lo_reg=0x%x, "
9500 "ue_mask_hi_reg=0x%x\n",
9501 uerrlo_reg.word0,
9502 uerrhi_reg.word0,
9503 phba->sli4_hba.ue_mask_lo,
9504 phba->sli4_hba.ue_mask_hi);
9505 port_error = -ENODEV;
9506 }
9507 break;
9508 case LPFC_SLI_INTF_IF_TYPE_2:
9509 case LPFC_SLI_INTF_IF_TYPE_6:
9510 /* Final checks. The port status should be clean. */
9511 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9512 ®_data.word0) ||
9513 (bf_get(lpfc_sliport_status_err, ®_data) &&
9514 !bf_get(lpfc_sliport_status_rn, ®_data))) {
9515 phba->work_status[0] =
9516 readl(phba->sli4_hba.u.if_type2.
9517 ERR1regaddr);
9518 phba->work_status[1] =
9519 readl(phba->sli4_hba.u.if_type2.
9520 ERR2regaddr);
9521 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9522 "2888 Unrecoverable port error "
9523 "following POST: port status reg "
9524 "0x%x, port_smphr reg 0x%x, "
9525 "error 1=0x%x, error 2=0x%x\n",
9526 reg_data.word0,
9527 portsmphr_reg.word0,
9528 phba->work_status[0],
9529 phba->work_status[1]);
9530 port_error = -ENODEV;
9531 break;
9532 }
9533
9534 if (lpfc_pldv_detect &&
9535 bf_get(lpfc_sli_intf_sli_family,
9536 &phba->sli4_hba.sli_intf) ==
9537 LPFC_SLI_INTF_FAMILY_G6)
9538 pci_write_config_byte(phba->pcidev,
9539 LPFC_SLI_INTF, CFG_PLD);
9540 break;
9541 case LPFC_SLI_INTF_IF_TYPE_1:
9542 default:
9543 break;
9544 }
9545 }
9546 return port_error;
9547 }
9548
9549 /**
9550 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
9551 * @phba: pointer to lpfc hba data structure.
9552 * @if_type: The SLI4 interface type getting configured.
9553 *
9554 * This routine is invoked to set up SLI4 BAR0 PCI config space register
9555 * memory map.
9556 **/
9557 static void
lpfc_sli4_bar0_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9558 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9559 {
9560 switch (if_type) {
9561 case LPFC_SLI_INTF_IF_TYPE_0:
9562 phba->sli4_hba.u.if_type0.UERRLOregaddr =
9563 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9564 phba->sli4_hba.u.if_type0.UERRHIregaddr =
9565 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9566 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9567 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9568 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9569 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9570 phba->sli4_hba.SLIINTFregaddr =
9571 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9572 break;
9573 case LPFC_SLI_INTF_IF_TYPE_2:
9574 phba->sli4_hba.u.if_type2.EQDregaddr =
9575 phba->sli4_hba.conf_regs_memmap_p +
9576 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9577 phba->sli4_hba.u.if_type2.ERR1regaddr =
9578 phba->sli4_hba.conf_regs_memmap_p +
9579 LPFC_CTL_PORT_ER1_OFFSET;
9580 phba->sli4_hba.u.if_type2.ERR2regaddr =
9581 phba->sli4_hba.conf_regs_memmap_p +
9582 LPFC_CTL_PORT_ER2_OFFSET;
9583 phba->sli4_hba.u.if_type2.CTRLregaddr =
9584 phba->sli4_hba.conf_regs_memmap_p +
9585 LPFC_CTL_PORT_CTL_OFFSET;
9586 phba->sli4_hba.u.if_type2.STATUSregaddr =
9587 phba->sli4_hba.conf_regs_memmap_p +
9588 LPFC_CTL_PORT_STA_OFFSET;
9589 phba->sli4_hba.SLIINTFregaddr =
9590 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9591 phba->sli4_hba.PSMPHRregaddr =
9592 phba->sli4_hba.conf_regs_memmap_p +
9593 LPFC_CTL_PORT_SEM_OFFSET;
9594 phba->sli4_hba.RQDBregaddr =
9595 phba->sli4_hba.conf_regs_memmap_p +
9596 LPFC_ULP0_RQ_DOORBELL;
9597 phba->sli4_hba.WQDBregaddr =
9598 phba->sli4_hba.conf_regs_memmap_p +
9599 LPFC_ULP0_WQ_DOORBELL;
9600 phba->sli4_hba.CQDBregaddr =
9601 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9602 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9603 phba->sli4_hba.MQDBregaddr =
9604 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9605 phba->sli4_hba.BMBXregaddr =
9606 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9607 break;
9608 case LPFC_SLI_INTF_IF_TYPE_6:
9609 phba->sli4_hba.u.if_type2.EQDregaddr =
9610 phba->sli4_hba.conf_regs_memmap_p +
9611 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9612 phba->sli4_hba.u.if_type2.ERR1regaddr =
9613 phba->sli4_hba.conf_regs_memmap_p +
9614 LPFC_CTL_PORT_ER1_OFFSET;
9615 phba->sli4_hba.u.if_type2.ERR2regaddr =
9616 phba->sli4_hba.conf_regs_memmap_p +
9617 LPFC_CTL_PORT_ER2_OFFSET;
9618 phba->sli4_hba.u.if_type2.CTRLregaddr =
9619 phba->sli4_hba.conf_regs_memmap_p +
9620 LPFC_CTL_PORT_CTL_OFFSET;
9621 phba->sli4_hba.u.if_type2.STATUSregaddr =
9622 phba->sli4_hba.conf_regs_memmap_p +
9623 LPFC_CTL_PORT_STA_OFFSET;
9624 phba->sli4_hba.PSMPHRregaddr =
9625 phba->sli4_hba.conf_regs_memmap_p +
9626 LPFC_CTL_PORT_SEM_OFFSET;
9627 phba->sli4_hba.BMBXregaddr =
9628 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9629 break;
9630 case LPFC_SLI_INTF_IF_TYPE_1:
9631 default:
9632 dev_printk(KERN_ERR, &phba->pcidev->dev,
9633 "FATAL - unsupported SLI4 interface type - %d\n",
9634 if_type);
9635 break;
9636 }
9637 }
9638
9639 /**
9640 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
9641 * @phba: pointer to lpfc hba data structure.
9642 * @if_type: sli if type to operate on.
9643 *
9644 * This routine is invoked to set up SLI4 BAR1 register memory map.
9645 **/
9646 static void
lpfc_sli4_bar1_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9647 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9648 {
9649 switch (if_type) {
9650 case LPFC_SLI_INTF_IF_TYPE_0:
9651 phba->sli4_hba.PSMPHRregaddr =
9652 phba->sli4_hba.ctrl_regs_memmap_p +
9653 LPFC_SLIPORT_IF0_SMPHR;
9654 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9655 LPFC_HST_ISR0;
9656 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9657 LPFC_HST_IMR0;
9658 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9659 LPFC_HST_ISCR0;
9660 break;
9661 case LPFC_SLI_INTF_IF_TYPE_6:
9662 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9663 LPFC_IF6_RQ_DOORBELL;
9664 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9665 LPFC_IF6_WQ_DOORBELL;
9666 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9667 LPFC_IF6_CQ_DOORBELL;
9668 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9669 LPFC_IF6_EQ_DOORBELL;
9670 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9671 LPFC_IF6_MQ_DOORBELL;
9672 break;
9673 case LPFC_SLI_INTF_IF_TYPE_2:
9674 case LPFC_SLI_INTF_IF_TYPE_1:
9675 default:
9676 dev_err(&phba->pcidev->dev,
9677 "FATAL - unsupported SLI4 interface type - %d\n",
9678 if_type);
9679 break;
9680 }
9681 }
9682
9683 /**
9684 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
9685 * @phba: pointer to lpfc hba data structure.
9686 * @vf: virtual function number
9687 *
9688 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
9689 * based on the given viftual function number, @vf.
9690 *
9691 * Return 0 if successful, otherwise -ENODEV.
9692 **/
9693 static int
lpfc_sli4_bar2_register_memmap(struct lpfc_hba * phba,uint32_t vf)9694 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
9695 {
9696 if (vf > LPFC_VIR_FUNC_MAX)
9697 return -ENODEV;
9698
9699 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9700 vf * LPFC_VFR_PAGE_SIZE +
9701 LPFC_ULP0_RQ_DOORBELL);
9702 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9703 vf * LPFC_VFR_PAGE_SIZE +
9704 LPFC_ULP0_WQ_DOORBELL);
9705 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9706 vf * LPFC_VFR_PAGE_SIZE +
9707 LPFC_EQCQ_DOORBELL);
9708 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9709 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9710 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
9711 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9712 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
9713 return 0;
9714 }
9715
9716 /**
9717 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
9718 * @phba: pointer to lpfc hba data structure.
9719 *
9720 * This routine is invoked to create the bootstrap mailbox
9721 * region consistent with the SLI-4 interface spec. This
9722 * routine allocates all memory necessary to communicate
9723 * mailbox commands to the port and sets up all alignment
9724 * needs. No locks are expected to be held when calling
9725 * this routine.
9726 *
9727 * Return codes
9728 * 0 - successful
9729 * -ENOMEM - could not allocated memory.
9730 **/
9731 static int
lpfc_create_bootstrap_mbox(struct lpfc_hba * phba)9732 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
9733 {
9734 uint32_t bmbx_size;
9735 struct lpfc_dmabuf *dmabuf;
9736 struct dma_address *dma_address;
9737 uint32_t pa_addr;
9738 uint64_t phys_addr;
9739
9740 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
9741 if (!dmabuf)
9742 return -ENOMEM;
9743
9744 /*
9745 * The bootstrap mailbox region is comprised of 2 parts
9746 * plus an alignment restriction of 16 bytes.
9747 */
9748 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
9749 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
9750 &dmabuf->phys, GFP_KERNEL);
9751 if (!dmabuf->virt) {
9752 kfree(dmabuf);
9753 return -ENOMEM;
9754 }
9755
9756 /*
9757 * Initialize the bootstrap mailbox pointers now so that the register
9758 * operations are simple later. The mailbox dma address is required
9759 * to be 16-byte aligned. Also align the virtual memory as each
9760 * maibox is copied into the bmbx mailbox region before issuing the
9761 * command to the port.
9762 */
9763 phba->sli4_hba.bmbx.dmabuf = dmabuf;
9764 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9765
9766 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9767 LPFC_ALIGN_16_BYTE);
9768 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9769 LPFC_ALIGN_16_BYTE);
9770
9771 /*
9772 * Set the high and low physical addresses now. The SLI4 alignment
9773 * requirement is 16 bytes and the mailbox is posted to the port
9774 * as two 30-bit addresses. The other data is a bit marking whether
9775 * the 30-bit address is the high or low address.
9776 * Upcast bmbx aphys to 64bits so shift instruction compiles
9777 * clean on 32 bit machines.
9778 */
9779 dma_address = &phba->sli4_hba.bmbx.dma_address;
9780 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9781 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
9782 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
9783 LPFC_BMBX_BIT1_ADDR_HI);
9784
9785 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9786 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
9787 LPFC_BMBX_BIT1_ADDR_LO);
9788 return 0;
9789 }
9790
9791 /**
9792 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
9793 * @phba: pointer to lpfc hba data structure.
9794 *
9795 * This routine is invoked to teardown the bootstrap mailbox
9796 * region and release all host resources. This routine requires
9797 * the caller to ensure all mailbox commands recovered, no
9798 * additional mailbox comands are sent, and interrupts are disabled
9799 * before calling this routine.
9800 *
9801 **/
9802 static void
lpfc_destroy_bootstrap_mbox(struct lpfc_hba * phba)9803 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
9804 {
9805 dma_free_coherent(&phba->pcidev->dev,
9806 phba->sli4_hba.bmbx.bmbx_size,
9807 phba->sli4_hba.bmbx.dmabuf->virt,
9808 phba->sli4_hba.bmbx.dmabuf->phys);
9809
9810 kfree(phba->sli4_hba.bmbx.dmabuf);
9811 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9812 }
9813
9814 static const char * const lpfc_topo_to_str[] = {
9815 "Loop then P2P",
9816 "Loopback",
9817 "P2P Only",
9818 "Unsupported",
9819 "Loop Only",
9820 "Unsupported",
9821 "P2P then Loop",
9822 };
9823
9824 #define LINK_FLAGS_DEF 0x0
9825 #define LINK_FLAGS_P2P 0x1
9826 #define LINK_FLAGS_LOOP 0x2
9827 /**
9828 * lpfc_map_topology - Map the topology read from READ_CONFIG
9829 * @phba: pointer to lpfc hba data structure.
9830 * @rd_config: pointer to read config data
9831 *
9832 * This routine is invoked to map the topology values as read
9833 * from the read config mailbox command. If the persistent
9834 * topology feature is supported, the firmware will provide the
9835 * saved topology information to be used in INIT_LINK
9836 **/
9837 static void
lpfc_map_topology(struct lpfc_hba * phba,struct lpfc_mbx_read_config * rd_config)9838 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
9839 {
9840 u8 ptv, tf, pt;
9841
9842 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
9843 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
9844 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
9845
9846 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9847 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
9848 ptv, tf, pt);
9849 if (!ptv) {
9850 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9851 "2019 FW does not support persistent topology "
9852 "Using driver parameter defined value [%s]",
9853 lpfc_topo_to_str[phba->cfg_topology]);
9854 return;
9855 }
9856 /* FW supports persistent topology - override module parameter value */
9857 phba->hba_flag |= HBA_PERSISTENT_TOPO;
9858
9859 /* if ASIC_GEN_NUM >= 0xC) */
9860 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9861 LPFC_SLI_INTF_IF_TYPE_6) ||
9862 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9863 LPFC_SLI_INTF_FAMILY_G6)) {
9864 if (!tf) {
9865 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
9866 ? FLAGS_TOPOLOGY_MODE_LOOP
9867 : FLAGS_TOPOLOGY_MODE_PT_PT);
9868 } else {
9869 phba->hba_flag &= ~HBA_PERSISTENT_TOPO;
9870 }
9871 } else { /* G5 */
9872 if (tf) {
9873 /* If topology failover set - pt is '0' or '1' */
9874 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
9875 FLAGS_TOPOLOGY_MODE_LOOP_PT);
9876 } else {
9877 phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
9878 ? FLAGS_TOPOLOGY_MODE_PT_PT
9879 : FLAGS_TOPOLOGY_MODE_LOOP);
9880 }
9881 }
9882 if (phba->hba_flag & HBA_PERSISTENT_TOPO) {
9883 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9884 "2020 Using persistent topology value [%s]",
9885 lpfc_topo_to_str[phba->cfg_topology]);
9886 } else {
9887 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9888 "2021 Invalid topology values from FW "
9889 "Using driver parameter defined value [%s]",
9890 lpfc_topo_to_str[phba->cfg_topology]);
9891 }
9892 }
9893
9894 /**
9895 * lpfc_sli4_read_config - Get the config parameters.
9896 * @phba: pointer to lpfc hba data structure.
9897 *
9898 * This routine is invoked to read the configuration parameters from the HBA.
9899 * The configuration parameters are used to set the base and maximum values
9900 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
9901 * allocation for the port.
9902 *
9903 * Return codes
9904 * 0 - successful
9905 * -ENOMEM - No available memory
9906 * -EIO - The mailbox failed to complete successfully.
9907 **/
9908 int
lpfc_sli4_read_config(struct lpfc_hba * phba)9909 lpfc_sli4_read_config(struct lpfc_hba *phba)
9910 {
9911 LPFC_MBOXQ_t *pmb;
9912 struct lpfc_mbx_read_config *rd_config;
9913 union lpfc_sli4_cfg_shdr *shdr;
9914 uint32_t shdr_status, shdr_add_status;
9915 struct lpfc_mbx_get_func_cfg *get_func_cfg;
9916 struct lpfc_rsrc_desc_fcfcoe *desc;
9917 char *pdesc_0;
9918 uint16_t forced_link_speed;
9919 uint32_t if_type, qmin, fawwpn;
9920 int length, i, rc = 0, rc2;
9921
9922 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9923 if (!pmb) {
9924 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9925 "2011 Unable to allocate memory for issuing "
9926 "SLI_CONFIG_SPECIAL mailbox command\n");
9927 return -ENOMEM;
9928 }
9929
9930 lpfc_read_config(phba, pmb);
9931
9932 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9933 if (rc != MBX_SUCCESS) {
9934 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9935 "2012 Mailbox failed , mbxCmd x%x "
9936 "READ_CONFIG, mbxStatus x%x\n",
9937 bf_get(lpfc_mqe_command, &pmb->u.mqe),
9938 bf_get(lpfc_mqe_status, &pmb->u.mqe));
9939 rc = -EIO;
9940 } else {
9941 rd_config = &pmb->u.mqe.un.rd_config;
9942 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
9943 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9944 phba->sli4_hba.lnk_info.lnk_tp =
9945 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
9946 phba->sli4_hba.lnk_info.lnk_no =
9947 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
9948 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9949 "3081 lnk_type:%d, lnk_numb:%d\n",
9950 phba->sli4_hba.lnk_info.lnk_tp,
9951 phba->sli4_hba.lnk_info.lnk_no);
9952 } else
9953 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9954 "3082 Mailbox (x%x) returned ldv:x0\n",
9955 bf_get(lpfc_mqe_command, &pmb->u.mqe));
9956 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
9957 phba->bbcredit_support = 1;
9958 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9959 }
9960
9961 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config);
9962
9963 if (fawwpn) {
9964 lpfc_printf_log(phba, KERN_INFO,
9965 LOG_INIT | LOG_DISCOVERY,
9966 "2702 READ_CONFIG: FA-PWWN is "
9967 "configured on\n");
9968 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9969 } else {
9970 /* Clear FW configured flag, preserve driver flag */
9971 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9972 }
9973
9974 phba->sli4_hba.conf_trunk =
9975 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
9976 phba->sli4_hba.extents_in_use =
9977 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
9978
9979 phba->sli4_hba.max_cfg_param.max_xri =
9980 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
9981 /* Reduce resource usage in kdump environment */
9982 if (is_kdump_kernel() &&
9983 phba->sli4_hba.max_cfg_param.max_xri > 512)
9984 phba->sli4_hba.max_cfg_param.max_xri = 512;
9985 phba->sli4_hba.max_cfg_param.xri_base =
9986 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
9987 phba->sli4_hba.max_cfg_param.max_vpi =
9988 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
9989 /* Limit the max we support */
9990 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9991 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9992 phba->sli4_hba.max_cfg_param.vpi_base =
9993 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
9994 phba->sli4_hba.max_cfg_param.max_rpi =
9995 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
9996 phba->sli4_hba.max_cfg_param.rpi_base =
9997 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
9998 phba->sli4_hba.max_cfg_param.max_vfi =
9999 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
10000 phba->sli4_hba.max_cfg_param.vfi_base =
10001 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
10002 phba->sli4_hba.max_cfg_param.max_fcfi =
10003 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
10004 phba->sli4_hba.max_cfg_param.max_eq =
10005 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
10006 phba->sli4_hba.max_cfg_param.max_rq =
10007 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
10008 phba->sli4_hba.max_cfg_param.max_wq =
10009 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
10010 phba->sli4_hba.max_cfg_param.max_cq =
10011 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
10012 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
10013 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
10014 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
10015 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
10016 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
10017 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
10018 phba->max_vports = phba->max_vpi;
10019
10020 /* Next decide on FPIN or Signal E2E CGN support
10021 * For congestion alarms and warnings valid combination are:
10022 * 1. FPIN alarms / FPIN warnings
10023 * 2. Signal alarms / Signal warnings
10024 * 3. FPIN alarms / Signal warnings
10025 * 4. Signal alarms / FPIN warnings
10026 *
10027 * Initialize the adapter frequency to 100 mSecs
10028 */
10029 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10030 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED;
10031 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency;
10032
10033 if (lpfc_use_cgn_signal) {
10034 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) {
10035 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY;
10036 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN;
10037 }
10038 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) {
10039 /* MUST support both alarm and warning
10040 * because EDC does not support alarm alone.
10041 */
10042 if (phba->cgn_reg_signal !=
10043 EDC_CG_SIG_WARN_ONLY) {
10044 /* Must support both or none */
10045 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10046 phba->cgn_reg_signal =
10047 EDC_CG_SIG_NOTSUPPORTED;
10048 } else {
10049 phba->cgn_reg_signal =
10050 EDC_CG_SIG_WARN_ALARM;
10051 phba->cgn_reg_fpin =
10052 LPFC_CGN_FPIN_NONE;
10053 }
10054 }
10055 }
10056
10057 /* Set the congestion initial signal and fpin values. */
10058 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin;
10059 phba->cgn_init_reg_signal = phba->cgn_reg_signal;
10060
10061 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
10062 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n",
10063 phba->cgn_reg_signal, phba->cgn_reg_fpin);
10064
10065 lpfc_map_topology(phba, rd_config);
10066 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10067 "2003 cfg params Extents? %d "
10068 "XRI(B:%d M:%d), "
10069 "VPI(B:%d M:%d) "
10070 "VFI(B:%d M:%d) "
10071 "RPI(B:%d M:%d) "
10072 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
10073 phba->sli4_hba.extents_in_use,
10074 phba->sli4_hba.max_cfg_param.xri_base,
10075 phba->sli4_hba.max_cfg_param.max_xri,
10076 phba->sli4_hba.max_cfg_param.vpi_base,
10077 phba->sli4_hba.max_cfg_param.max_vpi,
10078 phba->sli4_hba.max_cfg_param.vfi_base,
10079 phba->sli4_hba.max_cfg_param.max_vfi,
10080 phba->sli4_hba.max_cfg_param.rpi_base,
10081 phba->sli4_hba.max_cfg_param.max_rpi,
10082 phba->sli4_hba.max_cfg_param.max_fcfi,
10083 phba->sli4_hba.max_cfg_param.max_eq,
10084 phba->sli4_hba.max_cfg_param.max_cq,
10085 phba->sli4_hba.max_cfg_param.max_wq,
10086 phba->sli4_hba.max_cfg_param.max_rq,
10087 phba->lmt);
10088
10089 /*
10090 * Calculate queue resources based on how
10091 * many WQ/CQ/EQs are available.
10092 */
10093 qmin = phba->sli4_hba.max_cfg_param.max_wq;
10094 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10095 qmin = phba->sli4_hba.max_cfg_param.max_cq;
10096 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10097 qmin = phba->sli4_hba.max_cfg_param.max_eq;
10098 /*
10099 * Whats left after this can go toward NVME / FCP.
10100 * The minus 4 accounts for ELS, NVME LS, MBOX
10101 * plus one extra. When configured for
10102 * NVMET, FCP io channel WQs are not created.
10103 */
10104 qmin -= 4;
10105
10106 /* Check to see if there is enough for NVME */
10107 if ((phba->cfg_irq_chann > qmin) ||
10108 (phba->cfg_hdw_queue > qmin)) {
10109 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10110 "2005 Reducing Queues - "
10111 "FW resource limitation: "
10112 "WQ %d CQ %d EQ %d: min %d: "
10113 "IRQ %d HDWQ %d\n",
10114 phba->sli4_hba.max_cfg_param.max_wq,
10115 phba->sli4_hba.max_cfg_param.max_cq,
10116 phba->sli4_hba.max_cfg_param.max_eq,
10117 qmin, phba->cfg_irq_chann,
10118 phba->cfg_hdw_queue);
10119
10120 if (phba->cfg_irq_chann > qmin)
10121 phba->cfg_irq_chann = qmin;
10122 if (phba->cfg_hdw_queue > qmin)
10123 phba->cfg_hdw_queue = qmin;
10124 }
10125 }
10126
10127 if (rc)
10128 goto read_cfg_out;
10129
10130 /* Update link speed if forced link speed is supported */
10131 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10132 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10133 forced_link_speed =
10134 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
10135 if (forced_link_speed) {
10136 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
10137
10138 switch (forced_link_speed) {
10139 case LINK_SPEED_1G:
10140 phba->cfg_link_speed =
10141 LPFC_USER_LINK_SPEED_1G;
10142 break;
10143 case LINK_SPEED_2G:
10144 phba->cfg_link_speed =
10145 LPFC_USER_LINK_SPEED_2G;
10146 break;
10147 case LINK_SPEED_4G:
10148 phba->cfg_link_speed =
10149 LPFC_USER_LINK_SPEED_4G;
10150 break;
10151 case LINK_SPEED_8G:
10152 phba->cfg_link_speed =
10153 LPFC_USER_LINK_SPEED_8G;
10154 break;
10155 case LINK_SPEED_10G:
10156 phba->cfg_link_speed =
10157 LPFC_USER_LINK_SPEED_10G;
10158 break;
10159 case LINK_SPEED_16G:
10160 phba->cfg_link_speed =
10161 LPFC_USER_LINK_SPEED_16G;
10162 break;
10163 case LINK_SPEED_32G:
10164 phba->cfg_link_speed =
10165 LPFC_USER_LINK_SPEED_32G;
10166 break;
10167 case LINK_SPEED_64G:
10168 phba->cfg_link_speed =
10169 LPFC_USER_LINK_SPEED_64G;
10170 break;
10171 case 0xffff:
10172 phba->cfg_link_speed =
10173 LPFC_USER_LINK_SPEED_AUTO;
10174 break;
10175 default:
10176 lpfc_printf_log(phba, KERN_ERR,
10177 LOG_TRACE_EVENT,
10178 "0047 Unrecognized link "
10179 "speed : %d\n",
10180 forced_link_speed);
10181 phba->cfg_link_speed =
10182 LPFC_USER_LINK_SPEED_AUTO;
10183 }
10184 }
10185 }
10186
10187 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
10188 length = phba->sli4_hba.max_cfg_param.max_xri -
10189 lpfc_sli4_get_els_iocb_cnt(phba);
10190 if (phba->cfg_hba_queue_depth > length) {
10191 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10192 "3361 HBA queue depth changed from %d to %d\n",
10193 phba->cfg_hba_queue_depth, length);
10194 phba->cfg_hba_queue_depth = length;
10195 }
10196
10197 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10198 LPFC_SLI_INTF_IF_TYPE_2)
10199 goto read_cfg_out;
10200
10201 /* get the pf# and vf# for SLI4 if_type 2 port */
10202 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
10203 sizeof(struct lpfc_sli4_cfg_mhdr));
10204 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
10205 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
10206 length, LPFC_SLI4_MBX_EMBED);
10207
10208 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10209 shdr = (union lpfc_sli4_cfg_shdr *)
10210 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
10211 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
10212 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
10213 if (rc2 || shdr_status || shdr_add_status) {
10214 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10215 "3026 Mailbox failed , mbxCmd x%x "
10216 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
10217 bf_get(lpfc_mqe_command, &pmb->u.mqe),
10218 bf_get(lpfc_mqe_status, &pmb->u.mqe));
10219 goto read_cfg_out;
10220 }
10221
10222 /* search for fc_fcoe resrouce descriptor */
10223 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
10224
10225 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
10226 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
10227 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
10228 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
10229 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
10230 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
10231 goto read_cfg_out;
10232
10233 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
10234 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
10235 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
10236 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
10237 phba->sli4_hba.iov.pf_number =
10238 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
10239 phba->sli4_hba.iov.vf_number =
10240 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
10241 break;
10242 }
10243 }
10244
10245 if (i < LPFC_RSRC_DESC_MAX_NUM)
10246 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10247 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
10248 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10249 phba->sli4_hba.iov.vf_number);
10250 else
10251 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10252 "3028 GET_FUNCTION_CONFIG: failed to find "
10253 "Resource Descriptor:x%x\n",
10254 LPFC_RSRC_DESC_TYPE_FCFCOE);
10255
10256 read_cfg_out:
10257 mempool_free(pmb, phba->mbox_mem_pool);
10258 return rc;
10259 }
10260
10261 /**
10262 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
10263 * @phba: pointer to lpfc hba data structure.
10264 *
10265 * This routine is invoked to setup the port-side endian order when
10266 * the port if_type is 0. This routine has no function for other
10267 * if_types.
10268 *
10269 * Return codes
10270 * 0 - successful
10271 * -ENOMEM - No available memory
10272 * -EIO - The mailbox failed to complete successfully.
10273 **/
10274 static int
lpfc_setup_endian_order(struct lpfc_hba * phba)10275 lpfc_setup_endian_order(struct lpfc_hba *phba)
10276 {
10277 LPFC_MBOXQ_t *mboxq;
10278 uint32_t if_type, rc = 0;
10279 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
10280 HOST_ENDIAN_HIGH_WORD1};
10281
10282 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10283 switch (if_type) {
10284 case LPFC_SLI_INTF_IF_TYPE_0:
10285 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
10286 GFP_KERNEL);
10287 if (!mboxq) {
10288 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10289 "0492 Unable to allocate memory for "
10290 "issuing SLI_CONFIG_SPECIAL mailbox "
10291 "command\n");
10292 return -ENOMEM;
10293 }
10294
10295 /*
10296 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
10297 * two words to contain special data values and no other data.
10298 */
10299 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
10300 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
10301 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10302 if (rc != MBX_SUCCESS) {
10303 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10304 "0493 SLI_CONFIG_SPECIAL mailbox "
10305 "failed with status x%x\n",
10306 rc);
10307 rc = -EIO;
10308 }
10309 mempool_free(mboxq, phba->mbox_mem_pool);
10310 break;
10311 case LPFC_SLI_INTF_IF_TYPE_6:
10312 case LPFC_SLI_INTF_IF_TYPE_2:
10313 case LPFC_SLI_INTF_IF_TYPE_1:
10314 default:
10315 break;
10316 }
10317 return rc;
10318 }
10319
10320 /**
10321 * lpfc_sli4_queue_verify - Verify and update EQ counts
10322 * @phba: pointer to lpfc hba data structure.
10323 *
10324 * This routine is invoked to check the user settable queue counts for EQs.
10325 * After this routine is called the counts will be set to valid values that
10326 * adhere to the constraints of the system's interrupt vectors and the port's
10327 * queue resources.
10328 *
10329 * Return codes
10330 * 0 - successful
10331 * -ENOMEM - No available memory
10332 **/
10333 static int
lpfc_sli4_queue_verify(struct lpfc_hba * phba)10334 lpfc_sli4_queue_verify(struct lpfc_hba *phba)
10335 {
10336 /*
10337 * Sanity check for configured queue parameters against the run-time
10338 * device parameters
10339 */
10340
10341 if (phba->nvmet_support) {
10342 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
10343 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
10344 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
10345 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
10346 }
10347
10348 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10349 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
10350 phba->cfg_hdw_queue, phba->cfg_irq_chann,
10351 phba->cfg_nvmet_mrq);
10352
10353 /* Get EQ depth from module parameter, fake the default for now */
10354 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10355 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10356
10357 /* Get CQ depth from module parameter, fake the default for now */
10358 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10359 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10360 return 0;
10361 }
10362
10363 static int
lpfc_alloc_io_wq_cq(struct lpfc_hba * phba,int idx)10364 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
10365 {
10366 struct lpfc_queue *qdesc;
10367 u32 wqesize;
10368 int cpu;
10369
10370 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
10371 /* Create Fast Path IO CQs */
10372 if (phba->enab_exp_wqcq_pages)
10373 /* Increase the CQ size when WQEs contain an embedded cdb */
10374 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10375 phba->sli4_hba.cq_esize,
10376 LPFC_CQE_EXP_COUNT, cpu);
10377
10378 else
10379 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10380 phba->sli4_hba.cq_esize,
10381 phba->sli4_hba.cq_ecount, cpu);
10382 if (!qdesc) {
10383 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10384 "0499 Failed allocate fast-path IO CQ (%d)\n",
10385 idx);
10386 return 1;
10387 }
10388 qdesc->qe_valid = 1;
10389 qdesc->hdwq = idx;
10390 qdesc->chann = cpu;
10391 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10392
10393 /* Create Fast Path IO WQs */
10394 if (phba->enab_exp_wqcq_pages) {
10395 /* Increase the WQ size when WQEs contain an embedded cdb */
10396 wqesize = (phba->fcp_embed_io) ?
10397 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10398 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10399 wqesize,
10400 LPFC_WQE_EXP_COUNT, cpu);
10401 } else
10402 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10403 phba->sli4_hba.wq_esize,
10404 phba->sli4_hba.wq_ecount, cpu);
10405
10406 if (!qdesc) {
10407 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10408 "0503 Failed allocate fast-path IO WQ (%d)\n",
10409 idx);
10410 return 1;
10411 }
10412 qdesc->hdwq = idx;
10413 qdesc->chann = cpu;
10414 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10415 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10416 return 0;
10417 }
10418
10419 /**
10420 * lpfc_sli4_queue_create - Create all the SLI4 queues
10421 * @phba: pointer to lpfc hba data structure.
10422 *
10423 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
10424 * operation. For each SLI4 queue type, the parameters such as queue entry
10425 * count (queue depth) shall be taken from the module parameter. For now,
10426 * we just use some constant number as place holder.
10427 *
10428 * Return codes
10429 * 0 - successful
10430 * -ENOMEM - No availble memory
10431 * -EIO - The mailbox failed to complete successfully.
10432 **/
10433 int
lpfc_sli4_queue_create(struct lpfc_hba * phba)10434 lpfc_sli4_queue_create(struct lpfc_hba *phba)
10435 {
10436 struct lpfc_queue *qdesc;
10437 int idx, cpu, eqcpu;
10438 struct lpfc_sli4_hdw_queue *qp;
10439 struct lpfc_vector_map_info *cpup;
10440 struct lpfc_vector_map_info *eqcpup;
10441 struct lpfc_eq_intr_info *eqi;
10442
10443 /*
10444 * Create HBA Record arrays.
10445 * Both NVME and FCP will share that same vectors / EQs
10446 */
10447 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10448 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10449 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10450 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10451 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10452 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10453 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10454 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10455 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10456 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10457
10458 if (!phba->sli4_hba.hdwq) {
10459 phba->sli4_hba.hdwq = kcalloc(
10460 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
10461 GFP_KERNEL);
10462 if (!phba->sli4_hba.hdwq) {
10463 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10464 "6427 Failed allocate memory for "
10465 "fast-path Hardware Queue array\n");
10466 goto out_error;
10467 }
10468 /* Prepare hardware queues to take IO buffers */
10469 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10470 qp = &phba->sli4_hba.hdwq[idx];
10471 spin_lock_init(&qp->io_buf_list_get_lock);
10472 spin_lock_init(&qp->io_buf_list_put_lock);
10473 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
10474 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
10475 qp->get_io_bufs = 0;
10476 qp->put_io_bufs = 0;
10477 qp->total_io_bufs = 0;
10478 spin_lock_init(&qp->abts_io_buf_list_lock);
10479 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
10480 qp->abts_scsi_io_bufs = 0;
10481 qp->abts_nvme_io_bufs = 0;
10482 INIT_LIST_HEAD(&qp->sgl_list);
10483 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
10484 spin_lock_init(&qp->hdwq_lock);
10485 }
10486 }
10487
10488 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10489 if (phba->nvmet_support) {
10490 phba->sli4_hba.nvmet_cqset = kcalloc(
10491 phba->cfg_nvmet_mrq,
10492 sizeof(struct lpfc_queue *),
10493 GFP_KERNEL);
10494 if (!phba->sli4_hba.nvmet_cqset) {
10495 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10496 "3121 Fail allocate memory for "
10497 "fast-path CQ set array\n");
10498 goto out_error;
10499 }
10500 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
10501 phba->cfg_nvmet_mrq,
10502 sizeof(struct lpfc_queue *),
10503 GFP_KERNEL);
10504 if (!phba->sli4_hba.nvmet_mrq_hdr) {
10505 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10506 "3122 Fail allocate memory for "
10507 "fast-path RQ set hdr array\n");
10508 goto out_error;
10509 }
10510 phba->sli4_hba.nvmet_mrq_data = kcalloc(
10511 phba->cfg_nvmet_mrq,
10512 sizeof(struct lpfc_queue *),
10513 GFP_KERNEL);
10514 if (!phba->sli4_hba.nvmet_mrq_data) {
10515 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10516 "3124 Fail allocate memory for "
10517 "fast-path RQ set data array\n");
10518 goto out_error;
10519 }
10520 }
10521 }
10522
10523 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10524
10525 /* Create HBA Event Queues (EQs) */
10526 for_each_present_cpu(cpu) {
10527 /* We only want to create 1 EQ per vector, even though
10528 * multiple CPUs might be using that vector. so only
10529 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
10530 */
10531 cpup = &phba->sli4_hba.cpu_map[cpu];
10532 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10533 continue;
10534
10535 /* Get a ptr to the Hardware Queue associated with this CPU */
10536 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10537
10538 /* Allocate an EQ */
10539 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10540 phba->sli4_hba.eq_esize,
10541 phba->sli4_hba.eq_ecount, cpu);
10542 if (!qdesc) {
10543 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10544 "0497 Failed allocate EQ (%d)\n",
10545 cpup->hdwq);
10546 goto out_error;
10547 }
10548 qdesc->qe_valid = 1;
10549 qdesc->hdwq = cpup->hdwq;
10550 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
10551 qdesc->last_cpu = qdesc->chann;
10552
10553 /* Save the allocated EQ in the Hardware Queue */
10554 qp->hba_eq = qdesc;
10555
10556 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10557 list_add(&qdesc->cpu_list, &eqi->list);
10558 }
10559
10560 /* Now we need to populate the other Hardware Queues, that share
10561 * an IRQ vector, with the associated EQ ptr.
10562 */
10563 for_each_present_cpu(cpu) {
10564 cpup = &phba->sli4_hba.cpu_map[cpu];
10565
10566 /* Check for EQ already allocated in previous loop */
10567 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10568 continue;
10569
10570 /* Check for multiple CPUs per hdwq */
10571 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10572 if (qp->hba_eq)
10573 continue;
10574
10575 /* We need to share an EQ for this hdwq */
10576 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
10577 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10578 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10579 }
10580
10581 /* Allocate IO Path SLI4 CQ/WQs */
10582 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10583 if (lpfc_alloc_io_wq_cq(phba, idx))
10584 goto out_error;
10585 }
10586
10587 if (phba->nvmet_support) {
10588 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10589 cpu = lpfc_find_cpu_handle(phba, idx,
10590 LPFC_FIND_BY_HDWQ);
10591 qdesc = lpfc_sli4_queue_alloc(phba,
10592 LPFC_DEFAULT_PAGE_SIZE,
10593 phba->sli4_hba.cq_esize,
10594 phba->sli4_hba.cq_ecount,
10595 cpu);
10596 if (!qdesc) {
10597 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10598 "3142 Failed allocate NVME "
10599 "CQ Set (%d)\n", idx);
10600 goto out_error;
10601 }
10602 qdesc->qe_valid = 1;
10603 qdesc->hdwq = idx;
10604 qdesc->chann = cpu;
10605 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10606 }
10607 }
10608
10609 /*
10610 * Create Slow Path Completion Queues (CQs)
10611 */
10612
10613 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
10614 /* Create slow-path Mailbox Command Complete Queue */
10615 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10616 phba->sli4_hba.cq_esize,
10617 phba->sli4_hba.cq_ecount, cpu);
10618 if (!qdesc) {
10619 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10620 "0500 Failed allocate slow-path mailbox CQ\n");
10621 goto out_error;
10622 }
10623 qdesc->qe_valid = 1;
10624 phba->sli4_hba.mbx_cq = qdesc;
10625
10626 /* Create slow-path ELS Complete Queue */
10627 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10628 phba->sli4_hba.cq_esize,
10629 phba->sli4_hba.cq_ecount, cpu);
10630 if (!qdesc) {
10631 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10632 "0501 Failed allocate slow-path ELS CQ\n");
10633 goto out_error;
10634 }
10635 qdesc->qe_valid = 1;
10636 qdesc->chann = cpu;
10637 phba->sli4_hba.els_cq = qdesc;
10638
10639
10640 /*
10641 * Create Slow Path Work Queues (WQs)
10642 */
10643
10644 /* Create Mailbox Command Queue */
10645
10646 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10647 phba->sli4_hba.mq_esize,
10648 phba->sli4_hba.mq_ecount, cpu);
10649 if (!qdesc) {
10650 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10651 "0505 Failed allocate slow-path MQ\n");
10652 goto out_error;
10653 }
10654 qdesc->chann = cpu;
10655 phba->sli4_hba.mbx_wq = qdesc;
10656
10657 /*
10658 * Create ELS Work Queues
10659 */
10660
10661 /* Create slow-path ELS Work Queue */
10662 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10663 phba->sli4_hba.wq_esize,
10664 phba->sli4_hba.wq_ecount, cpu);
10665 if (!qdesc) {
10666 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10667 "0504 Failed allocate slow-path ELS WQ\n");
10668 goto out_error;
10669 }
10670 qdesc->chann = cpu;
10671 phba->sli4_hba.els_wq = qdesc;
10672 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10673
10674 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10675 /* Create NVME LS Complete Queue */
10676 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10677 phba->sli4_hba.cq_esize,
10678 phba->sli4_hba.cq_ecount, cpu);
10679 if (!qdesc) {
10680 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10681 "6079 Failed allocate NVME LS CQ\n");
10682 goto out_error;
10683 }
10684 qdesc->chann = cpu;
10685 qdesc->qe_valid = 1;
10686 phba->sli4_hba.nvmels_cq = qdesc;
10687
10688 /* Create NVME LS Work Queue */
10689 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10690 phba->sli4_hba.wq_esize,
10691 phba->sli4_hba.wq_ecount, cpu);
10692 if (!qdesc) {
10693 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10694 "6080 Failed allocate NVME LS WQ\n");
10695 goto out_error;
10696 }
10697 qdesc->chann = cpu;
10698 phba->sli4_hba.nvmels_wq = qdesc;
10699 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10700 }
10701
10702 /*
10703 * Create Receive Queue (RQ)
10704 */
10705
10706 /* Create Receive Queue for header */
10707 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10708 phba->sli4_hba.rq_esize,
10709 phba->sli4_hba.rq_ecount, cpu);
10710 if (!qdesc) {
10711 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10712 "0506 Failed allocate receive HRQ\n");
10713 goto out_error;
10714 }
10715 phba->sli4_hba.hdr_rq = qdesc;
10716
10717 /* Create Receive Queue for data */
10718 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10719 phba->sli4_hba.rq_esize,
10720 phba->sli4_hba.rq_ecount, cpu);
10721 if (!qdesc) {
10722 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10723 "0507 Failed allocate receive DRQ\n");
10724 goto out_error;
10725 }
10726 phba->sli4_hba.dat_rq = qdesc;
10727
10728 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
10729 phba->nvmet_support) {
10730 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10731 cpu = lpfc_find_cpu_handle(phba, idx,
10732 LPFC_FIND_BY_HDWQ);
10733 /* Create NVMET Receive Queue for header */
10734 qdesc = lpfc_sli4_queue_alloc(phba,
10735 LPFC_DEFAULT_PAGE_SIZE,
10736 phba->sli4_hba.rq_esize,
10737 LPFC_NVMET_RQE_DEF_COUNT,
10738 cpu);
10739 if (!qdesc) {
10740 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10741 "3146 Failed allocate "
10742 "receive HRQ\n");
10743 goto out_error;
10744 }
10745 qdesc->hdwq = idx;
10746 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10747
10748 /* Only needed for header of RQ pair */
10749 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
10750 GFP_KERNEL,
10751 cpu_to_node(cpu));
10752 if (qdesc->rqbp == NULL) {
10753 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10754 "6131 Failed allocate "
10755 "Header RQBP\n");
10756 goto out_error;
10757 }
10758
10759 /* Put list in known state in case driver load fails. */
10760 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
10761
10762 /* Create NVMET Receive Queue for data */
10763 qdesc = lpfc_sli4_queue_alloc(phba,
10764 LPFC_DEFAULT_PAGE_SIZE,
10765 phba->sli4_hba.rq_esize,
10766 LPFC_NVMET_RQE_DEF_COUNT,
10767 cpu);
10768 if (!qdesc) {
10769 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10770 "3156 Failed allocate "
10771 "receive DRQ\n");
10772 goto out_error;
10773 }
10774 qdesc->hdwq = idx;
10775 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10776 }
10777 }
10778
10779 /* Clear NVME stats */
10780 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10781 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10782 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10783 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10784 }
10785 }
10786
10787 /* Clear SCSI stats */
10788 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
10789 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10790 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10791 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10792 }
10793 }
10794
10795 return 0;
10796
10797 out_error:
10798 lpfc_sli4_queue_destroy(phba);
10799 return -ENOMEM;
10800 }
10801
10802 static inline void
__lpfc_sli4_release_queue(struct lpfc_queue ** qp)10803 __lpfc_sli4_release_queue(struct lpfc_queue **qp)
10804 {
10805 if (*qp != NULL) {
10806 lpfc_sli4_queue_free(*qp);
10807 *qp = NULL;
10808 }
10809 }
10810
10811 static inline void
lpfc_sli4_release_queues(struct lpfc_queue *** qs,int max)10812 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
10813 {
10814 int idx;
10815
10816 if (*qs == NULL)
10817 return;
10818
10819 for (idx = 0; idx < max; idx++)
10820 __lpfc_sli4_release_queue(&(*qs)[idx]);
10821
10822 kfree(*qs);
10823 *qs = NULL;
10824 }
10825
10826 static inline void
lpfc_sli4_release_hdwq(struct lpfc_hba * phba)10827 lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
10828 {
10829 struct lpfc_sli4_hdw_queue *hdwq;
10830 struct lpfc_queue *eq;
10831 uint32_t idx;
10832
10833 hdwq = phba->sli4_hba.hdwq;
10834
10835 /* Loop thru all Hardware Queues */
10836 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10837 /* Free the CQ/WQ corresponding to the Hardware Queue */
10838 lpfc_sli4_queue_free(hdwq[idx].io_cq);
10839 lpfc_sli4_queue_free(hdwq[idx].io_wq);
10840 hdwq[idx].hba_eq = NULL;
10841 hdwq[idx].io_cq = NULL;
10842 hdwq[idx].io_wq = NULL;
10843 if (phba->cfg_xpsgl && !phba->nvmet_support)
10844 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
10845 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
10846 }
10847 /* Loop thru all IRQ vectors */
10848 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10849 /* Free the EQ corresponding to the IRQ vector */
10850 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10851 lpfc_sli4_queue_free(eq);
10852 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10853 }
10854 }
10855
10856 /**
10857 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
10858 * @phba: pointer to lpfc hba data structure.
10859 *
10860 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
10861 * operation.
10862 *
10863 * Return codes
10864 * 0 - successful
10865 * -ENOMEM - No available memory
10866 * -EIO - The mailbox failed to complete successfully.
10867 **/
10868 void
lpfc_sli4_queue_destroy(struct lpfc_hba * phba)10869 lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
10870 {
10871 /*
10872 * Set FREE_INIT before beginning to free the queues.
10873 * Wait until the users of queues to acknowledge to
10874 * release queues by clearing FREE_WAIT.
10875 */
10876 spin_lock_irq(&phba->hbalock);
10877 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
10878 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
10879 spin_unlock_irq(&phba->hbalock);
10880 msleep(20);
10881 spin_lock_irq(&phba->hbalock);
10882 }
10883 spin_unlock_irq(&phba->hbalock);
10884
10885 lpfc_sli4_cleanup_poll_list(phba);
10886
10887 /* Release HBA eqs */
10888 if (phba->sli4_hba.hdwq)
10889 lpfc_sli4_release_hdwq(phba);
10890
10891 if (phba->nvmet_support) {
10892 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10893 phba->cfg_nvmet_mrq);
10894
10895 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10896 phba->cfg_nvmet_mrq);
10897 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10898 phba->cfg_nvmet_mrq);
10899 }
10900
10901 /* Release mailbox command work queue */
10902 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10903
10904 /* Release ELS work queue */
10905 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10906
10907 /* Release ELS work queue */
10908 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10909
10910 /* Release unsolicited receive queue */
10911 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10912 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10913
10914 /* Release ELS complete queue */
10915 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10916
10917 /* Release NVME LS complete queue */
10918 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10919
10920 /* Release mailbox command complete queue */
10921 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10922
10923 /* Everything on this list has been freed */
10924 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10925
10926 /* Done with freeing the queues */
10927 spin_lock_irq(&phba->hbalock);
10928 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
10929 spin_unlock_irq(&phba->hbalock);
10930 }
10931
10932 int
lpfc_free_rq_buffer(struct lpfc_hba * phba,struct lpfc_queue * rq)10933 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
10934 {
10935 struct lpfc_rqb *rqbp;
10936 struct lpfc_dmabuf *h_buf;
10937 struct rqb_dmabuf *rqb_buffer;
10938
10939 rqbp = rq->rqbp;
10940 while (!list_empty(&rqbp->rqb_buffer_list)) {
10941 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
10942 struct lpfc_dmabuf, list);
10943
10944 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
10945 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
10946 rqbp->buffer_count--;
10947 }
10948 return 1;
10949 }
10950
10951 static int
lpfc_create_wq_cq(struct lpfc_hba * phba,struct lpfc_queue * eq,struct lpfc_queue * cq,struct lpfc_queue * wq,uint16_t * cq_map,int qidx,uint32_t qtype)10952 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
10953 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
10954 int qidx, uint32_t qtype)
10955 {
10956 struct lpfc_sli_ring *pring;
10957 int rc;
10958
10959 if (!eq || !cq || !wq) {
10960 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10961 "6085 Fast-path %s (%d) not allocated\n",
10962 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
10963 return -ENOMEM;
10964 }
10965
10966 /* create the Cq first */
10967 rc = lpfc_cq_create(phba, cq, eq,
10968 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
10969 if (rc) {
10970 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10971 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
10972 qidx, (uint32_t)rc);
10973 return rc;
10974 }
10975
10976 if (qtype != LPFC_MBOX) {
10977 /* Setup cq_map for fast lookup */
10978 if (cq_map)
10979 *cq_map = cq->queue_id;
10980
10981 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10982 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
10983 qidx, cq->queue_id, qidx, eq->queue_id);
10984
10985 /* create the wq */
10986 rc = lpfc_wq_create(phba, wq, cq, qtype);
10987 if (rc) {
10988 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10989 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
10990 qidx, (uint32_t)rc);
10991 /* no need to tear down cq - caller will do so */
10992 return rc;
10993 }
10994
10995 /* Bind this CQ/WQ to the NVME ring */
10996 pring = wq->pring;
10997 pring->sli.sli4.wqp = (void *)wq;
10998 cq->pring = pring;
10999
11000 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11001 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
11002 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
11003 } else {
11004 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
11005 if (rc) {
11006 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11007 "0539 Failed setup of slow-path MQ: "
11008 "rc = 0x%x\n", rc);
11009 /* no need to tear down cq - caller will do so */
11010 return rc;
11011 }
11012
11013 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11014 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
11015 phba->sli4_hba.mbx_wq->queue_id,
11016 phba->sli4_hba.mbx_cq->queue_id);
11017 }
11018
11019 return 0;
11020 }
11021
11022 /**
11023 * lpfc_setup_cq_lookup - Setup the CQ lookup table
11024 * @phba: pointer to lpfc hba data structure.
11025 *
11026 * This routine will populate the cq_lookup table by all
11027 * available CQ queue_id's.
11028 **/
11029 static void
lpfc_setup_cq_lookup(struct lpfc_hba * phba)11030 lpfc_setup_cq_lookup(struct lpfc_hba *phba)
11031 {
11032 struct lpfc_queue *eq, *childq;
11033 int qidx;
11034
11035 memset(phba->sli4_hba.cq_lookup, 0,
11036 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11037 /* Loop thru all IRQ vectors */
11038 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11039 /* Get the EQ corresponding to the IRQ vector */
11040 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11041 if (!eq)
11042 continue;
11043 /* Loop through all CQs associated with that EQ */
11044 list_for_each_entry(childq, &eq->child_list, list) {
11045 if (childq->queue_id > phba->sli4_hba.cq_max)
11046 continue;
11047 if (childq->subtype == LPFC_IO)
11048 phba->sli4_hba.cq_lookup[childq->queue_id] =
11049 childq;
11050 }
11051 }
11052 }
11053
11054 /**
11055 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
11056 * @phba: pointer to lpfc hba data structure.
11057 *
11058 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
11059 * operation.
11060 *
11061 * Return codes
11062 * 0 - successful
11063 * -ENOMEM - No available memory
11064 * -EIO - The mailbox failed to complete successfully.
11065 **/
11066 int
lpfc_sli4_queue_setup(struct lpfc_hba * phba)11067 lpfc_sli4_queue_setup(struct lpfc_hba *phba)
11068 {
11069 uint32_t shdr_status, shdr_add_status;
11070 union lpfc_sli4_cfg_shdr *shdr;
11071 struct lpfc_vector_map_info *cpup;
11072 struct lpfc_sli4_hdw_queue *qp;
11073 LPFC_MBOXQ_t *mboxq;
11074 int qidx, cpu;
11075 uint32_t length, usdelay;
11076 int rc = -ENOMEM;
11077
11078 /* Check for dual-ULP support */
11079 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
11080 if (!mboxq) {
11081 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11082 "3249 Unable to allocate memory for "
11083 "QUERY_FW_CFG mailbox command\n");
11084 return -ENOMEM;
11085 }
11086 length = (sizeof(struct lpfc_mbx_query_fw_config) -
11087 sizeof(struct lpfc_sli4_cfg_mhdr));
11088 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11089 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
11090 length, LPFC_SLI4_MBX_EMBED);
11091
11092 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11093
11094 shdr = (union lpfc_sli4_cfg_shdr *)
11095 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11096 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11097 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
11098 if (shdr_status || shdr_add_status || rc) {
11099 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11100 "3250 QUERY_FW_CFG mailbox failed with status "
11101 "x%x add_status x%x, mbx status x%x\n",
11102 shdr_status, shdr_add_status, rc);
11103 mempool_free(mboxq, phba->mbox_mem_pool);
11104 rc = -ENXIO;
11105 goto out_error;
11106 }
11107
11108 phba->sli4_hba.fw_func_mode =
11109 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
11110 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
11111 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
11112 phba->sli4_hba.physical_port =
11113 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
11114 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11115 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
11116 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
11117 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
11118
11119 mempool_free(mboxq, phba->mbox_mem_pool);
11120
11121 /*
11122 * Set up HBA Event Queues (EQs)
11123 */
11124 qp = phba->sli4_hba.hdwq;
11125
11126 /* Set up HBA event queue */
11127 if (!qp) {
11128 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11129 "3147 Fast-path EQs not allocated\n");
11130 rc = -ENOMEM;
11131 goto out_error;
11132 }
11133
11134 /* Loop thru all IRQ vectors */
11135 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11136 /* Create HBA Event Queues (EQs) in order */
11137 for_each_present_cpu(cpu) {
11138 cpup = &phba->sli4_hba.cpu_map[cpu];
11139
11140 /* Look for the CPU thats using that vector with
11141 * LPFC_CPU_FIRST_IRQ set.
11142 */
11143 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
11144 continue;
11145 if (qidx != cpup->eq)
11146 continue;
11147
11148 /* Create an EQ for that vector */
11149 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
11150 phba->cfg_fcp_imax);
11151 if (rc) {
11152 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11153 "0523 Failed setup of fast-path"
11154 " EQ (%d), rc = 0x%x\n",
11155 cpup->eq, (uint32_t)rc);
11156 goto out_destroy;
11157 }
11158
11159 /* Save the EQ for that vector in the hba_eq_hdl */
11160 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11161 qp[cpup->hdwq].hba_eq;
11162
11163 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11164 "2584 HBA EQ setup: queue[%d]-id=%d\n",
11165 cpup->eq,
11166 qp[cpup->hdwq].hba_eq->queue_id);
11167 }
11168 }
11169
11170 /* Loop thru all Hardware Queues */
11171 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11172 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
11173 cpup = &phba->sli4_hba.cpu_map[cpu];
11174
11175 /* Create the CQ/WQ corresponding to the Hardware Queue */
11176 rc = lpfc_create_wq_cq(phba,
11177 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11178 qp[qidx].io_cq,
11179 qp[qidx].io_wq,
11180 &phba->sli4_hba.hdwq[qidx].io_cq_map,
11181 qidx,
11182 LPFC_IO);
11183 if (rc) {
11184 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11185 "0535 Failed to setup fastpath "
11186 "IO WQ/CQ (%d), rc = 0x%x\n",
11187 qidx, (uint32_t)rc);
11188 goto out_destroy;
11189 }
11190 }
11191
11192 /*
11193 * Set up Slow Path Complete Queues (CQs)
11194 */
11195
11196 /* Set up slow-path MBOX CQ/MQ */
11197
11198 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11199 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11200 "0528 %s not allocated\n",
11201 phba->sli4_hba.mbx_cq ?
11202 "Mailbox WQ" : "Mailbox CQ");
11203 rc = -ENOMEM;
11204 goto out_destroy;
11205 }
11206
11207 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11208 phba->sli4_hba.mbx_cq,
11209 phba->sli4_hba.mbx_wq,
11210 NULL, 0, LPFC_MBOX);
11211 if (rc) {
11212 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11213 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
11214 (uint32_t)rc);
11215 goto out_destroy;
11216 }
11217 if (phba->nvmet_support) {
11218 if (!phba->sli4_hba.nvmet_cqset) {
11219 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11220 "3165 Fast-path NVME CQ Set "
11221 "array not allocated\n");
11222 rc = -ENOMEM;
11223 goto out_destroy;
11224 }
11225 if (phba->cfg_nvmet_mrq > 1) {
11226 rc = lpfc_cq_create_set(phba,
11227 phba->sli4_hba.nvmet_cqset,
11228 qp,
11229 LPFC_WCQ, LPFC_NVMET);
11230 if (rc) {
11231 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11232 "3164 Failed setup of NVME CQ "
11233 "Set, rc = 0x%x\n",
11234 (uint32_t)rc);
11235 goto out_destroy;
11236 }
11237 } else {
11238 /* Set up NVMET Receive Complete Queue */
11239 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11240 qp[0].hba_eq,
11241 LPFC_WCQ, LPFC_NVMET);
11242 if (rc) {
11243 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11244 "6089 Failed setup NVMET CQ: "
11245 "rc = 0x%x\n", (uint32_t)rc);
11246 goto out_destroy;
11247 }
11248 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11249
11250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11251 "6090 NVMET CQ setup: cq-id=%d, "
11252 "parent eq-id=%d\n",
11253 phba->sli4_hba.nvmet_cqset[0]->queue_id,
11254 qp[0].hba_eq->queue_id);
11255 }
11256 }
11257
11258 /* Set up slow-path ELS WQ/CQ */
11259 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11260 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11261 "0530 ELS %s not allocated\n",
11262 phba->sli4_hba.els_cq ? "WQ" : "CQ");
11263 rc = -ENOMEM;
11264 goto out_destroy;
11265 }
11266 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11267 phba->sli4_hba.els_cq,
11268 phba->sli4_hba.els_wq,
11269 NULL, 0, LPFC_ELS);
11270 if (rc) {
11271 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11272 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
11273 (uint32_t)rc);
11274 goto out_destroy;
11275 }
11276 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11277 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
11278 phba->sli4_hba.els_wq->queue_id,
11279 phba->sli4_hba.els_cq->queue_id);
11280
11281 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11282 /* Set up NVME LS Complete Queue */
11283 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11284 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11285 "6091 LS %s not allocated\n",
11286 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11287 rc = -ENOMEM;
11288 goto out_destroy;
11289 }
11290 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11291 phba->sli4_hba.nvmels_cq,
11292 phba->sli4_hba.nvmels_wq,
11293 NULL, 0, LPFC_NVME_LS);
11294 if (rc) {
11295 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11296 "0526 Failed setup of NVVME LS WQ/CQ: "
11297 "rc = 0x%x\n", (uint32_t)rc);
11298 goto out_destroy;
11299 }
11300
11301 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11302 "6096 ELS WQ setup: wq-id=%d, "
11303 "parent cq-id=%d\n",
11304 phba->sli4_hba.nvmels_wq->queue_id,
11305 phba->sli4_hba.nvmels_cq->queue_id);
11306 }
11307
11308 /*
11309 * Create NVMET Receive Queue (RQ)
11310 */
11311 if (phba->nvmet_support) {
11312 if ((!phba->sli4_hba.nvmet_cqset) ||
11313 (!phba->sli4_hba.nvmet_mrq_hdr) ||
11314 (!phba->sli4_hba.nvmet_mrq_data)) {
11315 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11316 "6130 MRQ CQ Queues not "
11317 "allocated\n");
11318 rc = -ENOMEM;
11319 goto out_destroy;
11320 }
11321 if (phba->cfg_nvmet_mrq > 1) {
11322 rc = lpfc_mrq_create(phba,
11323 phba->sli4_hba.nvmet_mrq_hdr,
11324 phba->sli4_hba.nvmet_mrq_data,
11325 phba->sli4_hba.nvmet_cqset,
11326 LPFC_NVMET);
11327 if (rc) {
11328 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11329 "6098 Failed setup of NVMET "
11330 "MRQ: rc = 0x%x\n",
11331 (uint32_t)rc);
11332 goto out_destroy;
11333 }
11334
11335 } else {
11336 rc = lpfc_rq_create(phba,
11337 phba->sli4_hba.nvmet_mrq_hdr[0],
11338 phba->sli4_hba.nvmet_mrq_data[0],
11339 phba->sli4_hba.nvmet_cqset[0],
11340 LPFC_NVMET);
11341 if (rc) {
11342 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11343 "6057 Failed setup of NVMET "
11344 "Receive Queue: rc = 0x%x\n",
11345 (uint32_t)rc);
11346 goto out_destroy;
11347 }
11348
11349 lpfc_printf_log(
11350 phba, KERN_INFO, LOG_INIT,
11351 "6099 NVMET RQ setup: hdr-rq-id=%d, "
11352 "dat-rq-id=%d parent cq-id=%d\n",
11353 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11354 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11355 phba->sli4_hba.nvmet_cqset[0]->queue_id);
11356
11357 }
11358 }
11359
11360 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11361 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11362 "0540 Receive Queue not allocated\n");
11363 rc = -ENOMEM;
11364 goto out_destroy;
11365 }
11366
11367 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11368 phba->sli4_hba.els_cq, LPFC_USOL);
11369 if (rc) {
11370 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11371 "0541 Failed setup of Receive Queue: "
11372 "rc = 0x%x\n", (uint32_t)rc);
11373 goto out_destroy;
11374 }
11375
11376 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11377 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
11378 "parent cq-id=%d\n",
11379 phba->sli4_hba.hdr_rq->queue_id,
11380 phba->sli4_hba.dat_rq->queue_id,
11381 phba->sli4_hba.els_cq->queue_id);
11382
11383 if (phba->cfg_fcp_imax)
11384 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
11385 else
11386 usdelay = 0;
11387
11388 for (qidx = 0; qidx < phba->cfg_irq_chann;
11389 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
11390 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
11391 usdelay);
11392
11393 if (phba->sli4_hba.cq_max) {
11394 kfree(phba->sli4_hba.cq_lookup);
11395 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
11396 sizeof(struct lpfc_queue *), GFP_KERNEL);
11397 if (!phba->sli4_hba.cq_lookup) {
11398 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11399 "0549 Failed setup of CQ Lookup table: "
11400 "size 0x%x\n", phba->sli4_hba.cq_max);
11401 rc = -ENOMEM;
11402 goto out_destroy;
11403 }
11404 lpfc_setup_cq_lookup(phba);
11405 }
11406 return 0;
11407
11408 out_destroy:
11409 lpfc_sli4_queue_unset(phba);
11410 out_error:
11411 return rc;
11412 }
11413
11414 /**
11415 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
11416 * @phba: pointer to lpfc hba data structure.
11417 *
11418 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
11419 * operation.
11420 *
11421 * Return codes
11422 * 0 - successful
11423 * -ENOMEM - No available memory
11424 * -EIO - The mailbox failed to complete successfully.
11425 **/
11426 void
lpfc_sli4_queue_unset(struct lpfc_hba * phba)11427 lpfc_sli4_queue_unset(struct lpfc_hba *phba)
11428 {
11429 struct lpfc_sli4_hdw_queue *qp;
11430 struct lpfc_queue *eq;
11431 int qidx;
11432
11433 /* Unset mailbox command work queue */
11434 if (phba->sli4_hba.mbx_wq)
11435 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11436
11437 /* Unset NVME LS work queue */
11438 if (phba->sli4_hba.nvmels_wq)
11439 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11440
11441 /* Unset ELS work queue */
11442 if (phba->sli4_hba.els_wq)
11443 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11444
11445 /* Unset unsolicited receive queue */
11446 if (phba->sli4_hba.hdr_rq)
11447 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11448 phba->sli4_hba.dat_rq);
11449
11450 /* Unset mailbox command complete queue */
11451 if (phba->sli4_hba.mbx_cq)
11452 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11453
11454 /* Unset ELS complete queue */
11455 if (phba->sli4_hba.els_cq)
11456 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11457
11458 /* Unset NVME LS complete queue */
11459 if (phba->sli4_hba.nvmels_cq)
11460 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11461
11462 if (phba->nvmet_support) {
11463 /* Unset NVMET MRQ queue */
11464 if (phba->sli4_hba.nvmet_mrq_hdr) {
11465 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11466 lpfc_rq_destroy(
11467 phba,
11468 phba->sli4_hba.nvmet_mrq_hdr[qidx],
11469 phba->sli4_hba.nvmet_mrq_data[qidx]);
11470 }
11471
11472 /* Unset NVMET CQ Set complete queue */
11473 if (phba->sli4_hba.nvmet_cqset) {
11474 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11475 lpfc_cq_destroy(
11476 phba, phba->sli4_hba.nvmet_cqset[qidx]);
11477 }
11478 }
11479
11480 /* Unset fast-path SLI4 queues */
11481 if (phba->sli4_hba.hdwq) {
11482 /* Loop thru all Hardware Queues */
11483 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11484 /* Destroy the CQ/WQ corresponding to Hardware Queue */
11485 qp = &phba->sli4_hba.hdwq[qidx];
11486 lpfc_wq_destroy(phba, qp->io_wq);
11487 lpfc_cq_destroy(phba, qp->io_cq);
11488 }
11489 /* Loop thru all IRQ vectors */
11490 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11491 /* Destroy the EQ corresponding to the IRQ vector */
11492 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11493 lpfc_eq_destroy(phba, eq);
11494 }
11495 }
11496
11497 kfree(phba->sli4_hba.cq_lookup);
11498 phba->sli4_hba.cq_lookup = NULL;
11499 phba->sli4_hba.cq_max = 0;
11500 }
11501
11502 /**
11503 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
11504 * @phba: pointer to lpfc hba data structure.
11505 *
11506 * This routine is invoked to allocate and set up a pool of completion queue
11507 * events. The body of the completion queue event is a completion queue entry
11508 * CQE. For now, this pool is used for the interrupt service routine to queue
11509 * the following HBA completion queue events for the worker thread to process:
11510 * - Mailbox asynchronous events
11511 * - Receive queue completion unsolicited events
11512 * Later, this can be used for all the slow-path events.
11513 *
11514 * Return codes
11515 * 0 - successful
11516 * -ENOMEM - No available memory
11517 **/
11518 static int
lpfc_sli4_cq_event_pool_create(struct lpfc_hba * phba)11519 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
11520 {
11521 struct lpfc_cq_event *cq_event;
11522 int i;
11523
11524 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11525 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
11526 if (!cq_event)
11527 goto out_pool_create_fail;
11528 list_add_tail(&cq_event->list,
11529 &phba->sli4_hba.sp_cqe_event_pool);
11530 }
11531 return 0;
11532
11533 out_pool_create_fail:
11534 lpfc_sli4_cq_event_pool_destroy(phba);
11535 return -ENOMEM;
11536 }
11537
11538 /**
11539 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
11540 * @phba: pointer to lpfc hba data structure.
11541 *
11542 * This routine is invoked to free the pool of completion queue events at
11543 * driver unload time. Note that, it is the responsibility of the driver
11544 * cleanup routine to free all the outstanding completion-queue events
11545 * allocated from this pool back into the pool before invoking this routine
11546 * to destroy the pool.
11547 **/
11548 static void
lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba * phba)11549 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
11550 {
11551 struct lpfc_cq_event *cq_event, *next_cq_event;
11552
11553 list_for_each_entry_safe(cq_event, next_cq_event,
11554 &phba->sli4_hba.sp_cqe_event_pool, list) {
11555 list_del(&cq_event->list);
11556 kfree(cq_event);
11557 }
11558 }
11559
11560 /**
11561 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11562 * @phba: pointer to lpfc hba data structure.
11563 *
11564 * This routine is the lock free version of the API invoked to allocate a
11565 * completion-queue event from the free pool.
11566 *
11567 * Return: Pointer to the newly allocated completion-queue event if successful
11568 * NULL otherwise.
11569 **/
11570 struct lpfc_cq_event *
__lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11571 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11572 {
11573 struct lpfc_cq_event *cq_event = NULL;
11574
11575 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11576 struct lpfc_cq_event, list);
11577 return cq_event;
11578 }
11579
11580 /**
11581 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11582 * @phba: pointer to lpfc hba data structure.
11583 *
11584 * This routine is the lock version of the API invoked to allocate a
11585 * completion-queue event from the free pool.
11586 *
11587 * Return: Pointer to the newly allocated completion-queue event if successful
11588 * NULL otherwise.
11589 **/
11590 struct lpfc_cq_event *
lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11591 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11592 {
11593 struct lpfc_cq_event *cq_event;
11594 unsigned long iflags;
11595
11596 spin_lock_irqsave(&phba->hbalock, iflags);
11597 cq_event = __lpfc_sli4_cq_event_alloc(phba);
11598 spin_unlock_irqrestore(&phba->hbalock, iflags);
11599 return cq_event;
11600 }
11601
11602 /**
11603 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11604 * @phba: pointer to lpfc hba data structure.
11605 * @cq_event: pointer to the completion queue event to be freed.
11606 *
11607 * This routine is the lock free version of the API invoked to release a
11608 * completion-queue event back into the free pool.
11609 **/
11610 void
__lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11611 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11612 struct lpfc_cq_event *cq_event)
11613 {
11614 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11615 }
11616
11617 /**
11618 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11619 * @phba: pointer to lpfc hba data structure.
11620 * @cq_event: pointer to the completion queue event to be freed.
11621 *
11622 * This routine is the lock version of the API invoked to release a
11623 * completion-queue event back into the free pool.
11624 **/
11625 void
lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11626 lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11627 struct lpfc_cq_event *cq_event)
11628 {
11629 unsigned long iflags;
11630 spin_lock_irqsave(&phba->hbalock, iflags);
11631 __lpfc_sli4_cq_event_release(phba, cq_event);
11632 spin_unlock_irqrestore(&phba->hbalock, iflags);
11633 }
11634
11635 /**
11636 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
11637 * @phba: pointer to lpfc hba data structure.
11638 *
11639 * This routine is to free all the pending completion-queue events to the
11640 * back into the free pool for device reset.
11641 **/
11642 static void
lpfc_sli4_cq_event_release_all(struct lpfc_hba * phba)11643 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
11644 {
11645 LIST_HEAD(cq_event_list);
11646 struct lpfc_cq_event *cq_event;
11647 unsigned long iflags;
11648
11649 /* Retrieve all the pending WCQEs from pending WCQE lists */
11650
11651 /* Pending ELS XRI abort events */
11652 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11653 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11654 &cq_event_list);
11655 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11656
11657 /* Pending asynnc events */
11658 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11659 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11660 &cq_event_list);
11661 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11662
11663 while (!list_empty(&cq_event_list)) {
11664 list_remove_head(&cq_event_list, cq_event,
11665 struct lpfc_cq_event, list);
11666 lpfc_sli4_cq_event_release(phba, cq_event);
11667 }
11668 }
11669
11670 /**
11671 * lpfc_pci_function_reset - Reset pci function.
11672 * @phba: pointer to lpfc hba data structure.
11673 *
11674 * This routine is invoked to request a PCI function reset. It will destroys
11675 * all resources assigned to the PCI function which originates this request.
11676 *
11677 * Return codes
11678 * 0 - successful
11679 * -ENOMEM - No available memory
11680 * -EIO - The mailbox failed to complete successfully.
11681 **/
11682 int
lpfc_pci_function_reset(struct lpfc_hba * phba)11683 lpfc_pci_function_reset(struct lpfc_hba *phba)
11684 {
11685 LPFC_MBOXQ_t *mboxq;
11686 uint32_t rc = 0, if_type;
11687 uint32_t shdr_status, shdr_add_status;
11688 uint32_t rdy_chk;
11689 uint32_t port_reset = 0;
11690 union lpfc_sli4_cfg_shdr *shdr;
11691 struct lpfc_register reg_data;
11692 uint16_t devid;
11693
11694 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11695 switch (if_type) {
11696 case LPFC_SLI_INTF_IF_TYPE_0:
11697 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
11698 GFP_KERNEL);
11699 if (!mboxq) {
11700 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11701 "0494 Unable to allocate memory for "
11702 "issuing SLI_FUNCTION_RESET mailbox "
11703 "command\n");
11704 return -ENOMEM;
11705 }
11706
11707 /* Setup PCI function reset mailbox-ioctl command */
11708 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11709 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
11710 LPFC_SLI4_MBX_EMBED);
11711 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11712 shdr = (union lpfc_sli4_cfg_shdr *)
11713 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11714 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11715 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
11716 &shdr->response);
11717 mempool_free(mboxq, phba->mbox_mem_pool);
11718 if (shdr_status || shdr_add_status || rc) {
11719 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11720 "0495 SLI_FUNCTION_RESET mailbox "
11721 "failed with status x%x add_status x%x,"
11722 " mbx status x%x\n",
11723 shdr_status, shdr_add_status, rc);
11724 rc = -ENXIO;
11725 }
11726 break;
11727 case LPFC_SLI_INTF_IF_TYPE_2:
11728 case LPFC_SLI_INTF_IF_TYPE_6:
11729 wait:
11730 /*
11731 * Poll the Port Status Register and wait for RDY for
11732 * up to 30 seconds. If the port doesn't respond, treat
11733 * it as an error.
11734 */
11735 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
11736 if (lpfc_readl(phba->sli4_hba.u.if_type2.
11737 STATUSregaddr, ®_data.word0)) {
11738 rc = -ENODEV;
11739 goto out;
11740 }
11741 if (bf_get(lpfc_sliport_status_rdy, ®_data))
11742 break;
11743 msleep(20);
11744 }
11745
11746 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
11747 phba->work_status[0] = readl(
11748 phba->sli4_hba.u.if_type2.ERR1regaddr);
11749 phba->work_status[1] = readl(
11750 phba->sli4_hba.u.if_type2.ERR2regaddr);
11751 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11752 "2890 Port not ready, port status reg "
11753 "0x%x error 1=0x%x, error 2=0x%x\n",
11754 reg_data.word0,
11755 phba->work_status[0],
11756 phba->work_status[1]);
11757 rc = -ENODEV;
11758 goto out;
11759 }
11760
11761 if (bf_get(lpfc_sliport_status_pldv, ®_data))
11762 lpfc_pldv_detect = true;
11763
11764 if (!port_reset) {
11765 /*
11766 * Reset the port now
11767 */
11768 reg_data.word0 = 0;
11769 bf_set(lpfc_sliport_ctrl_end, ®_data,
11770 LPFC_SLIPORT_LITTLE_ENDIAN);
11771 bf_set(lpfc_sliport_ctrl_ip, ®_data,
11772 LPFC_SLIPORT_INIT_PORT);
11773 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11774 CTRLregaddr);
11775 /* flush */
11776 pci_read_config_word(phba->pcidev,
11777 PCI_DEVICE_ID, &devid);
11778
11779 port_reset = 1;
11780 msleep(20);
11781 goto wait;
11782 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
11783 rc = -ENODEV;
11784 goto out;
11785 }
11786 break;
11787
11788 case LPFC_SLI_INTF_IF_TYPE_1:
11789 default:
11790 break;
11791 }
11792
11793 out:
11794 /* Catch the not-ready port failure after a port reset. */
11795 if (rc) {
11796 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11797 "3317 HBA not functional: IP Reset Failed "
11798 "try: echo fw_reset > board_mode\n");
11799 rc = -ENODEV;
11800 }
11801
11802 return rc;
11803 }
11804
11805 /**
11806 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
11807 * @phba: pointer to lpfc hba data structure.
11808 *
11809 * This routine is invoked to set up the PCI device memory space for device
11810 * with SLI-4 interface spec.
11811 *
11812 * Return codes
11813 * 0 - successful
11814 * other values - error
11815 **/
11816 static int
lpfc_sli4_pci_mem_setup(struct lpfc_hba * phba)11817 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
11818 {
11819 struct pci_dev *pdev = phba->pcidev;
11820 unsigned long bar0map_len, bar1map_len, bar2map_len;
11821 int error;
11822 uint32_t if_type;
11823
11824 if (!pdev)
11825 return -ENODEV;
11826
11827 /* Set the device DMA mask size */
11828 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11829 if (error)
11830 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11831 if (error)
11832 return error;
11833
11834 /*
11835 * The BARs and register set definitions and offset locations are
11836 * dependent on the if_type.
11837 */
11838 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
11839 &phba->sli4_hba.sli_intf.word0)) {
11840 return -ENODEV;
11841 }
11842
11843 /* There is no SLI3 failback for SLI4 devices. */
11844 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11845 LPFC_SLI_INTF_VALID) {
11846 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11847 "2894 SLI_INTF reg contents invalid "
11848 "sli_intf reg 0x%x\n",
11849 phba->sli4_hba.sli_intf.word0);
11850 return -ENODEV;
11851 }
11852
11853 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11854 /*
11855 * Get the bus address of SLI4 device Bar regions and the
11856 * number of bytes required by each mapping. The mapping of the
11857 * particular PCI BARs regions is dependent on the type of
11858 * SLI4 device.
11859 */
11860 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
11861 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
11862 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
11863
11864 /*
11865 * Map SLI4 PCI Config Space Register base to a kernel virtual
11866 * addr
11867 */
11868 phba->sli4_hba.conf_regs_memmap_p =
11869 ioremap(phba->pci_bar0_map, bar0map_len);
11870 if (!phba->sli4_hba.conf_regs_memmap_p) {
11871 dev_printk(KERN_ERR, &pdev->dev,
11872 "ioremap failed for SLI4 PCI config "
11873 "registers.\n");
11874 return -ENODEV;
11875 }
11876 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11877 /* Set up BAR0 PCI config space register memory map */
11878 lpfc_sli4_bar0_register_memmap(phba, if_type);
11879 } else {
11880 phba->pci_bar0_map = pci_resource_start(pdev, 1);
11881 bar0map_len = pci_resource_len(pdev, 1);
11882 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
11883 dev_printk(KERN_ERR, &pdev->dev,
11884 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
11885 return -ENODEV;
11886 }
11887 phba->sli4_hba.conf_regs_memmap_p =
11888 ioremap(phba->pci_bar0_map, bar0map_len);
11889 if (!phba->sli4_hba.conf_regs_memmap_p) {
11890 dev_printk(KERN_ERR, &pdev->dev,
11891 "ioremap failed for SLI4 PCI config "
11892 "registers.\n");
11893 return -ENODEV;
11894 }
11895 lpfc_sli4_bar0_register_memmap(phba, if_type);
11896 }
11897
11898 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11899 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
11900 /*
11901 * Map SLI4 if type 0 HBA Control Register base to a
11902 * kernel virtual address and setup the registers.
11903 */
11904 phba->pci_bar1_map = pci_resource_start(pdev,
11905 PCI_64BIT_BAR2);
11906 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11907 phba->sli4_hba.ctrl_regs_memmap_p =
11908 ioremap(phba->pci_bar1_map,
11909 bar1map_len);
11910 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11911 dev_err(&pdev->dev,
11912 "ioremap failed for SLI4 HBA "
11913 "control registers.\n");
11914 error = -ENOMEM;
11915 goto out_iounmap_conf;
11916 }
11917 phba->pci_bar2_memmap_p =
11918 phba->sli4_hba.ctrl_regs_memmap_p;
11919 lpfc_sli4_bar1_register_memmap(phba, if_type);
11920 } else {
11921 error = -ENOMEM;
11922 goto out_iounmap_conf;
11923 }
11924 }
11925
11926 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
11927 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
11928 /*
11929 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
11930 * virtual address and setup the registers.
11931 */
11932 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
11933 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11934 phba->sli4_hba.drbl_regs_memmap_p =
11935 ioremap(phba->pci_bar1_map, bar1map_len);
11936 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11937 dev_err(&pdev->dev,
11938 "ioremap failed for SLI4 HBA doorbell registers.\n");
11939 error = -ENOMEM;
11940 goto out_iounmap_conf;
11941 }
11942 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11943 lpfc_sli4_bar1_register_memmap(phba, if_type);
11944 }
11945
11946 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11947 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11948 /*
11949 * Map SLI4 if type 0 HBA Doorbell Register base to
11950 * a kernel virtual address and setup the registers.
11951 */
11952 phba->pci_bar2_map = pci_resource_start(pdev,
11953 PCI_64BIT_BAR4);
11954 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11955 phba->sli4_hba.drbl_regs_memmap_p =
11956 ioremap(phba->pci_bar2_map,
11957 bar2map_len);
11958 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11959 dev_err(&pdev->dev,
11960 "ioremap failed for SLI4 HBA"
11961 " doorbell registers.\n");
11962 error = -ENOMEM;
11963 goto out_iounmap_ctrl;
11964 }
11965 phba->pci_bar4_memmap_p =
11966 phba->sli4_hba.drbl_regs_memmap_p;
11967 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
11968 if (error)
11969 goto out_iounmap_all;
11970 } else {
11971 error = -ENOMEM;
11972 goto out_iounmap_all;
11973 }
11974 }
11975
11976 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
11977 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11978 /*
11979 * Map SLI4 if type 6 HBA DPP Register base to a kernel
11980 * virtual address and setup the registers.
11981 */
11982 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
11983 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11984 phba->sli4_hba.dpp_regs_memmap_p =
11985 ioremap(phba->pci_bar2_map, bar2map_len);
11986 if (!phba->sli4_hba.dpp_regs_memmap_p) {
11987 dev_err(&pdev->dev,
11988 "ioremap failed for SLI4 HBA dpp registers.\n");
11989 error = -ENOMEM;
11990 goto out_iounmap_ctrl;
11991 }
11992 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
11993 }
11994
11995 /* Set up the EQ/CQ register handeling functions now */
11996 switch (if_type) {
11997 case LPFC_SLI_INTF_IF_TYPE_0:
11998 case LPFC_SLI_INTF_IF_TYPE_2:
11999 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
12000 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
12001 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
12002 break;
12003 case LPFC_SLI_INTF_IF_TYPE_6:
12004 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
12005 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
12006 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
12007 break;
12008 default:
12009 break;
12010 }
12011
12012 return 0;
12013
12014 out_iounmap_all:
12015 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12016 out_iounmap_ctrl:
12017 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12018 out_iounmap_conf:
12019 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12020
12021 return error;
12022 }
12023
12024 /**
12025 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
12026 * @phba: pointer to lpfc hba data structure.
12027 *
12028 * This routine is invoked to unset the PCI device memory space for device
12029 * with SLI-4 interface spec.
12030 **/
12031 static void
lpfc_sli4_pci_mem_unset(struct lpfc_hba * phba)12032 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
12033 {
12034 uint32_t if_type;
12035 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12036
12037 switch (if_type) {
12038 case LPFC_SLI_INTF_IF_TYPE_0:
12039 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12040 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12041 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12042 break;
12043 case LPFC_SLI_INTF_IF_TYPE_2:
12044 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12045 break;
12046 case LPFC_SLI_INTF_IF_TYPE_6:
12047 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12048 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12049 if (phba->sli4_hba.dpp_regs_memmap_p)
12050 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12051 break;
12052 case LPFC_SLI_INTF_IF_TYPE_1:
12053 default:
12054 dev_printk(KERN_ERR, &phba->pcidev->dev,
12055 "FATAL - unsupported SLI4 interface type - %d\n",
12056 if_type);
12057 break;
12058 }
12059 }
12060
12061 /**
12062 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
12063 * @phba: pointer to lpfc hba data structure.
12064 *
12065 * This routine is invoked to enable the MSI-X interrupt vectors to device
12066 * with SLI-3 interface specs.
12067 *
12068 * Return codes
12069 * 0 - successful
12070 * other values - error
12071 **/
12072 static int
lpfc_sli_enable_msix(struct lpfc_hba * phba)12073 lpfc_sli_enable_msix(struct lpfc_hba *phba)
12074 {
12075 int rc;
12076 LPFC_MBOXQ_t *pmb;
12077
12078 /* Set up MSI-X multi-message vectors */
12079 rc = pci_alloc_irq_vectors(phba->pcidev,
12080 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
12081 if (rc < 0) {
12082 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12083 "0420 PCI enable MSI-X failed (%d)\n", rc);
12084 goto vec_fail_out;
12085 }
12086
12087 /*
12088 * Assign MSI-X vectors to interrupt handlers
12089 */
12090
12091 /* vector-0 is associated to slow-path handler */
12092 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
12093 &lpfc_sli_sp_intr_handler, 0,
12094 LPFC_SP_DRIVER_HANDLER_NAME, phba);
12095 if (rc) {
12096 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12097 "0421 MSI-X slow-path request_irq failed "
12098 "(%d)\n", rc);
12099 goto msi_fail_out;
12100 }
12101
12102 /* vector-1 is associated to fast-path handler */
12103 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
12104 &lpfc_sli_fp_intr_handler, 0,
12105 LPFC_FP_DRIVER_HANDLER_NAME, phba);
12106
12107 if (rc) {
12108 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12109 "0429 MSI-X fast-path request_irq failed "
12110 "(%d)\n", rc);
12111 goto irq_fail_out;
12112 }
12113
12114 /*
12115 * Configure HBA MSI-X attention conditions to messages
12116 */
12117 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12118
12119 if (!pmb) {
12120 rc = -ENOMEM;
12121 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12122 "0474 Unable to allocate memory for issuing "
12123 "MBOX_CONFIG_MSI command\n");
12124 goto mem_fail_out;
12125 }
12126 rc = lpfc_config_msi(phba, pmb);
12127 if (rc)
12128 goto mbx_fail_out;
12129 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
12130 if (rc != MBX_SUCCESS) {
12131 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
12132 "0351 Config MSI mailbox command failed, "
12133 "mbxCmd x%x, mbxStatus x%x\n",
12134 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
12135 goto mbx_fail_out;
12136 }
12137
12138 /* Free memory allocated for mailbox command */
12139 mempool_free(pmb, phba->mbox_mem_pool);
12140 return rc;
12141
12142 mbx_fail_out:
12143 /* Free memory allocated for mailbox command */
12144 mempool_free(pmb, phba->mbox_mem_pool);
12145
12146 mem_fail_out:
12147 /* free the irq already requested */
12148 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
12149
12150 irq_fail_out:
12151 /* free the irq already requested */
12152 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
12153
12154 msi_fail_out:
12155 /* Unconfigure MSI-X capability structure */
12156 pci_free_irq_vectors(phba->pcidev);
12157
12158 vec_fail_out:
12159 return rc;
12160 }
12161
12162 /**
12163 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
12164 * @phba: pointer to lpfc hba data structure.
12165 *
12166 * This routine is invoked to enable the MSI interrupt mode to device with
12167 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
12168 * enable the MSI vector. The device driver is responsible for calling the
12169 * request_irq() to register MSI vector with a interrupt the handler, which
12170 * is done in this function.
12171 *
12172 * Return codes
12173 * 0 - successful
12174 * other values - error
12175 */
12176 static int
lpfc_sli_enable_msi(struct lpfc_hba * phba)12177 lpfc_sli_enable_msi(struct lpfc_hba *phba)
12178 {
12179 int rc;
12180
12181 rc = pci_enable_msi(phba->pcidev);
12182 if (!rc)
12183 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12184 "0012 PCI enable MSI mode success.\n");
12185 else {
12186 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12187 "0471 PCI enable MSI mode failed (%d)\n", rc);
12188 return rc;
12189 }
12190
12191 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12192 0, LPFC_DRIVER_NAME, phba);
12193 if (rc) {
12194 pci_disable_msi(phba->pcidev);
12195 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12196 "0478 MSI request_irq failed (%d)\n", rc);
12197 }
12198 return rc;
12199 }
12200
12201 /**
12202 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
12203 * @phba: pointer to lpfc hba data structure.
12204 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
12205 *
12206 * This routine is invoked to enable device interrupt and associate driver's
12207 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
12208 * spec. Depends on the interrupt mode configured to the driver, the driver
12209 * will try to fallback from the configured interrupt mode to an interrupt
12210 * mode which is supported by the platform, kernel, and device in the order
12211 * of:
12212 * MSI-X -> MSI -> IRQ.
12213 *
12214 * Return codes
12215 * 0 - successful
12216 * other values - error
12217 **/
12218 static uint32_t
lpfc_sli_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)12219 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
12220 {
12221 uint32_t intr_mode = LPFC_INTR_ERROR;
12222 int retval;
12223
12224 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
12225 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
12226 if (retval)
12227 return intr_mode;
12228 phba->hba_flag &= ~HBA_NEEDS_CFG_PORT;
12229
12230 if (cfg_mode == 2) {
12231 /* Now, try to enable MSI-X interrupt mode */
12232 retval = lpfc_sli_enable_msix(phba);
12233 if (!retval) {
12234 /* Indicate initialization to MSI-X mode */
12235 phba->intr_type = MSIX;
12236 intr_mode = 2;
12237 }
12238 }
12239
12240 /* Fallback to MSI if MSI-X initialization failed */
12241 if (cfg_mode >= 1 && phba->intr_type == NONE) {
12242 retval = lpfc_sli_enable_msi(phba);
12243 if (!retval) {
12244 /* Indicate initialization to MSI mode */
12245 phba->intr_type = MSI;
12246 intr_mode = 1;
12247 }
12248 }
12249
12250 /* Fallback to INTx if both MSI-X/MSI initalization failed */
12251 if (phba->intr_type == NONE) {
12252 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12253 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
12254 if (!retval) {
12255 /* Indicate initialization to INTx mode */
12256 phba->intr_type = INTx;
12257 intr_mode = 0;
12258 }
12259 }
12260 return intr_mode;
12261 }
12262
12263 /**
12264 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
12265 * @phba: pointer to lpfc hba data structure.
12266 *
12267 * This routine is invoked to disable device interrupt and disassociate the
12268 * driver's interrupt handler(s) from interrupt vector(s) to device with
12269 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
12270 * release the interrupt vector(s) for the message signaled interrupt.
12271 **/
12272 static void
lpfc_sli_disable_intr(struct lpfc_hba * phba)12273 lpfc_sli_disable_intr(struct lpfc_hba *phba)
12274 {
12275 int nr_irqs, i;
12276
12277 if (phba->intr_type == MSIX)
12278 nr_irqs = LPFC_MSIX_VECTORS;
12279 else
12280 nr_irqs = 1;
12281
12282 for (i = 0; i < nr_irqs; i++)
12283 free_irq(pci_irq_vector(phba->pcidev, i), phba);
12284 pci_free_irq_vectors(phba->pcidev);
12285
12286 /* Reset interrupt management states */
12287 phba->intr_type = NONE;
12288 phba->sli.slistat.sli_intr = 0;
12289 }
12290
12291 /**
12292 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
12293 * @phba: pointer to lpfc hba data structure.
12294 * @id: EQ vector index or Hardware Queue index
12295 * @match: LPFC_FIND_BY_EQ = match by EQ
12296 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
12297 * Return the CPU that matches the selection criteria
12298 */
12299 static uint16_t
lpfc_find_cpu_handle(struct lpfc_hba * phba,uint16_t id,int match)12300 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
12301 {
12302 struct lpfc_vector_map_info *cpup;
12303 int cpu;
12304
12305 /* Loop through all CPUs */
12306 for_each_present_cpu(cpu) {
12307 cpup = &phba->sli4_hba.cpu_map[cpu];
12308
12309 /* If we are matching by EQ, there may be multiple CPUs using
12310 * using the same vector, so select the one with
12311 * LPFC_CPU_FIRST_IRQ set.
12312 */
12313 if ((match == LPFC_FIND_BY_EQ) &&
12314 (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
12315 (cpup->eq == id))
12316 return cpu;
12317
12318 /* If matching by HDWQ, select the first CPU that matches */
12319 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
12320 return cpu;
12321 }
12322 return 0;
12323 }
12324
12325 #ifdef CONFIG_X86
12326 /**
12327 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
12328 * @phba: pointer to lpfc hba data structure.
12329 * @cpu: CPU map index
12330 * @phys_id: CPU package physical id
12331 * @core_id: CPU core id
12332 */
12333 static int
lpfc_find_hyper(struct lpfc_hba * phba,int cpu,uint16_t phys_id,uint16_t core_id)12334 lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
12335 uint16_t phys_id, uint16_t core_id)
12336 {
12337 struct lpfc_vector_map_info *cpup;
12338 int idx;
12339
12340 for_each_present_cpu(idx) {
12341 cpup = &phba->sli4_hba.cpu_map[idx];
12342 /* Does the cpup match the one we are looking for */
12343 if ((cpup->phys_id == phys_id) &&
12344 (cpup->core_id == core_id) &&
12345 (cpu != idx))
12346 return 1;
12347 }
12348 return 0;
12349 }
12350 #endif
12351
12352 /*
12353 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
12354 * @phba: pointer to lpfc hba data structure.
12355 * @eqidx: index for eq and irq vector
12356 * @flag: flags to set for vector_map structure
12357 * @cpu: cpu used to index vector_map structure
12358 *
12359 * The routine assigns eq info into vector_map structure
12360 */
12361 static inline void
lpfc_assign_eq_map_info(struct lpfc_hba * phba,uint16_t eqidx,uint16_t flag,unsigned int cpu)12362 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
12363 unsigned int cpu)
12364 {
12365 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12366 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
12367
12368 cpup->eq = eqidx;
12369 cpup->flag |= flag;
12370
12371 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12372 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
12373 cpu, eqhdl->irq, cpup->eq, cpup->flag);
12374 }
12375
12376 /**
12377 * lpfc_cpu_map_array_init - Initialize cpu_map structure
12378 * @phba: pointer to lpfc hba data structure.
12379 *
12380 * The routine initializes the cpu_map array structure
12381 */
12382 static void
lpfc_cpu_map_array_init(struct lpfc_hba * phba)12383 lpfc_cpu_map_array_init(struct lpfc_hba *phba)
12384 {
12385 struct lpfc_vector_map_info *cpup;
12386 struct lpfc_eq_intr_info *eqi;
12387 int cpu;
12388
12389 for_each_possible_cpu(cpu) {
12390 cpup = &phba->sli4_hba.cpu_map[cpu];
12391 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
12392 cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
12393 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
12394 cpup->eq = LPFC_VECTOR_MAP_EMPTY;
12395 cpup->flag = 0;
12396 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12397 INIT_LIST_HEAD(&eqi->list);
12398 eqi->icnt = 0;
12399 }
12400 }
12401
12402 /**
12403 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
12404 * @phba: pointer to lpfc hba data structure.
12405 *
12406 * The routine initializes the hba_eq_hdl array structure
12407 */
12408 static void
lpfc_hba_eq_hdl_array_init(struct lpfc_hba * phba)12409 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
12410 {
12411 struct lpfc_hba_eq_hdl *eqhdl;
12412 int i;
12413
12414 for (i = 0; i < phba->cfg_irq_chann; i++) {
12415 eqhdl = lpfc_get_eq_hdl(i);
12416 eqhdl->irq = LPFC_IRQ_EMPTY;
12417 eqhdl->phba = phba;
12418 }
12419 }
12420
12421 /**
12422 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
12423 * @phba: pointer to lpfc hba data structure.
12424 * @vectors: number of msix vectors allocated.
12425 *
12426 * The routine will figure out the CPU affinity assignment for every
12427 * MSI-X vector allocated for the HBA.
12428 * In addition, the CPU to IO channel mapping will be calculated
12429 * and the phba->sli4_hba.cpu_map array will reflect this.
12430 */
12431 static void
lpfc_cpu_affinity_check(struct lpfc_hba * phba,int vectors)12432 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
12433 {
12434 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
12435 int max_phys_id, min_phys_id;
12436 int max_core_id, min_core_id;
12437 struct lpfc_vector_map_info *cpup;
12438 struct lpfc_vector_map_info *new_cpup;
12439 #ifdef CONFIG_X86
12440 struct cpuinfo_x86 *cpuinfo;
12441 #endif
12442 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12443 struct lpfc_hdwq_stat *c_stat;
12444 #endif
12445
12446 max_phys_id = 0;
12447 min_phys_id = LPFC_VECTOR_MAP_EMPTY;
12448 max_core_id = 0;
12449 min_core_id = LPFC_VECTOR_MAP_EMPTY;
12450
12451 /* Update CPU map with physical id and core id of each CPU */
12452 for_each_present_cpu(cpu) {
12453 cpup = &phba->sli4_hba.cpu_map[cpu];
12454 #ifdef CONFIG_X86
12455 cpuinfo = &cpu_data(cpu);
12456 cpup->phys_id = cpuinfo->phys_proc_id;
12457 cpup->core_id = cpuinfo->cpu_core_id;
12458 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
12459 cpup->flag |= LPFC_CPU_MAP_HYPER;
12460 #else
12461 /* No distinction between CPUs for other platforms */
12462 cpup->phys_id = 0;
12463 cpup->core_id = cpu;
12464 #endif
12465
12466 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12467 "3328 CPU %d physid %d coreid %d flag x%x\n",
12468 cpu, cpup->phys_id, cpup->core_id, cpup->flag);
12469
12470 if (cpup->phys_id > max_phys_id)
12471 max_phys_id = cpup->phys_id;
12472 if (cpup->phys_id < min_phys_id)
12473 min_phys_id = cpup->phys_id;
12474
12475 if (cpup->core_id > max_core_id)
12476 max_core_id = cpup->core_id;
12477 if (cpup->core_id < min_core_id)
12478 min_core_id = cpup->core_id;
12479 }
12480
12481 /* After looking at each irq vector assigned to this pcidev, its
12482 * possible to see that not ALL CPUs have been accounted for.
12483 * Next we will set any unassigned (unaffinitized) cpu map
12484 * entries to a IRQ on the same phys_id.
12485 */
12486 first_cpu = cpumask_first(cpu_present_mask);
12487 start_cpu = first_cpu;
12488
12489 for_each_present_cpu(cpu) {
12490 cpup = &phba->sli4_hba.cpu_map[cpu];
12491
12492 /* Is this CPU entry unassigned */
12493 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12494 /* Mark CPU as IRQ not assigned by the kernel */
12495 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12496
12497 /* If so, find a new_cpup thats on the the SAME
12498 * phys_id as cpup. start_cpu will start where we
12499 * left off so all unassigned entries don't get assgined
12500 * the IRQ of the first entry.
12501 */
12502 new_cpu = start_cpu;
12503 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12504 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12505 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12506 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
12507 (new_cpup->phys_id == cpup->phys_id))
12508 goto found_same;
12509 new_cpu = cpumask_next(
12510 new_cpu, cpu_present_mask);
12511 if (new_cpu == nr_cpumask_bits)
12512 new_cpu = first_cpu;
12513 }
12514 /* At this point, we leave the CPU as unassigned */
12515 continue;
12516 found_same:
12517 /* We found a matching phys_id, so copy the IRQ info */
12518 cpup->eq = new_cpup->eq;
12519
12520 /* Bump start_cpu to the next slot to minmize the
12521 * chance of having multiple unassigned CPU entries
12522 * selecting the same IRQ.
12523 */
12524 start_cpu = cpumask_next(new_cpu, cpu_present_mask);
12525 if (start_cpu == nr_cpumask_bits)
12526 start_cpu = first_cpu;
12527
12528 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12529 "3337 Set Affinity: CPU %d "
12530 "eq %d from peer cpu %d same "
12531 "phys_id (%d)\n",
12532 cpu, cpup->eq, new_cpu,
12533 cpup->phys_id);
12534 }
12535 }
12536
12537 /* Set any unassigned cpu map entries to a IRQ on any phys_id */
12538 start_cpu = first_cpu;
12539
12540 for_each_present_cpu(cpu) {
12541 cpup = &phba->sli4_hba.cpu_map[cpu];
12542
12543 /* Is this entry unassigned */
12544 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12545 /* Mark it as IRQ not assigned by the kernel */
12546 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12547
12548 /* If so, find a new_cpup thats on ANY phys_id
12549 * as the cpup. start_cpu will start where we
12550 * left off so all unassigned entries don't get
12551 * assigned the IRQ of the first entry.
12552 */
12553 new_cpu = start_cpu;
12554 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12555 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12556 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12557 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
12558 goto found_any;
12559 new_cpu = cpumask_next(
12560 new_cpu, cpu_present_mask);
12561 if (new_cpu == nr_cpumask_bits)
12562 new_cpu = first_cpu;
12563 }
12564 /* We should never leave an entry unassigned */
12565 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12566 "3339 Set Affinity: CPU %d "
12567 "eq %d UNASSIGNED\n",
12568 cpup->hdwq, cpup->eq);
12569 continue;
12570 found_any:
12571 /* We found an available entry, copy the IRQ info */
12572 cpup->eq = new_cpup->eq;
12573
12574 /* Bump start_cpu to the next slot to minmize the
12575 * chance of having multiple unassigned CPU entries
12576 * selecting the same IRQ.
12577 */
12578 start_cpu = cpumask_next(new_cpu, cpu_present_mask);
12579 if (start_cpu == nr_cpumask_bits)
12580 start_cpu = first_cpu;
12581
12582 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12583 "3338 Set Affinity: CPU %d "
12584 "eq %d from peer cpu %d (%d/%d)\n",
12585 cpu, cpup->eq, new_cpu,
12586 new_cpup->phys_id, new_cpup->core_id);
12587 }
12588 }
12589
12590 /* Assign hdwq indices that are unique across all cpus in the map
12591 * that are also FIRST_CPUs.
12592 */
12593 idx = 0;
12594 for_each_present_cpu(cpu) {
12595 cpup = &phba->sli4_hba.cpu_map[cpu];
12596
12597 /* Only FIRST IRQs get a hdwq index assignment. */
12598 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12599 continue;
12600
12601 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
12602 cpup->hdwq = idx;
12603 idx++;
12604 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12605 "3333 Set Affinity: CPU %d (phys %d core %d): "
12606 "hdwq %d eq %d flg x%x\n",
12607 cpu, cpup->phys_id, cpup->core_id,
12608 cpup->hdwq, cpup->eq, cpup->flag);
12609 }
12610 /* Associate a hdwq with each cpu_map entry
12611 * This will be 1 to 1 - hdwq to cpu, unless there are less
12612 * hardware queues then CPUs. For that case we will just round-robin
12613 * the available hardware queues as they get assigned to CPUs.
12614 * The next_idx is the idx from the FIRST_CPU loop above to account
12615 * for irq_chann < hdwq. The idx is used for round-robin assignments
12616 * and needs to start at 0.
12617 */
12618 next_idx = idx;
12619 start_cpu = 0;
12620 idx = 0;
12621 for_each_present_cpu(cpu) {
12622 cpup = &phba->sli4_hba.cpu_map[cpu];
12623
12624 /* FIRST cpus are already mapped. */
12625 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
12626 continue;
12627
12628 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
12629 * of the unassigned cpus to the next idx so that all
12630 * hdw queues are fully utilized.
12631 */
12632 if (next_idx < phba->cfg_hdw_queue) {
12633 cpup->hdwq = next_idx;
12634 next_idx++;
12635 continue;
12636 }
12637
12638 /* Not a First CPU and all hdw_queues are used. Reuse a
12639 * Hardware Queue for another CPU, so be smart about it
12640 * and pick one that has its IRQ/EQ mapped to the same phys_id
12641 * (CPU package) and core_id.
12642 */
12643 new_cpu = start_cpu;
12644 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12645 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12646 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12647 new_cpup->phys_id == cpup->phys_id &&
12648 new_cpup->core_id == cpup->core_id) {
12649 goto found_hdwq;
12650 }
12651 new_cpu = cpumask_next(new_cpu, cpu_present_mask);
12652 if (new_cpu == nr_cpumask_bits)
12653 new_cpu = first_cpu;
12654 }
12655
12656 /* If we can't match both phys_id and core_id,
12657 * settle for just a phys_id match.
12658 */
12659 new_cpu = start_cpu;
12660 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12661 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12662 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12663 new_cpup->phys_id == cpup->phys_id)
12664 goto found_hdwq;
12665
12666 new_cpu = cpumask_next(new_cpu, cpu_present_mask);
12667 if (new_cpu == nr_cpumask_bits)
12668 new_cpu = first_cpu;
12669 }
12670
12671 /* Otherwise just round robin on cfg_hdw_queue */
12672 cpup->hdwq = idx % phba->cfg_hdw_queue;
12673 idx++;
12674 goto logit;
12675 found_hdwq:
12676 /* We found an available entry, copy the IRQ info */
12677 start_cpu = cpumask_next(new_cpu, cpu_present_mask);
12678 if (start_cpu == nr_cpumask_bits)
12679 start_cpu = first_cpu;
12680 cpup->hdwq = new_cpup->hdwq;
12681 logit:
12682 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12683 "3335 Set Affinity: CPU %d (phys %d core %d): "
12684 "hdwq %d eq %d flg x%x\n",
12685 cpu, cpup->phys_id, cpup->core_id,
12686 cpup->hdwq, cpup->eq, cpup->flag);
12687 }
12688
12689 /*
12690 * Initialize the cpu_map slots for not-present cpus in case
12691 * a cpu is hot-added. Perform a simple hdwq round robin assignment.
12692 */
12693 idx = 0;
12694 for_each_possible_cpu(cpu) {
12695 cpup = &phba->sli4_hba.cpu_map[cpu];
12696 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12697 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12698 c_stat->hdwq_no = cpup->hdwq;
12699 #endif
12700 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
12701 continue;
12702
12703 cpup->hdwq = idx++ % phba->cfg_hdw_queue;
12704 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12705 c_stat->hdwq_no = cpup->hdwq;
12706 #endif
12707 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12708 "3340 Set Affinity: not present "
12709 "CPU %d hdwq %d\n",
12710 cpu, cpup->hdwq);
12711 }
12712
12713 /* The cpu_map array will be used later during initialization
12714 * when EQ / CQ / WQs are allocated and configured.
12715 */
12716 return;
12717 }
12718
12719 /**
12720 * lpfc_cpuhp_get_eq
12721 *
12722 * @phba: pointer to lpfc hba data structure.
12723 * @cpu: cpu going offline
12724 * @eqlist: eq list to append to
12725 */
12726 static int
lpfc_cpuhp_get_eq(struct lpfc_hba * phba,unsigned int cpu,struct list_head * eqlist)12727 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
12728 struct list_head *eqlist)
12729 {
12730 const struct cpumask *maskp;
12731 struct lpfc_queue *eq;
12732 struct cpumask *tmp;
12733 u16 idx;
12734
12735 tmp = kzalloc(cpumask_size(), GFP_KERNEL);
12736 if (!tmp)
12737 return -ENOMEM;
12738
12739 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12740 maskp = pci_irq_get_affinity(phba->pcidev, idx);
12741 if (!maskp)
12742 continue;
12743 /*
12744 * if irq is not affinitized to the cpu going
12745 * then we don't need to poll the eq attached
12746 * to it.
12747 */
12748 if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
12749 continue;
12750 /* get the cpus that are online and are affini-
12751 * tized to this irq vector. If the count is
12752 * more than 1 then cpuhp is not going to shut-
12753 * down this vector. Since this cpu has not
12754 * gone offline yet, we need >1.
12755 */
12756 cpumask_and(tmp, maskp, cpu_online_mask);
12757 if (cpumask_weight(tmp) > 1)
12758 continue;
12759
12760 /* Now that we have an irq to shutdown, get the eq
12761 * mapped to this irq. Note: multiple hdwq's in
12762 * the software can share an eq, but eventually
12763 * only eq will be mapped to this vector
12764 */
12765 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12766 list_add(&eq->_poll_list, eqlist);
12767 }
12768 kfree(tmp);
12769 return 0;
12770 }
12771
__lpfc_cpuhp_remove(struct lpfc_hba * phba)12772 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
12773 {
12774 if (phba->sli_rev != LPFC_SLI_REV4)
12775 return;
12776
12777 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
12778 &phba->cpuhp);
12779 /*
12780 * unregistering the instance doesn't stop the polling
12781 * timer. Wait for the poll timer to retire.
12782 */
12783 synchronize_rcu();
12784 del_timer_sync(&phba->cpuhp_poll_timer);
12785 }
12786
lpfc_cpuhp_remove(struct lpfc_hba * phba)12787 static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
12788 {
12789 if (phba->pport && (phba->pport->fc_flag & FC_OFFLINE_MODE))
12790 return;
12791
12792 __lpfc_cpuhp_remove(phba);
12793 }
12794
lpfc_cpuhp_add(struct lpfc_hba * phba)12795 static void lpfc_cpuhp_add(struct lpfc_hba *phba)
12796 {
12797 if (phba->sli_rev != LPFC_SLI_REV4)
12798 return;
12799
12800 rcu_read_lock();
12801
12802 if (!list_empty(&phba->poll_list))
12803 mod_timer(&phba->cpuhp_poll_timer,
12804 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
12805
12806 rcu_read_unlock();
12807
12808 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
12809 &phba->cpuhp);
12810 }
12811
__lpfc_cpuhp_checks(struct lpfc_hba * phba,int * retval)12812 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
12813 {
12814 if (phba->pport->load_flag & FC_UNLOADING) {
12815 *retval = -EAGAIN;
12816 return true;
12817 }
12818
12819 if (phba->sli_rev != LPFC_SLI_REV4) {
12820 *retval = 0;
12821 return true;
12822 }
12823
12824 /* proceed with the hotplug */
12825 return false;
12826 }
12827
12828 /**
12829 * lpfc_irq_set_aff - set IRQ affinity
12830 * @eqhdl: EQ handle
12831 * @cpu: cpu to set affinity
12832 *
12833 **/
12834 static inline void
lpfc_irq_set_aff(struct lpfc_hba_eq_hdl * eqhdl,unsigned int cpu)12835 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
12836 {
12837 cpumask_clear(&eqhdl->aff_mask);
12838 cpumask_set_cpu(cpu, &eqhdl->aff_mask);
12839 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12840 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask);
12841 }
12842
12843 /**
12844 * lpfc_irq_clear_aff - clear IRQ affinity
12845 * @eqhdl: EQ handle
12846 *
12847 **/
12848 static inline void
lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl * eqhdl)12849 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
12850 {
12851 cpumask_clear(&eqhdl->aff_mask);
12852 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12853 }
12854
12855 /**
12856 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
12857 * @phba: pointer to HBA context object.
12858 * @cpu: cpu going offline/online
12859 * @offline: true, cpu is going offline. false, cpu is coming online.
12860 *
12861 * If cpu is going offline, we'll try our best effort to find the next
12862 * online cpu on the phba's original_mask and migrate all offlining IRQ
12863 * affinities.
12864 *
12865 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
12866 *
12867 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
12868 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
12869 *
12870 **/
12871 static void
lpfc_irq_rebalance(struct lpfc_hba * phba,unsigned int cpu,bool offline)12872 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
12873 {
12874 struct lpfc_vector_map_info *cpup;
12875 struct cpumask *aff_mask;
12876 unsigned int cpu_select, cpu_next, idx;
12877 const struct cpumask *orig_mask;
12878
12879 if (phba->irq_chann_mode == NORMAL_MODE)
12880 return;
12881
12882 orig_mask = &phba->sli4_hba.irq_aff_mask;
12883
12884 if (!cpumask_test_cpu(cpu, orig_mask))
12885 return;
12886
12887 cpup = &phba->sli4_hba.cpu_map[cpu];
12888
12889 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12890 return;
12891
12892 if (offline) {
12893 /* Find next online CPU on original mask */
12894 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true);
12895 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
12896
12897 /* Found a valid CPU */
12898 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
12899 /* Go through each eqhdl and ensure offlining
12900 * cpu aff_mask is migrated
12901 */
12902 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12903 aff_mask = lpfc_get_aff_mask(idx);
12904
12905 /* Migrate affinity */
12906 if (cpumask_test_cpu(cpu, aff_mask))
12907 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
12908 cpu_select);
12909 }
12910 } else {
12911 /* Rely on irqbalance if no online CPUs left on NUMA */
12912 for (idx = 0; idx < phba->cfg_irq_chann; idx++)
12913 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
12914 }
12915 } else {
12916 /* Migrate affinity back to this CPU */
12917 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
12918 }
12919 }
12920
lpfc_cpu_offline(unsigned int cpu,struct hlist_node * node)12921 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
12922 {
12923 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12924 struct lpfc_queue *eq, *next;
12925 LIST_HEAD(eqlist);
12926 int retval;
12927
12928 if (!phba) {
12929 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12930 return 0;
12931 }
12932
12933 if (__lpfc_cpuhp_checks(phba, &retval))
12934 return retval;
12935
12936 lpfc_irq_rebalance(phba, cpu, true);
12937
12938 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
12939 if (retval)
12940 return retval;
12941
12942 /* start polling on these eq's */
12943 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
12944 list_del_init(&eq->_poll_list);
12945 lpfc_sli4_start_polling(eq);
12946 }
12947
12948 return 0;
12949 }
12950
lpfc_cpu_online(unsigned int cpu,struct hlist_node * node)12951 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
12952 {
12953 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12954 struct lpfc_queue *eq, *next;
12955 unsigned int n;
12956 int retval;
12957
12958 if (!phba) {
12959 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12960 return 0;
12961 }
12962
12963 if (__lpfc_cpuhp_checks(phba, &retval))
12964 return retval;
12965
12966 lpfc_irq_rebalance(phba, cpu, false);
12967
12968 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
12969 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
12970 if (n == cpu)
12971 lpfc_sli4_stop_polling(eq);
12972 }
12973
12974 return 0;
12975 }
12976
12977 /**
12978 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
12979 * @phba: pointer to lpfc hba data structure.
12980 *
12981 * This routine is invoked to enable the MSI-X interrupt vectors to device
12982 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them
12983 * to cpus on the system.
12984 *
12985 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
12986 * the number of cpus on the same numa node as this adapter. The vectors are
12987 * allocated without requesting OS affinity mapping. A vector will be
12988 * allocated and assigned to each online and offline cpu. If the cpu is
12989 * online, then affinity will be set to that cpu. If the cpu is offline, then
12990 * affinity will be set to the nearest peer cpu within the numa node that is
12991 * online. If there are no online cpus within the numa node, affinity is not
12992 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
12993 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
12994 * configured.
12995 *
12996 * If numa mode is not enabled and there is more than 1 vector allocated, then
12997 * the driver relies on the managed irq interface where the OS assigns vector to
12998 * cpu affinity. The driver will then use that affinity mapping to setup its
12999 * cpu mapping table.
13000 *
13001 * Return codes
13002 * 0 - successful
13003 * other values - error
13004 **/
13005 static int
lpfc_sli4_enable_msix(struct lpfc_hba * phba)13006 lpfc_sli4_enable_msix(struct lpfc_hba *phba)
13007 {
13008 int vectors, rc, index;
13009 char *name;
13010 const struct cpumask *aff_mask = NULL;
13011 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
13012 struct lpfc_vector_map_info *cpup;
13013 struct lpfc_hba_eq_hdl *eqhdl;
13014 const struct cpumask *maskp;
13015 unsigned int flags = PCI_IRQ_MSIX;
13016
13017 /* Set up MSI-X multi-message vectors */
13018 vectors = phba->cfg_irq_chann;
13019
13020 if (phba->irq_chann_mode != NORMAL_MODE)
13021 aff_mask = &phba->sli4_hba.irq_aff_mask;
13022
13023 if (aff_mask) {
13024 cpu_cnt = cpumask_weight(aff_mask);
13025 vectors = min(phba->cfg_irq_chann, cpu_cnt);
13026
13027 /* cpu: iterates over aff_mask including offline or online
13028 * cpu_select: iterates over online aff_mask to set affinity
13029 */
13030 cpu = cpumask_first(aff_mask);
13031 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13032 } else {
13033 flags |= PCI_IRQ_AFFINITY;
13034 }
13035
13036 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
13037 if (rc < 0) {
13038 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13039 "0484 PCI enable MSI-X failed (%d)\n", rc);
13040 goto vec_fail_out;
13041 }
13042 vectors = rc;
13043
13044 /* Assign MSI-X vectors to interrupt handlers */
13045 for (index = 0; index < vectors; index++) {
13046 eqhdl = lpfc_get_eq_hdl(index);
13047 name = eqhdl->handler_name;
13048 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
13049 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
13050 LPFC_DRIVER_HANDLER_NAME"%d", index);
13051
13052 eqhdl->idx = index;
13053 rc = pci_irq_vector(phba->pcidev, index);
13054 if (rc < 0) {
13055 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13056 "0489 MSI-X fast-path (%d) "
13057 "pci_irq_vec failed (%d)\n", index, rc);
13058 goto cfg_fail_out;
13059 }
13060 eqhdl->irq = rc;
13061
13062 rc = request_irq(eqhdl->irq, &lpfc_sli4_hba_intr_handler, 0,
13063 name, eqhdl);
13064 if (rc) {
13065 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13066 "0486 MSI-X fast-path (%d) "
13067 "request_irq failed (%d)\n", index, rc);
13068 goto cfg_fail_out;
13069 }
13070
13071 if (aff_mask) {
13072 /* If found a neighboring online cpu, set affinity */
13073 if (cpu_select < nr_cpu_ids)
13074 lpfc_irq_set_aff(eqhdl, cpu_select);
13075
13076 /* Assign EQ to cpu_map */
13077 lpfc_assign_eq_map_info(phba, index,
13078 LPFC_CPU_FIRST_IRQ,
13079 cpu);
13080
13081 /* Iterate to next offline or online cpu in aff_mask */
13082 cpu = cpumask_next(cpu, aff_mask);
13083
13084 /* Find next online cpu in aff_mask to set affinity */
13085 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13086 } else if (vectors == 1) {
13087 cpu = cpumask_first(cpu_present_mask);
13088 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
13089 cpu);
13090 } else {
13091 maskp = pci_irq_get_affinity(phba->pcidev, index);
13092
13093 /* Loop through all CPUs associated with vector index */
13094 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
13095 cpup = &phba->sli4_hba.cpu_map[cpu];
13096
13097 /* If this is the first CPU thats assigned to
13098 * this vector, set LPFC_CPU_FIRST_IRQ.
13099 *
13100 * With certain platforms its possible that irq
13101 * vectors are affinitized to all the cpu's.
13102 * This can result in each cpu_map.eq to be set
13103 * to the last vector, resulting in overwrite
13104 * of all the previous cpu_map.eq. Ensure that
13105 * each vector receives a place in cpu_map.
13106 * Later call to lpfc_cpu_affinity_check will
13107 * ensure we are nicely balanced out.
13108 */
13109 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
13110 continue;
13111 lpfc_assign_eq_map_info(phba, index,
13112 LPFC_CPU_FIRST_IRQ,
13113 cpu);
13114 break;
13115 }
13116 }
13117 }
13118
13119 if (vectors != phba->cfg_irq_chann) {
13120 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13121 "3238 Reducing IO channels to match number of "
13122 "MSI-X vectors, requested %d got %d\n",
13123 phba->cfg_irq_chann, vectors);
13124 if (phba->cfg_irq_chann > vectors)
13125 phba->cfg_irq_chann = vectors;
13126 }
13127
13128 return rc;
13129
13130 cfg_fail_out:
13131 /* free the irq already requested */
13132 for (--index; index >= 0; index--) {
13133 eqhdl = lpfc_get_eq_hdl(index);
13134 lpfc_irq_clear_aff(eqhdl);
13135 free_irq(eqhdl->irq, eqhdl);
13136 }
13137
13138 /* Unconfigure MSI-X capability structure */
13139 pci_free_irq_vectors(phba->pcidev);
13140
13141 vec_fail_out:
13142 return rc;
13143 }
13144
13145 /**
13146 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
13147 * @phba: pointer to lpfc hba data structure.
13148 *
13149 * This routine is invoked to enable the MSI interrupt mode to device with
13150 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
13151 * called to enable the MSI vector. The device driver is responsible for
13152 * calling the request_irq() to register MSI vector with a interrupt the
13153 * handler, which is done in this function.
13154 *
13155 * Return codes
13156 * 0 - successful
13157 * other values - error
13158 **/
13159 static int
lpfc_sli4_enable_msi(struct lpfc_hba * phba)13160 lpfc_sli4_enable_msi(struct lpfc_hba *phba)
13161 {
13162 int rc, index;
13163 unsigned int cpu;
13164 struct lpfc_hba_eq_hdl *eqhdl;
13165
13166 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
13167 PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
13168 if (rc > 0)
13169 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13170 "0487 PCI enable MSI mode success.\n");
13171 else {
13172 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13173 "0488 PCI enable MSI mode failed (%d)\n", rc);
13174 return rc ? rc : -1;
13175 }
13176
13177 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13178 0, LPFC_DRIVER_NAME, phba);
13179 if (rc) {
13180 pci_free_irq_vectors(phba->pcidev);
13181 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13182 "0490 MSI request_irq failed (%d)\n", rc);
13183 return rc;
13184 }
13185
13186 eqhdl = lpfc_get_eq_hdl(0);
13187 rc = pci_irq_vector(phba->pcidev, 0);
13188 if (rc < 0) {
13189 pci_free_irq_vectors(phba->pcidev);
13190 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13191 "0496 MSI pci_irq_vec failed (%d)\n", rc);
13192 return rc;
13193 }
13194 eqhdl->irq = rc;
13195
13196 cpu = cpumask_first(cpu_present_mask);
13197 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
13198
13199 for (index = 0; index < phba->cfg_irq_chann; index++) {
13200 eqhdl = lpfc_get_eq_hdl(index);
13201 eqhdl->idx = index;
13202 }
13203
13204 return 0;
13205 }
13206
13207 /**
13208 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
13209 * @phba: pointer to lpfc hba data structure.
13210 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
13211 *
13212 * This routine is invoked to enable device interrupt and associate driver's
13213 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
13214 * interface spec. Depends on the interrupt mode configured to the driver,
13215 * the driver will try to fallback from the configured interrupt mode to an
13216 * interrupt mode which is supported by the platform, kernel, and device in
13217 * the order of:
13218 * MSI-X -> MSI -> IRQ.
13219 *
13220 * Return codes
13221 * Interrupt mode (2, 1, 0) - successful
13222 * LPFC_INTR_ERROR - error
13223 **/
13224 static uint32_t
lpfc_sli4_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)13225 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
13226 {
13227 uint32_t intr_mode = LPFC_INTR_ERROR;
13228 int retval, idx;
13229
13230 if (cfg_mode == 2) {
13231 /* Preparation before conf_msi mbox cmd */
13232 retval = 0;
13233 if (!retval) {
13234 /* Now, try to enable MSI-X interrupt mode */
13235 retval = lpfc_sli4_enable_msix(phba);
13236 if (!retval) {
13237 /* Indicate initialization to MSI-X mode */
13238 phba->intr_type = MSIX;
13239 intr_mode = 2;
13240 }
13241 }
13242 }
13243
13244 /* Fallback to MSI if MSI-X initialization failed */
13245 if (cfg_mode >= 1 && phba->intr_type == NONE) {
13246 retval = lpfc_sli4_enable_msi(phba);
13247 if (!retval) {
13248 /* Indicate initialization to MSI mode */
13249 phba->intr_type = MSI;
13250 intr_mode = 1;
13251 }
13252 }
13253
13254 /* Fallback to INTx if both MSI-X/MSI initalization failed */
13255 if (phba->intr_type == NONE) {
13256 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13257 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
13258 if (!retval) {
13259 struct lpfc_hba_eq_hdl *eqhdl;
13260 unsigned int cpu;
13261
13262 /* Indicate initialization to INTx mode */
13263 phba->intr_type = INTx;
13264 intr_mode = 0;
13265
13266 eqhdl = lpfc_get_eq_hdl(0);
13267 retval = pci_irq_vector(phba->pcidev, 0);
13268 if (retval < 0) {
13269 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13270 "0502 INTR pci_irq_vec failed (%d)\n",
13271 retval);
13272 return LPFC_INTR_ERROR;
13273 }
13274 eqhdl->irq = retval;
13275
13276 cpu = cpumask_first(cpu_present_mask);
13277 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
13278 cpu);
13279 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
13280 eqhdl = lpfc_get_eq_hdl(idx);
13281 eqhdl->idx = idx;
13282 }
13283 }
13284 }
13285 return intr_mode;
13286 }
13287
13288 /**
13289 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
13290 * @phba: pointer to lpfc hba data structure.
13291 *
13292 * This routine is invoked to disable device interrupt and disassociate
13293 * the driver's interrupt handler(s) from interrupt vector(s) to device
13294 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
13295 * will release the interrupt vector(s) for the message signaled interrupt.
13296 **/
13297 static void
lpfc_sli4_disable_intr(struct lpfc_hba * phba)13298 lpfc_sli4_disable_intr(struct lpfc_hba *phba)
13299 {
13300 /* Disable the currently initialized interrupt mode */
13301 if (phba->intr_type == MSIX) {
13302 int index;
13303 struct lpfc_hba_eq_hdl *eqhdl;
13304
13305 /* Free up MSI-X multi-message vectors */
13306 for (index = 0; index < phba->cfg_irq_chann; index++) {
13307 eqhdl = lpfc_get_eq_hdl(index);
13308 lpfc_irq_clear_aff(eqhdl);
13309 free_irq(eqhdl->irq, eqhdl);
13310 }
13311 } else {
13312 free_irq(phba->pcidev->irq, phba);
13313 }
13314
13315 pci_free_irq_vectors(phba->pcidev);
13316
13317 /* Reset interrupt management states */
13318 phba->intr_type = NONE;
13319 phba->sli.slistat.sli_intr = 0;
13320 }
13321
13322 /**
13323 * lpfc_unset_hba - Unset SLI3 hba device initialization
13324 * @phba: pointer to lpfc hba data structure.
13325 *
13326 * This routine is invoked to unset the HBA device initialization steps to
13327 * a device with SLI-3 interface spec.
13328 **/
13329 static void
lpfc_unset_hba(struct lpfc_hba * phba)13330 lpfc_unset_hba(struct lpfc_hba *phba)
13331 {
13332 struct lpfc_vport *vport = phba->pport;
13333 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
13334
13335 spin_lock_irq(shost->host_lock);
13336 vport->load_flag |= FC_UNLOADING;
13337 spin_unlock_irq(shost->host_lock);
13338
13339 kfree(phba->vpi_bmask);
13340 kfree(phba->vpi_ids);
13341
13342 lpfc_stop_hba_timers(phba);
13343
13344 phba->pport->work_port_events = 0;
13345
13346 lpfc_sli_hba_down(phba);
13347
13348 lpfc_sli_brdrestart(phba);
13349
13350 lpfc_sli_disable_intr(phba);
13351
13352 return;
13353 }
13354
13355 /**
13356 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
13357 * @phba: Pointer to HBA context object.
13358 *
13359 * This function is called in the SLI4 code path to wait for completion
13360 * of device's XRIs exchange busy. It will check the XRI exchange busy
13361 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
13362 * that, it will check the XRI exchange busy on outstanding FCP and ELS
13363 * I/Os every 30 seconds, log error message, and wait forever. Only when
13364 * all XRI exchange busy complete, the driver unload shall proceed with
13365 * invoking the function reset ioctl mailbox command to the CNA and the
13366 * the rest of the driver unload resource release.
13367 **/
13368 static void
lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba * phba)13369 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
13370 {
13371 struct lpfc_sli4_hdw_queue *qp;
13372 int idx, ccnt;
13373 int wait_time = 0;
13374 int io_xri_cmpl = 1;
13375 int nvmet_xri_cmpl = 1;
13376 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13377
13378 /* Driver just aborted IOs during the hba_unset process. Pause
13379 * here to give the HBA time to complete the IO and get entries
13380 * into the abts lists.
13381 */
13382 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
13383
13384 /* Wait for NVME pending IO to flush back to transport. */
13385 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13386 lpfc_nvme_wait_for_io_drain(phba);
13387
13388 ccnt = 0;
13389 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13390 qp = &phba->sli4_hba.hdwq[idx];
13391 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
13392 if (!io_xri_cmpl) /* if list is NOT empty */
13393 ccnt++;
13394 }
13395 if (ccnt)
13396 io_xri_cmpl = 0;
13397
13398 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13399 nvmet_xri_cmpl =
13400 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13401 }
13402
13403 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
13404 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
13405 if (!nvmet_xri_cmpl)
13406 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13407 "6424 NVMET XRI exchange busy "
13408 "wait time: %d seconds.\n",
13409 wait_time/1000);
13410 if (!io_xri_cmpl)
13411 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13412 "6100 IO XRI exchange busy "
13413 "wait time: %d seconds.\n",
13414 wait_time/1000);
13415 if (!els_xri_cmpl)
13416 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13417 "2878 ELS XRI exchange busy "
13418 "wait time: %d seconds.\n",
13419 wait_time/1000);
13420 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
13421 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
13422 } else {
13423 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
13424 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
13425 }
13426
13427 ccnt = 0;
13428 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13429 qp = &phba->sli4_hba.hdwq[idx];
13430 io_xri_cmpl = list_empty(
13431 &qp->lpfc_abts_io_buf_list);
13432 if (!io_xri_cmpl) /* if list is NOT empty */
13433 ccnt++;
13434 }
13435 if (ccnt)
13436 io_xri_cmpl = 0;
13437
13438 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13439 nvmet_xri_cmpl = list_empty(
13440 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13441 }
13442 els_xri_cmpl =
13443 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13444
13445 }
13446 }
13447
13448 /**
13449 * lpfc_sli4_hba_unset - Unset the fcoe hba
13450 * @phba: Pointer to HBA context object.
13451 *
13452 * This function is called in the SLI4 code path to reset the HBA's FCoE
13453 * function. The caller is not required to hold any lock. This routine
13454 * issues PCI function reset mailbox command to reset the FCoE function.
13455 * At the end of the function, it calls lpfc_hba_down_post function to
13456 * free any pending commands.
13457 **/
13458 static void
lpfc_sli4_hba_unset(struct lpfc_hba * phba)13459 lpfc_sli4_hba_unset(struct lpfc_hba *phba)
13460 {
13461 int wait_cnt = 0;
13462 LPFC_MBOXQ_t *mboxq;
13463 struct pci_dev *pdev = phba->pcidev;
13464
13465 lpfc_stop_hba_timers(phba);
13466 hrtimer_cancel(&phba->cmf_timer);
13467
13468 if (phba->pport)
13469 phba->sli4_hba.intr_enable = 0;
13470
13471 /*
13472 * Gracefully wait out the potential current outstanding asynchronous
13473 * mailbox command.
13474 */
13475
13476 /* First, block any pending async mailbox command from posted */
13477 spin_lock_irq(&phba->hbalock);
13478 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
13479 spin_unlock_irq(&phba->hbalock);
13480 /* Now, trying to wait it out if we can */
13481 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13482 msleep(10);
13483 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
13484 break;
13485 }
13486 /* Forcefully release the outstanding mailbox command if timed out */
13487 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13488 spin_lock_irq(&phba->hbalock);
13489 mboxq = phba->sli.mbox_active;
13490 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
13491 __lpfc_mbox_cmpl_put(phba, mboxq);
13492 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13493 phba->sli.mbox_active = NULL;
13494 spin_unlock_irq(&phba->hbalock);
13495 }
13496
13497 /* Abort all iocbs associated with the hba */
13498 lpfc_sli_hba_iocb_abort(phba);
13499
13500 if (!pci_channel_offline(phba->pcidev))
13501 /* Wait for completion of device XRI exchange busy */
13502 lpfc_sli4_xri_exchange_busy_wait(phba);
13503
13504 /* per-phba callback de-registration for hotplug event */
13505 if (phba->pport)
13506 lpfc_cpuhp_remove(phba);
13507
13508 /* Disable PCI subsystem interrupt */
13509 lpfc_sli4_disable_intr(phba);
13510
13511 /* Disable SR-IOV if enabled */
13512 if (phba->cfg_sriov_nr_virtfn)
13513 pci_disable_sriov(pdev);
13514
13515 /* Stop kthread signal shall trigger work_done one more time */
13516 kthread_stop(phba->worker_thread);
13517
13518 /* Disable FW logging to host memory */
13519 lpfc_ras_stop_fwlog(phba);
13520
13521 /* Reset SLI4 HBA FCoE function */
13522 lpfc_pci_function_reset(phba);
13523
13524 /* release all queue allocated resources. */
13525 lpfc_sli4_queue_destroy(phba);
13526
13527 /* Free RAS DMA memory */
13528 if (phba->ras_fwlog.ras_enabled)
13529 lpfc_sli4_ras_dma_free(phba);
13530
13531 /* Stop the SLI4 device port */
13532 if (phba->pport)
13533 phba->pport->work_port_events = 0;
13534 }
13535
13536 static uint32_t
lpfc_cgn_crc32(uint32_t crc,u8 byte)13537 lpfc_cgn_crc32(uint32_t crc, u8 byte)
13538 {
13539 uint32_t msb = 0;
13540 uint32_t bit;
13541
13542 for (bit = 0; bit < 8; bit++) {
13543 msb = (crc >> 31) & 1;
13544 crc <<= 1;
13545
13546 if (msb ^ (byte & 1)) {
13547 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER;
13548 crc |= 1;
13549 }
13550 byte >>= 1;
13551 }
13552 return crc;
13553 }
13554
13555 static uint32_t
lpfc_cgn_reverse_bits(uint32_t wd)13556 lpfc_cgn_reverse_bits(uint32_t wd)
13557 {
13558 uint32_t result = 0;
13559 uint32_t i;
13560
13561 for (i = 0; i < 32; i++) {
13562 result <<= 1;
13563 result |= (1 & (wd >> i));
13564 }
13565 return result;
13566 }
13567
13568 /*
13569 * The routine corresponds with the algorithm the HBA firmware
13570 * uses to validate the data integrity.
13571 */
13572 uint32_t
lpfc_cgn_calc_crc32(void * ptr,uint32_t byteLen,uint32_t crc)13573 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc)
13574 {
13575 uint32_t i;
13576 uint32_t result;
13577 uint8_t *data = (uint8_t *)ptr;
13578
13579 for (i = 0; i < byteLen; ++i)
13580 crc = lpfc_cgn_crc32(crc, data[i]);
13581
13582 result = ~lpfc_cgn_reverse_bits(crc);
13583 return result;
13584 }
13585
13586 void
lpfc_init_congestion_buf(struct lpfc_hba * phba)13587 lpfc_init_congestion_buf(struct lpfc_hba *phba)
13588 {
13589 struct lpfc_cgn_info *cp;
13590 struct timespec64 cmpl_time;
13591 struct tm broken;
13592 uint16_t size;
13593 uint32_t crc;
13594
13595 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13596 "6235 INIT Congestion Buffer %p\n", phba->cgn_i);
13597
13598 if (!phba->cgn_i)
13599 return;
13600 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13601
13602 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
13603 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
13604 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
13605 atomic_set(&phba->cgn_sync_warn_cnt, 0);
13606
13607 atomic_set(&phba->cgn_driver_evt_cnt, 0);
13608 atomic_set(&phba->cgn_latency_evt_cnt, 0);
13609 atomic64_set(&phba->cgn_latency_evt, 0);
13610 phba->cgn_evt_minute = 0;
13611 phba->hba_flag &= ~HBA_CGN_DAY_WRAP;
13612
13613 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat));
13614 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ);
13615 cp->cgn_info_version = LPFC_CGN_INFO_V3;
13616
13617 /* cgn parameters */
13618 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
13619 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
13620 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
13621 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
13622
13623 ktime_get_real_ts64(&cmpl_time);
13624 time64_to_tm(cmpl_time.tv_sec, 0, &broken);
13625
13626 cp->cgn_info_month = broken.tm_mon + 1;
13627 cp->cgn_info_day = broken.tm_mday;
13628 cp->cgn_info_year = broken.tm_year - 100; /* relative to 2000 */
13629 cp->cgn_info_hour = broken.tm_hour;
13630 cp->cgn_info_minute = broken.tm_min;
13631 cp->cgn_info_second = broken.tm_sec;
13632
13633 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
13634 "2643 CGNInfo Init: Start Time "
13635 "%d/%d/%d %d:%d:%d\n",
13636 cp->cgn_info_day, cp->cgn_info_month,
13637 cp->cgn_info_year, cp->cgn_info_hour,
13638 cp->cgn_info_minute, cp->cgn_info_second);
13639
13640 /* Fill in default LUN qdepth */
13641 if (phba->pport) {
13642 size = (uint16_t)(phba->pport->cfg_lun_queue_depth);
13643 cp->cgn_lunq = cpu_to_le16(size);
13644 }
13645
13646 /* last used Index initialized to 0xff already */
13647
13648 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13649 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13650 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13651 cp->cgn_info_crc = cpu_to_le32(crc);
13652
13653 phba->cgn_evt_timestamp = jiffies +
13654 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
13655 }
13656
13657 void
lpfc_init_congestion_stat(struct lpfc_hba * phba)13658 lpfc_init_congestion_stat(struct lpfc_hba *phba)
13659 {
13660 struct lpfc_cgn_info *cp;
13661 struct timespec64 cmpl_time;
13662 struct tm broken;
13663 uint32_t crc;
13664
13665 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13666 "6236 INIT Congestion Stat %p\n", phba->cgn_i);
13667
13668 if (!phba->cgn_i)
13669 return;
13670
13671 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13672 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat));
13673
13674 ktime_get_real_ts64(&cmpl_time);
13675 time64_to_tm(cmpl_time.tv_sec, 0, &broken);
13676
13677 cp->cgn_stat_month = broken.tm_mon + 1;
13678 cp->cgn_stat_day = broken.tm_mday;
13679 cp->cgn_stat_year = broken.tm_year - 100; /* relative to 2000 */
13680 cp->cgn_stat_hour = broken.tm_hour;
13681 cp->cgn_stat_minute = broken.tm_min;
13682
13683 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
13684 "2647 CGNstat Init: Start Time "
13685 "%d/%d/%d %d:%d\n",
13686 cp->cgn_stat_day, cp->cgn_stat_month,
13687 cp->cgn_stat_year, cp->cgn_stat_hour,
13688 cp->cgn_stat_minute);
13689
13690 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13691 cp->cgn_info_crc = cpu_to_le32(crc);
13692 }
13693
13694 /**
13695 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA
13696 * @phba: Pointer to hba context object.
13697 * @reg: flag to determine register or unregister.
13698 */
13699 static int
__lpfc_reg_congestion_buf(struct lpfc_hba * phba,int reg)13700 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg)
13701 {
13702 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf;
13703 union lpfc_sli4_cfg_shdr *shdr;
13704 uint32_t shdr_status, shdr_add_status;
13705 LPFC_MBOXQ_t *mboxq;
13706 int length, rc;
13707
13708 if (!phba->cgn_i)
13709 return -ENXIO;
13710
13711 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
13712 if (!mboxq) {
13713 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13714 "2641 REG_CONGESTION_BUF mbox allocation fail: "
13715 "HBA state x%x reg %d\n",
13716 phba->pport->port_state, reg);
13717 return -ENOMEM;
13718 }
13719
13720 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) -
13721 sizeof(struct lpfc_sli4_cfg_mhdr));
13722 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13723 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length,
13724 LPFC_SLI4_MBX_EMBED);
13725 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf;
13726 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1);
13727 if (reg > 0)
13728 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1);
13729 else
13730 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0);
13731 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info);
13732 reg_congestion_buf->addr_lo =
13733 putPaddrLow(phba->cgn_i->phys);
13734 reg_congestion_buf->addr_hi =
13735 putPaddrHigh(phba->cgn_i->phys);
13736
13737 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13738 shdr = (union lpfc_sli4_cfg_shdr *)
13739 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
13740 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
13741 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
13742 &shdr->response);
13743 mempool_free(mboxq, phba->mbox_mem_pool);
13744 if (shdr_status || shdr_add_status || rc) {
13745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13746 "2642 REG_CONGESTION_BUF mailbox "
13747 "failed with status x%x add_status x%x,"
13748 " mbx status x%x reg %d\n",
13749 shdr_status, shdr_add_status, rc, reg);
13750 return -ENXIO;
13751 }
13752 return 0;
13753 }
13754
13755 int
lpfc_unreg_congestion_buf(struct lpfc_hba * phba)13756 lpfc_unreg_congestion_buf(struct lpfc_hba *phba)
13757 {
13758 lpfc_cmf_stop(phba);
13759 return __lpfc_reg_congestion_buf(phba, 0);
13760 }
13761
13762 int
lpfc_reg_congestion_buf(struct lpfc_hba * phba)13763 lpfc_reg_congestion_buf(struct lpfc_hba *phba)
13764 {
13765 return __lpfc_reg_congestion_buf(phba, 1);
13766 }
13767
13768 /**
13769 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
13770 * @phba: Pointer to HBA context object.
13771 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
13772 *
13773 * This function is called in the SLI4 code path to read the port's
13774 * sli4 capabilities.
13775 *
13776 * This function may be be called from any context that can block-wait
13777 * for the completion. The expectation is that this routine is called
13778 * typically from probe_one or from the online routine.
13779 **/
13780 int
lpfc_get_sli4_parameters(struct lpfc_hba * phba,LPFC_MBOXQ_t * mboxq)13781 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
13782 {
13783 int rc;
13784 struct lpfc_mqe *mqe = &mboxq->u.mqe;
13785 struct lpfc_pc_sli4_params *sli4_params;
13786 uint32_t mbox_tmo;
13787 int length;
13788 bool exp_wqcq_pages = true;
13789 struct lpfc_sli4_parameters *mbx_sli4_parameters;
13790
13791 /*
13792 * By default, the driver assumes the SLI4 port requires RPI
13793 * header postings. The SLI4_PARAM response will correct this
13794 * assumption.
13795 */
13796 phba->sli4_hba.rpi_hdrs_in_use = 1;
13797
13798 /* Read the port's SLI4 Config Parameters */
13799 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
13800 sizeof(struct lpfc_sli4_cfg_mhdr));
13801 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13802 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
13803 length, LPFC_SLI4_MBX_EMBED);
13804 if (!phba->sli4_hba.intr_enable)
13805 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13806 else {
13807 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
13808 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
13809 }
13810 if (unlikely(rc))
13811 return rc;
13812 sli4_params = &phba->sli4_hba.pc_sli4_params;
13813 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
13814 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
13815 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
13816 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
13817 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
13818 mbx_sli4_parameters);
13819 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
13820 mbx_sli4_parameters);
13821 if (bf_get(cfg_phwq, mbx_sli4_parameters))
13822 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
13823 else
13824 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
13825 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
13826 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
13827 mbx_sli4_parameters);
13828 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
13829 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
13830 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
13831 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
13832 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
13833 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
13834 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
13835 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
13836 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
13837 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
13838 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
13839 mbx_sli4_parameters);
13840 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
13841 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
13842 mbx_sli4_parameters);
13843 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13844 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13845
13846 /* Check for Extended Pre-Registered SGL support */
13847 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
13848
13849 /* Check for firmware nvme support */
13850 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
13851 bf_get(cfg_xib, mbx_sli4_parameters));
13852
13853 if (rc) {
13854 /* Save this to indicate the Firmware supports NVME */
13855 sli4_params->nvme = 1;
13856
13857 /* Firmware NVME support, check driver FC4 NVME support */
13858 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
13859 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13860 "6133 Disabling NVME support: "
13861 "FC4 type not supported: x%x\n",
13862 phba->cfg_enable_fc4_type);
13863 goto fcponly;
13864 }
13865 } else {
13866 /* No firmware NVME support, check driver FC4 NVME support */
13867 sli4_params->nvme = 0;
13868 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13869 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
13870 "6101 Disabling NVME support: Not "
13871 "supported by firmware (%d %d) x%x\n",
13872 bf_get(cfg_nvme, mbx_sli4_parameters),
13873 bf_get(cfg_xib, mbx_sli4_parameters),
13874 phba->cfg_enable_fc4_type);
13875 fcponly:
13876 phba->nvmet_support = 0;
13877 phba->cfg_nvmet_mrq = 0;
13878 phba->cfg_nvme_seg_cnt = 0;
13879
13880 /* If no FC4 type support, move to just SCSI support */
13881 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
13882 return -ENODEV;
13883 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
13884 }
13885 }
13886
13887 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
13888 * accommodate 512K and 1M IOs in a single nvme buf.
13889 */
13890 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13891 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
13892
13893 /* Enable embedded Payload BDE if support is indicated */
13894 if (bf_get(cfg_pbde, mbx_sli4_parameters))
13895 phba->cfg_enable_pbde = 1;
13896 else
13897 phba->cfg_enable_pbde = 0;
13898
13899 /*
13900 * To support Suppress Response feature we must satisfy 3 conditions.
13901 * lpfc_suppress_rsp module parameter must be set (default).
13902 * In SLI4-Parameters Descriptor:
13903 * Extended Inline Buffers (XIB) must be supported.
13904 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
13905 * (double negative).
13906 */
13907 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
13908 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
13909 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
13910 else
13911 phba->cfg_suppress_rsp = 0;
13912
13913 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
13914 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
13915
13916 /* Make sure that sge_supp_len can be handled by the driver */
13917 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
13918 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
13919
13920 /*
13921 * Check whether the adapter supports an embedded copy of the
13922 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
13923 * to use this option, 128-byte WQEs must be used.
13924 */
13925 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
13926 phba->fcp_embed_io = 1;
13927 else
13928 phba->fcp_embed_io = 0;
13929
13930 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13931 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
13932 bf_get(cfg_xib, mbx_sli4_parameters),
13933 phba->cfg_enable_pbde,
13934 phba->fcp_embed_io, sli4_params->nvme,
13935 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
13936
13937 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13938 LPFC_SLI_INTF_IF_TYPE_2) &&
13939 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
13940 LPFC_SLI_INTF_FAMILY_LNCR_A0))
13941 exp_wqcq_pages = false;
13942
13943 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
13944 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
13945 exp_wqcq_pages &&
13946 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
13947 phba->enab_exp_wqcq_pages = 1;
13948 else
13949 phba->enab_exp_wqcq_pages = 0;
13950 /*
13951 * Check if the SLI port supports MDS Diagnostics
13952 */
13953 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
13954 phba->mds_diags_support = 1;
13955 else
13956 phba->mds_diags_support = 0;
13957
13958 /*
13959 * Check if the SLI port supports NSLER
13960 */
13961 if (bf_get(cfg_nsler, mbx_sli4_parameters))
13962 phba->nsler = 1;
13963 else
13964 phba->nsler = 0;
13965
13966 return 0;
13967 }
13968
13969 /**
13970 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
13971 * @pdev: pointer to PCI device
13972 * @pid: pointer to PCI device identifier
13973 *
13974 * This routine is to be called to attach a device with SLI-3 interface spec
13975 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
13976 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
13977 * information of the device and driver to see if the driver state that it can
13978 * support this kind of device. If the match is successful, the driver core
13979 * invokes this routine. If this routine determines it can claim the HBA, it
13980 * does all the initialization that it needs to do to handle the HBA properly.
13981 *
13982 * Return code
13983 * 0 - driver can claim the device
13984 * negative value - driver can not claim the device
13985 **/
13986 static int
lpfc_pci_probe_one_s3(struct pci_dev * pdev,const struct pci_device_id * pid)13987 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
13988 {
13989 struct lpfc_hba *phba;
13990 struct lpfc_vport *vport = NULL;
13991 struct Scsi_Host *shost = NULL;
13992 int error;
13993 uint32_t cfg_mode, intr_mode;
13994
13995 /* Allocate memory for HBA structure */
13996 phba = lpfc_hba_alloc(pdev);
13997 if (!phba)
13998 return -ENOMEM;
13999
14000 /* Perform generic PCI device enabling operation */
14001 error = lpfc_enable_pci_dev(phba);
14002 if (error)
14003 goto out_free_phba;
14004
14005 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
14006 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
14007 if (error)
14008 goto out_disable_pci_dev;
14009
14010 /* Set up SLI-3 specific device PCI memory space */
14011 error = lpfc_sli_pci_mem_setup(phba);
14012 if (error) {
14013 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14014 "1402 Failed to set up pci memory space.\n");
14015 goto out_disable_pci_dev;
14016 }
14017
14018 /* Set up SLI-3 specific device driver resources */
14019 error = lpfc_sli_driver_resource_setup(phba);
14020 if (error) {
14021 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14022 "1404 Failed to set up driver resource.\n");
14023 goto out_unset_pci_mem_s3;
14024 }
14025
14026 /* Initialize and populate the iocb list per host */
14027
14028 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
14029 if (error) {
14030 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14031 "1405 Failed to initialize iocb list.\n");
14032 goto out_unset_driver_resource_s3;
14033 }
14034
14035 /* Set up common device driver resources */
14036 error = lpfc_setup_driver_resource_phase2(phba);
14037 if (error) {
14038 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14039 "1406 Failed to set up driver resource.\n");
14040 goto out_free_iocb_list;
14041 }
14042
14043 /* Get the default values for Model Name and Description */
14044 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14045
14046 /* Create SCSI host to the physical port */
14047 error = lpfc_create_shost(phba);
14048 if (error) {
14049 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14050 "1407 Failed to create scsi host.\n");
14051 goto out_unset_driver_resource;
14052 }
14053
14054 /* Configure sysfs attributes */
14055 vport = phba->pport;
14056 error = lpfc_alloc_sysfs_attr(vport);
14057 if (error) {
14058 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14059 "1476 Failed to allocate sysfs attr\n");
14060 goto out_destroy_shost;
14061 }
14062
14063 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14064 /* Now, trying to enable interrupt and bring up the device */
14065 cfg_mode = phba->cfg_use_msi;
14066 while (true) {
14067 /* Put device to a known state before enabling interrupt */
14068 lpfc_stop_port(phba);
14069 /* Configure and enable interrupt */
14070 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
14071 if (intr_mode == LPFC_INTR_ERROR) {
14072 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14073 "0431 Failed to enable interrupt.\n");
14074 error = -ENODEV;
14075 goto out_free_sysfs_attr;
14076 }
14077 /* SLI-3 HBA setup */
14078 if (lpfc_sli_hba_setup(phba)) {
14079 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14080 "1477 Failed to set up hba\n");
14081 error = -ENODEV;
14082 goto out_remove_device;
14083 }
14084
14085 /* Wait 50ms for the interrupts of previous mailbox commands */
14086 msleep(50);
14087 /* Check active interrupts on message signaled interrupts */
14088 if (intr_mode == 0 ||
14089 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
14090 /* Log the current active interrupt mode */
14091 phba->intr_mode = intr_mode;
14092 lpfc_log_intr_mode(phba, intr_mode);
14093 break;
14094 } else {
14095 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14096 "0447 Configure interrupt mode (%d) "
14097 "failed active interrupt test.\n",
14098 intr_mode);
14099 /* Disable the current interrupt mode */
14100 lpfc_sli_disable_intr(phba);
14101 /* Try next level of interrupt mode */
14102 cfg_mode = --intr_mode;
14103 }
14104 }
14105
14106 /* Perform post initialization setup */
14107 lpfc_post_init_setup(phba);
14108
14109 /* Check if there are static vports to be created. */
14110 lpfc_create_static_vport(phba);
14111
14112 return 0;
14113
14114 out_remove_device:
14115 lpfc_unset_hba(phba);
14116 out_free_sysfs_attr:
14117 lpfc_free_sysfs_attr(vport);
14118 out_destroy_shost:
14119 lpfc_destroy_shost(phba);
14120 out_unset_driver_resource:
14121 lpfc_unset_driver_resource_phase2(phba);
14122 out_free_iocb_list:
14123 lpfc_free_iocb_list(phba);
14124 out_unset_driver_resource_s3:
14125 lpfc_sli_driver_resource_unset(phba);
14126 out_unset_pci_mem_s3:
14127 lpfc_sli_pci_mem_unset(phba);
14128 out_disable_pci_dev:
14129 lpfc_disable_pci_dev(phba);
14130 if (shost)
14131 scsi_host_put(shost);
14132 out_free_phba:
14133 lpfc_hba_free(phba);
14134 return error;
14135 }
14136
14137 /**
14138 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
14139 * @pdev: pointer to PCI device
14140 *
14141 * This routine is to be called to disattach a device with SLI-3 interface
14142 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
14143 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14144 * device to be removed from the PCI subsystem properly.
14145 **/
14146 static void
lpfc_pci_remove_one_s3(struct pci_dev * pdev)14147 lpfc_pci_remove_one_s3(struct pci_dev *pdev)
14148 {
14149 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14150 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14151 struct lpfc_vport **vports;
14152 struct lpfc_hba *phba = vport->phba;
14153 int i;
14154
14155 spin_lock_irq(&phba->hbalock);
14156 vport->load_flag |= FC_UNLOADING;
14157 spin_unlock_irq(&phba->hbalock);
14158
14159 lpfc_free_sysfs_attr(vport);
14160
14161 /* Release all the vports against this physical port */
14162 vports = lpfc_create_vport_work_array(phba);
14163 if (vports != NULL)
14164 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14165 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14166 continue;
14167 fc_vport_terminate(vports[i]->fc_vport);
14168 }
14169 lpfc_destroy_vport_work_array(phba, vports);
14170
14171 /* Remove FC host with the physical port */
14172 fc_remove_host(shost);
14173 scsi_remove_host(shost);
14174
14175 /* Clean up all nodes, mailboxes and IOs. */
14176 lpfc_cleanup(vport);
14177
14178 /*
14179 * Bring down the SLI Layer. This step disable all interrupts,
14180 * clears the rings, discards all mailbox commands, and resets
14181 * the HBA.
14182 */
14183
14184 /* HBA interrupt will be disabled after this call */
14185 lpfc_sli_hba_down(phba);
14186 /* Stop kthread signal shall trigger work_done one more time */
14187 kthread_stop(phba->worker_thread);
14188 /* Final cleanup of txcmplq and reset the HBA */
14189 lpfc_sli_brdrestart(phba);
14190
14191 kfree(phba->vpi_bmask);
14192 kfree(phba->vpi_ids);
14193
14194 lpfc_stop_hba_timers(phba);
14195 spin_lock_irq(&phba->port_list_lock);
14196 list_del_init(&vport->listentry);
14197 spin_unlock_irq(&phba->port_list_lock);
14198
14199 lpfc_debugfs_terminate(vport);
14200
14201 /* Disable SR-IOV if enabled */
14202 if (phba->cfg_sriov_nr_virtfn)
14203 pci_disable_sriov(pdev);
14204
14205 /* Disable interrupt */
14206 lpfc_sli_disable_intr(phba);
14207
14208 scsi_host_put(shost);
14209
14210 /*
14211 * Call scsi_free before mem_free since scsi bufs are released to their
14212 * corresponding pools here.
14213 */
14214 lpfc_scsi_free(phba);
14215 lpfc_free_iocb_list(phba);
14216
14217 lpfc_mem_free_all(phba);
14218
14219 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
14220 phba->hbqslimp.virt, phba->hbqslimp.phys);
14221
14222 /* Free resources associated with SLI2 interface */
14223 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
14224 phba->slim2p.virt, phba->slim2p.phys);
14225
14226 /* unmap adapter SLIM and Control Registers */
14227 iounmap(phba->ctrl_regs_memmap_p);
14228 iounmap(phba->slim_memmap_p);
14229
14230 lpfc_hba_free(phba);
14231
14232 pci_release_mem_regions(pdev);
14233 pci_disable_device(pdev);
14234 }
14235
14236 /**
14237 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
14238 * @dev_d: pointer to device
14239 *
14240 * This routine is to be called from the kernel's PCI subsystem to support
14241 * system Power Management (PM) to device with SLI-3 interface spec. When
14242 * PM invokes this method, it quiesces the device by stopping the driver's
14243 * worker thread for the device, turning off device's interrupt and DMA,
14244 * and bring the device offline. Note that as the driver implements the
14245 * minimum PM requirements to a power-aware driver's PM support for the
14246 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
14247 * to the suspend() method call will be treated as SUSPEND and the driver will
14248 * fully reinitialize its device during resume() method call, the driver will
14249 * set device to PCI_D3hot state in PCI config space instead of setting it
14250 * according to the @msg provided by the PM.
14251 *
14252 * Return code
14253 * 0 - driver suspended the device
14254 * Error otherwise
14255 **/
14256 static int __maybe_unused
lpfc_pci_suspend_one_s3(struct device * dev_d)14257 lpfc_pci_suspend_one_s3(struct device *dev_d)
14258 {
14259 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14260 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14261
14262 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14263 "0473 PCI device Power Management suspend.\n");
14264
14265 /* Bring down the device */
14266 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14267 lpfc_offline(phba);
14268 kthread_stop(phba->worker_thread);
14269
14270 /* Disable interrupt from device */
14271 lpfc_sli_disable_intr(phba);
14272
14273 return 0;
14274 }
14275
14276 /**
14277 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
14278 * @dev_d: pointer to device
14279 *
14280 * This routine is to be called from the kernel's PCI subsystem to support
14281 * system Power Management (PM) to device with SLI-3 interface spec. When PM
14282 * invokes this method, it restores the device's PCI config space state and
14283 * fully reinitializes the device and brings it online. Note that as the
14284 * driver implements the minimum PM requirements to a power-aware driver's
14285 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
14286 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
14287 * driver will fully reinitialize its device during resume() method call,
14288 * the device will be set to PCI_D0 directly in PCI config space before
14289 * restoring the state.
14290 *
14291 * Return code
14292 * 0 - driver suspended the device
14293 * Error otherwise
14294 **/
14295 static int __maybe_unused
lpfc_pci_resume_one_s3(struct device * dev_d)14296 lpfc_pci_resume_one_s3(struct device *dev_d)
14297 {
14298 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14299 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14300 uint32_t intr_mode;
14301 int error;
14302
14303 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14304 "0452 PCI device Power Management resume.\n");
14305
14306 /* Startup the kernel thread for this host adapter. */
14307 phba->worker_thread = kthread_run(lpfc_do_work, phba,
14308 "lpfc_worker_%d", phba->brd_no);
14309 if (IS_ERR(phba->worker_thread)) {
14310 error = PTR_ERR(phba->worker_thread);
14311 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14312 "0434 PM resume failed to start worker "
14313 "thread: error=x%x.\n", error);
14314 return error;
14315 }
14316
14317 /* Init cpu_map array */
14318 lpfc_cpu_map_array_init(phba);
14319 /* Init hba_eq_hdl array */
14320 lpfc_hba_eq_hdl_array_init(phba);
14321 /* Configure and enable interrupt */
14322 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14323 if (intr_mode == LPFC_INTR_ERROR) {
14324 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14325 "0430 PM resume Failed to enable interrupt\n");
14326 return -EIO;
14327 } else
14328 phba->intr_mode = intr_mode;
14329
14330 /* Restart HBA and bring it online */
14331 lpfc_sli_brdrestart(phba);
14332 lpfc_online(phba);
14333
14334 /* Log the current active interrupt mode */
14335 lpfc_log_intr_mode(phba, phba->intr_mode);
14336
14337 return 0;
14338 }
14339
14340 /**
14341 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
14342 * @phba: pointer to lpfc hba data structure.
14343 *
14344 * This routine is called to prepare the SLI3 device for PCI slot recover. It
14345 * aborts all the outstanding SCSI I/Os to the pci device.
14346 **/
14347 static void
lpfc_sli_prep_dev_for_recover(struct lpfc_hba * phba)14348 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
14349 {
14350 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14351 "2723 PCI channel I/O abort preparing for recovery\n");
14352
14353 /*
14354 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
14355 * and let the SCSI mid-layer to retry them to recover.
14356 */
14357 lpfc_sli_abort_fcp_rings(phba);
14358 }
14359
14360 /**
14361 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
14362 * @phba: pointer to lpfc hba data structure.
14363 *
14364 * This routine is called to prepare the SLI3 device for PCI slot reset. It
14365 * disables the device interrupt and pci device, and aborts the internal FCP
14366 * pending I/Os.
14367 **/
14368 static void
lpfc_sli_prep_dev_for_reset(struct lpfc_hba * phba)14369 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
14370 {
14371 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14372 "2710 PCI channel disable preparing for reset\n");
14373
14374 /* Block any management I/Os to the device */
14375 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
14376
14377 /* Block all SCSI devices' I/Os on the host */
14378 lpfc_scsi_dev_block(phba);
14379
14380 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
14381 lpfc_sli_flush_io_rings(phba);
14382
14383 /* stop all timers */
14384 lpfc_stop_hba_timers(phba);
14385
14386 /* Disable interrupt and pci device */
14387 lpfc_sli_disable_intr(phba);
14388 pci_disable_device(phba->pcidev);
14389 }
14390
14391 /**
14392 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
14393 * @phba: pointer to lpfc hba data structure.
14394 *
14395 * This routine is called to prepare the SLI3 device for PCI slot permanently
14396 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
14397 * pending I/Os.
14398 **/
14399 static void
lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba * phba)14400 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
14401 {
14402 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14403 "2711 PCI channel permanent disable for failure\n");
14404 /* Block all SCSI devices' I/Os on the host */
14405 lpfc_scsi_dev_block(phba);
14406 lpfc_sli4_prep_dev_for_reset(phba);
14407
14408 /* stop all timers */
14409 lpfc_stop_hba_timers(phba);
14410
14411 /* Clean up all driver's outstanding SCSI I/Os */
14412 lpfc_sli_flush_io_rings(phba);
14413 }
14414
14415 /**
14416 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
14417 * @pdev: pointer to PCI device.
14418 * @state: the current PCI connection state.
14419 *
14420 * This routine is called from the PCI subsystem for I/O error handling to
14421 * device with SLI-3 interface spec. This function is called by the PCI
14422 * subsystem after a PCI bus error affecting this device has been detected.
14423 * When this function is invoked, it will need to stop all the I/Os and
14424 * interrupt(s) to the device. Once that is done, it will return
14425 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
14426 * as desired.
14427 *
14428 * Return codes
14429 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
14430 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
14431 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14432 **/
14433 static pci_ers_result_t
lpfc_io_error_detected_s3(struct pci_dev * pdev,pci_channel_state_t state)14434 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
14435 {
14436 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14437 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14438
14439 switch (state) {
14440 case pci_channel_io_normal:
14441 /* Non-fatal error, prepare for recovery */
14442 lpfc_sli_prep_dev_for_recover(phba);
14443 return PCI_ERS_RESULT_CAN_RECOVER;
14444 case pci_channel_io_frozen:
14445 /* Fatal error, prepare for slot reset */
14446 lpfc_sli_prep_dev_for_reset(phba);
14447 return PCI_ERS_RESULT_NEED_RESET;
14448 case pci_channel_io_perm_failure:
14449 /* Permanent failure, prepare for device down */
14450 lpfc_sli_prep_dev_for_perm_failure(phba);
14451 return PCI_ERS_RESULT_DISCONNECT;
14452 default:
14453 /* Unknown state, prepare and request slot reset */
14454 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14455 "0472 Unknown PCI error state: x%x\n", state);
14456 lpfc_sli_prep_dev_for_reset(phba);
14457 return PCI_ERS_RESULT_NEED_RESET;
14458 }
14459 }
14460
14461 /**
14462 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
14463 * @pdev: pointer to PCI device.
14464 *
14465 * This routine is called from the PCI subsystem for error handling to
14466 * device with SLI-3 interface spec. This is called after PCI bus has been
14467 * reset to restart the PCI card from scratch, as if from a cold-boot.
14468 * During the PCI subsystem error recovery, after driver returns
14469 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
14470 * recovery and then call this routine before calling the .resume method
14471 * to recover the device. This function will initialize the HBA device,
14472 * enable the interrupt, but it will just put the HBA to offline state
14473 * without passing any I/O traffic.
14474 *
14475 * Return codes
14476 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
14477 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14478 */
14479 static pci_ers_result_t
lpfc_io_slot_reset_s3(struct pci_dev * pdev)14480 lpfc_io_slot_reset_s3(struct pci_dev *pdev)
14481 {
14482 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14483 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14484 struct lpfc_sli *psli = &phba->sli;
14485 uint32_t intr_mode;
14486
14487 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
14488 if (pci_enable_device_mem(pdev)) {
14489 printk(KERN_ERR "lpfc: Cannot re-enable "
14490 "PCI device after reset.\n");
14491 return PCI_ERS_RESULT_DISCONNECT;
14492 }
14493
14494 pci_restore_state(pdev);
14495
14496 /*
14497 * As the new kernel behavior of pci_restore_state() API call clears
14498 * device saved_state flag, need to save the restored state again.
14499 */
14500 pci_save_state(pdev);
14501
14502 if (pdev->is_busmaster)
14503 pci_set_master(pdev);
14504
14505 spin_lock_irq(&phba->hbalock);
14506 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
14507 spin_unlock_irq(&phba->hbalock);
14508
14509 /* Configure and enable interrupt */
14510 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14511 if (intr_mode == LPFC_INTR_ERROR) {
14512 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14513 "0427 Cannot re-enable interrupt after "
14514 "slot reset.\n");
14515 return PCI_ERS_RESULT_DISCONNECT;
14516 } else
14517 phba->intr_mode = intr_mode;
14518
14519 /* Take device offline, it will perform cleanup */
14520 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14521 lpfc_offline(phba);
14522 lpfc_sli_brdrestart(phba);
14523
14524 /* Log the current active interrupt mode */
14525 lpfc_log_intr_mode(phba, phba->intr_mode);
14526
14527 return PCI_ERS_RESULT_RECOVERED;
14528 }
14529
14530 /**
14531 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
14532 * @pdev: pointer to PCI device
14533 *
14534 * This routine is called from the PCI subsystem for error handling to device
14535 * with SLI-3 interface spec. It is called when kernel error recovery tells
14536 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
14537 * error recovery. After this call, traffic can start to flow from this device
14538 * again.
14539 */
14540 static void
lpfc_io_resume_s3(struct pci_dev * pdev)14541 lpfc_io_resume_s3(struct pci_dev *pdev)
14542 {
14543 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14544 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14545
14546 /* Bring device online, it will be no-op for non-fatal error resume */
14547 lpfc_online(phba);
14548 }
14549
14550 /**
14551 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
14552 * @phba: pointer to lpfc hba data structure.
14553 *
14554 * returns the number of ELS/CT IOCBs to reserve
14555 **/
14556 int
lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba * phba)14557 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
14558 {
14559 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14560
14561 if (phba->sli_rev == LPFC_SLI_REV4) {
14562 if (max_xri <= 100)
14563 return 10;
14564 else if (max_xri <= 256)
14565 return 25;
14566 else if (max_xri <= 512)
14567 return 50;
14568 else if (max_xri <= 1024)
14569 return 100;
14570 else if (max_xri <= 1536)
14571 return 150;
14572 else if (max_xri <= 2048)
14573 return 200;
14574 else
14575 return 250;
14576 } else
14577 return 0;
14578 }
14579
14580 /**
14581 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
14582 * @phba: pointer to lpfc hba data structure.
14583 *
14584 * returns the number of ELS/CT + NVMET IOCBs to reserve
14585 **/
14586 int
lpfc_sli4_get_iocb_cnt(struct lpfc_hba * phba)14587 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
14588 {
14589 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
14590
14591 if (phba->nvmet_support)
14592 max_xri += LPFC_NVMET_BUF_POST;
14593 return max_xri;
14594 }
14595
14596
14597 static int
lpfc_log_write_firmware_error(struct lpfc_hba * phba,uint32_t offset,uint32_t magic_number,uint32_t ftype,uint32_t fid,uint32_t fsize,const struct firmware * fw)14598 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
14599 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
14600 const struct firmware *fw)
14601 {
14602 int rc;
14603 u8 sli_family;
14604
14605 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14606 /* Three cases: (1) FW was not supported on the detected adapter.
14607 * (2) FW update has been locked out administratively.
14608 * (3) Some other error during FW update.
14609 * In each case, an unmaskable message is written to the console
14610 * for admin diagnosis.
14611 */
14612 if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
14613 (sli_family == LPFC_SLI_INTF_FAMILY_G6 &&
14614 magic_number != MAGIC_NUMBER_G6) ||
14615 (sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
14616 magic_number != MAGIC_NUMBER_G7) ||
14617 (sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
14618 magic_number != MAGIC_NUMBER_G7P)) {
14619 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14620 "3030 This firmware version is not supported on"
14621 " this HBA model. Device:%x Magic:%x Type:%x "
14622 "ID:%x Size %d %zd\n",
14623 phba->pcidev->device, magic_number, ftype, fid,
14624 fsize, fw->size);
14625 rc = -EINVAL;
14626 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
14627 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14628 "3021 Firmware downloads have been prohibited "
14629 "by a system configuration setting on "
14630 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14631 "%zd\n",
14632 phba->pcidev->device, magic_number, ftype, fid,
14633 fsize, fw->size);
14634 rc = -EACCES;
14635 } else {
14636 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14637 "3022 FW Download failed. Add Status x%x "
14638 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14639 "%zd\n",
14640 offset, phba->pcidev->device, magic_number,
14641 ftype, fid, fsize, fw->size);
14642 rc = -EIO;
14643 }
14644 return rc;
14645 }
14646
14647 /**
14648 * lpfc_write_firmware - attempt to write a firmware image to the port
14649 * @fw: pointer to firmware image returned from request_firmware.
14650 * @context: pointer to firmware image returned from request_firmware.
14651 *
14652 **/
14653 static void
lpfc_write_firmware(const struct firmware * fw,void * context)14654 lpfc_write_firmware(const struct firmware *fw, void *context)
14655 {
14656 struct lpfc_hba *phba = (struct lpfc_hba *)context;
14657 char fwrev[FW_REV_STR_SIZE];
14658 struct lpfc_grp_hdr *image;
14659 struct list_head dma_buffer_list;
14660 int i, rc = 0;
14661 struct lpfc_dmabuf *dmabuf, *next;
14662 uint32_t offset = 0, temp_offset = 0;
14663 uint32_t magic_number, ftype, fid, fsize;
14664
14665 /* It can be null in no-wait mode, sanity check */
14666 if (!fw) {
14667 rc = -ENXIO;
14668 goto out;
14669 }
14670 image = (struct lpfc_grp_hdr *)fw->data;
14671
14672 magic_number = be32_to_cpu(image->magic_number);
14673 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
14674 fid = bf_get_be32(lpfc_grp_hdr_id, image);
14675 fsize = be32_to_cpu(image->size);
14676
14677 INIT_LIST_HEAD(&dma_buffer_list);
14678 lpfc_decode_firmware_rev(phba, fwrev, 1);
14679 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
14680 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14681 "3023 Updating Firmware, Current Version:%s "
14682 "New Version:%s\n",
14683 fwrev, image->revision);
14684 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
14685 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
14686 GFP_KERNEL);
14687 if (!dmabuf) {
14688 rc = -ENOMEM;
14689 goto release_out;
14690 }
14691 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14692 SLI4_PAGE_SIZE,
14693 &dmabuf->phys,
14694 GFP_KERNEL);
14695 if (!dmabuf->virt) {
14696 kfree(dmabuf);
14697 rc = -ENOMEM;
14698 goto release_out;
14699 }
14700 list_add_tail(&dmabuf->list, &dma_buffer_list);
14701 }
14702 while (offset < fw->size) {
14703 temp_offset = offset;
14704 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
14705 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
14706 memcpy(dmabuf->virt,
14707 fw->data + temp_offset,
14708 fw->size - temp_offset);
14709 temp_offset = fw->size;
14710 break;
14711 }
14712 memcpy(dmabuf->virt, fw->data + temp_offset,
14713 SLI4_PAGE_SIZE);
14714 temp_offset += SLI4_PAGE_SIZE;
14715 }
14716 rc = lpfc_wr_object(phba, &dma_buffer_list,
14717 (fw->size - offset), &offset);
14718 if (rc) {
14719 rc = lpfc_log_write_firmware_error(phba, offset,
14720 magic_number,
14721 ftype,
14722 fid,
14723 fsize,
14724 fw);
14725 goto release_out;
14726 }
14727 }
14728 rc = offset;
14729 } else
14730 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14731 "3029 Skipped Firmware update, Current "
14732 "Version:%s New Version:%s\n",
14733 fwrev, image->revision);
14734
14735 release_out:
14736 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
14737 list_del(&dmabuf->list);
14738 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
14739 dmabuf->virt, dmabuf->phys);
14740 kfree(dmabuf);
14741 }
14742 release_firmware(fw);
14743 out:
14744 if (rc < 0)
14745 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14746 "3062 Firmware update error, status %d.\n", rc);
14747 else
14748 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14749 "3024 Firmware update success: size %d.\n", rc);
14750 }
14751
14752 /**
14753 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
14754 * @phba: pointer to lpfc hba data structure.
14755 * @fw_upgrade: which firmware to update.
14756 *
14757 * This routine is called to perform Linux generic firmware upgrade on device
14758 * that supports such feature.
14759 **/
14760 int
lpfc_sli4_request_firmware_update(struct lpfc_hba * phba,uint8_t fw_upgrade)14761 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
14762 {
14763 uint8_t file_name[ELX_MODEL_NAME_SIZE];
14764 int ret;
14765 const struct firmware *fw;
14766
14767 /* Only supported on SLI4 interface type 2 for now */
14768 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
14769 LPFC_SLI_INTF_IF_TYPE_2)
14770 return -EPERM;
14771
14772 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
14773
14774 if (fw_upgrade == INT_FW_UPGRADE) {
14775 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
14776 file_name, &phba->pcidev->dev,
14777 GFP_KERNEL, (void *)phba,
14778 lpfc_write_firmware);
14779 } else if (fw_upgrade == RUN_FW_UPGRADE) {
14780 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
14781 if (!ret)
14782 lpfc_write_firmware(fw, (void *)phba);
14783 } else {
14784 ret = -EINVAL;
14785 }
14786
14787 return ret;
14788 }
14789
14790 /**
14791 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
14792 * @pdev: pointer to PCI device
14793 * @pid: pointer to PCI device identifier
14794 *
14795 * This routine is called from the kernel's PCI subsystem to device with
14796 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14797 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
14798 * information of the device and driver to see if the driver state that it
14799 * can support this kind of device. If the match is successful, the driver
14800 * core invokes this routine. If this routine determines it can claim the HBA,
14801 * it does all the initialization that it needs to do to handle the HBA
14802 * properly.
14803 *
14804 * Return code
14805 * 0 - driver can claim the device
14806 * negative value - driver can not claim the device
14807 **/
14808 static int
lpfc_pci_probe_one_s4(struct pci_dev * pdev,const struct pci_device_id * pid)14809 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
14810 {
14811 struct lpfc_hba *phba;
14812 struct lpfc_vport *vport = NULL;
14813 struct Scsi_Host *shost = NULL;
14814 int error;
14815 uint32_t cfg_mode, intr_mode;
14816
14817 /* Allocate memory for HBA structure */
14818 phba = lpfc_hba_alloc(pdev);
14819 if (!phba)
14820 return -ENOMEM;
14821
14822 INIT_LIST_HEAD(&phba->poll_list);
14823
14824 /* Perform generic PCI device enabling operation */
14825 error = lpfc_enable_pci_dev(phba);
14826 if (error)
14827 goto out_free_phba;
14828
14829 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
14830 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
14831 if (error)
14832 goto out_disable_pci_dev;
14833
14834 /* Set up SLI-4 specific device PCI memory space */
14835 error = lpfc_sli4_pci_mem_setup(phba);
14836 if (error) {
14837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14838 "1410 Failed to set up pci memory space.\n");
14839 goto out_disable_pci_dev;
14840 }
14841
14842 /* Set up SLI-4 Specific device driver resources */
14843 error = lpfc_sli4_driver_resource_setup(phba);
14844 if (error) {
14845 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14846 "1412 Failed to set up driver resource.\n");
14847 goto out_unset_pci_mem_s4;
14848 }
14849
14850 INIT_LIST_HEAD(&phba->active_rrq_list);
14851 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
14852
14853 /* Set up common device driver resources */
14854 error = lpfc_setup_driver_resource_phase2(phba);
14855 if (error) {
14856 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14857 "1414 Failed to set up driver resource.\n");
14858 goto out_unset_driver_resource_s4;
14859 }
14860
14861 /* Get the default values for Model Name and Description */
14862 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14863
14864 /* Now, trying to enable interrupt and bring up the device */
14865 cfg_mode = phba->cfg_use_msi;
14866
14867 /* Put device to a known state before enabling interrupt */
14868 phba->pport = NULL;
14869 lpfc_stop_port(phba);
14870
14871 /* Init cpu_map array */
14872 lpfc_cpu_map_array_init(phba);
14873
14874 /* Init hba_eq_hdl array */
14875 lpfc_hba_eq_hdl_array_init(phba);
14876
14877 /* Configure and enable interrupt */
14878 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
14879 if (intr_mode == LPFC_INTR_ERROR) {
14880 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14881 "0426 Failed to enable interrupt.\n");
14882 error = -ENODEV;
14883 goto out_unset_driver_resource;
14884 }
14885 /* Default to single EQ for non-MSI-X */
14886 if (phba->intr_type != MSIX) {
14887 phba->cfg_irq_chann = 1;
14888 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14889 if (phba->nvmet_support)
14890 phba->cfg_nvmet_mrq = 1;
14891 }
14892 }
14893 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
14894
14895 /* Create SCSI host to the physical port */
14896 error = lpfc_create_shost(phba);
14897 if (error) {
14898 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14899 "1415 Failed to create scsi host.\n");
14900 goto out_disable_intr;
14901 }
14902 vport = phba->pport;
14903 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14904
14905 /* Configure sysfs attributes */
14906 error = lpfc_alloc_sysfs_attr(vport);
14907 if (error) {
14908 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14909 "1416 Failed to allocate sysfs attr\n");
14910 goto out_destroy_shost;
14911 }
14912
14913 /* Set up SLI-4 HBA */
14914 if (lpfc_sli4_hba_setup(phba)) {
14915 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14916 "1421 Failed to set up hba\n");
14917 error = -ENODEV;
14918 goto out_free_sysfs_attr;
14919 }
14920
14921 /* Log the current active interrupt mode */
14922 phba->intr_mode = intr_mode;
14923 lpfc_log_intr_mode(phba, intr_mode);
14924
14925 /* Perform post initialization setup */
14926 lpfc_post_init_setup(phba);
14927
14928 /* NVME support in FW earlier in the driver load corrects the
14929 * FC4 type making a check for nvme_support unnecessary.
14930 */
14931 if (phba->nvmet_support == 0) {
14932 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14933 /* Create NVME binding with nvme_fc_transport. This
14934 * ensures the vport is initialized. If the localport
14935 * create fails, it should not unload the driver to
14936 * support field issues.
14937 */
14938 error = lpfc_nvme_create_localport(vport);
14939 if (error) {
14940 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14941 "6004 NVME registration "
14942 "failed, error x%x\n",
14943 error);
14944 }
14945 }
14946 }
14947
14948 /* check for firmware upgrade or downgrade */
14949 if (phba->cfg_request_firmware_upgrade)
14950 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
14951
14952 /* Check if there are static vports to be created. */
14953 lpfc_create_static_vport(phba);
14954
14955 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14956 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
14957
14958 return 0;
14959
14960 out_free_sysfs_attr:
14961 lpfc_free_sysfs_attr(vport);
14962 out_destroy_shost:
14963 lpfc_destroy_shost(phba);
14964 out_disable_intr:
14965 lpfc_sli4_disable_intr(phba);
14966 out_unset_driver_resource:
14967 lpfc_unset_driver_resource_phase2(phba);
14968 out_unset_driver_resource_s4:
14969 lpfc_sli4_driver_resource_unset(phba);
14970 out_unset_pci_mem_s4:
14971 lpfc_sli4_pci_mem_unset(phba);
14972 out_disable_pci_dev:
14973 lpfc_disable_pci_dev(phba);
14974 if (shost)
14975 scsi_host_put(shost);
14976 out_free_phba:
14977 lpfc_hba_free(phba);
14978 return error;
14979 }
14980
14981 /**
14982 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
14983 * @pdev: pointer to PCI device
14984 *
14985 * This routine is called from the kernel's PCI subsystem to device with
14986 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14987 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14988 * device to be removed from the PCI subsystem properly.
14989 **/
14990 static void
lpfc_pci_remove_one_s4(struct pci_dev * pdev)14991 lpfc_pci_remove_one_s4(struct pci_dev *pdev)
14992 {
14993 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14994 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14995 struct lpfc_vport **vports;
14996 struct lpfc_hba *phba = vport->phba;
14997 int i;
14998
14999 /* Mark the device unloading flag */
15000 spin_lock_irq(&phba->hbalock);
15001 vport->load_flag |= FC_UNLOADING;
15002 spin_unlock_irq(&phba->hbalock);
15003 if (phba->cgn_i)
15004 lpfc_unreg_congestion_buf(phba);
15005
15006 lpfc_free_sysfs_attr(vport);
15007
15008 /* Release all the vports against this physical port */
15009 vports = lpfc_create_vport_work_array(phba);
15010 if (vports != NULL)
15011 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
15012 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
15013 continue;
15014 fc_vport_terminate(vports[i]->fc_vport);
15015 }
15016 lpfc_destroy_vport_work_array(phba, vports);
15017
15018 /* Remove FC host with the physical port */
15019 fc_remove_host(shost);
15020 scsi_remove_host(shost);
15021
15022 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
15023 * localports are destroyed after to cleanup all transport memory.
15024 */
15025 lpfc_cleanup(vport);
15026 lpfc_nvmet_destroy_targetport(phba);
15027 lpfc_nvme_destroy_localport(vport);
15028
15029 /* De-allocate multi-XRI pools */
15030 if (phba->cfg_xri_rebalancing)
15031 lpfc_destroy_multixri_pools(phba);
15032
15033 /*
15034 * Bring down the SLI Layer. This step disables all interrupts,
15035 * clears the rings, discards all mailbox commands, and resets
15036 * the HBA FCoE function.
15037 */
15038 lpfc_debugfs_terminate(vport);
15039
15040 lpfc_stop_hba_timers(phba);
15041 spin_lock_irq(&phba->port_list_lock);
15042 list_del_init(&vport->listentry);
15043 spin_unlock_irq(&phba->port_list_lock);
15044
15045 /* Perform scsi free before driver resource_unset since scsi
15046 * buffers are released to their corresponding pools here.
15047 */
15048 lpfc_io_free(phba);
15049 lpfc_free_iocb_list(phba);
15050 lpfc_sli4_hba_unset(phba);
15051
15052 lpfc_unset_driver_resource_phase2(phba);
15053 lpfc_sli4_driver_resource_unset(phba);
15054
15055 /* Unmap adapter Control and Doorbell registers */
15056 lpfc_sli4_pci_mem_unset(phba);
15057
15058 /* Release PCI resources and disable device's PCI function */
15059 scsi_host_put(shost);
15060 lpfc_disable_pci_dev(phba);
15061
15062 /* Finally, free the driver's device data structure */
15063 lpfc_hba_free(phba);
15064
15065 return;
15066 }
15067
15068 /**
15069 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
15070 * @dev_d: pointer to device
15071 *
15072 * This routine is called from the kernel's PCI subsystem to support system
15073 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
15074 * this method, it quiesces the device by stopping the driver's worker
15075 * thread for the device, turning off device's interrupt and DMA, and bring
15076 * the device offline. Note that as the driver implements the minimum PM
15077 * requirements to a power-aware driver's PM support for suspend/resume -- all
15078 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
15079 * method call will be treated as SUSPEND and the driver will fully
15080 * reinitialize its device during resume() method call, the driver will set
15081 * device to PCI_D3hot state in PCI config space instead of setting it
15082 * according to the @msg provided by the PM.
15083 *
15084 * Return code
15085 * 0 - driver suspended the device
15086 * Error otherwise
15087 **/
15088 static int __maybe_unused
lpfc_pci_suspend_one_s4(struct device * dev_d)15089 lpfc_pci_suspend_one_s4(struct device *dev_d)
15090 {
15091 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15092 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15093
15094 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15095 "2843 PCI device Power Management suspend.\n");
15096
15097 /* Bring down the device */
15098 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
15099 lpfc_offline(phba);
15100 kthread_stop(phba->worker_thread);
15101
15102 /* Disable interrupt from device */
15103 lpfc_sli4_disable_intr(phba);
15104 lpfc_sli4_queue_destroy(phba);
15105
15106 return 0;
15107 }
15108
15109 /**
15110 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
15111 * @dev_d: pointer to device
15112 *
15113 * This routine is called from the kernel's PCI subsystem to support system
15114 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
15115 * this method, it restores the device's PCI config space state and fully
15116 * reinitializes the device and brings it online. Note that as the driver
15117 * implements the minimum PM requirements to a power-aware driver's PM for
15118 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
15119 * to the suspend() method call will be treated as SUSPEND and the driver
15120 * will fully reinitialize its device during resume() method call, the device
15121 * will be set to PCI_D0 directly in PCI config space before restoring the
15122 * state.
15123 *
15124 * Return code
15125 * 0 - driver suspended the device
15126 * Error otherwise
15127 **/
15128 static int __maybe_unused
lpfc_pci_resume_one_s4(struct device * dev_d)15129 lpfc_pci_resume_one_s4(struct device *dev_d)
15130 {
15131 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15132 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15133 uint32_t intr_mode;
15134 int error;
15135
15136 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15137 "0292 PCI device Power Management resume.\n");
15138
15139 /* Startup the kernel thread for this host adapter. */
15140 phba->worker_thread = kthread_run(lpfc_do_work, phba,
15141 "lpfc_worker_%d", phba->brd_no);
15142 if (IS_ERR(phba->worker_thread)) {
15143 error = PTR_ERR(phba->worker_thread);
15144 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15145 "0293 PM resume failed to start worker "
15146 "thread: error=x%x.\n", error);
15147 return error;
15148 }
15149
15150 /* Configure and enable interrupt */
15151 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15152 if (intr_mode == LPFC_INTR_ERROR) {
15153 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15154 "0294 PM resume Failed to enable interrupt\n");
15155 return -EIO;
15156 } else
15157 phba->intr_mode = intr_mode;
15158
15159 /* Restart HBA and bring it online */
15160 lpfc_sli_brdrestart(phba);
15161 lpfc_online(phba);
15162
15163 /* Log the current active interrupt mode */
15164 lpfc_log_intr_mode(phba, phba->intr_mode);
15165
15166 return 0;
15167 }
15168
15169 /**
15170 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
15171 * @phba: pointer to lpfc hba data structure.
15172 *
15173 * This routine is called to prepare the SLI4 device for PCI slot recover. It
15174 * aborts all the outstanding SCSI I/Os to the pci device.
15175 **/
15176 static void
lpfc_sli4_prep_dev_for_recover(struct lpfc_hba * phba)15177 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
15178 {
15179 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15180 "2828 PCI channel I/O abort preparing for recovery\n");
15181 /*
15182 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
15183 * and let the SCSI mid-layer to retry them to recover.
15184 */
15185 lpfc_sli_abort_fcp_rings(phba);
15186 }
15187
15188 /**
15189 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
15190 * @phba: pointer to lpfc hba data structure.
15191 *
15192 * This routine is called to prepare the SLI4 device for PCI slot reset. It
15193 * disables the device interrupt and pci device, and aborts the internal FCP
15194 * pending I/Os.
15195 **/
15196 static void
lpfc_sli4_prep_dev_for_reset(struct lpfc_hba * phba)15197 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
15198 {
15199 int offline = pci_channel_offline(phba->pcidev);
15200
15201 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15202 "2826 PCI channel disable preparing for reset offline"
15203 " %d\n", offline);
15204
15205 /* Block any management I/Os to the device */
15206 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
15207
15208
15209 /* HBA_PCI_ERR was set in io_error_detect */
15210 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
15211 /* Flush all driver's outstanding I/Os as we are to reset */
15212 lpfc_sli_flush_io_rings(phba);
15213 lpfc_offline(phba);
15214
15215 /* stop all timers */
15216 lpfc_stop_hba_timers(phba);
15217
15218 lpfc_sli4_queue_destroy(phba);
15219 /* Disable interrupt and pci device */
15220 lpfc_sli4_disable_intr(phba);
15221 pci_disable_device(phba->pcidev);
15222 }
15223
15224 /**
15225 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
15226 * @phba: pointer to lpfc hba data structure.
15227 *
15228 * This routine is called to prepare the SLI4 device for PCI slot permanently
15229 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
15230 * pending I/Os.
15231 **/
15232 static void
lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba * phba)15233 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
15234 {
15235 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15236 "2827 PCI channel permanent disable for failure\n");
15237
15238 /* Block all SCSI devices' I/Os on the host */
15239 lpfc_scsi_dev_block(phba);
15240
15241 /* stop all timers */
15242 lpfc_stop_hba_timers(phba);
15243
15244 /* Clean up all driver's outstanding I/Os */
15245 lpfc_sli_flush_io_rings(phba);
15246 }
15247
15248 /**
15249 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
15250 * @pdev: pointer to PCI device.
15251 * @state: the current PCI connection state.
15252 *
15253 * This routine is called from the PCI subsystem for error handling to device
15254 * with SLI-4 interface spec. This function is called by the PCI subsystem
15255 * after a PCI bus error affecting this device has been detected. When this
15256 * function is invoked, it will need to stop all the I/Os and interrupt(s)
15257 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
15258 * for the PCI subsystem to perform proper recovery as desired.
15259 *
15260 * Return codes
15261 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15262 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15263 **/
15264 static pci_ers_result_t
lpfc_io_error_detected_s4(struct pci_dev * pdev,pci_channel_state_t state)15265 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
15266 {
15267 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15268 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15269 bool hba_pci_err;
15270
15271 switch (state) {
15272 case pci_channel_io_normal:
15273 /* Non-fatal error, prepare for recovery */
15274 lpfc_sli4_prep_dev_for_recover(phba);
15275 return PCI_ERS_RESULT_CAN_RECOVER;
15276 case pci_channel_io_frozen:
15277 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15278 /* Fatal error, prepare for slot reset */
15279 if (!hba_pci_err)
15280 lpfc_sli4_prep_dev_for_reset(phba);
15281 else
15282 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15283 "2832 Already handling PCI error "
15284 "state: x%x\n", state);
15285 return PCI_ERS_RESULT_NEED_RESET;
15286 case pci_channel_io_perm_failure:
15287 set_bit(HBA_PCI_ERR, &phba->bit_flags);
15288 /* Permanent failure, prepare for device down */
15289 lpfc_sli4_prep_dev_for_perm_failure(phba);
15290 return PCI_ERS_RESULT_DISCONNECT;
15291 default:
15292 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15293 if (!hba_pci_err)
15294 lpfc_sli4_prep_dev_for_reset(phba);
15295 /* Unknown state, prepare and request slot reset */
15296 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15297 "2825 Unknown PCI error state: x%x\n", state);
15298 lpfc_sli4_prep_dev_for_reset(phba);
15299 return PCI_ERS_RESULT_NEED_RESET;
15300 }
15301 }
15302
15303 /**
15304 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
15305 * @pdev: pointer to PCI device.
15306 *
15307 * This routine is called from the PCI subsystem for error handling to device
15308 * with SLI-4 interface spec. It is called after PCI bus has been reset to
15309 * restart the PCI card from scratch, as if from a cold-boot. During the
15310 * PCI subsystem error recovery, after the driver returns
15311 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
15312 * recovery and then call this routine before calling the .resume method to
15313 * recover the device. This function will initialize the HBA device, enable
15314 * the interrupt, but it will just put the HBA to offline state without
15315 * passing any I/O traffic.
15316 *
15317 * Return codes
15318 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15319 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15320 */
15321 static pci_ers_result_t
lpfc_io_slot_reset_s4(struct pci_dev * pdev)15322 lpfc_io_slot_reset_s4(struct pci_dev *pdev)
15323 {
15324 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15325 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15326 struct lpfc_sli *psli = &phba->sli;
15327 uint32_t intr_mode;
15328 bool hba_pci_err;
15329
15330 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
15331 if (pci_enable_device_mem(pdev)) {
15332 printk(KERN_ERR "lpfc: Cannot re-enable "
15333 "PCI device after reset.\n");
15334 return PCI_ERS_RESULT_DISCONNECT;
15335 }
15336
15337 pci_restore_state(pdev);
15338
15339 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags);
15340 if (!hba_pci_err)
15341 dev_info(&pdev->dev,
15342 "hba_pci_err was not set, recovering slot reset.\n");
15343 /*
15344 * As the new kernel behavior of pci_restore_state() API call clears
15345 * device saved_state flag, need to save the restored state again.
15346 */
15347 pci_save_state(pdev);
15348
15349 if (pdev->is_busmaster)
15350 pci_set_master(pdev);
15351
15352 spin_lock_irq(&phba->hbalock);
15353 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
15354 spin_unlock_irq(&phba->hbalock);
15355
15356 /* Init cpu_map array */
15357 lpfc_cpu_map_array_init(phba);
15358 /* Configure and enable interrupt */
15359 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15360 if (intr_mode == LPFC_INTR_ERROR) {
15361 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15362 "2824 Cannot re-enable interrupt after "
15363 "slot reset.\n");
15364 return PCI_ERS_RESULT_DISCONNECT;
15365 } else
15366 phba->intr_mode = intr_mode;
15367 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
15368
15369 /* Log the current active interrupt mode */
15370 lpfc_log_intr_mode(phba, phba->intr_mode);
15371
15372 return PCI_ERS_RESULT_RECOVERED;
15373 }
15374
15375 /**
15376 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
15377 * @pdev: pointer to PCI device
15378 *
15379 * This routine is called from the PCI subsystem for error handling to device
15380 * with SLI-4 interface spec. It is called when kernel error recovery tells
15381 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
15382 * error recovery. After this call, traffic can start to flow from this device
15383 * again.
15384 **/
15385 static void
lpfc_io_resume_s4(struct pci_dev * pdev)15386 lpfc_io_resume_s4(struct pci_dev *pdev)
15387 {
15388 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15389 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15390
15391 /*
15392 * In case of slot reset, as function reset is performed through
15393 * mailbox command which needs DMA to be enabled, this operation
15394 * has to be moved to the io resume phase. Taking device offline
15395 * will perform the necessary cleanup.
15396 */
15397 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
15398 /* Perform device reset */
15399 lpfc_sli_brdrestart(phba);
15400 /* Bring the device back online */
15401 lpfc_online(phba);
15402 }
15403 }
15404
15405 /**
15406 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
15407 * @pdev: pointer to PCI device
15408 * @pid: pointer to PCI device identifier
15409 *
15410 * This routine is to be registered to the kernel's PCI subsystem. When an
15411 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
15412 * at PCI device-specific information of the device and driver to see if the
15413 * driver state that it can support this kind of device. If the match is
15414 * successful, the driver core invokes this routine. This routine dispatches
15415 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
15416 * do all the initialization that it needs to do to handle the HBA device
15417 * properly.
15418 *
15419 * Return code
15420 * 0 - driver can claim the device
15421 * negative value - driver can not claim the device
15422 **/
15423 static int
lpfc_pci_probe_one(struct pci_dev * pdev,const struct pci_device_id * pid)15424 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
15425 {
15426 int rc;
15427 struct lpfc_sli_intf intf;
15428
15429 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
15430 return -ENODEV;
15431
15432 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
15433 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
15434 rc = lpfc_pci_probe_one_s4(pdev, pid);
15435 else
15436 rc = lpfc_pci_probe_one_s3(pdev, pid);
15437
15438 return rc;
15439 }
15440
15441 /**
15442 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
15443 * @pdev: pointer to PCI device
15444 *
15445 * This routine is to be registered to the kernel's PCI subsystem. When an
15446 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
15447 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
15448 * remove routine, which will perform all the necessary cleanup for the
15449 * device to be removed from the PCI subsystem properly.
15450 **/
15451 static void
lpfc_pci_remove_one(struct pci_dev * pdev)15452 lpfc_pci_remove_one(struct pci_dev *pdev)
15453 {
15454 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15455 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15456
15457 switch (phba->pci_dev_grp) {
15458 case LPFC_PCI_DEV_LP:
15459 lpfc_pci_remove_one_s3(pdev);
15460 break;
15461 case LPFC_PCI_DEV_OC:
15462 lpfc_pci_remove_one_s4(pdev);
15463 break;
15464 default:
15465 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15466 "1424 Invalid PCI device group: 0x%x\n",
15467 phba->pci_dev_grp);
15468 break;
15469 }
15470 return;
15471 }
15472
15473 /**
15474 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
15475 * @dev: pointer to device
15476 *
15477 * This routine is to be registered to the kernel's PCI subsystem to support
15478 * system Power Management (PM). When PM invokes this method, it dispatches
15479 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
15480 * suspend the device.
15481 *
15482 * Return code
15483 * 0 - driver suspended the device
15484 * Error otherwise
15485 **/
15486 static int __maybe_unused
lpfc_pci_suspend_one(struct device * dev)15487 lpfc_pci_suspend_one(struct device *dev)
15488 {
15489 struct Scsi_Host *shost = dev_get_drvdata(dev);
15490 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15491 int rc = -ENODEV;
15492
15493 switch (phba->pci_dev_grp) {
15494 case LPFC_PCI_DEV_LP:
15495 rc = lpfc_pci_suspend_one_s3(dev);
15496 break;
15497 case LPFC_PCI_DEV_OC:
15498 rc = lpfc_pci_suspend_one_s4(dev);
15499 break;
15500 default:
15501 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15502 "1425 Invalid PCI device group: 0x%x\n",
15503 phba->pci_dev_grp);
15504 break;
15505 }
15506 return rc;
15507 }
15508
15509 /**
15510 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
15511 * @dev: pointer to device
15512 *
15513 * This routine is to be registered to the kernel's PCI subsystem to support
15514 * system Power Management (PM). When PM invokes this method, it dispatches
15515 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
15516 * resume the device.
15517 *
15518 * Return code
15519 * 0 - driver suspended the device
15520 * Error otherwise
15521 **/
15522 static int __maybe_unused
lpfc_pci_resume_one(struct device * dev)15523 lpfc_pci_resume_one(struct device *dev)
15524 {
15525 struct Scsi_Host *shost = dev_get_drvdata(dev);
15526 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15527 int rc = -ENODEV;
15528
15529 switch (phba->pci_dev_grp) {
15530 case LPFC_PCI_DEV_LP:
15531 rc = lpfc_pci_resume_one_s3(dev);
15532 break;
15533 case LPFC_PCI_DEV_OC:
15534 rc = lpfc_pci_resume_one_s4(dev);
15535 break;
15536 default:
15537 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15538 "1426 Invalid PCI device group: 0x%x\n",
15539 phba->pci_dev_grp);
15540 break;
15541 }
15542 return rc;
15543 }
15544
15545 /**
15546 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
15547 * @pdev: pointer to PCI device.
15548 * @state: the current PCI connection state.
15549 *
15550 * This routine is registered to the PCI subsystem for error handling. This
15551 * function is called by the PCI subsystem after a PCI bus error affecting
15552 * this device has been detected. When this routine is invoked, it dispatches
15553 * the action to the proper SLI-3 or SLI-4 device error detected handling
15554 * routine, which will perform the proper error detected operation.
15555 *
15556 * Return codes
15557 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15558 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15559 **/
15560 static pci_ers_result_t
lpfc_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)15561 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
15562 {
15563 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15564 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15565 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15566
15567 if (phba->link_state == LPFC_HBA_ERROR &&
15568 phba->hba_flag & HBA_IOQ_FLUSH)
15569 return PCI_ERS_RESULT_NEED_RESET;
15570
15571 switch (phba->pci_dev_grp) {
15572 case LPFC_PCI_DEV_LP:
15573 rc = lpfc_io_error_detected_s3(pdev, state);
15574 break;
15575 case LPFC_PCI_DEV_OC:
15576 rc = lpfc_io_error_detected_s4(pdev, state);
15577 break;
15578 default:
15579 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15580 "1427 Invalid PCI device group: 0x%x\n",
15581 phba->pci_dev_grp);
15582 break;
15583 }
15584 return rc;
15585 }
15586
15587 /**
15588 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
15589 * @pdev: pointer to PCI device.
15590 *
15591 * This routine is registered to the PCI subsystem for error handling. This
15592 * function is called after PCI bus has been reset to restart the PCI card
15593 * from scratch, as if from a cold-boot. When this routine is invoked, it
15594 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
15595 * routine, which will perform the proper device reset.
15596 *
15597 * Return codes
15598 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15599 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15600 **/
15601 static pci_ers_result_t
lpfc_io_slot_reset(struct pci_dev * pdev)15602 lpfc_io_slot_reset(struct pci_dev *pdev)
15603 {
15604 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15605 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15606 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15607
15608 switch (phba->pci_dev_grp) {
15609 case LPFC_PCI_DEV_LP:
15610 rc = lpfc_io_slot_reset_s3(pdev);
15611 break;
15612 case LPFC_PCI_DEV_OC:
15613 rc = lpfc_io_slot_reset_s4(pdev);
15614 break;
15615 default:
15616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15617 "1428 Invalid PCI device group: 0x%x\n",
15618 phba->pci_dev_grp);
15619 break;
15620 }
15621 return rc;
15622 }
15623
15624 /**
15625 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
15626 * @pdev: pointer to PCI device
15627 *
15628 * This routine is registered to the PCI subsystem for error handling. It
15629 * is called when kernel error recovery tells the lpfc driver that it is
15630 * OK to resume normal PCI operation after PCI bus error recovery. When
15631 * this routine is invoked, it dispatches the action to the proper SLI-3
15632 * or SLI-4 device io_resume routine, which will resume the device operation.
15633 **/
15634 static void
lpfc_io_resume(struct pci_dev * pdev)15635 lpfc_io_resume(struct pci_dev *pdev)
15636 {
15637 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15638 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15639
15640 switch (phba->pci_dev_grp) {
15641 case LPFC_PCI_DEV_LP:
15642 lpfc_io_resume_s3(pdev);
15643 break;
15644 case LPFC_PCI_DEV_OC:
15645 lpfc_io_resume_s4(pdev);
15646 break;
15647 default:
15648 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15649 "1429 Invalid PCI device group: 0x%x\n",
15650 phba->pci_dev_grp);
15651 break;
15652 }
15653 return;
15654 }
15655
15656 /**
15657 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
15658 * @phba: pointer to lpfc hba data structure.
15659 *
15660 * This routine checks to see if OAS is supported for this adapter. If
15661 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
15662 * the enable oas flag is cleared and the pool created for OAS device data
15663 * is destroyed.
15664 *
15665 **/
15666 static void
lpfc_sli4_oas_verify(struct lpfc_hba * phba)15667 lpfc_sli4_oas_verify(struct lpfc_hba *phba)
15668 {
15669
15670 if (!phba->cfg_EnableXLane)
15671 return;
15672
15673 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15674 phba->cfg_fof = 1;
15675 } else {
15676 phba->cfg_fof = 0;
15677 mempool_destroy(phba->device_data_mem_pool);
15678 phba->device_data_mem_pool = NULL;
15679 }
15680
15681 return;
15682 }
15683
15684 /**
15685 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
15686 * @phba: pointer to lpfc hba data structure.
15687 *
15688 * This routine checks to see if RAS is supported by the adapter. Check the
15689 * function through which RAS support enablement is to be done.
15690 **/
15691 void
lpfc_sli4_ras_init(struct lpfc_hba * phba)15692 lpfc_sli4_ras_init(struct lpfc_hba *phba)
15693 {
15694 /* if ASIC_GEN_NUM >= 0xC) */
15695 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15696 LPFC_SLI_INTF_IF_TYPE_6) ||
15697 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
15698 LPFC_SLI_INTF_FAMILY_G6)) {
15699 phba->ras_fwlog.ras_hwsupport = true;
15700 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
15701 phba->cfg_ras_fwlog_buffsize)
15702 phba->ras_fwlog.ras_enabled = true;
15703 else
15704 phba->ras_fwlog.ras_enabled = false;
15705 } else {
15706 phba->ras_fwlog.ras_hwsupport = false;
15707 }
15708 }
15709
15710
15711 MODULE_DEVICE_TABLE(pci, lpfc_id_table);
15712
15713 static const struct pci_error_handlers lpfc_err_handler = {
15714 .error_detected = lpfc_io_error_detected,
15715 .slot_reset = lpfc_io_slot_reset,
15716 .resume = lpfc_io_resume,
15717 };
15718
15719 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one,
15720 lpfc_pci_suspend_one,
15721 lpfc_pci_resume_one);
15722
15723 static struct pci_driver lpfc_driver = {
15724 .name = LPFC_DRIVER_NAME,
15725 .id_table = lpfc_id_table,
15726 .probe = lpfc_pci_probe_one,
15727 .remove = lpfc_pci_remove_one,
15728 .shutdown = lpfc_pci_remove_one,
15729 .driver.pm = &lpfc_pci_pm_ops_one,
15730 .err_handler = &lpfc_err_handler,
15731 };
15732
15733 static const struct file_operations lpfc_mgmt_fop = {
15734 .owner = THIS_MODULE,
15735 };
15736
15737 static struct miscdevice lpfc_mgmt_dev = {
15738 .minor = MISC_DYNAMIC_MINOR,
15739 .name = "lpfcmgmt",
15740 .fops = &lpfc_mgmt_fop,
15741 };
15742
15743 /**
15744 * lpfc_init - lpfc module initialization routine
15745 *
15746 * This routine is to be invoked when the lpfc module is loaded into the
15747 * kernel. The special kernel macro module_init() is used to indicate the
15748 * role of this routine to the kernel as lpfc module entry point.
15749 *
15750 * Return codes
15751 * 0 - successful
15752 * -ENOMEM - FC attach transport failed
15753 * all others - failed
15754 */
15755 static int __init
lpfc_init(void)15756 lpfc_init(void)
15757 {
15758 int error = 0;
15759
15760 pr_info(LPFC_MODULE_DESC "\n");
15761 pr_info(LPFC_COPYRIGHT "\n");
15762
15763 error = misc_register(&lpfc_mgmt_dev);
15764 if (error)
15765 printk(KERN_ERR "Could not register lpfcmgmt device, "
15766 "misc_register returned with status %d", error);
15767
15768 error = -ENOMEM;
15769 lpfc_transport_functions.vport_create = lpfc_vport_create;
15770 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
15771 lpfc_transport_template =
15772 fc_attach_transport(&lpfc_transport_functions);
15773 if (lpfc_transport_template == NULL)
15774 goto unregister;
15775 lpfc_vport_transport_template =
15776 fc_attach_transport(&lpfc_vport_transport_functions);
15777 if (lpfc_vport_transport_template == NULL) {
15778 fc_release_transport(lpfc_transport_template);
15779 goto unregister;
15780 }
15781 lpfc_wqe_cmd_template();
15782 lpfc_nvmet_cmd_template();
15783
15784 /* Initialize in case vector mapping is needed */
15785 lpfc_present_cpu = num_present_cpus();
15786
15787 lpfc_pldv_detect = false;
15788
15789 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
15790 "lpfc/sli4:online",
15791 lpfc_cpu_online, lpfc_cpu_offline);
15792 if (error < 0)
15793 goto cpuhp_failure;
15794 lpfc_cpuhp_state = error;
15795
15796 error = pci_register_driver(&lpfc_driver);
15797 if (error)
15798 goto unwind;
15799
15800 return error;
15801
15802 unwind:
15803 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15804 cpuhp_failure:
15805 fc_release_transport(lpfc_transport_template);
15806 fc_release_transport(lpfc_vport_transport_template);
15807 unregister:
15808 misc_deregister(&lpfc_mgmt_dev);
15809
15810 return error;
15811 }
15812
lpfc_dmp_dbg(struct lpfc_hba * phba)15813 void lpfc_dmp_dbg(struct lpfc_hba *phba)
15814 {
15815 unsigned int start_idx;
15816 unsigned int dbg_cnt;
15817 unsigned int temp_idx;
15818 int i;
15819 int j = 0;
15820 unsigned long rem_nsec;
15821
15822 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
15823 return;
15824
15825 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
15826 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
15827 if (!dbg_cnt)
15828 goto out;
15829 temp_idx = start_idx;
15830 if (dbg_cnt >= DBG_LOG_SZ) {
15831 dbg_cnt = DBG_LOG_SZ;
15832 temp_idx -= 1;
15833 } else {
15834 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
15835 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
15836 } else {
15837 if (start_idx < dbg_cnt)
15838 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
15839 else
15840 start_idx -= dbg_cnt;
15841 }
15842 }
15843 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
15844 start_idx, temp_idx, dbg_cnt);
15845
15846 for (i = 0; i < dbg_cnt; i++) {
15847 if ((start_idx + i) < DBG_LOG_SZ)
15848 temp_idx = (start_idx + i) % DBG_LOG_SZ;
15849 else
15850 temp_idx = j++;
15851 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
15852 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
15853 temp_idx,
15854 (unsigned long)phba->dbg_log[temp_idx].t_ns,
15855 rem_nsec / 1000,
15856 phba->dbg_log[temp_idx].log);
15857 }
15858 out:
15859 atomic_set(&phba->dbg_log_cnt, 0);
15860 atomic_set(&phba->dbg_log_dmping, 0);
15861 }
15862
15863 __printf(2, 3)
lpfc_dbg_print(struct lpfc_hba * phba,const char * fmt,...)15864 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
15865 {
15866 unsigned int idx;
15867 va_list args;
15868 int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
15869 struct va_format vaf;
15870
15871
15872 va_start(args, fmt);
15873 if (unlikely(dbg_dmping)) {
15874 vaf.fmt = fmt;
15875 vaf.va = &args;
15876 dev_info(&phba->pcidev->dev, "%pV", &vaf);
15877 va_end(args);
15878 return;
15879 }
15880 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
15881 DBG_LOG_SZ;
15882
15883 atomic_inc(&phba->dbg_log_cnt);
15884
15885 vscnprintf(phba->dbg_log[idx].log,
15886 sizeof(phba->dbg_log[idx].log), fmt, args);
15887 va_end(args);
15888
15889 phba->dbg_log[idx].t_ns = local_clock();
15890 }
15891
15892 /**
15893 * lpfc_exit - lpfc module removal routine
15894 *
15895 * This routine is invoked when the lpfc module is removed from the kernel.
15896 * The special kernel macro module_exit() is used to indicate the role of
15897 * this routine to the kernel as lpfc module exit point.
15898 */
15899 static void __exit
lpfc_exit(void)15900 lpfc_exit(void)
15901 {
15902 misc_deregister(&lpfc_mgmt_dev);
15903 pci_unregister_driver(&lpfc_driver);
15904 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15905 fc_release_transport(lpfc_transport_template);
15906 fc_release_transport(lpfc_vport_transport_template);
15907 idr_destroy(&lpfc_hba_index);
15908 }
15909
15910 module_init(lpfc_init);
15911 module_exit(lpfc_exit);
15912 MODULE_LICENSE("GPL");
15913 MODULE_DESCRIPTION(LPFC_MODULE_DESC);
15914 MODULE_AUTHOR("Broadcom");
15915 MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
15916