1 /*
2 * stradis.c - stradis 4:2:2 mpeg decoder driver
3 *
4 * Stradis 4:2:2 MPEG-2 Decoder Driver
5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/module.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/fs.h>
27 #include <linux/kernel.h>
28 #include <linux/major.h>
29 #include <linux/slab.h>
30 #include <linux/mm.h>
31 #include <linux/init.h>
32 #include <linux/poll.h>
33 #include <linux/pci.h>
34 #include <linux/signal.h>
35 #include <asm/io.h>
36 #include <linux/ioport.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <linux/sched.h>
40 #include <asm/segment.h>
41 #include <asm/types.h>
42 #include <linux/types.h>
43 #include <linux/wrapper.h>
44 #include <linux/interrupt.h>
45 #include <asm/uaccess.h>
46 #include <linux/vmalloc.h>
47 #include <linux/videodev.h>
48 #include <linux/i2c-old.h>
49
50 #include "saa7146.h"
51 #include "saa7146reg.h"
52 #include "ibmmpeg2.h"
53 #include "saa7121.h"
54 #include "cs8420.h"
55
56 #define DEBUG(x) /* debug driver */
57 #undef IDEBUG /* debug irq handler */
58 #undef MDEBUG /* debug memory management */
59
60 #define SAA7146_MAX 6
61
62 static struct saa7146 saa7146s[SAA7146_MAX];
63
64 static int saa_num = 0; /* number of SAA7146s in use */
65
66 static int video_nr = -1;
67 MODULE_PARM(video_nr,"i");
68 MODULE_LICENSE("GPL");
69
70
71 #define nDebNormal 0x00480000
72 #define nDebNoInc 0x00480000
73 #define nDebVideo 0xd0480000
74 #define nDebAudio 0xd0400000
75 #define nDebDMA 0x02c80000
76
77 #define oDebNormal 0x13c80000
78 #define oDebNoInc 0x13c80000
79 #define oDebVideo 0xd1080000
80 #define oDebAudio 0xd1080000
81 #define oDebDMA 0x03080000
82
83 #define NewCard (saa->boardcfg[3])
84 #define ChipControl (saa->boardcfg[1])
85 #define NTSCFirstActive (saa->boardcfg[4])
86 #define PALFirstActive (saa->boardcfg[5])
87 #define NTSCLastActive (saa->boardcfg[54])
88 #define PALLastActive (saa->boardcfg[55])
89 #define Have2MB (saa->boardcfg[18] & 0x40)
90 #define HaveCS8420 (saa->boardcfg[18] & 0x04)
91 #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
92 #define HaveCS3310 (saa->boardcfg[18] & 0x01)
93 #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
94 #define HaveCS4341 (saa->boardcfg[40] == 2)
95 #define SDIType (saa->boardcfg[27])
96 #define CurrentMode (saa->boardcfg[2])
97
98 #define debNormal (NewCard ? nDebNormal : oDebNormal)
99 #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
100 #define debVideo (NewCard ? nDebVideo : oDebVideo)
101 #define debAudio (NewCard ? nDebAudio : oDebAudio)
102 #define debDMA (NewCard ? nDebDMA : oDebDMA)
103
104 #ifdef DEBUG
stradis_driver(void)105 int stradis_driver(void) /* for the benefit of ksymoops */
106 {
107 return 1;
108 }
109 #endif
110
111 #ifdef USE_RESCUE_EEPROM_SDM275
112 static unsigned char rescue_eeprom[64] = {
113 0x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
114 };
115 #endif
116
117 /* ----------------------------------------------------------------------- */
118 /* Hardware I2C functions */
I2CWipe(struct saa7146 * saa)119 static void I2CWipe(struct saa7146 *saa)
120 {
121 int i;
122 /* set i2c to ~=100kHz, abort transfer, clear busy */
123 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
124 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
125 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
126 /* wait for i2c registers to be programmed */
127 for (i = 0; i < 1000 &&
128 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
129 schedule();
130 saawrite(0x600, SAA7146_I2C_STATUS);
131 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
132 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
133 /* wait for i2c registers to be programmed */
134 for (i = 0; i < 1000 &&
135 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
136 schedule();
137 saawrite(0x600, SAA7146_I2C_STATUS);
138 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
139 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
140 /* wait for i2c registers to be programmed */
141 for (i = 0; i < 1000 &&
142 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
143 schedule();
144 }
145 /* read I2C */
I2CRead(struct i2c_bus * bus,unsigned char addr,unsigned char subaddr,int dosub)146 static int I2CRead(struct i2c_bus *bus, unsigned char addr,
147 unsigned char subaddr, int dosub)
148 {
149 struct saa7146 *saa = (struct saa7146 *) bus->data;
150 int i;
151
152
153 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
154 I2CWipe(saa);
155 for (i = 0; i < 1000 &&
156 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
157 schedule();
158 if (i == 1000)
159 I2CWipe(saa);
160 if (dosub)
161 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
162 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
163 else
164 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
165 0xf1, SAA7146_I2C_TRANSFER);
166 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
167 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
168 /* wait for i2c registers to be programmed */
169 for (i = 0; i < 1000 &&
170 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
171 schedule();
172 /* wait for valid data */
173 for (i = 0; i < 1000 &&
174 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
175 schedule();
176 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
177 return -1;
178 if (i == 1000)
179 printk("i2c setup read timeout\n");
180 saawrite(0x41, SAA7146_I2C_TRANSFER);
181 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
182 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
183 /* wait for i2c registers to be programmed */
184 for (i = 0; i < 1000 &&
185 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
186 schedule();
187 /* wait for valid data */
188 for (i = 0; i < 1000 &&
189 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
190 schedule();
191 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
192 return -1;
193 if (i == 1000)
194 printk("i2c read timeout\n");
195 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
196 }
I2CReadOld(struct i2c_bus * bus,unsigned char addr)197 static int I2CReadOld(struct i2c_bus *bus, unsigned char addr)
198 {
199 return I2CRead(bus, addr, 0, 0);
200 }
201
202 /* set both to write both bytes, reset it to write only b1 */
203
I2CWrite(struct i2c_bus * bus,unsigned char addr,unsigned char b1,unsigned char b2,int both)204 static int I2CWrite(struct i2c_bus *bus, unsigned char addr, unsigned char b1,
205 unsigned char b2, int both)
206 {
207 struct saa7146 *saa = (struct saa7146 *) bus->data;
208 int i;
209 u32 data;
210
211 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
212 I2CWipe(saa);
213 for (i = 0; i < 1000 &&
214 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
215 schedule();
216 if (i == 1000)
217 I2CWipe(saa);
218 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
219 if (both)
220 data |= ((b2 & 0xff) << 8) | 0xe5;
221 else
222 data |= 0xd1;
223 saawrite(data, SAA7146_I2C_TRANSFER);
224 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
225 SAA7146_MC2);
226 return 0;
227 }
228
attach_inform(struct i2c_bus * bus,int id)229 static void attach_inform(struct i2c_bus *bus, int id)
230 {
231 struct saa7146 *saa = (struct saa7146 *) bus->data;
232 int i;
233
234 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id));
235 if (id == 0xa0) { /* we have rev2 or later board, fill in info */
236 for (i = 0; i < 64; i++)
237 saa->boardcfg[i] = I2CRead(bus, 0xa0, i, 1);
238 #ifdef USE_RESCUE_EEPROM_SDM275
239 if (saa->boardcfg[0] != 0) {
240 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr);
241 for (i = 0; i < 64; i++)
242 saa->boardcfg[i] = rescue_eeprom[i];
243 }
244 #endif
245 printk("stradis%d: config =", saa->nr);
246 for (i = 0; i < 51; i++) {
247 printk(" %02x",saa->boardcfg[i]);
248 }
249 printk("\n");
250 }
251 }
252
detach_inform(struct i2c_bus * bus,int id)253 static void detach_inform(struct i2c_bus *bus, int id)
254 {
255 struct saa7146 *saa = (struct saa7146 *) bus->data;
256 int i;
257 i = saa->nr;
258 }
259
I2CBusScan(struct i2c_bus * bus)260 static void I2CBusScan(struct i2c_bus *bus)
261 {
262 int i;
263 for (i = 0; i < 0xff; i += 2)
264 if ((I2CRead(bus, i, 0, 0)) >= 0)
265 attach_inform(bus, i);
266 }
267
268 static struct i2c_bus saa7146_i2c_bus_template =
269 {
270 "saa7146",
271 I2C_BUSID_BT848,
272 NULL,
273 SPIN_LOCK_UNLOCKED,
274 attach_inform,
275 detach_inform,
276 NULL,
277 NULL,
278 I2CReadOld,
279 I2CWrite,
280 };
281
282 static int debiwait_maxwait = 0;
283
wait_for_debi_done(struct saa7146 * saa)284 static int wait_for_debi_done(struct saa7146 *saa)
285 {
286 int i;
287
288 /* wait for registers to be programmed */
289 for (i = 0; i < 100000 &&
290 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
291 saaread(SAA7146_MC2);
292 /* wait for transfer to complete */
293 for (i = 0; i < 500000 &&
294 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
295 saaread(SAA7146_MC2);
296 if (i > debiwait_maxwait)
297 printk("wait-for-debi-done maxwait: %d\n",
298 debiwait_maxwait = i);
299
300 if (i == 500000)
301 return -1;
302 return 0;
303 }
304
debiwrite(struct saa7146 * saa,u32 config,int addr,u32 val,int count)305 static int debiwrite(struct saa7146 *saa, u32 config, int addr,
306 u32 val, int count)
307 {
308 u32 cmd;
309 if (count <= 0 || count > 32764)
310 return -1;
311 if (wait_for_debi_done(saa) < 0)
312 return -1;
313 saawrite(config, SAA7146_DEBI_CONFIG);
314 if (count <= 4) /* immediate transfer */
315 saawrite(val, SAA7146_DEBI_AD);
316 else /* block transfer */
317 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
318 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
319 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
320 SAA7146_MC2);
321 return 0;
322 }
323
debiread(struct saa7146 * saa,u32 config,int addr,int count)324 static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
325 {
326 u32 result = 0;
327
328 if (count > 32764 || count <= 0)
329 return 0;
330 if (wait_for_debi_done(saa) < 0)
331 return 0;
332 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
333 saawrite((count << 17) | 0x10000 | (addr & 0xffff),
334 SAA7146_DEBI_COMMAND);
335 saawrite(config, SAA7146_DEBI_CONFIG);
336 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
337 SAA7146_MC2);
338 if (count > 4) /* not an immediate transfer */
339 return count;
340 wait_for_debi_done(saa);
341 result = saaread(SAA7146_DEBI_AD);
342 if (count == 1)
343 result &= 0xff;
344 if (count == 2)
345 result &= 0xffff;
346 if (count == 3)
347 result &= 0xffffff;
348 return result;
349 }
350
351 #if 0 /* unused */
352 /* MUST be a multiple of 8 bytes and 8-byte aligned and < 32768 bytes */
353 /* data copied into saa->dmadebi buffer, caller must re-enable interrupts */
354 static void ibm_block_dram_read(struct saa7146 *saa, int address, int bytes)
355 {
356 int i, j;
357 u32 *buf;
358 buf = (u32 *) saa->dmadebi;
359 if (bytes > 0x7000)
360 bytes = 0x7000;
361 saawrite(0, SAA7146_IER); /* disable interrupts */
362 for (i=0; i < 10000 &&
363 (debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
364 & 0x8000); i++)
365 saaread(SAA7146_MC2);
366 if (i == 10000)
367 printk(KERN_ERR "stradis%d: dram_busy never cleared\n",
368 saa->nr);
369 debiwrite(saa, debNormal, IBM_MP2_SRC_ADDR, (address<<16) |
370 (address>>16), 4);
371 debiwrite(saa, debNormal, IBM_MP2_BLOCK_SIZE, bytes, 2);
372 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 0x8a10, 2);
373 for (j = 0; j < bytes/4; j++) {
374 for (i = 0; i < 10000 &&
375 (!(debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
376 & 0x4000)); i++)
377 saaread(SAA7146_MC2);
378 if (i == 10000)
379 printk(KERN_ERR "stradis%d: dram_ready never set\n",
380 saa->nr);
381 buf[j] = debiread(saa, debNormal, IBM_MP2_DRAM_DATA, 4);
382 }
383 }
384 #endif /* unused */
385
do_irq_send_data(struct saa7146 * saa)386 static void do_irq_send_data(struct saa7146 *saa)
387 {
388 int split, audbytes, vidbytes;
389
390 saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
391 /* if special feature mode in effect, disable audio sending */
392 if (saa->playmode != VID_PLAY_NORMAL)
393 saa->audtail = saa->audhead = 0;
394 if (saa->audhead <= saa->audtail)
395 audbytes = saa->audtail - saa->audhead;
396 else
397 audbytes = 65536 - (saa->audhead - saa->audtail);
398 if (saa->vidhead <= saa->vidtail)
399 vidbytes = saa->vidtail - saa->vidhead;
400 else
401 vidbytes = 524288 - (saa->vidhead - saa->vidtail);
402 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
403 saawrite(0, SAA7146_IER);
404 return;
405 }
406 /* if at least 1 block audio waiting and audio fifo isn't full */
407 if (audbytes >= 2048 && (debiread(saa, debNormal,
408 IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) {
409 if (saa->audhead > saa->audtail)
410 split = 65536 - saa->audhead;
411 else
412 split = 0;
413 audbytes = 2048;
414 if (split > 0 && split < 2048) {
415 memcpy(saa->dmadebi, saa->audbuf + saa->audhead,
416 split);
417 saa->audhead = 0;
418 audbytes -= split;
419 } else
420 split = 0;
421 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
422 audbytes);
423 saa->audhead += audbytes;
424 saa->audhead &= 0xffff;
425 debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO :
426 IBM_MP2_AUD_FIFOW), 0, 2048);
427 wake_up_interruptible(&saa->audq);
428 /* if at least 1 block video waiting and video fifo isn't full */
429 } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
430 IBM_MP2_FIFO, 2)) < 16384) {
431 if (saa->vidhead > saa->vidtail)
432 split = 524288 - saa->vidhead;
433 else
434 split = 0;
435 vidbytes = 30720;
436 if (split > 0 && split < 30720) {
437 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead,
438 split);
439 saa->vidhead = 0;
440 vidbytes -= split;
441 } else
442 split = 0;
443 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
444 vidbytes);
445 saa->vidhead += vidbytes;
446 saa->vidhead &= 0x7ffff;
447 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
448 IBM_MP2_FIFOW), 0, 30720);
449 wake_up_interruptible(&saa->vidq);
450 }
451 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
452 }
453
send_osd_data(struct saa7146 * saa)454 static void send_osd_data(struct saa7146 *saa)
455 {
456 int size = saa->osdtail - saa->osdhead;
457 if (size > 30720)
458 size = 30720;
459 /* ensure some multiple of 8 bytes is transferred */
460 size = 8 * ((size + 8)>>3);
461 if (size) {
462 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
463 (saa->osdhead>>3), 2);
464 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
465 saa->osdhead += size;
466 /* block transfer of next 8 bytes to ~32k bytes */
467 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
468 }
469 if (saa->osdhead >= saa->osdtail) {
470 saa->osdhead = saa->osdtail = 0;
471 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
472 }
473 }
474
saa7146_irq(int irq,void * dev_id,struct pt_regs * regs)475 static void saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
476 {
477 struct saa7146 *saa = (struct saa7146 *) dev_id;
478 u32 stat, astat;
479 int count;
480
481 count = 0;
482 while (1) {
483 /* get/clear interrupt status bits */
484 stat = saaread(SAA7146_ISR);
485 astat = stat & saaread(SAA7146_IER);
486 if (!astat)
487 return;
488 saawrite(astat, SAA7146_ISR);
489 if (astat & SAA7146_PSR_DEBI_S) {
490 do_irq_send_data(saa);
491 }
492 if (astat & SAA7146_PSR_PIN1) {
493 int istat;
494 /* the following read will trigger DEBI_S */
495 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
496 if (istat & 1) {
497 saawrite(0, SAA7146_IER);
498 send_osd_data(saa);
499 saawrite(SAA7146_PSR_DEBI_S |
500 SAA7146_PSR_PIN1, SAA7146_IER);
501 }
502 if (istat & 0x20) { /* Video Start */
503 saa->vidinfo.frame_count++;
504 }
505 if (istat & 0x400) { /* Picture Start */
506 /* update temporal reference */
507 }
508 if (istat & 0x200) { /* Picture Resolution Change */
509 /* read new resolution */
510 }
511 if (istat & 0x100) { /* New User Data found */
512 /* read new user data */
513 }
514 if (istat & 0x1000) { /* new GOP/SMPTE */
515 /* read new SMPTE */
516 }
517 if (istat & 0x8000) { /* Sequence Start Code */
518 /* reset frame counter, load sizes */
519 saa->vidinfo.frame_count = 0;
520 saa->vidinfo.h_size = 704;
521 saa->vidinfo.v_size = 480;
522 #if 0
523 if (saa->endmarkhead != saa->endmarktail) {
524 saa->audhead =
525 saa->endmark[saa->endmarkhead];
526 saa->endmarkhead++;
527 if (saa->endmarkhead >= MAX_MARKS)
528 saa->endmarkhead = 0;
529 }
530 #endif
531 }
532 if (istat & 0x4000) { /* Sequence Error Code */
533 if (saa->endmarkhead != saa->endmarktail) {
534 saa->audhead =
535 saa->endmark[saa->endmarkhead];
536 saa->endmarkhead++;
537 if (saa->endmarkhead >= MAX_MARKS)
538 saa->endmarkhead = 0;
539 }
540 }
541 }
542 #ifdef IDEBUG
543 if (astat & SAA7146_PSR_PPEF) {
544 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
545 }
546 if (astat & SAA7146_PSR_PABO) {
547 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
548 }
549 if (astat & SAA7146_PSR_PPED) {
550 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
551 }
552 if (astat & SAA7146_PSR_RPS_I1) {
553 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
554 }
555 if (astat & SAA7146_PSR_RPS_I0) {
556 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
557 }
558 if (astat & SAA7146_PSR_RPS_LATE1) {
559 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
560 }
561 if (astat & SAA7146_PSR_RPS_LATE0) {
562 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
563 }
564 if (astat & SAA7146_PSR_RPS_E1) {
565 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
566 }
567 if (astat & SAA7146_PSR_RPS_E0) {
568 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
569 }
570 if (astat & SAA7146_PSR_RPS_TO1) {
571 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
572 }
573 if (astat & SAA7146_PSR_RPS_TO0) {
574 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
575 }
576 if (astat & SAA7146_PSR_UPLD) {
577 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
578 }
579 if (astat & SAA7146_PSR_DEBI_E) {
580 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
581 }
582 if (astat & SAA7146_PSR_I2C_S) {
583 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
584 }
585 if (astat & SAA7146_PSR_I2C_E) {
586 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
587 }
588 if (astat & SAA7146_PSR_A2_IN) {
589 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
590 }
591 if (astat & SAA7146_PSR_A2_OUT) {
592 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
593 }
594 if (astat & SAA7146_PSR_A1_IN) {
595 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
596 }
597 if (astat & SAA7146_PSR_A1_OUT) {
598 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
599 }
600 if (astat & SAA7146_PSR_AFOU) {
601 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
602 }
603 if (astat & SAA7146_PSR_V_PE) {
604 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
605 }
606 if (astat & SAA7146_PSR_VFOU) {
607 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
608 }
609 if (astat & SAA7146_PSR_FIDA) {
610 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
611 }
612 if (astat & SAA7146_PSR_FIDB) {
613 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
614 }
615 if (astat & SAA7146_PSR_PIN3) {
616 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
617 }
618 if (astat & SAA7146_PSR_PIN2) {
619 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
620 }
621 if (astat & SAA7146_PSR_PIN0) {
622 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
623 }
624 if (astat & SAA7146_PSR_ECS) {
625 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
626 }
627 if (astat & SAA7146_PSR_EC3S) {
628 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
629 }
630 if (astat & SAA7146_PSR_EC0S) {
631 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
632 }
633 #endif
634 count++;
635 if (count > 15)
636 printk(KERN_WARNING "stradis%d: irq loop %d\n",
637 saa->nr, count);
638 if (count > 20) {
639 saawrite(0, SAA7146_IER);
640 printk(KERN_ERR
641 "stradis%d: IRQ loop cleared\n", saa->nr);
642 }
643 }
644 }
645
ibm_send_command(struct saa7146 * saa,int command,int data,int chain)646 static int ibm_send_command(struct saa7146 *saa,
647 int command, int data, int chain)
648 {
649 int i;
650
651 if (chain)
652 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2);
653 else
654 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
655 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
656 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
657 for (i = 0; i < 100 &&
658 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
659 schedule();
660 if (i == 100)
661 return -1;
662 return 0;
663 }
664
cs4341_setlevel(struct saa7146 * saa,int left,int right)665 static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
666 {
667 I2CWrite(&(saa->i2c), 0x22, 0x03,
668 left > 94 ? 94 : left, 2);
669 I2CWrite(&(saa->i2c), 0x22, 0x04,
670 right > 94 ? 94 : right, 2);
671 }
672
initialize_cs4341(struct saa7146 * saa)673 static void initialize_cs4341(struct saa7146 *saa)
674 {
675 int i;
676 for (i = 0; i < 200; i++) {
677 /* auto mute off, power on, no de-emphasis */
678 /* I2S data up to 24-bit 64xFs internal SCLK */
679 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x11, 2);
680 /* ATAPI mixer settings */
681 I2CWrite(&(saa->i2c), 0x22, 0x02, 0x49, 2);
682 /* attenuation left 3db */
683 I2CWrite(&(saa->i2c), 0x22, 0x03, 0x00, 2);
684 /* attenuation right 3db */
685 I2CWrite(&(saa->i2c), 0x22, 0x04, 0x00, 2);
686 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x10, 2);
687 if (I2CRead(&(saa->i2c), 0x22, 0x02, 1) == 0x49)
688 break;
689 schedule();
690 }
691 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
692 return;
693 }
694
initialize_cs8420(struct saa7146 * saa,int pro)695 static void initialize_cs8420(struct saa7146 *saa, int pro)
696 {
697 int i;
698 u8 *sequence;
699 if (pro)
700 sequence = mode8420pro;
701 else
702 sequence = mode8420con;
703 for (i = 0; i < INIT8420LEN; i++)
704 I2CWrite(&(saa->i2c), 0x20, init8420[i * 2],
705 init8420[i * 2 + 1], 2);
706 for (i = 0; i < MODE8420LEN; i++)
707 I2CWrite(&(saa->i2c), 0x20, sequence[i * 2],
708 sequence[i * 2 + 1], 2);
709 printk("stradis%d: CS8420 initialized\n", saa->nr);
710 }
711
initialize_saa7121(struct saa7146 * saa,int dopal)712 static void initialize_saa7121(struct saa7146 *saa, int dopal)
713 {
714 int i, mod;
715 u8 *sequence;
716 if (dopal)
717 sequence = init7121pal;
718 else
719 sequence = init7121ntsc;
720 mod = saaread(SAA7146_PSR) & 0x08;
721 /* initialize PAL/NTSC video encoder */
722 for (i = 0; i < INIT7121LEN; i++) {
723 if (NewCard) { /* handle new card encoder differences */
724 if (sequence[i*2] == 0x3a)
725 I2CWrite(&(saa->i2c), 0x88, 0x3a, 0x13, 2);
726 else if (sequence[i*2] == 0x6b)
727 I2CWrite(&(saa->i2c), 0x88, 0x6b, 0x20, 2);
728 else if (sequence[i*2] == 0x6c)
729 I2CWrite(&(saa->i2c), 0x88, 0x6c,
730 dopal ? 0x09 : 0xf5, 2);
731 else if (sequence[i*2] == 0x6d)
732 I2CWrite(&(saa->i2c), 0x88, 0x6d,
733 dopal ? 0x20 : 0x00, 2);
734 else if (sequence[i*2] == 0x7a)
735 I2CWrite(&(saa->i2c), 0x88, 0x7a,
736 dopal ? (PALFirstActive - 1) :
737 (NTSCFirstActive - 4), 2);
738 else if (sequence[i*2] == 0x7b)
739 I2CWrite(&(saa->i2c), 0x88, 0x7b,
740 dopal ? PALLastActive :
741 NTSCLastActive, 2);
742 else I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
743 sequence[i * 2 + 1], 2);
744 } else {
745 if (sequence[i*2] == 0x6b && mod)
746 I2CWrite(&(saa->i2c), 0x88, 0x6b,
747 (sequence[i * 2 + 1] ^ 0x09), 2);
748 else if (sequence[i*2] == 0x7a)
749 I2CWrite(&(saa->i2c), 0x88, 0x7a,
750 dopal ? (PALFirstActive - 1) :
751 (NTSCFirstActive - 4), 2);
752 else if (sequence[i*2] == 0x7b)
753 I2CWrite(&(saa->i2c), 0x88, 0x7b,
754 dopal ? PALLastActive :
755 NTSCLastActive, 2);
756 else
757 I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
758 sequence[i * 2 + 1], 2);
759 }
760 }
761 }
762
set_genlock_offset(struct saa7146 * saa,int noffset)763 static void set_genlock_offset(struct saa7146 *saa, int noffset)
764 {
765 int nCode;
766 int PixelsPerLine = 858;
767 if (CurrentMode == VIDEO_MODE_PAL)
768 PixelsPerLine = 864;
769 if (noffset > 500)
770 noffset = 500;
771 else if (noffset < -500)
772 noffset = -500;
773 nCode = noffset + 0x100;
774 if (nCode == 1)
775 nCode = 0x401;
776 else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode;
777 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
778 }
779
set_out_format(struct saa7146 * saa,int mode)780 static void set_out_format(struct saa7146 *saa, int mode)
781 {
782 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
783 saa->boardcfg[2] = mode;
784 /* do not adjust analog video parameters here, use saa7121 init */
785 /* you will affect the SDI output on the new card */
786 if (mode == VIDEO_MODE_PAL) { /* PAL */
787 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
788 mdelay(50);
789 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
790 if (NewCard) {
791 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
792 0xe100, 2);
793 mdelay(50);
794 }
795 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
796 NewCard ? 0xe500: 0x6500, 2);
797 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
798 (1 << 8) |
799 (NewCard ? PALFirstActive : PALFirstActive-6), 2);
800 } else { /* NTSC */
801 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
802 mdelay(50);
803 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
804 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
805 NewCard ? 0xe100: 0x6100, 2);
806 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
807 (1 << 8) |
808 (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2);
809 }
810 }
811
812
813 /* Intialize bitmangler to map from a byte value to the mangled word that
814 * must be output to program the Xilinx part through the DEBI port.
815 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
816 * transfer FPGA code, init IBM chip, transfer IBM microcode
817 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
818 */
819 static u16 bitmangler[256];
820
initialize_fpga(struct video_code * bitdata)821 static int initialize_fpga(struct video_code *bitdata)
822 {
823 int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
824 u16 *dmabuf;
825 u8 *newdma;
826 struct saa7146 *saa;
827
828 /* verify fpga code */
829 for (startindex = 0; startindex < bitdata->datasize; startindex++)
830 if (bitdata->data[startindex] == 255)
831 break;
832 if (startindex == bitdata->datasize) {
833 printk(KERN_INFO "stradis: bad fpga code\n");
834 return -1;
835 }
836 /* initialize all detected cards */
837 for (num = 0; num < saa_num; num++) {
838 saa = &saa7146s[num];
839 if (saa->boardcfg[0] > 20)
840 continue; /* card was programmed */
841 loadtwo = (saa->boardcfg[18] & 0x10);
842 if (!NewCard) /* we have an old board */
843 for (i = 0; i < 256; i++)
844 bitmangler[i] = ((i & 0x01) << 15) |
845 ((i & 0x02) << 6) | ((i & 0x04) << 4) |
846 ((i & 0x08) << 9) | ((i & 0x10) << 7) |
847 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
848 ((i & 0x80) >> 7);
849 else /* else we have a new board */
850 for (i = 0; i < 256; i++)
851 bitmangler[i] = ((i & 0x01) << 7) |
852 ((i & 0x02) << 5) | ((i & 0x04) << 3) |
853 ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
854 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
855 ((i & 0x80) >> 7);
856
857 dmabuf = (u16 *) saa->dmadebi;
858 newdma = (u8 *) saa->dmadebi;
859 if (NewCard) { /* SDM2xxx */
860 if (!strncmp(bitdata->loadwhat, "decoder2", 8))
861 continue; /* fpga not for this card */
862 if (!strncmp(&saa->boardcfg[42],
863 bitdata->loadwhat, 8)) {
864 loadfile = 1;
865 } else if (loadtwo && !strncmp(&saa->boardcfg[19],
866 bitdata->loadwhat, 8)) {
867 loadfile = 2;
868 } else if (!saa->boardcfg[42] && /* special */
869 !strncmp("decxl", bitdata->loadwhat, 8)) {
870 loadfile = 1;
871 } else
872 continue; /* fpga not for this card */
873 if (loadfile != 1 && loadfile != 2) {
874 continue; /* skip to next card */
875 }
876 if (saa->boardcfg[0] && loadfile == 1 )
877 continue; /* skip to next card */
878 if (saa->boardcfg[0] != 1 && loadfile == 2)
879 continue; /* skip to next card */
880 saa->boardcfg[0]++; /* mark fpga handled */
881 printk("stradis%d: loading %s\n", saa->nr,
882 bitdata->loadwhat);
883 if (loadtwo && loadfile == 2)
884 goto send_fpga_stuff;
885 /* turn on the Audio interface to set PROG low */
886 saawrite(0x00400040, SAA7146_GPIO_CTRL);
887 saaread(SAA7146_PSR); /* ensure posted write */
888 /* wait for everyone to reset */
889 mdelay(10);
890 saawrite(0x00400000, SAA7146_GPIO_CTRL);
891 } else { /* original card */
892 if (strncmp(bitdata->loadwhat, "decoder2", 8))
893 continue; /* fpga not for this card */
894 /* Pull the Xilinx PROG signal WS3 low */
895 saawrite(0x02000200, SAA7146_MC1);
896 /* Turn on the Audio interface so can set PROG low */
897 saawrite(0x000000c0, SAA7146_ACON1);
898 /* Pull the Xilinx INIT signal (GPIO2) low */
899 saawrite(0x00400000, SAA7146_GPIO_CTRL);
900 /* Make sure everybody resets */
901 saaread(SAA7146_PSR); /* ensure posted write */
902 mdelay(10);
903 /* Release the Xilinx PROG signal */
904 saawrite(0x00000000, SAA7146_ACON1);
905 /* Turn off the Audio interface */
906 saawrite(0x02000000, SAA7146_MC1);
907 }
908 /* Release Xilinx INIT signal (WS2) */
909 saawrite(0x00000000, SAA7146_GPIO_CTRL);
910 /* Wait for the INIT to go High */
911 for (i = 0; i < 10000 &&
912 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
913 schedule();
914 if (i == 1000) {
915 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
916 return -1;
917 }
918 send_fpga_stuff:
919 if (NewCard) {
920 for (i = startindex; i < bitdata->datasize; i++)
921 newdma[i - startindex] =
922 bitmangler[bitdata->data[i]];
923 debiwrite(saa, 0x01420000, 0, 0,
924 ((bitdata->datasize - startindex) + 5));
925 if (loadtwo) {
926 if (loadfile == 1) {
927 printk("stradis%d: "
928 "awaiting 2nd FPGA bitfile\n",
929 saa->nr);
930 continue; /* skip to next card */
931 }
932
933 }
934 } else {
935 for (i = startindex; i < bitdata->datasize; i++)
936 dmabuf[i - startindex] =
937 bitmangler[bitdata->data[i]];
938 debiwrite(saa, 0x014a0000, 0, 0,
939 ((bitdata->datasize - startindex) + 5) * 2);
940 }
941 for (i = 0; i < 1000 &&
942 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
943 schedule();
944 if (i == 1000) {
945 printk(KERN_INFO "stradis%d: FPGA load failed\n",
946 saa->nr);
947 failure++;
948 continue;
949 }
950 if (!NewCard) {
951 /* Pull the Xilinx INIT signal (GPIO2) low */
952 saawrite(0x00400000, SAA7146_GPIO_CTRL);
953 saaread(SAA7146_PSR); /* ensure posted write */
954 mdelay(2);
955 saawrite(0x00000000, SAA7146_GPIO_CTRL);
956 mdelay(2);
957 }
958 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
959 saa->boardcfg[0] = 26; /* mark fpga programmed */
960 /* set VXCO to its lowest frequency */
961 debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
962 if (NewCard) {
963 /* mute CS3310 */
964 if (HaveCS3310)
965 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
966 0, 2);
967 /* set VXCO to PWM mode, release reset, blank on */
968 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
969 mdelay(10);
970 /* unmute CS3310 */
971 if (HaveCS3310)
972 debiwrite(saa, debNormal, XILINX_CTL0,
973 0x2020, 2);
974 }
975 /* set source Black */
976 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
977 saa->boardcfg[4] = 22; /* set NTSC First Active Line */
978 saa->boardcfg[5] = 23; /* set PAL First Active Line */
979 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
980 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
981 set_out_format(saa, VIDEO_MODE_NTSC);
982 mdelay(50);
983 /* begin IBM chip init */
984 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
985 saaread(SAA7146_PSR); /* wait for reset */
986 mdelay(5);
987 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
988 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
989 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
990 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
991 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
992 if (NewCard) {
993 mdelay(5);
994 /* set i2s rate converter to 48KHz */
995 debiwrite(saa, debNormal, 0x80c0, 6, 2);
996 /* we must init CS8420 first since rev b pulls i2s */
997 /* master clock low and CS4341 needs i2s master to */
998 /* run the i2c port. */
999 if (HaveCS8420) {
1000 /* 0=consumer, 1=pro */
1001 initialize_cs8420(saa, 0);
1002 }
1003 mdelay(5);
1004 if (HaveCS4341)
1005 initialize_cs4341(saa);
1006 }
1007 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1008 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1009 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1010 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1011 if (NewCard)
1012 set_genlock_offset(saa, 0);
1013 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1014 #if 0
1015 /* enable genlock */
1016 debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
1017 #else
1018 /* disable genlock */
1019 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
1020 #endif
1021 }
1022 return failure;
1023 }
1024
do_ibm_reset(struct saa7146 * saa)1025 static int do_ibm_reset(struct saa7146 *saa)
1026 {
1027 /* failure if decoder not previously programmed */
1028 if (saa->boardcfg[0] < 37)
1029 return -EIO;
1030 /* mute CS3310 */
1031 if (HaveCS3310)
1032 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
1033 /* disable interrupts */
1034 saawrite(0, SAA7146_IER);
1035 saa->audhead = saa->audtail = 0;
1036 saa->vidhead = saa->vidtail = 0;
1037 /* tristate debi bus, disable debi transfers */
1038 saawrite(0x00880000, SAA7146_MC1);
1039 /* ensure posted write */
1040 saaread(SAA7146_MC1);
1041 mdelay(50);
1042 /* re-enable debi transfers */
1043 saawrite(0x00880088, SAA7146_MC1);
1044 /* set source Black */
1045 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
1046 /* begin IBM chip init */
1047 set_out_format(saa, CurrentMode);
1048 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
1049 saaread(SAA7146_PSR); /* wait for reset */
1050 mdelay(5);
1051 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
1052 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
1053 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1054 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
1055 if (NewCard) {
1056 mdelay(5);
1057 /* set i2s rate converter to 48KHz */
1058 debiwrite(saa, debNormal, 0x80c0, 6, 2);
1059 /* we must init CS8420 first since rev b pulls i2s */
1060 /* master clock low and CS4341 needs i2s master to */
1061 /* run the i2c port. */
1062 if (HaveCS8420) {
1063 /* 0=consumer, 1=pro */
1064 initialize_cs8420(saa, 1);
1065 }
1066 mdelay(5);
1067 if (HaveCS4341)
1068 initialize_cs4341(saa);
1069 }
1070 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1071 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1072 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1073 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1074 if (NewCard)
1075 set_genlock_offset(saa, 0);
1076 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1077 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1078 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1079 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1080 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
1081 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
1082 }
1083 if (HaveCS3310) {
1084 int i = CS3310MaxLvl;
1085 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1086 }
1087 /* start video decoder */
1088 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1089 /* 256k vid, 3520 bytes aud */
1090 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
1091 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1092 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1093 /* enable buffer threshold irq */
1094 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1095 /* clear pending interrupts */
1096 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1097 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1098 return 0;
1099 }
1100
1101 /* load the decoder microcode */
initialize_ibmmpeg2(struct video_code * microcode)1102 static int initialize_ibmmpeg2(struct video_code *microcode)
1103 {
1104 int i, num;
1105 struct saa7146 *saa;
1106
1107 for (num = 0; num < saa_num; num++) {
1108 saa = &saa7146s[num];
1109 /* check that FPGA is loaded */
1110 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
1111 if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) !=
1112 0xa55a) {
1113 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
1114 saa->nr, i);
1115 #if 0
1116 return -1;
1117 #endif
1118 }
1119 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
1120 if (saa->boardcfg[0] > 27)
1121 continue; /* skip to next card */
1122 /* load video control store */
1123 saa->boardcfg[1] = 0x13; /* no-sync default */
1124 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1125 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1126 for (i = 0; i < microcode->datasize / 2; i++)
1127 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
1128 (microcode->data[i * 2] << 8) |
1129 microcode->data[i * 2 + 1], 2);
1130 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1131 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1132 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1133 ChipControl, 2);
1134 saa->boardcfg[0] = 28;
1135 }
1136 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
1137 if (saa->boardcfg[0] > 35)
1138 continue; /* skip to next card */
1139 /* load audio control store */
1140 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1141 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1142 for (i = 0; i < microcode->datasize; i++)
1143 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
1144 microcode->data[i], 1);
1145 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1146 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1147 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1148 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1149 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1150 0xe000, 1)) {
1151 printk(KERN_ERR
1152 "stradis%d: IBM config failed\n",
1153 saa->nr);
1154 return -1;
1155 }
1156 /* set PWM to center value */
1157 if (NewCard) {
1158 debiwrite(saa, debNormal, XILINX_PWM,
1159 saa->boardcfg[14] +
1160 (saa->boardcfg[13]<<8), 2);
1161 } else
1162 debiwrite(saa, debNormal, XILINX_PWM,
1163 0x46, 2);
1164 if (HaveCS3310) {
1165 i = CS3310MaxLvl;
1166 debiwrite(saa, debNormal,
1167 XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1168 }
1169 printk(KERN_INFO
1170 "stradis%d: IBM MPEGCD%d Initialized\n",
1171 saa->nr, 18 + (debiread(saa, debNormal,
1172 IBM_MP2_CHIP_CONTROL, 2) >> 12));
1173 /* start video decoder */
1174 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1175 ChipControl, 2);
1176 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD,
1177 0x4037, 2); /* 256k vid, 3520 bytes aud */
1178 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1179 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1180 /* enable buffer threshold irq */
1181 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1182 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1183 /* enable gpio irq */
1184 saawrite(0x00002000, SAA7146_GPIO_CTRL);
1185 /* enable decoder output to HPS */
1186 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1187 saa->boardcfg[0] = 37;
1188 }
1189 }
1190 return 0;
1191 }
1192
1193 static u32 palette2fmt[] =
1194 { /* some of these YUV translations are wrong */
1195 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
1196 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
1197 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
1198 };
1199 static int bpp2fmt[4] =
1200 {
1201 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
1202 VIDEO_PALETTE_RGB32
1203 };
1204
1205 /* I wish I could find a formula to calculate these... */
1206 static u32 h_prescale[64] =
1207 {
1208 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
1209 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
1210 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
1211 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
1212 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
1213 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
1214 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
1215 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
1216 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
1217 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
1218 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
1219 };
1220 static u32 v_gain[64] =
1221 {
1222 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
1223 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
1224 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
1225 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1226 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1227 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1228 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1229 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1230 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1231 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1232 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1233 };
1234
1235
saa7146_set_winsize(struct saa7146 * saa)1236 static void saa7146_set_winsize(struct saa7146 *saa)
1237 {
1238 u32 format;
1239 int offset, yacl, ysci;
1240 saa->win.color_fmt = format =
1241 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
1242 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
1243 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
1244 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
1245 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
1246 saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
1247 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
1248 SAA7146_PROT_ADDR1);
1249 saawrite(0, SAA7146_PAGE1);
1250 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1251 offset = (704 / (saa->win.width - 1)) & 0x3f;
1252 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
1253 offset = (720896 / saa->win.width) / (offset + 1);
1254 saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE);
1255 if (CurrentMode == VIDEO_MODE_NTSC) {
1256 yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0;
1257 ysci = 1024 - (saa->win.height * 1024 / 480);
1258 } else {
1259 yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0;
1260 ysci = 1024 - (saa->win.height * 1024 / 576);
1261 }
1262 saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE);
1263 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
1264 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
1265 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
1266 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H),
1267 SAA7146_MC2);
1268 }
1269
1270 /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
1271 * bitmap is fixed width, 128 bytes (1024 pixels represented)
1272 * arranged most-sigificant-bit-left in 32-bit words
1273 * based on saa7146 clipping hardware, it swaps bytes if LE
1274 * much of this makes up for egcs brain damage -- so if you
1275 * are wondering "why did he do this?" it is because the C
1276 * was adjusted to generate the optimal asm output without
1277 * writing non-portable __asm__ directives.
1278 */
1279
clip_draw_rectangle(u32 * clipmap,int x,int y,int w,int h)1280 static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
1281 {
1282 register int startword, endword;
1283 register u32 bitsleft, bitsright;
1284 u32 *temp;
1285 if (x < 0) {
1286 w += x;
1287 x = 0;
1288 }
1289 if (y < 0) {
1290 h += y;
1291 y = 0;
1292 }
1293 if (w <= 0 || h <= 0 || x > 1023 || y > 639)
1294 return; /* throw away bad clips */
1295 if (x + w > 1024)
1296 w = 1024 - x;
1297 if (y + h > 640)
1298 h = 640 - y;
1299 startword = (x >> 5);
1300 endword = ((x + w) >> 5);
1301 bitsleft = (0xffffffff >> (x & 31));
1302 bitsright = (0xffffffff << (~((x + w) - (endword<<5))));
1303 temp = &clipmap[(y<<5) + startword];
1304 w = endword - startword;
1305 if (!w) {
1306 bitsleft |= bitsright;
1307 for (y = 0; y < h; y++) {
1308 *temp |= bitsleft;
1309 temp += 32;
1310 }
1311 } else {
1312 for (y = 0; y < h; y++) {
1313 *temp++ |= bitsleft;
1314 for (x = 1; x < w; x++)
1315 *temp++ = 0xffffffff;
1316 *temp |= bitsright;
1317 temp += (32 - w);
1318 }
1319 }
1320 }
1321
make_clip_tab(struct saa7146 * saa,struct video_clip * cr,int ncr)1322 static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
1323 {
1324 int i, width, height;
1325 u32 *clipmap;
1326
1327 clipmap = saa->dmavid2;
1328 if((width=saa->win.width)>1023)
1329 width = 1023; /* sanity check */
1330 if((height=saa->win.height)>640)
1331 height = 639; /* sanity check */
1332 if (ncr > 0) { /* rectangles pased */
1333 /* convert rectangular clips to a bitmap */
1334 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
1335 for (i = 0; i < ncr; i++)
1336 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
1337 cr[i].width, cr[i].height);
1338 }
1339 /* clip against viewing window AND screen
1340 so we do not have to rely on the user program
1341 */
1342 clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ?
1343 (saa->win.swidth-saa->win.x) : width, 0, 1024, 768);
1344 clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ?
1345 (saa->win.sheight-saa->win.y) : height,1024,768);
1346 if (saa->win.x<0)
1347 clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768);
1348 if (saa->win.y<0)
1349 clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y));
1350 }
1351
saa_ioctl(struct video_device * dev,unsigned int cmd,void * arg)1352 static int saa_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
1353 {
1354 struct saa7146 *saa = (struct saa7146 *) dev;
1355 switch (cmd) {
1356 case VIDIOCGCAP:
1357 {
1358 struct video_capability b;
1359 strcpy(b.name, saa->video_dev.name);
1360 b.type = VID_TYPE_CAPTURE |
1361 VID_TYPE_OVERLAY |
1362 VID_TYPE_CLIPPING |
1363 VID_TYPE_FRAMERAM |
1364 VID_TYPE_SCALES;
1365 b.channels = 1;
1366 b.audios = 1;
1367 b.maxwidth = 768;
1368 b.maxheight = 576;
1369 b.minwidth = 32;
1370 b.minheight = 32;
1371 if (copy_to_user(arg, &b, sizeof(b)))
1372 return -EFAULT;
1373 return 0;
1374 }
1375 case VIDIOCGPICT:
1376 {
1377 struct video_picture p = saa->picture;
1378 if (saa->win.depth == 8)
1379 p.palette = VIDEO_PALETTE_HI240;
1380 if (saa->win.depth == 15)
1381 p.palette = VIDEO_PALETTE_RGB555;
1382 if (saa->win.depth == 16)
1383 p.palette = VIDEO_PALETTE_RGB565;
1384 if (saa->win.depth == 24)
1385 p.palette = VIDEO_PALETTE_RGB24;
1386 if (saa->win.depth == 32)
1387 p.palette = VIDEO_PALETTE_RGB32;
1388 if (copy_to_user(arg, &p, sizeof(p)))
1389 return -EFAULT;
1390 return 0;
1391 }
1392 case VIDIOCSPICT:
1393 {
1394 struct video_picture p;
1395 u32 format;
1396 if (copy_from_user(&p, arg, sizeof(p)))
1397 return -EFAULT;
1398 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
1399 format = palette2fmt[p.palette];
1400 saa->win.color_fmt = format;
1401 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1402 }
1403 saawrite(((p.brightness & 0xff00) << 16) |
1404 ((p.contrast & 0xfe00) << 7) |
1405 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
1406 saa->picture = p;
1407 /* upload changed registers */
1408 saawrite(((SAA7146_MC2_UPLD_HPS_H |
1409 SAA7146_MC2_UPLD_HPS_V) << 16) |
1410 SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V,
1411 SAA7146_MC2);
1412 return 0;
1413 }
1414 case VIDIOCSWIN:
1415 {
1416 struct video_window vw;
1417 struct video_clip *vcp = NULL;
1418
1419 if (copy_from_user(&vw, arg, sizeof(vw)))
1420 return -EFAULT;
1421
1422 if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */
1423 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1424 return -EINVAL;
1425 }
1426 if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */
1427 int i = vw.x;
1428 vw.x = (vw.x + 3) & ~3;
1429 i = vw.x - i;
1430 vw.width -= i;
1431 }
1432 saa->win.x = vw.x;
1433 saa->win.y = vw.y;
1434 saa->win.width = vw.width;
1435 if (saa->win.width > 768)
1436 saa->win.width = 768;
1437 saa->win.height = vw.height;
1438 if (CurrentMode == VIDEO_MODE_NTSC) {
1439 if (saa->win.height > 480)
1440 saa->win.height = 480;
1441 } else {
1442 if (saa->win.height > 576)
1443 saa->win.height = 576;
1444 }
1445
1446 /* stop capture */
1447 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1448 saa7146_set_winsize(saa);
1449
1450 /*
1451 * Do any clips.
1452 */
1453 if (vw.clipcount < 0) {
1454 if (copy_from_user(saa->dmavid2, vw.clips,
1455 VIDEO_CLIPMAP_SIZE))
1456 return -EFAULT;
1457 }
1458 else if (vw.clipcount > 16384) {
1459 return -EINVAL;
1460 } else if (vw.clipcount > 0) {
1461 if ((vcp = vmalloc(sizeof(struct video_clip) *
1462 (vw.clipcount))) == NULL)
1463 return -ENOMEM;
1464 if (copy_from_user(vcp, vw.clips,
1465 sizeof(struct video_clip) *
1466 vw.clipcount)) {
1467 vfree(vcp);
1468 return -EFAULT;
1469 }
1470 } else /* nothing clipped */
1471 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
1472 make_clip_tab(saa, vcp, vw.clipcount);
1473 if (vw.clipcount > 0)
1474 vfree(vcp);
1475
1476 /* start capture & clip dma if we have an address */
1477 if ((saa->cap & 3) && saa->win.vidadr != 0)
1478 saawrite(((SAA7146_MC1_TR_E_1 |
1479 SAA7146_MC1_TR_E_2) << 16) | 0xffff,
1480 SAA7146_MC1);
1481 return 0;
1482 }
1483 case VIDIOCGWIN:
1484 {
1485 struct video_window vw;
1486 vw.x = saa->win.x;
1487 vw.y = saa->win.y;
1488 vw.width = saa->win.width;
1489 vw.height = saa->win.height;
1490 vw.chromakey = 0;
1491 vw.flags = 0;
1492 if (copy_to_user(arg, &vw, sizeof(vw)))
1493 return -EFAULT;
1494 return 0;
1495 }
1496 case VIDIOCCAPTURE:
1497 {
1498 int v;
1499 if (copy_from_user(&v, arg, sizeof(v)))
1500 return -EFAULT;
1501 if (v == 0) {
1502 saa->cap &= ~1;
1503 saawrite((SAA7146_MC1_TR_E_1 << 16),
1504 SAA7146_MC1);
1505 } else {
1506 if (saa->win.vidadr == 0 || saa->win.width == 0
1507 || saa->win.height == 0)
1508 return -EINVAL;
1509 saa->cap |= 1;
1510 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
1511 SAA7146_MC1);
1512 }
1513 return 0;
1514 }
1515 case VIDIOCGFBUF:
1516 {
1517 struct video_buffer v;
1518 v.base = (void *) saa->win.vidadr;
1519 v.height = saa->win.sheight;
1520 v.width = saa->win.swidth;
1521 v.depth = saa->win.depth;
1522 v.bytesperline = saa->win.bpl;
1523 if (copy_to_user(arg, &v, sizeof(v)))
1524 return -EFAULT;
1525 return 0;
1526
1527 }
1528 case VIDIOCSFBUF:
1529 {
1530 struct video_buffer v;
1531 if (!capable(CAP_SYS_ADMIN))
1532 return -EPERM;
1533 if (copy_from_user(&v, arg, sizeof(v)))
1534 return -EFAULT;
1535 if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
1536 v.depth != 24 && v.depth != 32 && v.width > 16 &&
1537 v.height > 16 && v.bytesperline > 16)
1538 return -EINVAL;
1539 if (v.base)
1540 saa->win.vidadr = (unsigned long) v.base;
1541 saa->win.sheight = v.height;
1542 saa->win.swidth = v.width;
1543 saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
1544 saa->win.depth = v.depth;
1545 saa->win.bpl = v.bytesperline;
1546
1547 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n",
1548 v.base, v.width, v.height, saa->win.bpp, saa->win.bpl));
1549 saa7146_set_winsize(saa);
1550 return 0;
1551 }
1552 case VIDIOCKEY:
1553 {
1554 /* Will be handled higher up .. */
1555 return 0;
1556 }
1557
1558 case VIDIOCGAUDIO:
1559 {
1560 struct video_audio v;
1561 v = saa->audio_dev;
1562 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
1563 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
1564 strcpy(v.name, "MPEG");
1565 v.mode = VIDEO_SOUND_STEREO;
1566 if (copy_to_user(arg, &v, sizeof(v)))
1567 return -EFAULT;
1568 return 0;
1569 }
1570 case VIDIOCSAUDIO:
1571 {
1572 struct video_audio v;
1573 int i;
1574 if (copy_from_user(&v, arg, sizeof(v)))
1575 return -EFAULT;
1576 i = (~(v.volume>>8))&0xff;
1577 if (!HaveCS4341) {
1578 if (v.flags & VIDEO_AUDIO_MUTE) {
1579 debiwrite(saa, debNormal,
1580 IBM_MP2_FRNT_ATTEN,
1581 0xffff, 2);
1582 }
1583 if (!(v.flags & VIDEO_AUDIO_MUTE))
1584 debiwrite(saa, debNormal,
1585 IBM_MP2_FRNT_ATTEN,
1586 0x0000, 2);
1587 if (v.flags & VIDEO_AUDIO_VOLUME)
1588 debiwrite(saa, debNormal,
1589 IBM_MP2_FRNT_ATTEN,
1590 (i<<8)|i, 2);
1591 } else {
1592 if (v.flags & VIDEO_AUDIO_MUTE)
1593 cs4341_setlevel(saa, 0xff, 0xff);
1594 if (!(v.flags & VIDEO_AUDIO_MUTE))
1595 cs4341_setlevel(saa, 0, 0);
1596 if (v.flags & VIDEO_AUDIO_VOLUME)
1597 cs4341_setlevel(saa, i, i);
1598 }
1599 saa->audio_dev = v;
1600 return 0;
1601 }
1602
1603 case VIDIOCGUNIT:
1604 {
1605 struct video_unit vu;
1606 vu.video = saa->video_dev.minor;
1607 vu.vbi = VIDEO_NO_UNIT;
1608 vu.radio = VIDEO_NO_UNIT;
1609 vu.audio = VIDEO_NO_UNIT;
1610 vu.teletext = VIDEO_NO_UNIT;
1611 if (copy_to_user((void *) arg, (void *) &vu, sizeof(vu)))
1612 return -EFAULT;
1613 return 0;
1614 }
1615 case VIDIOCSPLAYMODE:
1616 {
1617 struct video_play_mode pmode;
1618 if (copy_from_user((void *) &pmode, arg,
1619 sizeof(struct video_play_mode)))
1620 return -EFAULT;
1621 switch (pmode.mode) {
1622 case VID_PLAY_VID_OUT_MODE:
1623 if (pmode.p1 != VIDEO_MODE_NTSC &&
1624 pmode.p1 != VIDEO_MODE_PAL)
1625 return -EINVAL;
1626 set_out_format(saa, pmode.p1);
1627 return 0;
1628 case VID_PLAY_GENLOCK:
1629 debiwrite(saa, debNormal,
1630 XILINX_CTL0,
1631 (pmode.p1 ? 0x8000 : 0x8080),
1632 2);
1633 if (NewCard)
1634 set_genlock_offset(saa,
1635 pmode.p2);
1636 return 0;
1637 case VID_PLAY_NORMAL:
1638 debiwrite(saa, debNormal,
1639 IBM_MP2_CHIP_CONTROL,
1640 ChipControl, 2);
1641 ibm_send_command(saa,
1642 IBM_MP2_PLAY, 0, 0);
1643 saa->playmode = pmode.mode;
1644 return 0;
1645 case VID_PLAY_PAUSE:
1646 /* IBM removed the PAUSE command */
1647 /* they say use SINGLE_FRAME now */
1648 case VID_PLAY_SINGLE_FRAME:
1649 ibm_send_command(saa,
1650 IBM_MP2_SINGLE_FRAME,
1651 0, 0);
1652 if (saa->playmode == pmode.mode) {
1653 debiwrite(saa, debNormal,
1654 IBM_MP2_CHIP_CONTROL,
1655 ChipControl, 2);
1656 }
1657 saa->playmode = pmode.mode;
1658 return 0;
1659 case VID_PLAY_FAST_FORWARD:
1660 ibm_send_command(saa,
1661 IBM_MP2_FAST_FORWARD, 0, 0);
1662 saa->playmode = pmode.mode;
1663 return 0;
1664 case VID_PLAY_SLOW_MOTION:
1665 ibm_send_command(saa,
1666 IBM_MP2_SLOW_MOTION,
1667 pmode.p1, 0);
1668 saa->playmode = pmode.mode;
1669 return 0;
1670 case VID_PLAY_IMMEDIATE_NORMAL:
1671 /* ensure transfers resume */
1672 debiwrite(saa, debNormal,
1673 IBM_MP2_CHIP_CONTROL,
1674 ChipControl, 2);
1675 ibm_send_command(saa,
1676 IBM_MP2_IMED_NORM_PLAY, 0, 0);
1677 saa->playmode = VID_PLAY_NORMAL;
1678 return 0;
1679 case VID_PLAY_SWITCH_CHANNELS:
1680 saa->audhead = saa->audtail = 0;
1681 saa->vidhead = saa->vidtail = 0;
1682 ibm_send_command(saa,
1683 IBM_MP2_FREEZE_FRAME, 0, 1);
1684 ibm_send_command(saa,
1685 IBM_MP2_RESET_AUD_RATE, 0, 1);
1686 debiwrite(saa, debNormal,
1687 IBM_MP2_CHIP_CONTROL, 0, 2);
1688 ibm_send_command(saa,
1689 IBM_MP2_CHANNEL_SWITCH, 0, 1);
1690 debiwrite(saa, debNormal,
1691 IBM_MP2_CHIP_CONTROL,
1692 ChipControl, 2);
1693 ibm_send_command(saa,
1694 IBM_MP2_PLAY, 0, 0);
1695 saa->playmode = VID_PLAY_NORMAL;
1696 return 0;
1697 case VID_PLAY_FREEZE_FRAME:
1698 ibm_send_command(saa,
1699 IBM_MP2_FREEZE_FRAME, 0, 0);
1700 saa->playmode = pmode.mode;
1701 return 0;
1702 case VID_PLAY_STILL_MODE:
1703 ibm_send_command(saa,
1704 IBM_MP2_SET_STILL_MODE, 0, 0);
1705 saa->playmode = pmode.mode;
1706 return 0;
1707 case VID_PLAY_MASTER_MODE:
1708 if (pmode.p1 == VID_PLAY_MASTER_NONE)
1709 saa->boardcfg[1] = 0x13;
1710 else if (pmode.p1 ==
1711 VID_PLAY_MASTER_VIDEO)
1712 saa->boardcfg[1] = 0x23;
1713 else if (pmode.p1 ==
1714 VID_PLAY_MASTER_AUDIO)
1715 saa->boardcfg[1] = 0x43;
1716 else
1717 return -EINVAL;
1718 debiwrite(saa, debNormal,
1719 IBM_MP2_CHIP_CONTROL,
1720 ChipControl, 2);
1721 return 0;
1722 case VID_PLAY_ACTIVE_SCANLINES:
1723 if (CurrentMode == VIDEO_MODE_PAL) {
1724 if (pmode.p1 < 1 ||
1725 pmode.p2 > 625)
1726 return -EINVAL;
1727 saa->boardcfg[5] = pmode.p1;
1728 saa->boardcfg[55] = (pmode.p1 +
1729 (pmode.p2/2) - 1) &
1730 0xff;
1731 } else {
1732 if (pmode.p1 < 4 ||
1733 pmode.p2 > 525)
1734 return -EINVAL;
1735 saa->boardcfg[4] = pmode.p1;
1736 saa->boardcfg[54] = (pmode.p1 +
1737 (pmode.p2/2) - 4) &
1738 0xff;
1739 }
1740 set_out_format(saa, CurrentMode);
1741 case VID_PLAY_RESET:
1742 return do_ibm_reset(saa);
1743 case VID_PLAY_END_MARK:
1744 if (saa->endmarktail <
1745 saa->endmarkhead) {
1746 if (saa->endmarkhead -
1747 saa->endmarktail < 2)
1748 return -ENOSPC;
1749 } else if (saa->endmarkhead <=
1750 saa->endmarktail) {
1751 if (saa->endmarktail -
1752 saa->endmarkhead >
1753 (MAX_MARKS - 2))
1754 return -ENOSPC;
1755 } else
1756 return -ENOSPC;
1757 saa->endmark[saa->endmarktail] =
1758 saa->audtail;
1759 saa->endmarktail++;
1760 if (saa->endmarktail >= MAX_MARKS)
1761 saa->endmarktail = 0;
1762 }
1763 return -EINVAL;
1764 }
1765 case VIDIOCSWRITEMODE:
1766 {
1767 int mode;
1768 if (copy_from_user((void *) &mode, arg, sizeof(int)))
1769 return -EFAULT;
1770 if (mode == VID_WRITE_MPEG_AUD ||
1771 mode == VID_WRITE_MPEG_VID ||
1772 mode == VID_WRITE_CC ||
1773 mode == VID_WRITE_TTX ||
1774 mode == VID_WRITE_OSD) {
1775 saa->writemode = mode;
1776 return 0;
1777 }
1778 return -EINVAL;
1779 }
1780 case VIDIOCSMICROCODE:
1781 {
1782 struct video_code ucode;
1783 __u8 *udata;
1784 int i;
1785 if (copy_from_user((void *) &ucode, arg,
1786 sizeof(ucode)))
1787 return -EFAULT;
1788 if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
1789 strncmp(ucode.loadwhat, "dec", 3))
1790 return -EINVAL;
1791 if ((udata = vmalloc(ucode.datasize)) == NULL)
1792 return -ENOMEM;
1793 if (copy_from_user((void *) udata, ucode.data,
1794 ucode.datasize)) {
1795 vfree(udata);
1796 return -EFAULT;
1797 }
1798 ucode.data = udata;
1799 if (!strncmp(ucode.loadwhat, "decoder.aud", 11)
1800 || !strncmp(ucode.loadwhat, "decoder.vid", 11))
1801 i = initialize_ibmmpeg2(&ucode);
1802 else
1803 i = initialize_fpga(&ucode);
1804 vfree(udata);
1805 if (i)
1806 return -EINVAL;
1807 return 0;
1808
1809 }
1810 case VIDIOCGCHAN: /* this makes xawtv happy */
1811 {
1812 struct video_channel v;
1813 if (copy_from_user(&v, arg, sizeof(v)))
1814 return -EFAULT;
1815 v.flags = VIDEO_VC_AUDIO;
1816 v.tuners = 0;
1817 v.type = VID_TYPE_MPEG_DECODER;
1818 v.norm = CurrentMode;
1819 strcpy(v.name, "MPEG2");
1820 if (copy_to_user(arg, &v, sizeof(v)))
1821 return -EFAULT;
1822 return 0;
1823 }
1824 case VIDIOCSCHAN: /* this makes xawtv happy */
1825 {
1826 struct video_channel v;
1827 if (copy_from_user(&v, arg, sizeof(v)))
1828 return -EFAULT;
1829 /* do nothing */
1830 return 0;
1831 }
1832 default:
1833 return -ENOIOCTLCMD;
1834 }
1835 return 0;
1836 }
1837
saa_mmap(struct video_device * dev,const char * adr,unsigned long size)1838 static int saa_mmap(struct video_device *dev, const char *adr,
1839 unsigned long size)
1840 {
1841 struct saa7146 *saa = (struct saa7146 *) dev;
1842 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
1843 return -EINVAL;
1844 }
1845
saa_read(struct video_device * dev,char * buf,unsigned long count,int nonblock)1846 static long saa_read(struct video_device *dev, char *buf,
1847 unsigned long count, int nonblock)
1848 {
1849 return -EINVAL;
1850 }
1851
saa_write(struct video_device * dev,const char * buf,unsigned long count,int nonblock)1852 static long saa_write(struct video_device *dev, const char *buf,
1853 unsigned long count, int nonblock)
1854 {
1855 struct saa7146 *saa = (struct saa7146 *) dev;
1856 unsigned long todo = count;
1857 int blocksize, split;
1858 unsigned long flags;
1859
1860 while (todo > 0) {
1861 if (saa->writemode == VID_WRITE_MPEG_AUD) {
1862 spin_lock_irqsave(&saa->lock, flags);
1863 if (saa->audhead <= saa->audtail)
1864 blocksize = 65536-(saa->audtail - saa->audhead);
1865 else
1866 blocksize = saa->audhead - saa->audtail;
1867 spin_unlock_irqrestore(&saa->lock, flags);
1868 if (blocksize < 16384) {
1869 saawrite(SAA7146_PSR_DEBI_S |
1870 SAA7146_PSR_PIN1, SAA7146_IER);
1871 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1872 /* wait for buffer space to open */
1873 interruptible_sleep_on(&saa->audq);
1874 }
1875 spin_lock_irqsave(&saa->lock, flags);
1876 if (saa->audhead <= saa->audtail) {
1877 blocksize = 65536-(saa->audtail - saa->audhead);
1878 split = 65536 - saa->audtail;
1879 } else {
1880 blocksize = saa->audhead - saa->audtail;
1881 split = 65536;
1882 }
1883 spin_unlock_irqrestore(&saa->lock, flags);
1884 blocksize--;
1885 if (blocksize > todo)
1886 blocksize = todo;
1887 /* double check that we really have space */
1888 if (!blocksize)
1889 return -ENOSPC;
1890 if (split < blocksize) {
1891 if (copy_from_user(saa->audbuf +
1892 saa->audtail, buf, split))
1893 return -EFAULT;
1894 buf += split;
1895 todo -= split;
1896 blocksize -= split;
1897 saa->audtail = 0;
1898 }
1899 if (copy_from_user(saa->audbuf + saa->audtail, buf,
1900 blocksize))
1901 return -EFAULT;
1902 saa->audtail += blocksize;
1903 todo -= blocksize;
1904 buf += blocksize;
1905 saa->audtail &= 0xffff;
1906 } else if (saa->writemode == VID_WRITE_MPEG_VID) {
1907 spin_lock_irqsave(&saa->lock, flags);
1908 if (saa->vidhead <= saa->vidtail)
1909 blocksize=524288-(saa->vidtail - saa->vidhead);
1910 else
1911 blocksize = saa->vidhead - saa->vidtail;
1912 spin_unlock_irqrestore(&saa->lock, flags);
1913 if (blocksize < 65536) {
1914 saawrite(SAA7146_PSR_DEBI_S |
1915 SAA7146_PSR_PIN1, SAA7146_IER);
1916 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1917 /* wait for buffer space to open */
1918 interruptible_sleep_on(&saa->vidq);
1919 }
1920 spin_lock_irqsave(&saa->lock, flags);
1921 if (saa->vidhead <= saa->vidtail) {
1922 blocksize=524288-(saa->vidtail - saa->vidhead);
1923 split = 524288 - saa->vidtail;
1924 } else {
1925 blocksize = saa->vidhead - saa->vidtail;
1926 split = 524288;
1927 }
1928 spin_unlock_irqrestore(&saa->lock, flags);
1929 blocksize--;
1930 if (blocksize > todo)
1931 blocksize = todo;
1932 /* double check that we really have space */
1933 if (!blocksize)
1934 return -ENOSPC;
1935 if (split < blocksize) {
1936 if (copy_from_user(saa->vidbuf +
1937 saa->vidtail, buf, split))
1938 return -EFAULT;
1939 buf += split;
1940 todo -= split;
1941 blocksize -= split;
1942 saa->vidtail = 0;
1943 }
1944 if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
1945 blocksize))
1946 return -EFAULT;
1947 saa->vidtail += blocksize;
1948 todo -= blocksize;
1949 buf += blocksize;
1950 saa->vidtail &= 0x7ffff;
1951 } else if (saa->writemode == VID_WRITE_OSD) {
1952 if (count > 131072)
1953 return -ENOSPC;
1954 if (copy_from_user(saa->osdbuf, buf, count))
1955 return -EFAULT;
1956 buf += count;
1957 saa->osdhead = 0;
1958 saa->osdtail = count;
1959 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
1960 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
1961 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
1962 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
1963 debiread(saa, debNormal,
1964 IBM_MP2_DISP_MODE, 2) | 1, 2);
1965 /* trigger osd data transfer */
1966 saawrite(SAA7146_PSR_DEBI_S |
1967 SAA7146_PSR_PIN1, SAA7146_IER);
1968 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1969 }
1970 }
1971 return count;
1972 }
1973
saa_open(struct video_device * dev,int flags)1974 static int saa_open(struct video_device *dev, int flags)
1975 {
1976 struct saa7146 *saa = (struct saa7146 *) dev;
1977
1978 /* FIXME: Don't do it this way, use the video_device->fops
1979 * registration for a sane implementation of multiple opens */
1980 saa->video_dev.users--;
1981 saa->user++;
1982 if (saa->user > 1)
1983 return 0; /* device open already, don't reset */
1984 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
1985 return 0;
1986 }
1987
saa_close(struct video_device * dev)1988 static void saa_close(struct video_device *dev)
1989 {
1990 struct saa7146 *saa = (struct saa7146 *) dev;
1991 saa->user--;
1992 saa->video_dev.users++;
1993 if (saa->user > 0) /* still someone using device */
1994 return;
1995 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
1996 }
1997
1998 /* template for video_device-structure */
1999 static struct video_device saa_template =
2000 {
2001 owner: THIS_MODULE,
2002 name: "SAA7146A",
2003 type: VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
2004 hardware: VID_HARDWARE_SAA7146,
2005 open: saa_open,
2006 close: saa_close,
2007 read: saa_read,
2008 write: saa_write,
2009 ioctl: saa_ioctl,
2010 mmap: saa_mmap,
2011 };
2012
configure_saa7146(struct pci_dev * dev,int num)2013 static int configure_saa7146(struct pci_dev *dev, int num)
2014 {
2015 int result;
2016 struct saa7146 *saa;
2017
2018 saa = &saa7146s[num];
2019
2020 saa->endmarkhead = saa->endmarktail = 0;
2021 saa->win.x = saa->win.y = 0;
2022 saa->win.width = saa->win.cropwidth = 720;
2023 saa->win.height = saa->win.cropheight = 480;
2024 saa->win.cropx = saa->win.cropy = 0;
2025 saa->win.bpp = 2;
2026 saa->win.depth = 16;
2027 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
2028 saa->win.bpl = 1024 * saa->win.bpp;
2029 saa->win.swidth = 1024;
2030 saa->win.sheight = 768;
2031 saa->picture.brightness = 32768;
2032 saa->picture.contrast = 38768;
2033 saa->picture.colour = 32768;
2034 saa->cap = 0;
2035 saa->dev = dev;
2036 saa->nr = num;
2037 saa->playmode = VID_PLAY_NORMAL;
2038 memset(saa->boardcfg, 0, 64); /* clear board config area */
2039 saa->saa7146_mem = NULL;
2040 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
2041 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
2042 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
2043 saa->pagea1out = saa->pagea2in = saa->pagea2out =
2044 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
2045 saa->pageRPS2 = NULL;
2046 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
2047 saa->audhead = saa->vidtail = 0;
2048
2049 init_waitqueue_head(&saa->i2cq);
2050 init_waitqueue_head(&saa->audq);
2051 init_waitqueue_head(&saa->debiq);
2052 init_waitqueue_head(&saa->vidq);
2053 spin_lock_init(&saa->lock);
2054
2055 if (pci_enable_device(dev))
2056 return -EIO;
2057
2058 saa->id = dev->device;
2059 saa->irq = dev->irq;
2060 saa->video_dev.minor = -1;
2061 saa->saa7146_adr = pci_resource_start(dev, 0);
2062 pci_read_config_byte(dev, PCI_CLASS_REVISION, &saa->revision);
2063
2064 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
2065 if (!saa->saa7146_mem)
2066 return -EIO;
2067
2068 memcpy(&(saa->i2c), &saa7146_i2c_bus_template, sizeof(struct i2c_bus));
2069 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
2070 sprintf(saa->i2c.name, "stradis%d", num);
2071 saa->i2c.data = saa;
2072 saawrite(0, SAA7146_IER); /* turn off all interrupts */
2073 result = request_irq(saa->irq, saa7146_irq,
2074 SA_SHIRQ | SA_INTERRUPT, "stradis", (void *) saa);
2075 if (result == -EINVAL)
2076 printk(KERN_ERR "stradis%d: Bad irq number or handler\n",
2077 num);
2078 if (result == -EBUSY)
2079 printk(KERN_ERR "stradis%d: IRQ %ld busy, change your PnP"
2080 " config in BIOS\n", num, saa->irq);
2081 if (result < 0) {
2082 iounmap(saa->saa7146_mem);
2083 return result;
2084 }
2085 pci_set_master(dev);
2086 if (video_register_device(&saa->video_dev, VFL_TYPE_GRABBER, video_nr) < 0) {
2087 iounmap(saa->saa7146_mem);
2088 return -1;
2089 }
2090 #if 0
2091 /* i2c generic interface is currently BROKEN */
2092 i2c_register_bus(&saa->i2c);
2093 #endif
2094 return 0;
2095 }
2096
init_saa7146(int i)2097 static int init_saa7146(int i)
2098 {
2099 struct saa7146 *saa = &saa7146s[i];
2100
2101 saa->user = 0;
2102 /* reset the saa7146 */
2103 saawrite(0xffff0000, SAA7146_MC1);
2104 mdelay(5);
2105 /* enable debi and i2c transfers and pins */
2106 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
2107 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
2108 /* ensure proper state of chip */
2109 saawrite(0x00000000, SAA7146_PAGE1);
2110 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
2111 saawrite(0x00000000, SAA7146_PAGE2);
2112 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
2113 saawrite(0x00000000, SAA7146_DD1_INIT);
2114 saawrite(0x00000000, SAA7146_DD1_STREAM_B);
2115 saawrite(0x00000000, SAA7146_DD1_STREAM_A);
2116 saawrite(0x00000000, SAA7146_BRS_CTRL);
2117 saawrite(0x80400040, SAA7146_BCS_CTRL);
2118 saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL);
2119 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
2120 saawrite(0x00000000, SAA7146_ACON1);
2121 saawrite(0x00000000, SAA7146_ACON2);
2122 saawrite(0x00000600, SAA7146_I2C_STATUS);
2123 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
2124 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
2125 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
2126 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
2127 SAA7146_MC2);
2128 /* setup arbitration control registers */
2129 saawrite(0x1412121a, SAA7146_PCI_BT_V1);
2130
2131 /* allocate 32k dma buffer + 4k for page table */
2132 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
2133 printk(KERN_ERR "stradis%d: debi kmalloc failed\n", i);
2134 return -1;
2135 }
2136 #if 0
2137 saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
2138 saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
2139 for (i = 0; i < 12; i++) /* setup mmu page table */
2140 saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
2141 #endif
2142 saa->audhead = saa->vidhead = saa->osdhead = 0;
2143 saa->audtail = saa->vidtail = saa->osdtail = 0;
2144 if (saa->vidbuf == NULL)
2145 if ((saa->vidbuf = vmalloc(524288)) == NULL) {
2146 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2147 return -ENOMEM;
2148 }
2149 if (saa->audbuf == NULL)
2150 if ((saa->audbuf = vmalloc(65536)) == NULL) {
2151 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2152 vfree(saa->vidbuf);
2153 saa->vidbuf = NULL;
2154 return -ENOMEM;
2155 }
2156 if (saa->osdbuf == NULL)
2157 if ((saa->osdbuf = vmalloc(131072)) == NULL) {
2158 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2159 vfree(saa->vidbuf);
2160 vfree(saa->audbuf);
2161 saa->vidbuf = saa->audbuf = NULL;
2162 return -ENOMEM;
2163 }
2164 /* allocate 81920 byte buffer for clipping */
2165 if ((saa->dmavid2 = kmalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
2166 printk(KERN_ERR "stradis%d: clip kmalloc failed\n", saa->nr);
2167 vfree(saa->vidbuf);
2168 vfree(saa->audbuf);
2169 vfree(saa->osdbuf);
2170 saa->vidbuf = saa->audbuf = saa->osdbuf = NULL;
2171 saa->dmavid2 = NULL;
2172 return -1;
2173 }
2174 memset(saa->dmavid2, 0x00, VIDEO_CLIPMAP_SIZE); /* clip everything */
2175 /* setup clipping registers */
2176 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
2177 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
2178 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
2179 SAA7146_PROT_ADDR2);
2180 saawrite(256, SAA7146_PITCH2);
2181 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
2182 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
2183 SAA7146_MC2);
2184 I2CBusScan(&(saa->i2c));
2185 return 0;
2186 }
2187
release_saa(void)2188 static void release_saa(void)
2189 {
2190 u8 command;
2191 int i;
2192 struct saa7146 *saa;
2193
2194 for (i = 0; i < saa_num; i++) {
2195 saa = &saa7146s[i];
2196
2197 /* turn off all capturing, DMA and IRQs */
2198 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
2199 saawrite(0, SAA7146_MC2);
2200 saawrite(0, SAA7146_IER);
2201 saawrite(0xffffffffUL, SAA7146_ISR);
2202 #if 0
2203 /* unregister i2c_bus */
2204 i2c_unregister_bus((&saa->i2c));
2205 #endif
2206
2207 /* disable PCI bus-mastering */
2208 pci_read_config_byte(saa->dev, PCI_COMMAND, &command);
2209 command &= ~PCI_COMMAND_MASTER;
2210 pci_write_config_byte(saa->dev, PCI_COMMAND, command);
2211
2212 /* unmap and free memory */
2213 saa->audhead = saa->audtail = saa->osdhead = 0;
2214 saa->vidhead = saa->vidtail = saa->osdtail = 0;
2215 if (saa->vidbuf)
2216 vfree(saa->vidbuf);
2217 if (saa->audbuf)
2218 vfree(saa->audbuf);
2219 if (saa->osdbuf)
2220 vfree(saa->osdbuf);
2221 if (saa->dmavid2)
2222 kfree((void *) saa->dmavid2);
2223 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
2224 saa->dmavid2 = NULL;
2225 if (saa->dmadebi)
2226 kfree((void *) saa->dmadebi);
2227 if (saa->dmavid1)
2228 kfree((void *) saa->dmavid1);
2229 if (saa->dmavid2)
2230 kfree((void *) saa->dmavid2);
2231 if (saa->dmavid3)
2232 kfree((void *) saa->dmavid3);
2233 if (saa->dmaa1in)
2234 kfree((void *) saa->dmaa1in);
2235 if (saa->dmaa1out)
2236 kfree((void *) saa->dmaa1out);
2237 if (saa->dmaa2in)
2238 kfree((void *) saa->dmaa2in);
2239 if (saa->dmaa2out)
2240 kfree((void *) saa->dmaa2out);
2241 if (saa->dmaRPS1)
2242 kfree((void *) saa->dmaRPS1);
2243 if (saa->dmaRPS2)
2244 kfree((void *) saa->dmaRPS2);
2245 free_irq(saa->irq, saa);
2246 if (saa->saa7146_mem)
2247 iounmap(saa->saa7146_mem);
2248 if (saa->video_dev.minor != -1)
2249 video_unregister_device(&saa->video_dev);
2250 }
2251 }
2252
2253
stradis_init(void)2254 static int __init stradis_init (void)
2255 {
2256 struct pci_dev *dev = NULL;
2257 int result = 0, i;
2258
2259 saa_num = 0;
2260
2261 while ((dev = pci_find_device(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, dev))) {
2262 if (!dev->subsystem_vendor)
2263 printk(KERN_INFO "stradis%d: rev1 decoder\n", saa_num);
2264 else
2265 printk(KERN_INFO "stradis%d: SDM2xx found\n", saa_num);
2266 result = configure_saa7146(dev, saa_num++);
2267 if (result)
2268 return result;
2269 }
2270 if (saa_num)
2271 printk(KERN_INFO "stradis: %d card(s) found.\n", saa_num);
2272 else
2273 return -EINVAL;
2274 for (i = 0; i < saa_num; i++)
2275 if (init_saa7146(i) < 0) {
2276 release_saa();
2277 return -EIO;
2278 }
2279 return 0;
2280 }
2281
2282
stradis_exit(void)2283 static void __exit stradis_exit (void)
2284 {
2285 release_saa();
2286 printk(KERN_INFO "stradis: module cleanup complete\n");
2287 }
2288
2289
2290 module_init(stradis_init);
2291 module_exit(stradis_exit);
2292
2293