1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 *
4 * Copyright 2012 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
5 */
6
7 #include <linux/types.h>
8 #include <linux/string.h>
9 #include <linux/kvm.h>
10 #include <linux/kvm_host.h>
11 #include <linux/kernel.h>
12 #include <asm/opal.h>
13 #include <asm/mce.h>
14 #include <asm/machdep.h>
15 #include <asm/cputhreads.h>
16 #include <asm/hmi.h>
17 #include <asm/kvm_ppc.h>
18
19 /* SRR1 bits for machine check on POWER7 */
20 #define SRR1_MC_LDSTERR (1ul << (63-42))
21 #define SRR1_MC_IFETCH_SH (63-45)
22 #define SRR1_MC_IFETCH_MASK 0x7
23 #define SRR1_MC_IFETCH_SLBPAR 2 /* SLB parity error */
24 #define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
25 #define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
26 #define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
27
28 /* DSISR bits for machine check on POWER7 */
29 #define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
30 #define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
31 #define DSISR_MC_SLB_PARITY 0x100 /* SLB parity error */
32 #define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
33 #define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
34
35 /* POWER7 SLB flush and reload */
reload_slb(struct kvm_vcpu * vcpu)36 static void reload_slb(struct kvm_vcpu *vcpu)
37 {
38 struct slb_shadow *slb;
39 unsigned long i, n;
40
41 /* First clear out SLB */
42 asm volatile("slbmte %0,%0; slbia" : : "r" (0));
43
44 /* Do they have an SLB shadow buffer registered? */
45 slb = vcpu->arch.slb_shadow.pinned_addr;
46 if (!slb)
47 return;
48
49 /* Sanity check */
50 n = min_t(u32, be32_to_cpu(slb->persistent), SLB_MIN_SIZE);
51 if ((void *) &slb->save_area[n] > vcpu->arch.slb_shadow.pinned_end)
52 return;
53
54 /* Load up the SLB from that */
55 for (i = 0; i < n; ++i) {
56 unsigned long rb = be64_to_cpu(slb->save_area[i].esid);
57 unsigned long rs = be64_to_cpu(slb->save_area[i].vsid);
58
59 rb = (rb & ~0xFFFul) | i; /* insert entry number */
60 asm volatile("slbmte %0,%1" : : "r" (rs), "r" (rb));
61 }
62 }
63
64 /*
65 * On POWER7, see if we can handle a machine check that occurred inside
66 * the guest in real mode, without switching to the host partition.
67 */
kvmppc_realmode_mc_power7(struct kvm_vcpu * vcpu)68 static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
69 {
70 unsigned long srr1 = vcpu->arch.shregs.msr;
71 long handled = 1;
72
73 if (srr1 & SRR1_MC_LDSTERR) {
74 /* error on load/store */
75 unsigned long dsisr = vcpu->arch.shregs.dsisr;
76
77 if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
78 DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI)) {
79 /* flush and reload SLB; flushes D-ERAT too */
80 reload_slb(vcpu);
81 dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
82 DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI);
83 }
84 if (dsisr & DSISR_MC_TLB_MULTI) {
85 tlbiel_all_lpid(vcpu->kvm->arch.radix);
86 dsisr &= ~DSISR_MC_TLB_MULTI;
87 }
88 /* Any other errors we don't understand? */
89 if (dsisr & 0xffffffffUL)
90 handled = 0;
91 }
92
93 switch ((srr1 >> SRR1_MC_IFETCH_SH) & SRR1_MC_IFETCH_MASK) {
94 case 0:
95 break;
96 case SRR1_MC_IFETCH_SLBPAR:
97 case SRR1_MC_IFETCH_SLBMULTI:
98 case SRR1_MC_IFETCH_SLBPARMULTI:
99 reload_slb(vcpu);
100 break;
101 case SRR1_MC_IFETCH_TLBMULTI:
102 tlbiel_all_lpid(vcpu->kvm->arch.radix);
103 break;
104 default:
105 handled = 0;
106 }
107
108 return handled;
109 }
110
kvmppc_realmode_machine_check(struct kvm_vcpu * vcpu)111 void kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
112 {
113 struct machine_check_event mce_evt;
114 long handled;
115
116 if (vcpu->kvm->arch.fwnmi_enabled) {
117 /* FWNMI guests handle their own recovery */
118 handled = 0;
119 } else {
120 handled = kvmppc_realmode_mc_power7(vcpu);
121 }
122
123 /*
124 * Now get the event and stash it in the vcpu struct so it can
125 * be handled by the primary thread in virtual mode. We can't
126 * call machine_check_queue_event() here if we are running on
127 * an offline secondary thread.
128 */
129 if (get_mce_event(&mce_evt, MCE_EVENT_RELEASE)) {
130 if (handled && mce_evt.version == MCE_V1)
131 mce_evt.disposition = MCE_DISPOSITION_RECOVERED;
132 } else {
133 memset(&mce_evt, 0, sizeof(mce_evt));
134 }
135
136 vcpu->arch.mce_evt = mce_evt;
137 }
138
139
kvmppc_p9_realmode_hmi_handler(struct kvm_vcpu * vcpu)140 long kvmppc_p9_realmode_hmi_handler(struct kvm_vcpu *vcpu)
141 {
142 struct kvmppc_vcore *vc = vcpu->arch.vcore;
143 long ret = 0;
144
145 /*
146 * Unapply and clear the offset first. That way, if the TB was not
147 * resynced then it will remain in host-offset, and if it was resynced
148 * then it is brought into host-offset. Then the tb offset is
149 * re-applied before continuing with the KVM exit.
150 *
151 * This way, we don't need to actually know whether not OPAL resynced
152 * the timebase or do any of the complicated dance that the P7/8
153 * path requires.
154 */
155 if (vc->tb_offset_applied) {
156 u64 new_tb = mftb() - vc->tb_offset_applied;
157 mtspr(SPRN_TBU40, new_tb);
158 if ((mftb() & 0xffffff) < (new_tb & 0xffffff)) {
159 new_tb += 0x1000000;
160 mtspr(SPRN_TBU40, new_tb);
161 }
162 vc->tb_offset_applied = 0;
163 }
164
165 local_paca->hmi_irqs++;
166
167 if (hmi_handle_debugtrig(NULL) >= 0) {
168 ret = 1;
169 goto out;
170 }
171
172 if (ppc_md.hmi_exception_early)
173 ppc_md.hmi_exception_early(NULL);
174
175 out:
176 if (vc->tb_offset) {
177 u64 new_tb = mftb() + vc->tb_offset;
178 mtspr(SPRN_TBU40, new_tb);
179 if ((mftb() & 0xffffff) < (new_tb & 0xffffff)) {
180 new_tb += 0x1000000;
181 mtspr(SPRN_TBU40, new_tb);
182 }
183 vc->tb_offset_applied = vc->tb_offset;
184 }
185
186 return ret;
187 }
188
189 /*
190 * The following subcore HMI handling is all only for pre-POWER9 CPUs.
191 */
192
193 /* Check if dynamic split is in force and return subcore size accordingly. */
kvmppc_cur_subcore_size(void)194 static inline int kvmppc_cur_subcore_size(void)
195 {
196 if (local_paca->kvm_hstate.kvm_split_mode)
197 return local_paca->kvm_hstate.kvm_split_mode->subcore_size;
198
199 return threads_per_subcore;
200 }
201
kvmppc_subcore_enter_guest(void)202 void kvmppc_subcore_enter_guest(void)
203 {
204 int thread_id, subcore_id;
205
206 thread_id = cpu_thread_in_core(local_paca->paca_index);
207 subcore_id = thread_id / kvmppc_cur_subcore_size();
208
209 local_paca->sibling_subcore_state->in_guest[subcore_id] = 1;
210 }
211 EXPORT_SYMBOL_GPL(kvmppc_subcore_enter_guest);
212
kvmppc_subcore_exit_guest(void)213 void kvmppc_subcore_exit_guest(void)
214 {
215 int thread_id, subcore_id;
216
217 thread_id = cpu_thread_in_core(local_paca->paca_index);
218 subcore_id = thread_id / kvmppc_cur_subcore_size();
219
220 local_paca->sibling_subcore_state->in_guest[subcore_id] = 0;
221 }
222 EXPORT_SYMBOL_GPL(kvmppc_subcore_exit_guest);
223
kvmppc_tb_resync_required(void)224 static bool kvmppc_tb_resync_required(void)
225 {
226 if (test_and_set_bit(CORE_TB_RESYNC_REQ_BIT,
227 &local_paca->sibling_subcore_state->flags))
228 return false;
229
230 return true;
231 }
232
kvmppc_tb_resync_done(void)233 static void kvmppc_tb_resync_done(void)
234 {
235 clear_bit(CORE_TB_RESYNC_REQ_BIT,
236 &local_paca->sibling_subcore_state->flags);
237 }
238
239 /*
240 * kvmppc_realmode_hmi_handler() is called only by primary thread during
241 * guest exit path.
242 *
243 * There are multiple reasons why HMI could occur, one of them is
244 * Timebase (TB) error. If this HMI is due to TB error, then TB would
245 * have been in stopped state. The opal hmi handler Will fix it and
246 * restore the TB value with host timebase value. For HMI caused due
247 * to non-TB errors, opal hmi handler will not touch/restore TB register
248 * and hence there won't be any change in TB value.
249 *
250 * Since we are not sure about the cause of this HMI, we can't be sure
251 * about the content of TB register whether it holds guest or host timebase
252 * value. Hence the idea is to resync the TB on every HMI, so that we
253 * know about the exact state of the TB value. Resync TB call will
254 * restore TB to host timebase.
255 *
256 * Things to consider:
257 * - On TB error, HMI interrupt is reported on all the threads of the core
258 * that has encountered TB error irrespective of split-core mode.
259 * - The very first thread on the core that get chance to fix TB error
260 * would rsync the TB with local chipTOD value.
261 * - The resync TB is a core level action i.e. it will sync all the TBs
262 * in that core independent of split-core mode. This means if we trigger
263 * TB sync from a thread from one subcore, it would affect TB values of
264 * sibling subcores of the same core.
265 *
266 * All threads need to co-ordinate before making opal hmi handler.
267 * All threads will use sibling_subcore_state->in_guest[] (shared by all
268 * threads in the core) in paca which holds information about whether
269 * sibling subcores are in Guest mode or host mode. The in_guest[] array
270 * is of size MAX_SUBCORE_PER_CORE=4, indexed using subcore id to set/unset
271 * subcore status. Only primary threads from each subcore is responsible
272 * to set/unset its designated array element while entering/exiting the
273 * guset.
274 *
275 * After invoking opal hmi handler call, one of the thread (of entire core)
276 * will need to resync the TB. Bit 63 from subcore state bitmap flags
277 * (sibling_subcore_state->flags) will be used to co-ordinate between
278 * primary threads to decide who takes up the responsibility.
279 *
280 * This is what we do:
281 * - Primary thread from each subcore tries to set resync required bit[63]
282 * of paca->sibling_subcore_state->flags.
283 * - The first primary thread that is able to set the flag takes the
284 * responsibility of TB resync. (Let us call it as thread leader)
285 * - All other threads which are in host will call
286 * wait_for_subcore_guest_exit() and wait for in_guest[0-3] from
287 * paca->sibling_subcore_state to get cleared.
288 * - All the primary thread will clear its subcore status from subcore
289 * state in_guest[] array respectively.
290 * - Once all primary threads clear in_guest[0-3], all of them will invoke
291 * opal hmi handler.
292 * - Now all threads will wait for TB resync to complete by invoking
293 * wait_for_tb_resync() except the thread leader.
294 * - Thread leader will do a TB resync by invoking opal_resync_timebase()
295 * call and the it will clear the resync required bit.
296 * - All other threads will now come out of resync wait loop and proceed
297 * with individual execution.
298 * - On return of this function, primary thread will signal all
299 * secondary threads to proceed.
300 * - All secondary threads will eventually call opal hmi handler on
301 * their exit path.
302 *
303 * Returns 1 if the timebase offset should be applied, 0 if not.
304 */
305
kvmppc_realmode_hmi_handler(void)306 long kvmppc_realmode_hmi_handler(void)
307 {
308 bool resync_req;
309
310 local_paca->hmi_irqs++;
311
312 if (hmi_handle_debugtrig(NULL) >= 0)
313 return 1;
314
315 /*
316 * By now primary thread has already completed guest->host
317 * partition switch but haven't signaled secondaries yet.
318 * All the secondary threads on this subcore is waiting
319 * for primary thread to signal them to go ahead.
320 *
321 * For threads from subcore which isn't in guest, they all will
322 * wait until all other subcores on this core exit the guest.
323 *
324 * Now set the resync required bit. If you are the first to
325 * set this bit then kvmppc_tb_resync_required() function will
326 * return true. For rest all other subcores
327 * kvmppc_tb_resync_required() will return false.
328 *
329 * If resync_req == true, then this thread is responsible to
330 * initiate TB resync after hmi handler has completed.
331 * All other threads on this core will wait until this thread
332 * clears the resync required bit flag.
333 */
334 resync_req = kvmppc_tb_resync_required();
335
336 /* Reset the subcore status to indicate it has exited guest */
337 kvmppc_subcore_exit_guest();
338
339 /*
340 * Wait for other subcores on this core to exit the guest.
341 * All the primary threads and threads from subcore that are
342 * not in guest will wait here until all subcores are out
343 * of guest context.
344 */
345 wait_for_subcore_guest_exit();
346
347 /*
348 * At this point we are sure that primary threads from each
349 * subcore on this core have completed guest->host partition
350 * switch. Now it is safe to call HMI handler.
351 */
352 if (ppc_md.hmi_exception_early)
353 ppc_md.hmi_exception_early(NULL);
354
355 /*
356 * Check if this thread is responsible to resync TB.
357 * All other threads will wait until this thread completes the
358 * TB resync.
359 */
360 if (resync_req) {
361 opal_resync_timebase();
362 /* Reset TB resync req bit */
363 kvmppc_tb_resync_done();
364 } else {
365 wait_for_tb_resync();
366 }
367
368 /*
369 * Reset tb_offset_applied so the guest exit code won't try
370 * to subtract the previous timebase offset from the timebase.
371 */
372 if (local_paca->kvm_hstate.kvm_vcore)
373 local_paca->kvm_hstate.kvm_vcore->tb_offset_applied = 0;
374
375 return 0;
376 }
377