1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4  *
5  * Authors:
6  *    Alexander Graf <agraf@suse.de>
7  *    Kevin Wolf <mail@kevin-wolf.de>
8  *    Paul Mackerras <paulus@samba.org>
9  *
10  * Description:
11  * Functions relating to running KVM on Book 3S processors where
12  * we don't have access to hypervisor mode, and we run the guest
13  * in problem state (user mode).
14  *
15  * This file is derived from arch/powerpc/kvm/44x.c,
16  * by Hollis Blanchard <hollisb@us.ibm.com>.
17  */
18 
19 #include <linux/kvm_host.h>
20 #include <linux/export.h>
21 #include <linux/err.h>
22 #include <linux/slab.h>
23 
24 #include <asm/reg.h>
25 #include <asm/cputable.h>
26 #include <asm/cacheflush.h>
27 #include <linux/uaccess.h>
28 #include <asm/interrupt.h>
29 #include <asm/io.h>
30 #include <asm/kvm_ppc.h>
31 #include <asm/kvm_book3s.h>
32 #include <asm/mmu_context.h>
33 #include <asm/switch_to.h>
34 #include <asm/firmware.h>
35 #include <asm/setup.h>
36 #include <linux/gfp.h>
37 #include <linux/sched.h>
38 #include <linux/vmalloc.h>
39 #include <linux/highmem.h>
40 #include <linux/module.h>
41 #include <linux/miscdevice.h>
42 #include <asm/asm-prototypes.h>
43 #include <asm/tm.h>
44 
45 #include "book3s.h"
46 
47 #define CREATE_TRACE_POINTS
48 #include "trace_pr.h"
49 
50 /* #define EXIT_DEBUG */
51 /* #define DEBUG_EXT */
52 
53 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
54 			     ulong msr);
55 #ifdef CONFIG_PPC_BOOK3S_64
56 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac);
57 #endif
58 
59 /* Some compatibility defines */
60 #ifdef CONFIG_PPC_BOOK3S_32
61 #define MSR_USER32 MSR_USER
62 #define MSR_USER64 MSR_USER
63 #define HW_PAGE_SIZE PAGE_SIZE
64 #define HPTE_R_M   _PAGE_COHERENT
65 #endif
66 
kvmppc_is_split_real(struct kvm_vcpu * vcpu)67 static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
68 {
69 	ulong msr = kvmppc_get_msr(vcpu);
70 	return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
71 }
72 
kvmppc_fixup_split_real(struct kvm_vcpu * vcpu)73 static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
74 {
75 	ulong msr = kvmppc_get_msr(vcpu);
76 	ulong pc = kvmppc_get_pc(vcpu);
77 
78 	/* We are in DR only split real mode */
79 	if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
80 		return;
81 
82 	/* We have not fixed up the guest already */
83 	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
84 		return;
85 
86 	/* The code is in fixupable address space */
87 	if (pc & SPLIT_HACK_MASK)
88 		return;
89 
90 	vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
91 	kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
92 }
93 
kvmppc_unfixup_split_real(struct kvm_vcpu * vcpu)94 static void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
95 {
96 	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
97 		ulong pc = kvmppc_get_pc(vcpu);
98 		ulong lr = kvmppc_get_lr(vcpu);
99 		if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
100 			kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
101 		if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
102 			kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
103 		vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
104 	}
105 }
106 
kvmppc_inject_interrupt_pr(struct kvm_vcpu * vcpu,int vec,u64 srr1_flags)107 static void kvmppc_inject_interrupt_pr(struct kvm_vcpu *vcpu, int vec, u64 srr1_flags)
108 {
109 	unsigned long msr, pc, new_msr, new_pc;
110 
111 	kvmppc_unfixup_split_real(vcpu);
112 
113 	msr = kvmppc_get_msr(vcpu);
114 	pc = kvmppc_get_pc(vcpu);
115 	new_msr = vcpu->arch.intr_msr;
116 	new_pc = to_book3s(vcpu)->hior + vec;
117 
118 #ifdef CONFIG_PPC_BOOK3S_64
119 	/* If transactional, change to suspend mode on IRQ delivery */
120 	if (MSR_TM_TRANSACTIONAL(msr))
121 		new_msr |= MSR_TS_S;
122 	else
123 		new_msr |= msr & MSR_TS_MASK;
124 #endif
125 
126 	kvmppc_set_srr0(vcpu, pc);
127 	kvmppc_set_srr1(vcpu, (msr & SRR1_MSR_BITS) | srr1_flags);
128 	kvmppc_set_pc(vcpu, new_pc);
129 	kvmppc_set_msr(vcpu, new_msr);
130 }
131 
kvmppc_core_vcpu_load_pr(struct kvm_vcpu * vcpu,int cpu)132 static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
133 {
134 #ifdef CONFIG_PPC_BOOK3S_64
135 	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
136 	memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
137 	svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
138 	svcpu->in_use = 0;
139 	svcpu_put(svcpu);
140 
141 	/* Disable AIL if supported */
142 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
143 		if (cpu_has_feature(CPU_FTR_ARCH_207S))
144 			mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);
145 		if (cpu_has_feature(CPU_FTR_ARCH_300) && (current->thread.fscr & FSCR_SCV))
146 			mtspr(SPRN_FSCR, mfspr(SPRN_FSCR) & ~FSCR_SCV);
147 	}
148 #endif
149 
150 	vcpu->cpu = smp_processor_id();
151 #ifdef CONFIG_PPC_BOOK3S_32
152 	current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
153 #endif
154 
155 	if (kvmppc_is_split_real(vcpu))
156 		kvmppc_fixup_split_real(vcpu);
157 
158 	kvmppc_restore_tm_pr(vcpu);
159 }
160 
kvmppc_core_vcpu_put_pr(struct kvm_vcpu * vcpu)161 static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
162 {
163 #ifdef CONFIG_PPC_BOOK3S_64
164 	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
165 	if (svcpu->in_use) {
166 		kvmppc_copy_from_svcpu(vcpu);
167 	}
168 	memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
169 	to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
170 	svcpu_put(svcpu);
171 
172 	/* Enable AIL if supported */
173 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
174 		if (cpu_has_feature(CPU_FTR_ARCH_207S))
175 			mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);
176 		if (cpu_has_feature(CPU_FTR_ARCH_300) && (current->thread.fscr & FSCR_SCV))
177 			mtspr(SPRN_FSCR, mfspr(SPRN_FSCR) | FSCR_SCV);
178 	}
179 #endif
180 
181 	if (kvmppc_is_split_real(vcpu))
182 		kvmppc_unfixup_split_real(vcpu);
183 
184 	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
185 	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
186 	kvmppc_save_tm_pr(vcpu);
187 
188 	vcpu->cpu = -1;
189 }
190 
191 /* Copy data needed by real-mode code from vcpu to shadow vcpu */
kvmppc_copy_to_svcpu(struct kvm_vcpu * vcpu)192 void kvmppc_copy_to_svcpu(struct kvm_vcpu *vcpu)
193 {
194 	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
195 
196 	svcpu->gpr[0] = vcpu->arch.regs.gpr[0];
197 	svcpu->gpr[1] = vcpu->arch.regs.gpr[1];
198 	svcpu->gpr[2] = vcpu->arch.regs.gpr[2];
199 	svcpu->gpr[3] = vcpu->arch.regs.gpr[3];
200 	svcpu->gpr[4] = vcpu->arch.regs.gpr[4];
201 	svcpu->gpr[5] = vcpu->arch.regs.gpr[5];
202 	svcpu->gpr[6] = vcpu->arch.regs.gpr[6];
203 	svcpu->gpr[7] = vcpu->arch.regs.gpr[7];
204 	svcpu->gpr[8] = vcpu->arch.regs.gpr[8];
205 	svcpu->gpr[9] = vcpu->arch.regs.gpr[9];
206 	svcpu->gpr[10] = vcpu->arch.regs.gpr[10];
207 	svcpu->gpr[11] = vcpu->arch.regs.gpr[11];
208 	svcpu->gpr[12] = vcpu->arch.regs.gpr[12];
209 	svcpu->gpr[13] = vcpu->arch.regs.gpr[13];
210 	svcpu->cr  = vcpu->arch.regs.ccr;
211 	svcpu->xer = vcpu->arch.regs.xer;
212 	svcpu->ctr = vcpu->arch.regs.ctr;
213 	svcpu->lr  = vcpu->arch.regs.link;
214 	svcpu->pc  = vcpu->arch.regs.nip;
215 #ifdef CONFIG_PPC_BOOK3S_64
216 	svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
217 #endif
218 	/*
219 	 * Now also save the current time base value. We use this
220 	 * to find the guest purr and spurr value.
221 	 */
222 	vcpu->arch.entry_tb = get_tb();
223 	vcpu->arch.entry_vtb = get_vtb();
224 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
225 		vcpu->arch.entry_ic = mfspr(SPRN_IC);
226 	svcpu->in_use = true;
227 
228 	svcpu_put(svcpu);
229 }
230 
kvmppc_recalc_shadow_msr(struct kvm_vcpu * vcpu)231 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
232 {
233 	ulong guest_msr = kvmppc_get_msr(vcpu);
234 	ulong smsr = guest_msr;
235 
236 	/* Guest MSR values */
237 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
238 	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE |
239 		MSR_TM | MSR_TS_MASK;
240 #else
241 	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
242 #endif
243 	/* Process MSR values */
244 	smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
245 	/* External providers the guest reserved */
246 	smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
247 	/* 64-bit Process MSR values */
248 #ifdef CONFIG_PPC_BOOK3S_64
249 	smsr |= MSR_HV;
250 #endif
251 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
252 	/*
253 	 * in guest privileged state, we want to fail all TM transactions.
254 	 * So disable MSR TM bit so that all tbegin. will be able to be
255 	 * trapped into host.
256 	 */
257 	if (!(guest_msr & MSR_PR))
258 		smsr &= ~MSR_TM;
259 #endif
260 	vcpu->arch.shadow_msr = smsr;
261 }
262 
263 /* Copy data touched by real-mode code from shadow vcpu back to vcpu */
kvmppc_copy_from_svcpu(struct kvm_vcpu * vcpu)264 void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu)
265 {
266 	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
267 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
268 	ulong old_msr;
269 #endif
270 
271 	/*
272 	 * Maybe we were already preempted and synced the svcpu from
273 	 * our preempt notifiers. Don't bother touching this svcpu then.
274 	 */
275 	if (!svcpu->in_use)
276 		goto out;
277 
278 	vcpu->arch.regs.gpr[0] = svcpu->gpr[0];
279 	vcpu->arch.regs.gpr[1] = svcpu->gpr[1];
280 	vcpu->arch.regs.gpr[2] = svcpu->gpr[2];
281 	vcpu->arch.regs.gpr[3] = svcpu->gpr[3];
282 	vcpu->arch.regs.gpr[4] = svcpu->gpr[4];
283 	vcpu->arch.regs.gpr[5] = svcpu->gpr[5];
284 	vcpu->arch.regs.gpr[6] = svcpu->gpr[6];
285 	vcpu->arch.regs.gpr[7] = svcpu->gpr[7];
286 	vcpu->arch.regs.gpr[8] = svcpu->gpr[8];
287 	vcpu->arch.regs.gpr[9] = svcpu->gpr[9];
288 	vcpu->arch.regs.gpr[10] = svcpu->gpr[10];
289 	vcpu->arch.regs.gpr[11] = svcpu->gpr[11];
290 	vcpu->arch.regs.gpr[12] = svcpu->gpr[12];
291 	vcpu->arch.regs.gpr[13] = svcpu->gpr[13];
292 	vcpu->arch.regs.ccr  = svcpu->cr;
293 	vcpu->arch.regs.xer = svcpu->xer;
294 	vcpu->arch.regs.ctr = svcpu->ctr;
295 	vcpu->arch.regs.link  = svcpu->lr;
296 	vcpu->arch.regs.nip  = svcpu->pc;
297 	vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
298 	vcpu->arch.fault_dar   = svcpu->fault_dar;
299 	vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
300 	vcpu->arch.last_inst   = svcpu->last_inst;
301 #ifdef CONFIG_PPC_BOOK3S_64
302 	vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
303 #endif
304 	/*
305 	 * Update purr and spurr using time base on exit.
306 	 */
307 	vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
308 	vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
309 	to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
310 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
311 		vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
312 
313 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
314 	/*
315 	 * Unlike other MSR bits, MSR[TS]bits can be changed at guest without
316 	 * notifying host:
317 	 *  modified by unprivileged instructions like "tbegin"/"tend"/
318 	 * "tresume"/"tsuspend" in PR KVM guest.
319 	 *
320 	 * It is necessary to sync here to calculate a correct shadow_msr.
321 	 *
322 	 * privileged guest's tbegin will be failed at present. So we
323 	 * only take care of problem state guest.
324 	 */
325 	old_msr = kvmppc_get_msr(vcpu);
326 	if (unlikely((old_msr & MSR_PR) &&
327 		(vcpu->arch.shadow_srr1 & (MSR_TS_MASK)) !=
328 				(old_msr & (MSR_TS_MASK)))) {
329 		old_msr &= ~(MSR_TS_MASK);
330 		old_msr |= (vcpu->arch.shadow_srr1 & (MSR_TS_MASK));
331 		kvmppc_set_msr_fast(vcpu, old_msr);
332 		kvmppc_recalc_shadow_msr(vcpu);
333 	}
334 #endif
335 
336 	svcpu->in_use = false;
337 
338 out:
339 	svcpu_put(svcpu);
340 }
341 
342 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
kvmppc_save_tm_sprs(struct kvm_vcpu * vcpu)343 void kvmppc_save_tm_sprs(struct kvm_vcpu *vcpu)
344 {
345 	tm_enable();
346 	vcpu->arch.tfhar = mfspr(SPRN_TFHAR);
347 	vcpu->arch.texasr = mfspr(SPRN_TEXASR);
348 	vcpu->arch.tfiar = mfspr(SPRN_TFIAR);
349 	tm_disable();
350 }
351 
kvmppc_restore_tm_sprs(struct kvm_vcpu * vcpu)352 void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu)
353 {
354 	tm_enable();
355 	mtspr(SPRN_TFHAR, vcpu->arch.tfhar);
356 	mtspr(SPRN_TEXASR, vcpu->arch.texasr);
357 	mtspr(SPRN_TFIAR, vcpu->arch.tfiar);
358 	tm_disable();
359 }
360 
361 /* loadup math bits which is enabled at kvmppc_get_msr() but not enabled at
362  * hardware.
363  */
kvmppc_handle_lost_math_exts(struct kvm_vcpu * vcpu)364 static void kvmppc_handle_lost_math_exts(struct kvm_vcpu *vcpu)
365 {
366 	ulong exit_nr;
367 	ulong ext_diff = (kvmppc_get_msr(vcpu) & ~vcpu->arch.guest_owned_ext) &
368 		(MSR_FP | MSR_VEC | MSR_VSX);
369 
370 	if (!ext_diff)
371 		return;
372 
373 	if (ext_diff == MSR_FP)
374 		exit_nr = BOOK3S_INTERRUPT_FP_UNAVAIL;
375 	else if (ext_diff == MSR_VEC)
376 		exit_nr = BOOK3S_INTERRUPT_ALTIVEC;
377 	else
378 		exit_nr = BOOK3S_INTERRUPT_VSX;
379 
380 	kvmppc_handle_ext(vcpu, exit_nr, ext_diff);
381 }
382 
kvmppc_save_tm_pr(struct kvm_vcpu * vcpu)383 void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu)
384 {
385 	if (!(MSR_TM_ACTIVE(kvmppc_get_msr(vcpu)))) {
386 		kvmppc_save_tm_sprs(vcpu);
387 		return;
388 	}
389 
390 	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
391 	kvmppc_giveup_ext(vcpu, MSR_VSX);
392 
393 	preempt_disable();
394 	_kvmppc_save_tm_pr(vcpu, mfmsr());
395 	preempt_enable();
396 }
397 
kvmppc_restore_tm_pr(struct kvm_vcpu * vcpu)398 void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu)
399 {
400 	if (!MSR_TM_ACTIVE(kvmppc_get_msr(vcpu))) {
401 		kvmppc_restore_tm_sprs(vcpu);
402 		if (kvmppc_get_msr(vcpu) & MSR_TM) {
403 			kvmppc_handle_lost_math_exts(vcpu);
404 			if (vcpu->arch.fscr & FSCR_TAR)
405 				kvmppc_handle_fac(vcpu, FSCR_TAR_LG);
406 		}
407 		return;
408 	}
409 
410 	preempt_disable();
411 	_kvmppc_restore_tm_pr(vcpu, kvmppc_get_msr(vcpu));
412 	preempt_enable();
413 
414 	if (kvmppc_get_msr(vcpu) & MSR_TM) {
415 		kvmppc_handle_lost_math_exts(vcpu);
416 		if (vcpu->arch.fscr & FSCR_TAR)
417 			kvmppc_handle_fac(vcpu, FSCR_TAR_LG);
418 	}
419 }
420 #endif
421 
kvmppc_core_check_requests_pr(struct kvm_vcpu * vcpu)422 static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
423 {
424 	int r = 1; /* Indicate we want to get back into the guest */
425 
426 	/* We misuse TLB_FLUSH to indicate that we want to clear
427 	   all shadow cache entries */
428 	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
429 		kvmppc_mmu_pte_flush(vcpu, 0, 0);
430 
431 	return r;
432 }
433 
434 /************* MMU Notifiers *************/
do_kvm_unmap_gfn(struct kvm * kvm,struct kvm_gfn_range * range)435 static bool do_kvm_unmap_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
436 {
437 	unsigned long i;
438 	struct kvm_vcpu *vcpu;
439 
440 	kvm_for_each_vcpu(i, vcpu, kvm)
441 		kvmppc_mmu_pte_pflush(vcpu, range->start << PAGE_SHIFT,
442 				      range->end << PAGE_SHIFT);
443 
444 	return false;
445 }
446 
kvm_unmap_gfn_range_pr(struct kvm * kvm,struct kvm_gfn_range * range)447 static bool kvm_unmap_gfn_range_pr(struct kvm *kvm, struct kvm_gfn_range *range)
448 {
449 	return do_kvm_unmap_gfn(kvm, range);
450 }
451 
kvm_age_gfn_pr(struct kvm * kvm,struct kvm_gfn_range * range)452 static bool kvm_age_gfn_pr(struct kvm *kvm, struct kvm_gfn_range *range)
453 {
454 	/* XXX could be more clever ;) */
455 	return false;
456 }
457 
kvm_test_age_gfn_pr(struct kvm * kvm,struct kvm_gfn_range * range)458 static bool kvm_test_age_gfn_pr(struct kvm *kvm, struct kvm_gfn_range *range)
459 {
460 	/* XXX could be more clever ;) */
461 	return false;
462 }
463 
kvm_set_spte_gfn_pr(struct kvm * kvm,struct kvm_gfn_range * range)464 static bool kvm_set_spte_gfn_pr(struct kvm *kvm, struct kvm_gfn_range *range)
465 {
466 	/* The page will get remapped properly on its next fault */
467 	return do_kvm_unmap_gfn(kvm, range);
468 }
469 
470 /*****************************************/
471 
kvmppc_set_msr_pr(struct kvm_vcpu * vcpu,u64 msr)472 static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
473 {
474 	ulong old_msr;
475 
476 	/* For PAPR guest, make sure MSR reflects guest mode */
477 	if (vcpu->arch.papr_enabled)
478 		msr = (msr & ~MSR_HV) | MSR_ME;
479 
480 #ifdef EXIT_DEBUG
481 	printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
482 #endif
483 
484 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
485 	/* We should never target guest MSR to TS=10 && PR=0,
486 	 * since we always fail transaction for guest privilege
487 	 * state.
488 	 */
489 	if (!(msr & MSR_PR) && MSR_TM_TRANSACTIONAL(msr))
490 		kvmppc_emulate_tabort(vcpu,
491 			TM_CAUSE_KVM_FAC_UNAV | TM_CAUSE_PERSISTENT);
492 #endif
493 
494 	old_msr = kvmppc_get_msr(vcpu);
495 	msr &= to_book3s(vcpu)->msr_mask;
496 	kvmppc_set_msr_fast(vcpu, msr);
497 	kvmppc_recalc_shadow_msr(vcpu);
498 
499 	if (msr & MSR_POW) {
500 		if (!vcpu->arch.pending_exceptions) {
501 			kvm_vcpu_halt(vcpu);
502 			vcpu->stat.generic.halt_wakeup++;
503 
504 			/* Unset POW bit after we woke up */
505 			msr &= ~MSR_POW;
506 			kvmppc_set_msr_fast(vcpu, msr);
507 		}
508 	}
509 
510 	if (kvmppc_is_split_real(vcpu))
511 		kvmppc_fixup_split_real(vcpu);
512 	else
513 		kvmppc_unfixup_split_real(vcpu);
514 
515 	if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
516 		   (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
517 		kvmppc_mmu_flush_segments(vcpu);
518 		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
519 
520 		/* Preload magic page segment when in kernel mode */
521 		if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
522 			struct kvm_vcpu_arch *a = &vcpu->arch;
523 
524 			if (msr & MSR_DR)
525 				kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
526 			else
527 				kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
528 		}
529 	}
530 
531 	/*
532 	 * When switching from 32 to 64-bit, we may have a stale 32-bit
533 	 * magic page around, we need to flush it. Typically 32-bit magic
534 	 * page will be instantiated when calling into RTAS. Note: We
535 	 * assume that such transition only happens while in kernel mode,
536 	 * ie, we never transition from user 32-bit to kernel 64-bit with
537 	 * a 32-bit magic page around.
538 	 */
539 	if (vcpu->arch.magic_page_pa &&
540 	    !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
541 		/* going from RTAS to normal kernel code */
542 		kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
543 				     ~0xFFFUL);
544 	}
545 
546 	/* Preload FPU if it's enabled */
547 	if (kvmppc_get_msr(vcpu) & MSR_FP)
548 		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
549 
550 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
551 	if (kvmppc_get_msr(vcpu) & MSR_TM)
552 		kvmppc_handle_lost_math_exts(vcpu);
553 #endif
554 }
555 
kvmppc_set_pvr_pr(struct kvm_vcpu * vcpu,u32 pvr)556 static void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
557 {
558 	u32 host_pvr;
559 
560 	vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
561 	vcpu->arch.pvr = pvr;
562 #ifdef CONFIG_PPC_BOOK3S_64
563 	if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
564 		kvmppc_mmu_book3s_64_init(vcpu);
565 		if (!to_book3s(vcpu)->hior_explicit)
566 			to_book3s(vcpu)->hior = 0xfff00000;
567 		to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
568 		vcpu->arch.cpu_type = KVM_CPU_3S_64;
569 	} else
570 #endif
571 	{
572 		kvmppc_mmu_book3s_32_init(vcpu);
573 		if (!to_book3s(vcpu)->hior_explicit)
574 			to_book3s(vcpu)->hior = 0;
575 		to_book3s(vcpu)->msr_mask = 0xffffffffULL;
576 		vcpu->arch.cpu_type = KVM_CPU_3S_32;
577 	}
578 
579 	kvmppc_sanity_check(vcpu);
580 
581 	/* If we are in hypervisor level on 970, we can tell the CPU to
582 	 * treat DCBZ as 32 bytes store */
583 	vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
584 	if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
585 	    !strcmp(cur_cpu_spec->platform, "ppc970"))
586 		vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
587 
588 	/* Cell performs badly if MSR_FEx are set. So let's hope nobody
589 	   really needs them in a VM on Cell and force disable them. */
590 	if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
591 		to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
592 
593 	/*
594 	 * If they're asking for POWER6 or later, set the flag
595 	 * indicating that we can do multiple large page sizes
596 	 * and 1TB segments.
597 	 * Also set the flag that indicates that tlbie has the large
598 	 * page bit in the RB operand instead of the instruction.
599 	 */
600 	switch (PVR_VER(pvr)) {
601 	case PVR_POWER6:
602 	case PVR_POWER7:
603 	case PVR_POWER7p:
604 	case PVR_POWER8:
605 	case PVR_POWER8E:
606 	case PVR_POWER8NVL:
607 	case PVR_POWER9:
608 		vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
609 			BOOK3S_HFLAG_NEW_TLBIE;
610 		break;
611 	}
612 
613 #ifdef CONFIG_PPC_BOOK3S_32
614 	/* 32 bit Book3S always has 32 byte dcbz */
615 	vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
616 #endif
617 
618 	/* On some CPUs we can execute paired single operations natively */
619 	asm ( "mfpvr %0" : "=r"(host_pvr));
620 	switch (host_pvr) {
621 	case 0x00080200:	/* lonestar 2.0 */
622 	case 0x00088202:	/* lonestar 2.2 */
623 	case 0x70000100:	/* gekko 1.0 */
624 	case 0x00080100:	/* gekko 2.0 */
625 	case 0x00083203:	/* gekko 2.3a */
626 	case 0x00083213:	/* gekko 2.3b */
627 	case 0x00083204:	/* gekko 2.4 */
628 	case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
629 	case 0x00087200:	/* broadway */
630 		vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
631 		/* Enable HID2.PSE - in case we need it later */
632 		mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
633 	}
634 }
635 
636 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
637  * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
638  * emulate 32 bytes dcbz length.
639  *
640  * The Book3s_64 inventors also realized this case and implemented a special bit
641  * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
642  *
643  * My approach here is to patch the dcbz instruction on executing pages.
644  */
kvmppc_patch_dcbz(struct kvm_vcpu * vcpu,struct kvmppc_pte * pte)645 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
646 {
647 	struct page *hpage;
648 	u64 hpage_offset;
649 	u32 *page;
650 	int i;
651 
652 	hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
653 	if (is_error_page(hpage))
654 		return;
655 
656 	hpage_offset = pte->raddr & ~PAGE_MASK;
657 	hpage_offset &= ~0xFFFULL;
658 	hpage_offset /= 4;
659 
660 	get_page(hpage);
661 	page = kmap_atomic(hpage);
662 
663 	/* patch dcbz into reserved instruction, so we trap */
664 	for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
665 		if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
666 			page[i] &= cpu_to_be32(0xfffffff7);
667 
668 	kunmap_atomic(page);
669 	put_page(hpage);
670 }
671 
kvmppc_visible_gpa(struct kvm_vcpu * vcpu,gpa_t gpa)672 static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
673 {
674 	ulong mp_pa = vcpu->arch.magic_page_pa;
675 
676 	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
677 		mp_pa = (uint32_t)mp_pa;
678 
679 	gpa &= ~0xFFFULL;
680 	if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
681 		return true;
682 	}
683 
684 	return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
685 }
686 
kvmppc_handle_pagefault(struct kvm_vcpu * vcpu,ulong eaddr,int vec)687 static int kvmppc_handle_pagefault(struct kvm_vcpu *vcpu,
688 			    ulong eaddr, int vec)
689 {
690 	bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
691 	bool iswrite = false;
692 	int r = RESUME_GUEST;
693 	int relocated;
694 	int page_found = 0;
695 	struct kvmppc_pte pte = { 0 };
696 	bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
697 	bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
698 	u64 vsid;
699 
700 	relocated = data ? dr : ir;
701 	if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
702 		iswrite = true;
703 
704 	/* Resolve real address if translation turned on */
705 	if (relocated) {
706 		page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
707 	} else {
708 		pte.may_execute = true;
709 		pte.may_read = true;
710 		pte.may_write = true;
711 		pte.raddr = eaddr & KVM_PAM;
712 		pte.eaddr = eaddr;
713 		pte.vpage = eaddr >> 12;
714 		pte.page_size = MMU_PAGE_64K;
715 		pte.wimg = HPTE_R_M;
716 	}
717 
718 	switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
719 	case 0:
720 		pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
721 		break;
722 	case MSR_DR:
723 		if (!data &&
724 		    (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
725 		    ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
726 			pte.raddr &= ~SPLIT_HACK_MASK;
727 		fallthrough;
728 	case MSR_IR:
729 		vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
730 
731 		if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
732 			pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
733 		else
734 			pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
735 		pte.vpage |= vsid;
736 
737 		if (vsid == -1)
738 			page_found = -EINVAL;
739 		break;
740 	}
741 
742 	if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
743 	   (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
744 		/*
745 		 * If we do the dcbz hack, we have to NX on every execution,
746 		 * so we can patch the executing code. This renders our guest
747 		 * NX-less.
748 		 */
749 		pte.may_execute = !data;
750 	}
751 
752 	if (page_found == -ENOENT || page_found == -EPERM) {
753 		/* Page not found in guest PTE entries, or protection fault */
754 		u64 flags;
755 
756 		if (page_found == -EPERM)
757 			flags = DSISR_PROTFAULT;
758 		else
759 			flags = DSISR_NOHPTE;
760 		if (data) {
761 			flags |= vcpu->arch.fault_dsisr & DSISR_ISSTORE;
762 			kvmppc_core_queue_data_storage(vcpu, eaddr, flags);
763 		} else {
764 			kvmppc_core_queue_inst_storage(vcpu, flags);
765 		}
766 	} else if (page_found == -EINVAL) {
767 		/* Page not found in guest SLB */
768 		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
769 		kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
770 	} else if (kvmppc_visible_gpa(vcpu, pte.raddr)) {
771 		if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
772 			/*
773 			 * There is already a host HPTE there, presumably
774 			 * a read-only one for a page the guest thinks
775 			 * is writable, so get rid of it first.
776 			 */
777 			kvmppc_mmu_unmap_page(vcpu, &pte);
778 		}
779 		/* The guest's PTE is not mapped yet. Map on the host */
780 		if (kvmppc_mmu_map_page(vcpu, &pte, iswrite) == -EIO) {
781 			/* Exit KVM if mapping failed */
782 			vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
783 			return RESUME_HOST;
784 		}
785 		if (data)
786 			vcpu->stat.sp_storage++;
787 		else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
788 			 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
789 			kvmppc_patch_dcbz(vcpu, &pte);
790 	} else {
791 		/* MMIO */
792 		vcpu->stat.mmio_exits++;
793 		vcpu->arch.paddr_accessed = pte.raddr;
794 		vcpu->arch.vaddr_accessed = pte.eaddr;
795 		r = kvmppc_emulate_mmio(vcpu);
796 		if ( r == RESUME_HOST_NV )
797 			r = RESUME_HOST;
798 	}
799 
800 	return r;
801 }
802 
803 /* Give up external provider (FPU, Altivec, VSX) */
kvmppc_giveup_ext(struct kvm_vcpu * vcpu,ulong msr)804 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
805 {
806 	struct thread_struct *t = &current->thread;
807 
808 	/*
809 	 * VSX instructions can access FP and vector registers, so if
810 	 * we are giving up VSX, make sure we give up FP and VMX as well.
811 	 */
812 	if (msr & MSR_VSX)
813 		msr |= MSR_FP | MSR_VEC;
814 
815 	msr &= vcpu->arch.guest_owned_ext;
816 	if (!msr)
817 		return;
818 
819 #ifdef DEBUG_EXT
820 	printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
821 #endif
822 
823 	if (msr & MSR_FP) {
824 		/*
825 		 * Note that on CPUs with VSX, giveup_fpu stores
826 		 * both the traditional FP registers and the added VSX
827 		 * registers into thread.fp_state.fpr[].
828 		 */
829 		if (t->regs->msr & MSR_FP)
830 			giveup_fpu(current);
831 		t->fp_save_area = NULL;
832 	}
833 
834 #ifdef CONFIG_ALTIVEC
835 	if (msr & MSR_VEC) {
836 		if (current->thread.regs->msr & MSR_VEC)
837 			giveup_altivec(current);
838 		t->vr_save_area = NULL;
839 	}
840 #endif
841 
842 	vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
843 	kvmppc_recalc_shadow_msr(vcpu);
844 }
845 
846 /* Give up facility (TAR / EBB / DSCR) */
kvmppc_giveup_fac(struct kvm_vcpu * vcpu,ulong fac)847 void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
848 {
849 #ifdef CONFIG_PPC_BOOK3S_64
850 	if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
851 		/* Facility not available to the guest, ignore giveup request*/
852 		return;
853 	}
854 
855 	switch (fac) {
856 	case FSCR_TAR_LG:
857 		vcpu->arch.tar = mfspr(SPRN_TAR);
858 		mtspr(SPRN_TAR, current->thread.tar);
859 		vcpu->arch.shadow_fscr &= ~FSCR_TAR;
860 		break;
861 	}
862 #endif
863 }
864 
865 /* Handle external providers (FPU, Altivec, VSX) */
kvmppc_handle_ext(struct kvm_vcpu * vcpu,unsigned int exit_nr,ulong msr)866 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
867 			     ulong msr)
868 {
869 	struct thread_struct *t = &current->thread;
870 
871 	/* When we have paired singles, we emulate in software */
872 	if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
873 		return RESUME_GUEST;
874 
875 	if (!(kvmppc_get_msr(vcpu) & msr)) {
876 		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
877 		return RESUME_GUEST;
878 	}
879 
880 	if (msr == MSR_VSX) {
881 		/* No VSX?  Give an illegal instruction interrupt */
882 #ifdef CONFIG_VSX
883 		if (!cpu_has_feature(CPU_FTR_VSX))
884 #endif
885 		{
886 			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
887 			return RESUME_GUEST;
888 		}
889 
890 		/*
891 		 * We have to load up all the FP and VMX registers before
892 		 * we can let the guest use VSX instructions.
893 		 */
894 		msr = MSR_FP | MSR_VEC | MSR_VSX;
895 	}
896 
897 	/* See if we already own all the ext(s) needed */
898 	msr &= ~vcpu->arch.guest_owned_ext;
899 	if (!msr)
900 		return RESUME_GUEST;
901 
902 #ifdef DEBUG_EXT
903 	printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
904 #endif
905 
906 	if (msr & MSR_FP) {
907 		preempt_disable();
908 		enable_kernel_fp();
909 		load_fp_state(&vcpu->arch.fp);
910 		disable_kernel_fp();
911 		t->fp_save_area = &vcpu->arch.fp;
912 		preempt_enable();
913 	}
914 
915 	if (msr & MSR_VEC) {
916 #ifdef CONFIG_ALTIVEC
917 		preempt_disable();
918 		enable_kernel_altivec();
919 		load_vr_state(&vcpu->arch.vr);
920 		disable_kernel_altivec();
921 		t->vr_save_area = &vcpu->arch.vr;
922 		preempt_enable();
923 #endif
924 	}
925 
926 	t->regs->msr |= msr;
927 	vcpu->arch.guest_owned_ext |= msr;
928 	kvmppc_recalc_shadow_msr(vcpu);
929 
930 	return RESUME_GUEST;
931 }
932 
933 /*
934  * Kernel code using FP or VMX could have flushed guest state to
935  * the thread_struct; if so, get it back now.
936  */
kvmppc_handle_lost_ext(struct kvm_vcpu * vcpu)937 static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
938 {
939 	unsigned long lost_ext;
940 
941 	lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
942 	if (!lost_ext)
943 		return;
944 
945 	if (lost_ext & MSR_FP) {
946 		preempt_disable();
947 		enable_kernel_fp();
948 		load_fp_state(&vcpu->arch.fp);
949 		disable_kernel_fp();
950 		preempt_enable();
951 	}
952 #ifdef CONFIG_ALTIVEC
953 	if (lost_ext & MSR_VEC) {
954 		preempt_disable();
955 		enable_kernel_altivec();
956 		load_vr_state(&vcpu->arch.vr);
957 		disable_kernel_altivec();
958 		preempt_enable();
959 	}
960 #endif
961 	current->thread.regs->msr |= lost_ext;
962 }
963 
964 #ifdef CONFIG_PPC_BOOK3S_64
965 
kvmppc_trigger_fac_interrupt(struct kvm_vcpu * vcpu,ulong fac)966 void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
967 {
968 	/* Inject the Interrupt Cause field and trigger a guest interrupt */
969 	vcpu->arch.fscr &= ~(0xffULL << 56);
970 	vcpu->arch.fscr |= (fac << 56);
971 	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
972 }
973 
kvmppc_emulate_fac(struct kvm_vcpu * vcpu,ulong fac)974 static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
975 {
976 	enum emulation_result er = EMULATE_FAIL;
977 
978 	if (!(kvmppc_get_msr(vcpu) & MSR_PR))
979 		er = kvmppc_emulate_instruction(vcpu);
980 
981 	if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
982 		/* Couldn't emulate, trigger interrupt in guest */
983 		kvmppc_trigger_fac_interrupt(vcpu, fac);
984 	}
985 }
986 
987 /* Enable facilities (TAR, EBB, DSCR) for the guest */
kvmppc_handle_fac(struct kvm_vcpu * vcpu,ulong fac)988 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
989 {
990 	bool guest_fac_enabled;
991 	BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
992 
993 	/*
994 	 * Not every facility is enabled by FSCR bits, check whether the
995 	 * guest has this facility enabled at all.
996 	 */
997 	switch (fac) {
998 	case FSCR_TAR_LG:
999 	case FSCR_EBB_LG:
1000 		guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
1001 		break;
1002 	case FSCR_TM_LG:
1003 		guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
1004 		break;
1005 	default:
1006 		guest_fac_enabled = false;
1007 		break;
1008 	}
1009 
1010 	if (!guest_fac_enabled) {
1011 		/* Facility not enabled by the guest */
1012 		kvmppc_trigger_fac_interrupt(vcpu, fac);
1013 		return RESUME_GUEST;
1014 	}
1015 
1016 	switch (fac) {
1017 	case FSCR_TAR_LG:
1018 		/* TAR switching isn't lazy in Linux yet */
1019 		current->thread.tar = mfspr(SPRN_TAR);
1020 		mtspr(SPRN_TAR, vcpu->arch.tar);
1021 		vcpu->arch.shadow_fscr |= FSCR_TAR;
1022 		break;
1023 	default:
1024 		kvmppc_emulate_fac(vcpu, fac);
1025 		break;
1026 	}
1027 
1028 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1029 	/* Since we disabled MSR_TM at privilege state, the mfspr instruction
1030 	 * for TM spr can trigger TM fac unavailable. In this case, the
1031 	 * emulation is handled by kvmppc_emulate_fac(), which invokes
1032 	 * kvmppc_emulate_mfspr() finally. But note the mfspr can include
1033 	 * RT for NV registers. So it need to restore those NV reg to reflect
1034 	 * the update.
1035 	 */
1036 	if ((fac == FSCR_TM_LG) && !(kvmppc_get_msr(vcpu) & MSR_PR))
1037 		return RESUME_GUEST_NV;
1038 #endif
1039 
1040 	return RESUME_GUEST;
1041 }
1042 
kvmppc_set_fscr(struct kvm_vcpu * vcpu,u64 fscr)1043 void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
1044 {
1045 	if (fscr & FSCR_SCV)
1046 		fscr &= ~FSCR_SCV; /* SCV must not be enabled */
1047 	if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
1048 		/* TAR got dropped, drop it in shadow too */
1049 		kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
1050 	} else if (!(vcpu->arch.fscr & FSCR_TAR) && (fscr & FSCR_TAR)) {
1051 		vcpu->arch.fscr = fscr;
1052 		kvmppc_handle_fac(vcpu, FSCR_TAR_LG);
1053 		return;
1054 	}
1055 
1056 	vcpu->arch.fscr = fscr;
1057 }
1058 #endif
1059 
kvmppc_setup_debug(struct kvm_vcpu * vcpu)1060 static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
1061 {
1062 	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
1063 		u64 msr = kvmppc_get_msr(vcpu);
1064 
1065 		kvmppc_set_msr(vcpu, msr | MSR_SE);
1066 	}
1067 }
1068 
kvmppc_clear_debug(struct kvm_vcpu * vcpu)1069 static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
1070 {
1071 	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
1072 		u64 msr = kvmppc_get_msr(vcpu);
1073 
1074 		kvmppc_set_msr(vcpu, msr & ~MSR_SE);
1075 	}
1076 }
1077 
kvmppc_exit_pr_progint(struct kvm_vcpu * vcpu,unsigned int exit_nr)1078 static int kvmppc_exit_pr_progint(struct kvm_vcpu *vcpu, unsigned int exit_nr)
1079 {
1080 	enum emulation_result er;
1081 	ulong flags;
1082 	u32 last_inst;
1083 	int emul, r;
1084 
1085 	/*
1086 	 * shadow_srr1 only contains valid flags if we came here via a program
1087 	 * exception. The other exceptions (emulation assist, FP unavailable,
1088 	 * etc.) do not provide flags in SRR1, so use an illegal-instruction
1089 	 * exception when injecting a program interrupt into the guest.
1090 	 */
1091 	if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
1092 		flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
1093 	else
1094 		flags = SRR1_PROGILL;
1095 
1096 	emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1097 	if (emul != EMULATE_DONE)
1098 		return RESUME_GUEST;
1099 
1100 	if (kvmppc_get_msr(vcpu) & MSR_PR) {
1101 #ifdef EXIT_DEBUG
1102 		pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
1103 			kvmppc_get_pc(vcpu), last_inst);
1104 #endif
1105 		if ((last_inst & 0xff0007ff) != (INS_DCBZ & 0xfffffff7)) {
1106 			kvmppc_core_queue_program(vcpu, flags);
1107 			return RESUME_GUEST;
1108 		}
1109 	}
1110 
1111 	vcpu->stat.emulated_inst_exits++;
1112 	er = kvmppc_emulate_instruction(vcpu);
1113 	switch (er) {
1114 	case EMULATE_DONE:
1115 		r = RESUME_GUEST_NV;
1116 		break;
1117 	case EMULATE_AGAIN:
1118 		r = RESUME_GUEST;
1119 		break;
1120 	case EMULATE_FAIL:
1121 		pr_crit("%s: emulation at %lx failed (%08x)\n",
1122 			__func__, kvmppc_get_pc(vcpu), last_inst);
1123 		kvmppc_core_queue_program(vcpu, flags);
1124 		r = RESUME_GUEST;
1125 		break;
1126 	case EMULATE_DO_MMIO:
1127 		vcpu->run->exit_reason = KVM_EXIT_MMIO;
1128 		r = RESUME_HOST_NV;
1129 		break;
1130 	case EMULATE_EXIT_USER:
1131 		r = RESUME_HOST_NV;
1132 		break;
1133 	default:
1134 		BUG();
1135 	}
1136 
1137 	return r;
1138 }
1139 
kvmppc_handle_exit_pr(struct kvm_vcpu * vcpu,unsigned int exit_nr)1140 int kvmppc_handle_exit_pr(struct kvm_vcpu *vcpu, unsigned int exit_nr)
1141 {
1142 	struct kvm_run *run = vcpu->run;
1143 	int r = RESUME_HOST;
1144 	int s;
1145 
1146 	vcpu->stat.sum_exits++;
1147 
1148 	run->exit_reason = KVM_EXIT_UNKNOWN;
1149 	run->ready_for_interrupt_injection = 1;
1150 
1151 	/* We get here with MSR.EE=1 */
1152 
1153 	trace_kvm_exit(exit_nr, vcpu);
1154 	guest_exit();
1155 
1156 	switch (exit_nr) {
1157 	case BOOK3S_INTERRUPT_INST_STORAGE:
1158 	{
1159 		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1160 		vcpu->stat.pf_instruc++;
1161 
1162 		if (kvmppc_is_split_real(vcpu))
1163 			kvmppc_fixup_split_real(vcpu);
1164 
1165 #ifdef CONFIG_PPC_BOOK3S_32
1166 		/* We set segments as unused segments when invalidating them. So
1167 		 * treat the respective fault as segment fault. */
1168 		{
1169 			struct kvmppc_book3s_shadow_vcpu *svcpu;
1170 			u32 sr;
1171 
1172 			svcpu = svcpu_get(vcpu);
1173 			sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
1174 			svcpu_put(svcpu);
1175 			if (sr == SR_INVALID) {
1176 				kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
1177 				r = RESUME_GUEST;
1178 				break;
1179 			}
1180 		}
1181 #endif
1182 
1183 		/* only care about PTEG not found errors, but leave NX alone */
1184 		if (shadow_srr1 & 0x40000000) {
1185 			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1186 			r = kvmppc_handle_pagefault(vcpu, kvmppc_get_pc(vcpu), exit_nr);
1187 			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1188 			vcpu->stat.sp_instruc++;
1189 		} else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
1190 			  (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
1191 			/*
1192 			 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
1193 			 *     so we can't use the NX bit inside the guest. Let's cross our fingers,
1194 			 *     that no guest that needs the dcbz hack does NX.
1195 			 */
1196 			kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
1197 			r = RESUME_GUEST;
1198 		} else {
1199 			kvmppc_core_queue_inst_storage(vcpu,
1200 						shadow_srr1 & 0x58000000);
1201 			r = RESUME_GUEST;
1202 		}
1203 		break;
1204 	}
1205 	case BOOK3S_INTERRUPT_DATA_STORAGE:
1206 	{
1207 		ulong dar = kvmppc_get_fault_dar(vcpu);
1208 		u32 fault_dsisr = vcpu->arch.fault_dsisr;
1209 		vcpu->stat.pf_storage++;
1210 
1211 #ifdef CONFIG_PPC_BOOK3S_32
1212 		/* We set segments as unused segments when invalidating them. So
1213 		 * treat the respective fault as segment fault. */
1214 		{
1215 			struct kvmppc_book3s_shadow_vcpu *svcpu;
1216 			u32 sr;
1217 
1218 			svcpu = svcpu_get(vcpu);
1219 			sr = svcpu->sr[dar >> SID_SHIFT];
1220 			svcpu_put(svcpu);
1221 			if (sr == SR_INVALID) {
1222 				kvmppc_mmu_map_segment(vcpu, dar);
1223 				r = RESUME_GUEST;
1224 				break;
1225 			}
1226 		}
1227 #endif
1228 
1229 		/*
1230 		 * We need to handle missing shadow PTEs, and
1231 		 * protection faults due to us mapping a page read-only
1232 		 * when the guest thinks it is writable.
1233 		 */
1234 		if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
1235 			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1236 			r = kvmppc_handle_pagefault(vcpu, dar, exit_nr);
1237 			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1238 		} else {
1239 			kvmppc_core_queue_data_storage(vcpu, dar, fault_dsisr);
1240 			r = RESUME_GUEST;
1241 		}
1242 		break;
1243 	}
1244 	case BOOK3S_INTERRUPT_DATA_SEGMENT:
1245 		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1246 			kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1247 			kvmppc_book3s_queue_irqprio(vcpu,
1248 				BOOK3S_INTERRUPT_DATA_SEGMENT);
1249 		}
1250 		r = RESUME_GUEST;
1251 		break;
1252 	case BOOK3S_INTERRUPT_INST_SEGMENT:
1253 		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
1254 			kvmppc_book3s_queue_irqprio(vcpu,
1255 				BOOK3S_INTERRUPT_INST_SEGMENT);
1256 		}
1257 		r = RESUME_GUEST;
1258 		break;
1259 	/* We're good on these - the host merely wanted to get our attention */
1260 	case BOOK3S_INTERRUPT_DECREMENTER:
1261 	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1262 	case BOOK3S_INTERRUPT_DOORBELL:
1263 	case BOOK3S_INTERRUPT_H_DOORBELL:
1264 		vcpu->stat.dec_exits++;
1265 		r = RESUME_GUEST;
1266 		break;
1267 	case BOOK3S_INTERRUPT_EXTERNAL:
1268 	case BOOK3S_INTERRUPT_EXTERNAL_HV:
1269 	case BOOK3S_INTERRUPT_H_VIRT:
1270 		vcpu->stat.ext_intr_exits++;
1271 		r = RESUME_GUEST;
1272 		break;
1273 	case BOOK3S_INTERRUPT_HMI:
1274 	case BOOK3S_INTERRUPT_PERFMON:
1275 	case BOOK3S_INTERRUPT_SYSTEM_RESET:
1276 		r = RESUME_GUEST;
1277 		break;
1278 	case BOOK3S_INTERRUPT_PROGRAM:
1279 	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1280 		r = kvmppc_exit_pr_progint(vcpu, exit_nr);
1281 		break;
1282 	case BOOK3S_INTERRUPT_SYSCALL:
1283 	{
1284 		u32 last_sc;
1285 		int emul;
1286 
1287 		/* Get last sc for papr */
1288 		if (vcpu->arch.papr_enabled) {
1289 			/* The sc instruction points SRR0 to the next inst */
1290 			emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
1291 			if (emul != EMULATE_DONE) {
1292 				kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
1293 				r = RESUME_GUEST;
1294 				break;
1295 			}
1296 		}
1297 
1298 		if (vcpu->arch.papr_enabled &&
1299 		    (last_sc == 0x44000022) &&
1300 		    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1301 			/* SC 1 papr hypercalls */
1302 			ulong cmd = kvmppc_get_gpr(vcpu, 3);
1303 			int i;
1304 
1305 #ifdef CONFIG_PPC_BOOK3S_64
1306 			if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
1307 				r = RESUME_GUEST;
1308 				break;
1309 			}
1310 #endif
1311 
1312 			run->papr_hcall.nr = cmd;
1313 			for (i = 0; i < 9; ++i) {
1314 				ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
1315 				run->papr_hcall.args[i] = gpr;
1316 			}
1317 			run->exit_reason = KVM_EXIT_PAPR_HCALL;
1318 			vcpu->arch.hcall_needed = 1;
1319 			r = RESUME_HOST;
1320 		} else if (vcpu->arch.osi_enabled &&
1321 		    (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
1322 		    (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
1323 			/* MOL hypercalls */
1324 			u64 *gprs = run->osi.gprs;
1325 			int i;
1326 
1327 			run->exit_reason = KVM_EXIT_OSI;
1328 			for (i = 0; i < 32; i++)
1329 				gprs[i] = kvmppc_get_gpr(vcpu, i);
1330 			vcpu->arch.osi_needed = 1;
1331 			r = RESUME_HOST_NV;
1332 		} else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1333 		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1334 			/* KVM PV hypercalls */
1335 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1336 			r = RESUME_GUEST;
1337 		} else {
1338 			/* Guest syscalls */
1339 			vcpu->stat.syscall_exits++;
1340 			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1341 			r = RESUME_GUEST;
1342 		}
1343 		break;
1344 	}
1345 	case BOOK3S_INTERRUPT_FP_UNAVAIL:
1346 	case BOOK3S_INTERRUPT_ALTIVEC:
1347 	case BOOK3S_INTERRUPT_VSX:
1348 	{
1349 		int ext_msr = 0;
1350 		int emul;
1351 		u32 last_inst;
1352 
1353 		if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
1354 			/* Do paired single instruction emulation */
1355 			emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
1356 						    &last_inst);
1357 			if (emul == EMULATE_DONE)
1358 				r = kvmppc_exit_pr_progint(vcpu, exit_nr);
1359 			else
1360 				r = RESUME_GUEST;
1361 
1362 			break;
1363 		}
1364 
1365 		/* Enable external provider */
1366 		switch (exit_nr) {
1367 		case BOOK3S_INTERRUPT_FP_UNAVAIL:
1368 			ext_msr = MSR_FP;
1369 			break;
1370 
1371 		case BOOK3S_INTERRUPT_ALTIVEC:
1372 			ext_msr = MSR_VEC;
1373 			break;
1374 
1375 		case BOOK3S_INTERRUPT_VSX:
1376 			ext_msr = MSR_VSX;
1377 			break;
1378 		}
1379 
1380 		r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1381 		break;
1382 	}
1383 	case BOOK3S_INTERRUPT_ALIGNMENT:
1384 	{
1385 		u32 last_inst;
1386 		int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1387 
1388 		if (emul == EMULATE_DONE) {
1389 			u32 dsisr;
1390 			u64 dar;
1391 
1392 			dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
1393 			dar = kvmppc_alignment_dar(vcpu, last_inst);
1394 
1395 			kvmppc_set_dsisr(vcpu, dsisr);
1396 			kvmppc_set_dar(vcpu, dar);
1397 
1398 			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1399 		}
1400 		r = RESUME_GUEST;
1401 		break;
1402 	}
1403 #ifdef CONFIG_PPC_BOOK3S_64
1404 	case BOOK3S_INTERRUPT_FAC_UNAVAIL:
1405 		r = kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
1406 		break;
1407 #endif
1408 	case BOOK3S_INTERRUPT_MACHINE_CHECK:
1409 		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1410 		r = RESUME_GUEST;
1411 		break;
1412 	case BOOK3S_INTERRUPT_TRACE:
1413 		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
1414 			run->exit_reason = KVM_EXIT_DEBUG;
1415 			r = RESUME_HOST;
1416 		} else {
1417 			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1418 			r = RESUME_GUEST;
1419 		}
1420 		break;
1421 	default:
1422 	{
1423 		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1424 		/* Ugh - bork here! What did we get? */
1425 		printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1426 			exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1427 		r = RESUME_HOST;
1428 		BUG();
1429 		break;
1430 	}
1431 	}
1432 
1433 	if (!(r & RESUME_HOST)) {
1434 		/* To avoid clobbering exit_reason, only check for signals if
1435 		 * we aren't already exiting to userspace for some other
1436 		 * reason. */
1437 
1438 		/*
1439 		 * Interrupts could be timers for the guest which we have to
1440 		 * inject again, so let's postpone them until we're in the guest
1441 		 * and if we really did time things so badly, then we just exit
1442 		 * again due to a host external interrupt.
1443 		 */
1444 		s = kvmppc_prepare_to_enter(vcpu);
1445 		if (s <= 0)
1446 			r = s;
1447 		else {
1448 			/* interrupts now hard-disabled */
1449 			kvmppc_fix_ee_before_entry();
1450 		}
1451 
1452 		kvmppc_handle_lost_ext(vcpu);
1453 	}
1454 
1455 	trace_kvm_book3s_reenter(r, vcpu);
1456 
1457 	return r;
1458 }
1459 
kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1460 static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
1461 					    struct kvm_sregs *sregs)
1462 {
1463 	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1464 	int i;
1465 
1466 	sregs->pvr = vcpu->arch.pvr;
1467 
1468 	sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
1469 	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1470 		for (i = 0; i < 64; i++) {
1471 			sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
1472 			sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1473 		}
1474 	} else {
1475 		for (i = 0; i < 16; i++)
1476 			sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1477 
1478 		for (i = 0; i < 8; i++) {
1479 			sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
1480 			sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
1481 		}
1482 	}
1483 
1484 	return 0;
1485 }
1486 
kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1487 static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
1488 					    struct kvm_sregs *sregs)
1489 {
1490 	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1491 	int i;
1492 
1493 	kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1494 
1495 	vcpu3s->sdr1 = sregs->u.s.sdr1;
1496 #ifdef CONFIG_PPC_BOOK3S_64
1497 	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1498 		/* Flush all SLB entries */
1499 		vcpu->arch.mmu.slbmte(vcpu, 0, 0);
1500 		vcpu->arch.mmu.slbia(vcpu);
1501 
1502 		for (i = 0; i < 64; i++) {
1503 			u64 rb = sregs->u.s.ppc64.slb[i].slbe;
1504 			u64 rs = sregs->u.s.ppc64.slb[i].slbv;
1505 
1506 			if (rb & SLB_ESID_V)
1507 				vcpu->arch.mmu.slbmte(vcpu, rs, rb);
1508 		}
1509 	} else
1510 #endif
1511 	{
1512 		for (i = 0; i < 16; i++) {
1513 			vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
1514 		}
1515 		for (i = 0; i < 8; i++) {
1516 			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
1517 				       (u32)sregs->u.s.ppc32.ibat[i]);
1518 			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
1519 				       (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
1520 			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
1521 				       (u32)sregs->u.s.ppc32.dbat[i]);
1522 			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
1523 				       (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
1524 		}
1525 	}
1526 
1527 	/* Flush the MMU after messing with the segments */
1528 	kvmppc_mmu_pte_flush(vcpu, 0, 0);
1529 
1530 	return 0;
1531 }
1532 
kvmppc_get_one_reg_pr(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)1533 static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1534 				 union kvmppc_one_reg *val)
1535 {
1536 	int r = 0;
1537 
1538 	switch (id) {
1539 	case KVM_REG_PPC_DEBUG_INST:
1540 		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1541 		break;
1542 	case KVM_REG_PPC_HIOR:
1543 		*val = get_reg_val(id, to_book3s(vcpu)->hior);
1544 		break;
1545 	case KVM_REG_PPC_VTB:
1546 		*val = get_reg_val(id, to_book3s(vcpu)->vtb);
1547 		break;
1548 	case KVM_REG_PPC_LPCR:
1549 	case KVM_REG_PPC_LPCR_64:
1550 		/*
1551 		 * We are only interested in the LPCR_ILE bit
1552 		 */
1553 		if (vcpu->arch.intr_msr & MSR_LE)
1554 			*val = get_reg_val(id, LPCR_ILE);
1555 		else
1556 			*val = get_reg_val(id, 0);
1557 		break;
1558 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1559 	case KVM_REG_PPC_TFHAR:
1560 		*val = get_reg_val(id, vcpu->arch.tfhar);
1561 		break;
1562 	case KVM_REG_PPC_TFIAR:
1563 		*val = get_reg_val(id, vcpu->arch.tfiar);
1564 		break;
1565 	case KVM_REG_PPC_TEXASR:
1566 		*val = get_reg_val(id, vcpu->arch.texasr);
1567 		break;
1568 	case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1569 		*val = get_reg_val(id,
1570 				vcpu->arch.gpr_tm[id-KVM_REG_PPC_TM_GPR0]);
1571 		break;
1572 	case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1573 	{
1574 		int i, j;
1575 
1576 		i = id - KVM_REG_PPC_TM_VSR0;
1577 		if (i < 32)
1578 			for (j = 0; j < TS_FPRWIDTH; j++)
1579 				val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1580 		else {
1581 			if (cpu_has_feature(CPU_FTR_ALTIVEC))
1582 				val->vval = vcpu->arch.vr_tm.vr[i-32];
1583 			else
1584 				r = -ENXIO;
1585 		}
1586 		break;
1587 	}
1588 	case KVM_REG_PPC_TM_CR:
1589 		*val = get_reg_val(id, vcpu->arch.cr_tm);
1590 		break;
1591 	case KVM_REG_PPC_TM_XER:
1592 		*val = get_reg_val(id, vcpu->arch.xer_tm);
1593 		break;
1594 	case KVM_REG_PPC_TM_LR:
1595 		*val = get_reg_val(id, vcpu->arch.lr_tm);
1596 		break;
1597 	case KVM_REG_PPC_TM_CTR:
1598 		*val = get_reg_val(id, vcpu->arch.ctr_tm);
1599 		break;
1600 	case KVM_REG_PPC_TM_FPSCR:
1601 		*val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1602 		break;
1603 	case KVM_REG_PPC_TM_AMR:
1604 		*val = get_reg_val(id, vcpu->arch.amr_tm);
1605 		break;
1606 	case KVM_REG_PPC_TM_PPR:
1607 		*val = get_reg_val(id, vcpu->arch.ppr_tm);
1608 		break;
1609 	case KVM_REG_PPC_TM_VRSAVE:
1610 		*val = get_reg_val(id, vcpu->arch.vrsave_tm);
1611 		break;
1612 	case KVM_REG_PPC_TM_VSCR:
1613 		if (cpu_has_feature(CPU_FTR_ALTIVEC))
1614 			*val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1615 		else
1616 			r = -ENXIO;
1617 		break;
1618 	case KVM_REG_PPC_TM_DSCR:
1619 		*val = get_reg_val(id, vcpu->arch.dscr_tm);
1620 		break;
1621 	case KVM_REG_PPC_TM_TAR:
1622 		*val = get_reg_val(id, vcpu->arch.tar_tm);
1623 		break;
1624 #endif
1625 	default:
1626 		r = -EINVAL;
1627 		break;
1628 	}
1629 
1630 	return r;
1631 }
1632 
kvmppc_set_lpcr_pr(struct kvm_vcpu * vcpu,u64 new_lpcr)1633 static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
1634 {
1635 	if (new_lpcr & LPCR_ILE)
1636 		vcpu->arch.intr_msr |= MSR_LE;
1637 	else
1638 		vcpu->arch.intr_msr &= ~MSR_LE;
1639 }
1640 
kvmppc_set_one_reg_pr(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)1641 static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1642 				 union kvmppc_one_reg *val)
1643 {
1644 	int r = 0;
1645 
1646 	switch (id) {
1647 	case KVM_REG_PPC_HIOR:
1648 		to_book3s(vcpu)->hior = set_reg_val(id, *val);
1649 		to_book3s(vcpu)->hior_explicit = true;
1650 		break;
1651 	case KVM_REG_PPC_VTB:
1652 		to_book3s(vcpu)->vtb = set_reg_val(id, *val);
1653 		break;
1654 	case KVM_REG_PPC_LPCR:
1655 	case KVM_REG_PPC_LPCR_64:
1656 		kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
1657 		break;
1658 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1659 	case KVM_REG_PPC_TFHAR:
1660 		vcpu->arch.tfhar = set_reg_val(id, *val);
1661 		break;
1662 	case KVM_REG_PPC_TFIAR:
1663 		vcpu->arch.tfiar = set_reg_val(id, *val);
1664 		break;
1665 	case KVM_REG_PPC_TEXASR:
1666 		vcpu->arch.texasr = set_reg_val(id, *val);
1667 		break;
1668 	case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1669 		vcpu->arch.gpr_tm[id - KVM_REG_PPC_TM_GPR0] =
1670 			set_reg_val(id, *val);
1671 		break;
1672 	case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1673 	{
1674 		int i, j;
1675 
1676 		i = id - KVM_REG_PPC_TM_VSR0;
1677 		if (i < 32)
1678 			for (j = 0; j < TS_FPRWIDTH; j++)
1679 				vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1680 		else
1681 			if (cpu_has_feature(CPU_FTR_ALTIVEC))
1682 				vcpu->arch.vr_tm.vr[i-32] = val->vval;
1683 			else
1684 				r = -ENXIO;
1685 		break;
1686 	}
1687 	case KVM_REG_PPC_TM_CR:
1688 		vcpu->arch.cr_tm = set_reg_val(id, *val);
1689 		break;
1690 	case KVM_REG_PPC_TM_XER:
1691 		vcpu->arch.xer_tm = set_reg_val(id, *val);
1692 		break;
1693 	case KVM_REG_PPC_TM_LR:
1694 		vcpu->arch.lr_tm = set_reg_val(id, *val);
1695 		break;
1696 	case KVM_REG_PPC_TM_CTR:
1697 		vcpu->arch.ctr_tm = set_reg_val(id, *val);
1698 		break;
1699 	case KVM_REG_PPC_TM_FPSCR:
1700 		vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1701 		break;
1702 	case KVM_REG_PPC_TM_AMR:
1703 		vcpu->arch.amr_tm = set_reg_val(id, *val);
1704 		break;
1705 	case KVM_REG_PPC_TM_PPR:
1706 		vcpu->arch.ppr_tm = set_reg_val(id, *val);
1707 		break;
1708 	case KVM_REG_PPC_TM_VRSAVE:
1709 		vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1710 		break;
1711 	case KVM_REG_PPC_TM_VSCR:
1712 		if (cpu_has_feature(CPU_FTR_ALTIVEC))
1713 			vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1714 		else
1715 			r = -ENXIO;
1716 		break;
1717 	case KVM_REG_PPC_TM_DSCR:
1718 		vcpu->arch.dscr_tm = set_reg_val(id, *val);
1719 		break;
1720 	case KVM_REG_PPC_TM_TAR:
1721 		vcpu->arch.tar_tm = set_reg_val(id, *val);
1722 		break;
1723 #endif
1724 	default:
1725 		r = -EINVAL;
1726 		break;
1727 	}
1728 
1729 	return r;
1730 }
1731 
kvmppc_core_vcpu_create_pr(struct kvm_vcpu * vcpu)1732 static int kvmppc_core_vcpu_create_pr(struct kvm_vcpu *vcpu)
1733 {
1734 	struct kvmppc_vcpu_book3s *vcpu_book3s;
1735 	unsigned long p;
1736 	int err;
1737 
1738 	err = -ENOMEM;
1739 
1740 	vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
1741 	if (!vcpu_book3s)
1742 		goto out;
1743 	vcpu->arch.book3s = vcpu_book3s;
1744 
1745 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1746 	vcpu->arch.shadow_vcpu =
1747 		kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
1748 	if (!vcpu->arch.shadow_vcpu)
1749 		goto free_vcpu3s;
1750 #endif
1751 
1752 	p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1753 	if (!p)
1754 		goto free_shadow_vcpu;
1755 	vcpu->arch.shared = (void *)p;
1756 #ifdef CONFIG_PPC_BOOK3S_64
1757 	/* Always start the shared struct in native endian mode */
1758 #ifdef __BIG_ENDIAN__
1759         vcpu->arch.shared_big_endian = true;
1760 #else
1761         vcpu->arch.shared_big_endian = false;
1762 #endif
1763 
1764 	/*
1765 	 * Default to the same as the host if we're on sufficiently
1766 	 * recent machine that we have 1TB segments;
1767 	 * otherwise default to PPC970FX.
1768 	 */
1769 	vcpu->arch.pvr = 0x3C0301;
1770 	if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1771 		vcpu->arch.pvr = mfspr(SPRN_PVR);
1772 	vcpu->arch.intr_msr = MSR_SF;
1773 #else
1774 	/* default to book3s_32 (750) */
1775 	vcpu->arch.pvr = 0x84202;
1776 	vcpu->arch.intr_msr = 0;
1777 #endif
1778 	kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1779 	vcpu->arch.slb_nr = 64;
1780 
1781 	vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1782 
1783 	err = kvmppc_mmu_init_pr(vcpu);
1784 	if (err < 0)
1785 		goto free_shared_page;
1786 
1787 	return 0;
1788 
1789 free_shared_page:
1790 	free_page((unsigned long)vcpu->arch.shared);
1791 free_shadow_vcpu:
1792 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1793 	kfree(vcpu->arch.shadow_vcpu);
1794 free_vcpu3s:
1795 #endif
1796 	vfree(vcpu_book3s);
1797 out:
1798 	return err;
1799 }
1800 
kvmppc_core_vcpu_free_pr(struct kvm_vcpu * vcpu)1801 static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1802 {
1803 	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1804 
1805 	kvmppc_mmu_destroy_pr(vcpu);
1806 	free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1807 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1808 	kfree(vcpu->arch.shadow_vcpu);
1809 #endif
1810 	vfree(vcpu_book3s);
1811 }
1812 
kvmppc_vcpu_run_pr(struct kvm_vcpu * vcpu)1813 static int kvmppc_vcpu_run_pr(struct kvm_vcpu *vcpu)
1814 {
1815 	int ret;
1816 
1817 	/* Check if we can run the vcpu at all */
1818 	if (!vcpu->arch.sane) {
1819 		vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1820 		ret = -EINVAL;
1821 		goto out;
1822 	}
1823 
1824 	kvmppc_setup_debug(vcpu);
1825 
1826 	/*
1827 	 * Interrupts could be timers for the guest which we have to inject
1828 	 * again, so let's postpone them until we're in the guest and if we
1829 	 * really did time things so badly, then we just exit again due to
1830 	 * a host external interrupt.
1831 	 */
1832 	ret = kvmppc_prepare_to_enter(vcpu);
1833 	if (ret <= 0)
1834 		goto out;
1835 	/* interrupts now hard-disabled */
1836 
1837 	/* Save FPU, Altivec and VSX state */
1838 	giveup_all(current);
1839 
1840 	/* Preload FPU if it's enabled */
1841 	if (kvmppc_get_msr(vcpu) & MSR_FP)
1842 		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1843 
1844 	kvmppc_fix_ee_before_entry();
1845 
1846 	ret = __kvmppc_vcpu_run(vcpu);
1847 
1848 	kvmppc_clear_debug(vcpu);
1849 
1850 	/* No need for guest_exit. It's done in handle_exit.
1851 	   We also get here with interrupts enabled. */
1852 
1853 	/* Make sure we save the guest FPU/Altivec/VSX state */
1854 	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
1855 
1856 	/* Make sure we save the guest TAR/EBB/DSCR state */
1857 	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
1858 
1859 	srr_regs_clobbered();
1860 out:
1861 	vcpu->mode = OUTSIDE_GUEST_MODE;
1862 	return ret;
1863 }
1864 
1865 /*
1866  * Get (and clear) the dirty memory log for a memory slot.
1867  */
kvm_vm_ioctl_get_dirty_log_pr(struct kvm * kvm,struct kvm_dirty_log * log)1868 static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
1869 					 struct kvm_dirty_log *log)
1870 {
1871 	struct kvm_memory_slot *memslot;
1872 	struct kvm_vcpu *vcpu;
1873 	ulong ga, ga_end;
1874 	int is_dirty = 0;
1875 	int r;
1876 	unsigned long n;
1877 
1878 	mutex_lock(&kvm->slots_lock);
1879 
1880 	r = kvm_get_dirty_log(kvm, log, &is_dirty, &memslot);
1881 	if (r)
1882 		goto out;
1883 
1884 	/* If nothing is dirty, don't bother messing with page tables. */
1885 	if (is_dirty) {
1886 		ga = memslot->base_gfn << PAGE_SHIFT;
1887 		ga_end = ga + (memslot->npages << PAGE_SHIFT);
1888 
1889 		kvm_for_each_vcpu(n, vcpu, kvm)
1890 			kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1891 
1892 		n = kvm_dirty_bitmap_bytes(memslot);
1893 		memset(memslot->dirty_bitmap, 0, n);
1894 	}
1895 
1896 	r = 0;
1897 out:
1898 	mutex_unlock(&kvm->slots_lock);
1899 	return r;
1900 }
1901 
kvmppc_core_flush_memslot_pr(struct kvm * kvm,struct kvm_memory_slot * memslot)1902 static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
1903 					 struct kvm_memory_slot *memslot)
1904 {
1905 	return;
1906 }
1907 
kvmppc_core_prepare_memory_region_pr(struct kvm * kvm,const struct kvm_memory_slot * old,struct kvm_memory_slot * new,enum kvm_mr_change change)1908 static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
1909 				const struct kvm_memory_slot *old,
1910 				struct kvm_memory_slot *new,
1911 				enum kvm_mr_change change)
1912 {
1913 	return 0;
1914 }
1915 
kvmppc_core_commit_memory_region_pr(struct kvm * kvm,struct kvm_memory_slot * old,const struct kvm_memory_slot * new,enum kvm_mr_change change)1916 static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1917 				struct kvm_memory_slot *old,
1918 				const struct kvm_memory_slot *new,
1919 				enum kvm_mr_change change)
1920 {
1921 	return;
1922 }
1923 
kvmppc_core_free_memslot_pr(struct kvm_memory_slot * slot)1924 static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *slot)
1925 {
1926 	return;
1927 }
1928 
1929 #ifdef CONFIG_PPC64
kvm_vm_ioctl_get_smmu_info_pr(struct kvm * kvm,struct kvm_ppc_smmu_info * info)1930 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1931 					 struct kvm_ppc_smmu_info *info)
1932 {
1933 	long int i;
1934 	struct kvm_vcpu *vcpu;
1935 
1936 	info->flags = 0;
1937 
1938 	/* SLB is always 64 entries */
1939 	info->slb_size = 64;
1940 
1941 	/* Standard 4k base page size segment */
1942 	info->sps[0].page_shift = 12;
1943 	info->sps[0].slb_enc = 0;
1944 	info->sps[0].enc[0].page_shift = 12;
1945 	info->sps[0].enc[0].pte_enc = 0;
1946 
1947 	/*
1948 	 * 64k large page size.
1949 	 * We only want to put this in if the CPUs we're emulating
1950 	 * support it, but unfortunately we don't have a vcpu easily
1951 	 * to hand here to test.  Just pick the first vcpu, and if
1952 	 * that doesn't exist yet, report the minimum capability,
1953 	 * i.e., no 64k pages.
1954 	 * 1T segment support goes along with 64k pages.
1955 	 */
1956 	i = 1;
1957 	vcpu = kvm_get_vcpu(kvm, 0);
1958 	if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
1959 		info->flags = KVM_PPC_1T_SEGMENTS;
1960 		info->sps[i].page_shift = 16;
1961 		info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
1962 		info->sps[i].enc[0].page_shift = 16;
1963 		info->sps[i].enc[0].pte_enc = 1;
1964 		++i;
1965 	}
1966 
1967 	/* Standard 16M large page size segment */
1968 	info->sps[i].page_shift = 24;
1969 	info->sps[i].slb_enc = SLB_VSID_L;
1970 	info->sps[i].enc[0].page_shift = 24;
1971 	info->sps[i].enc[0].pte_enc = 0;
1972 
1973 	return 0;
1974 }
1975 
kvm_configure_mmu_pr(struct kvm * kvm,struct kvm_ppc_mmuv3_cfg * cfg)1976 static int kvm_configure_mmu_pr(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
1977 {
1978 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
1979 		return -ENODEV;
1980 	/* Require flags and process table base and size to all be zero. */
1981 	if (cfg->flags || cfg->process_table)
1982 		return -EINVAL;
1983 	return 0;
1984 }
1985 
1986 #else
kvm_vm_ioctl_get_smmu_info_pr(struct kvm * kvm,struct kvm_ppc_smmu_info * info)1987 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1988 					 struct kvm_ppc_smmu_info *info)
1989 {
1990 	/* We should not get called */
1991 	BUG();
1992 	return 0;
1993 }
1994 #endif /* CONFIG_PPC64 */
1995 
1996 static unsigned int kvm_global_user_count = 0;
1997 static DEFINE_SPINLOCK(kvm_global_user_count_lock);
1998 
kvmppc_core_init_vm_pr(struct kvm * kvm)1999 static int kvmppc_core_init_vm_pr(struct kvm *kvm)
2000 {
2001 	mutex_init(&kvm->arch.hpt_mutex);
2002 
2003 #ifdef CONFIG_PPC_BOOK3S_64
2004 	/* Start out with the default set of hcalls enabled */
2005 	kvmppc_pr_init_default_hcalls(kvm);
2006 #endif
2007 
2008 	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
2009 		spin_lock(&kvm_global_user_count_lock);
2010 		if (++kvm_global_user_count == 1)
2011 			pseries_disable_reloc_on_exc();
2012 		spin_unlock(&kvm_global_user_count_lock);
2013 	}
2014 	return 0;
2015 }
2016 
kvmppc_core_destroy_vm_pr(struct kvm * kvm)2017 static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
2018 {
2019 #ifdef CONFIG_PPC64
2020 	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
2021 #endif
2022 
2023 	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
2024 		spin_lock(&kvm_global_user_count_lock);
2025 		BUG_ON(kvm_global_user_count == 0);
2026 		if (--kvm_global_user_count == 0)
2027 			pseries_enable_reloc_on_exc();
2028 		spin_unlock(&kvm_global_user_count_lock);
2029 	}
2030 }
2031 
kvmppc_core_check_processor_compat_pr(void)2032 static int kvmppc_core_check_processor_compat_pr(void)
2033 {
2034 	/*
2035 	 * PR KVM can work on POWER9 inside a guest partition
2036 	 * running in HPT mode.  It can't work if we are using
2037 	 * radix translation (because radix provides no way for
2038 	 * a process to have unique translations in quadrant 3).
2039 	 */
2040 	if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled())
2041 		return -EIO;
2042 	return 0;
2043 }
2044 
kvm_arch_vm_ioctl_pr(struct file * filp,unsigned int ioctl,unsigned long arg)2045 static long kvm_arch_vm_ioctl_pr(struct file *filp,
2046 				 unsigned int ioctl, unsigned long arg)
2047 {
2048 	return -ENOTTY;
2049 }
2050 
2051 static struct kvmppc_ops kvm_ops_pr = {
2052 	.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
2053 	.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
2054 	.get_one_reg = kvmppc_get_one_reg_pr,
2055 	.set_one_reg = kvmppc_set_one_reg_pr,
2056 	.vcpu_load   = kvmppc_core_vcpu_load_pr,
2057 	.vcpu_put    = kvmppc_core_vcpu_put_pr,
2058 	.inject_interrupt = kvmppc_inject_interrupt_pr,
2059 	.set_msr     = kvmppc_set_msr_pr,
2060 	.vcpu_run    = kvmppc_vcpu_run_pr,
2061 	.vcpu_create = kvmppc_core_vcpu_create_pr,
2062 	.vcpu_free   = kvmppc_core_vcpu_free_pr,
2063 	.check_requests = kvmppc_core_check_requests_pr,
2064 	.get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
2065 	.flush_memslot = kvmppc_core_flush_memslot_pr,
2066 	.prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
2067 	.commit_memory_region = kvmppc_core_commit_memory_region_pr,
2068 	.unmap_gfn_range = kvm_unmap_gfn_range_pr,
2069 	.age_gfn  = kvm_age_gfn_pr,
2070 	.test_age_gfn = kvm_test_age_gfn_pr,
2071 	.set_spte_gfn = kvm_set_spte_gfn_pr,
2072 	.free_memslot = kvmppc_core_free_memslot_pr,
2073 	.init_vm = kvmppc_core_init_vm_pr,
2074 	.destroy_vm = kvmppc_core_destroy_vm_pr,
2075 	.get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
2076 	.emulate_op = kvmppc_core_emulate_op_pr,
2077 	.emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
2078 	.emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
2079 	.fast_vcpu_kick = kvm_vcpu_kick,
2080 	.arch_vm_ioctl  = kvm_arch_vm_ioctl_pr,
2081 #ifdef CONFIG_PPC_BOOK3S_64
2082 	.hcall_implemented = kvmppc_hcall_impl_pr,
2083 	.configure_mmu = kvm_configure_mmu_pr,
2084 #endif
2085 	.giveup_ext = kvmppc_giveup_ext,
2086 };
2087 
2088 
kvmppc_book3s_init_pr(void)2089 int kvmppc_book3s_init_pr(void)
2090 {
2091 	int r;
2092 
2093 	r = kvmppc_core_check_processor_compat_pr();
2094 	if (r < 0)
2095 		return r;
2096 
2097 	kvm_ops_pr.owner = THIS_MODULE;
2098 	kvmppc_pr_ops = &kvm_ops_pr;
2099 
2100 	r = kvmppc_mmu_hpte_sysinit();
2101 	return r;
2102 }
2103 
kvmppc_book3s_exit_pr(void)2104 void kvmppc_book3s_exit_pr(void)
2105 {
2106 	kvmppc_pr_ops = NULL;
2107 	kvmppc_mmu_hpte_sysexit();
2108 }
2109 
2110 /*
2111  * We only support separate modules for book3s 64
2112  */
2113 #ifdef CONFIG_PPC_BOOK3S_64
2114 
2115 module_init(kvmppc_book3s_init_pr);
2116 module_exit(kvmppc_book3s_exit_pr);
2117 
2118 MODULE_LICENSE("GPL");
2119 MODULE_ALIAS_MISCDEV(KVM_MINOR);
2120 MODULE_ALIAS("devname:kvm");
2121 #endif
2122