1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Microchip switch driver common header
3  *
4  * Copyright (C) 2017-2019 Microchip Technology Inc.
5  */
6 
7 #ifndef __KSZ_COMMON_H
8 #define __KSZ_COMMON_H
9 
10 #include <linux/etherdevice.h>
11 #include <linux/kernel.h>
12 #include <linux/mutex.h>
13 #include <linux/phy.h>
14 #include <linux/regmap.h>
15 #include <net/dsa.h>
16 
17 #define KSZ_MAX_NUM_PORTS 8
18 
19 struct vlan_table {
20 	u32 table[3];
21 };
22 
23 struct ksz_port_mib {
24 	struct mutex cnt_mutex;		/* structure access */
25 	u8 cnt_ptr;
26 	u64 *counters;
27 	struct rtnl_link_stats64 stats64;
28 	struct spinlock stats64_lock;
29 };
30 
31 struct ksz_mib_names {
32 	int index;
33 	char string[ETH_GSTRING_LEN];
34 };
35 
36 struct ksz_chip_data {
37 	u32 chip_id;
38 	const char *dev_name;
39 	int num_vlans;
40 	int num_alus;
41 	int num_statics;
42 	int cpu_ports;
43 	int port_cnt;
44 	bool phy_errata_9477;
45 	bool ksz87xx_eee_link_erratum;
46 	const struct ksz_mib_names *mib_names;
47 	int mib_cnt;
48 	u8 reg_mib_cnt;
49 	bool supports_mii[KSZ_MAX_NUM_PORTS];
50 	bool supports_rmii[KSZ_MAX_NUM_PORTS];
51 	bool supports_rgmii[KSZ_MAX_NUM_PORTS];
52 	bool internal_phy[KSZ_MAX_NUM_PORTS];
53 };
54 
55 struct ksz_port {
56 	bool remove_tag;		/* Remove Tag flag set, for ksz8795 only */
57 	int stp_state;
58 	struct phy_device phydev;
59 
60 	u32 on:1;			/* port is not disabled by hardware */
61 	u32 phy:1;			/* port has a PHY */
62 	u32 fiber:1;			/* port is fiber */
63 	u32 sgmii:1;			/* port is SGMII */
64 	u32 force:1;
65 	u32 read:1;			/* read MIB counters in background */
66 	u32 freeze:1;			/* MIB counter freeze is enabled */
67 
68 	struct ksz_port_mib mib;
69 	phy_interface_t interface;
70 	u16 max_frame;
71 };
72 
73 struct ksz_device {
74 	struct dsa_switch *ds;
75 	struct ksz_platform_data *pdata;
76 	const struct ksz_chip_data *info;
77 
78 	struct mutex dev_mutex;		/* device access */
79 	struct mutex regmap_mutex;	/* regmap access */
80 	struct mutex alu_mutex;		/* ALU access */
81 	struct mutex vlan_mutex;	/* vlan access */
82 	const struct ksz_dev_ops *dev_ops;
83 
84 	struct device *dev;
85 	struct regmap *regmap[3];
86 
87 	void *priv;
88 
89 	struct gpio_desc *reset_gpio;	/* Optional reset GPIO */
90 
91 	/* chip specific data */
92 	u32 chip_id;
93 	u8 chip_rev;
94 	int cpu_port;			/* port connected to CPU */
95 	int phy_port_cnt;
96 	phy_interface_t compat_interface;
97 	bool synclko_125;
98 	bool synclko_disable;
99 
100 	struct vlan_table *vlan_cache;
101 
102 	struct ksz_port *ports;
103 	struct delayed_work mib_read;
104 	unsigned long mib_read_interval;
105 	u16 mirror_rx;
106 	u16 mirror_tx;
107 	u32 features;			/* chip specific features */
108 	u16 port_mask;
109 };
110 
111 /* List of supported models */
112 enum ksz_model {
113 	KSZ8795,
114 	KSZ8794,
115 	KSZ8765,
116 	KSZ8830,
117 	KSZ9477,
118 	KSZ9897,
119 	KSZ9893,
120 	KSZ9567,
121 	LAN9370,
122 	LAN9371,
123 	LAN9372,
124 	LAN9373,
125 	LAN9374,
126 };
127 
128 enum ksz_chip_id {
129 	KSZ8795_CHIP_ID = 0x8795,
130 	KSZ8794_CHIP_ID = 0x8794,
131 	KSZ8765_CHIP_ID = 0x8765,
132 	KSZ8830_CHIP_ID = 0x8830,
133 	KSZ9477_CHIP_ID = 0x00947700,
134 	KSZ9897_CHIP_ID = 0x00989700,
135 	KSZ9893_CHIP_ID = 0x00989300,
136 	KSZ9567_CHIP_ID = 0x00956700,
137 	LAN9370_CHIP_ID = 0x00937000,
138 	LAN9371_CHIP_ID = 0x00937100,
139 	LAN9372_CHIP_ID = 0x00937200,
140 	LAN9373_CHIP_ID = 0x00937300,
141 	LAN9374_CHIP_ID = 0x00937400,
142 };
143 
144 struct alu_struct {
145 	/* entry 1 */
146 	u8	is_static:1;
147 	u8	is_src_filter:1;
148 	u8	is_dst_filter:1;
149 	u8	prio_age:3;
150 	u32	_reserv_0_1:23;
151 	u8	mstp:3;
152 	/* entry 2 */
153 	u8	is_override:1;
154 	u8	is_use_fid:1;
155 	u32	_reserv_1_1:23;
156 	u8	port_forward:7;
157 	/* entry 3 & 4*/
158 	u32	_reserv_2_1:9;
159 	u8	fid:7;
160 	u8	mac[ETH_ALEN];
161 };
162 
163 struct ksz_dev_ops {
164 	u32 (*get_port_addr)(int port, int offset);
165 	void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
166 	void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
167 	void (*port_cleanup)(struct ksz_device *dev, int port);
168 	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
169 	void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
170 	void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
171 	int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
172 			       u8 *fid, u8 *src_port, u8 *timestamp,
173 			       u16 *entries);
174 	int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
175 			       struct alu_struct *alu);
176 	void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
177 				struct alu_struct *alu);
178 	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
179 			  u64 *cnt);
180 	void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
181 			  u64 *dropped, u64 *cnt);
182 	void (*r_mib_stat64)(struct ksz_device *dev, int port);
183 	int  (*vlan_filtering)(struct ksz_device *dev, int port,
184 			       bool flag, struct netlink_ext_ack *extack);
185 	int  (*vlan_add)(struct ksz_device *dev, int port,
186 			 const struct switchdev_obj_port_vlan *vlan,
187 			 struct netlink_ext_ack *extack);
188 	int  (*vlan_del)(struct ksz_device *dev, int port,
189 			 const struct switchdev_obj_port_vlan *vlan);
190 	int (*mirror_add)(struct ksz_device *dev, int port,
191 			  struct dsa_mall_mirror_tc_entry *mirror,
192 			  bool ingress, struct netlink_ext_ack *extack);
193 	void (*mirror_del)(struct ksz_device *dev, int port,
194 			   struct dsa_mall_mirror_tc_entry *mirror);
195 	void (*get_caps)(struct ksz_device *dev, int port,
196 			 struct phylink_config *config);
197 	void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
198 	void (*port_init_cnt)(struct ksz_device *dev, int port);
199 	int (*shutdown)(struct ksz_device *dev);
200 	int (*init)(struct ksz_device *dev);
201 	void (*exit)(struct ksz_device *dev);
202 };
203 
204 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
205 int ksz_switch_register(struct ksz_device *dev,
206 			const struct ksz_dev_ops *ops);
207 void ksz_switch_remove(struct ksz_device *dev);
208 
209 int ksz8_switch_register(struct ksz_device *dev);
210 int ksz9477_switch_register(struct ksz_device *dev);
211 
212 void ksz_update_port_member(struct ksz_device *dev, int port);
213 void ksz_init_mib_timer(struct ksz_device *dev);
214 void ksz_r_mib_stats64(struct ksz_device *dev, int port);
215 void ksz_get_stats64(struct dsa_switch *ds, int port,
216 		     struct rtnl_link_stats64 *s);
217 void ksz_phylink_get_caps(struct dsa_switch *ds, int port,
218 			  struct phylink_config *config);
219 extern const struct ksz_chip_data ksz_switch_chips[];
220 
221 /* Common DSA access functions */
222 
223 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
224 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
225 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
226 		       phy_interface_t interface);
227 int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
228 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
229 int ksz_port_bridge_join(struct dsa_switch *ds, int port,
230 			 struct dsa_bridge bridge, bool *tx_fwd_offload,
231 			 struct netlink_ext_ack *extack);
232 void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
233 			   struct dsa_bridge bridge);
234 void ksz_port_stp_state_set(struct dsa_switch *ds, int port,
235 			    u8 state, int reg);
236 void ksz_port_fast_age(struct dsa_switch *ds, int port);
237 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
238 		      void *data);
239 int ksz_port_mdb_add(struct dsa_switch *ds, int port,
240 		     const struct switchdev_obj_port_mdb *mdb,
241 		     struct dsa_db db);
242 int ksz_port_mdb_del(struct dsa_switch *ds, int port,
243 		     const struct switchdev_obj_port_mdb *mdb,
244 		     struct dsa_db db);
245 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
246 void ksz_get_strings(struct dsa_switch *ds, int port,
247 		     u32 stringset, uint8_t *buf);
248 enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds,
249 					   int port, enum dsa_tag_protocol mp);
250 int ksz_port_vlan_filtering(struct dsa_switch *ds, int port,
251 			    bool flag, struct netlink_ext_ack *extack);
252 int ksz_port_vlan_add(struct dsa_switch *ds, int port,
253 		      const struct switchdev_obj_port_vlan *vlan,
254 		      struct netlink_ext_ack *extack);
255 int ksz_port_vlan_del(struct dsa_switch *ds, int port,
256 		      const struct switchdev_obj_port_vlan *vlan);
257 int ksz_port_mirror_add(struct dsa_switch *ds, int port,
258 			struct dsa_mall_mirror_tc_entry *mirror,
259 			bool ingress, struct netlink_ext_ack *extack);
260 void ksz_port_mirror_del(struct dsa_switch *ds, int port,
261 			 struct dsa_mall_mirror_tc_entry *mirror);
262 
263 /* Common register access functions */
264 
ksz_read8(struct ksz_device * dev,u32 reg,u8 * val)265 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
266 {
267 	unsigned int value;
268 	int ret = regmap_read(dev->regmap[0], reg, &value);
269 
270 	*val = value;
271 	return ret;
272 }
273 
ksz_read16(struct ksz_device * dev,u32 reg,u16 * val)274 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
275 {
276 	unsigned int value;
277 	int ret = regmap_read(dev->regmap[1], reg, &value);
278 
279 	*val = value;
280 	return ret;
281 }
282 
ksz_read32(struct ksz_device * dev,u32 reg,u32 * val)283 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
284 {
285 	unsigned int value;
286 	int ret = regmap_read(dev->regmap[2], reg, &value);
287 
288 	*val = value;
289 	return ret;
290 }
291 
ksz_read64(struct ksz_device * dev,u32 reg,u64 * val)292 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
293 {
294 	u32 value[2];
295 	int ret;
296 
297 	ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
298 	if (!ret)
299 		*val = (u64)value[0] << 32 | value[1];
300 
301 	return ret;
302 }
303 
ksz_write8(struct ksz_device * dev,u32 reg,u8 value)304 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
305 {
306 	return regmap_write(dev->regmap[0], reg, value);
307 }
308 
ksz_write16(struct ksz_device * dev,u32 reg,u16 value)309 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
310 {
311 	return regmap_write(dev->regmap[1], reg, value);
312 }
313 
ksz_write32(struct ksz_device * dev,u32 reg,u32 value)314 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
315 {
316 	return regmap_write(dev->regmap[2], reg, value);
317 }
318 
ksz_write64(struct ksz_device * dev,u32 reg,u64 value)319 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
320 {
321 	u32 val[2];
322 
323 	/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
324 	value = swab64(value);
325 	val[0] = swab32(value & 0xffffffffULL);
326 	val[1] = swab32(value >> 32ULL);
327 
328 	return regmap_bulk_write(dev->regmap[2], reg, val, 2);
329 }
330 
ksz_pread8(struct ksz_device * dev,int port,int offset,u8 * data)331 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
332 			      u8 *data)
333 {
334 	ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
335 }
336 
ksz_pread16(struct ksz_device * dev,int port,int offset,u16 * data)337 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
338 			       u16 *data)
339 {
340 	ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
341 }
342 
ksz_pread32(struct ksz_device * dev,int port,int offset,u32 * data)343 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
344 			       u32 *data)
345 {
346 	ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
347 }
348 
ksz_pwrite8(struct ksz_device * dev,int port,int offset,u8 data)349 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
350 			       u8 data)
351 {
352 	ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
353 }
354 
ksz_pwrite16(struct ksz_device * dev,int port,int offset,u16 data)355 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
356 				u16 data)
357 {
358 	ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
359 }
360 
ksz_pwrite32(struct ksz_device * dev,int port,int offset,u32 data)361 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
362 				u32 data)
363 {
364 	ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
365 }
366 
ksz_regmap_lock(void * __mtx)367 static inline void ksz_regmap_lock(void *__mtx)
368 {
369 	struct mutex *mtx = __mtx;
370 	mutex_lock(mtx);
371 }
372 
ksz_regmap_unlock(void * __mtx)373 static inline void ksz_regmap_unlock(void *__mtx)
374 {
375 	struct mutex *mtx = __mtx;
376 	mutex_unlock(mtx);
377 }
378 
379 /* STP State Defines */
380 #define PORT_TX_ENABLE			BIT(2)
381 #define PORT_RX_ENABLE			BIT(1)
382 #define PORT_LEARN_DISABLE		BIT(0)
383 
384 /* Switch ID Defines */
385 #define REG_CHIP_ID0			0x00
386 
387 #define SW_FAMILY_ID_M			GENMASK(15, 8)
388 #define KSZ87_FAMILY_ID			0x87
389 #define KSZ88_FAMILY_ID			0x88
390 
391 #define KSZ8_PORT_STATUS_0		0x08
392 #define KSZ8_PORT_FIBER_MODE		BIT(7)
393 
394 #define SW_CHIP_ID_M			GENMASK(7, 4)
395 #define KSZ87_CHIP_ID_94		0x6
396 #define KSZ87_CHIP_ID_95		0x9
397 #define KSZ88_CHIP_ID_63		0x3
398 
399 #define SW_REV_ID_M			GENMASK(7, 4)
400 
401 /* Regmap tables generation */
402 #define KSZ_SPI_OP_RD		3
403 #define KSZ_SPI_OP_WR		2
404 
405 #define swabnot_used(x)		0
406 
407 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad)		\
408 	swab##swp((opcode) << ((regbits) + (regpad)))
409 
410 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign)		\
411 	{								\
412 		.name = #width,						\
413 		.val_bits = (width),					\
414 		.reg_stride = 1,					\
415 		.reg_bits = (regbits) + (regalign),			\
416 		.pad_bits = (regpad),					\
417 		.max_register = BIT(regbits) - 1,			\
418 		.cache_type = REGCACHE_NONE,				\
419 		.read_flag_mask =					\
420 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp,	\
421 					     regbits, regpad),		\
422 		.write_flag_mask =					\
423 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\
424 					     regbits, regpad),		\
425 		.lock = ksz_regmap_lock,				\
426 		.unlock = ksz_regmap_unlock,				\
427 		.reg_format_endian = REGMAP_ENDIAN_BIG,			\
428 		.val_format_endian = REGMAP_ENDIAN_BIG			\
429 	}
430 
431 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign)		\
432 	static const struct regmap_config ksz##_regmap_config[] = {	\
433 		KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
434 		KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
435 		KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
436 	}
437 
438 #endif
439