1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Microchip switch driver main logic
4 *
5 * Copyright (C) 2017-2019 Microchip Technology Inc.
6 */
7
8 #include <linux/delay.h>
9 #include <linux/export.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/platform_data/microchip-ksz.h>
14 #include <linux/phy.h>
15 #include <linux/etherdevice.h>
16 #include <linux/if_bridge.h>
17 #include <linux/of_device.h>
18 #include <linux/of_net.h>
19 #include <net/dsa.h>
20 #include <net/switchdev.h>
21
22 #include "ksz_common.h"
23
24 #define MIB_COUNTER_NUM 0x20
25
26 struct ksz_stats_raw {
27 u64 rx_hi;
28 u64 rx_undersize;
29 u64 rx_fragments;
30 u64 rx_oversize;
31 u64 rx_jabbers;
32 u64 rx_symbol_err;
33 u64 rx_crc_err;
34 u64 rx_align_err;
35 u64 rx_mac_ctrl;
36 u64 rx_pause;
37 u64 rx_bcast;
38 u64 rx_mcast;
39 u64 rx_ucast;
40 u64 rx_64_or_less;
41 u64 rx_65_127;
42 u64 rx_128_255;
43 u64 rx_256_511;
44 u64 rx_512_1023;
45 u64 rx_1024_1522;
46 u64 rx_1523_2000;
47 u64 rx_2001;
48 u64 tx_hi;
49 u64 tx_late_col;
50 u64 tx_pause;
51 u64 tx_bcast;
52 u64 tx_mcast;
53 u64 tx_ucast;
54 u64 tx_deferred;
55 u64 tx_total_col;
56 u64 tx_exc_col;
57 u64 tx_single_col;
58 u64 tx_mult_col;
59 u64 rx_total;
60 u64 tx_total;
61 u64 rx_discards;
62 u64 tx_discards;
63 };
64
65 static const struct ksz_mib_names ksz88xx_mib_names[] = {
66 { 0x00, "rx" },
67 { 0x01, "rx_hi" },
68 { 0x02, "rx_undersize" },
69 { 0x03, "rx_fragments" },
70 { 0x04, "rx_oversize" },
71 { 0x05, "rx_jabbers" },
72 { 0x06, "rx_symbol_err" },
73 { 0x07, "rx_crc_err" },
74 { 0x08, "rx_align_err" },
75 { 0x09, "rx_mac_ctrl" },
76 { 0x0a, "rx_pause" },
77 { 0x0b, "rx_bcast" },
78 { 0x0c, "rx_mcast" },
79 { 0x0d, "rx_ucast" },
80 { 0x0e, "rx_64_or_less" },
81 { 0x0f, "rx_65_127" },
82 { 0x10, "rx_128_255" },
83 { 0x11, "rx_256_511" },
84 { 0x12, "rx_512_1023" },
85 { 0x13, "rx_1024_1522" },
86 { 0x14, "tx" },
87 { 0x15, "tx_hi" },
88 { 0x16, "tx_late_col" },
89 { 0x17, "tx_pause" },
90 { 0x18, "tx_bcast" },
91 { 0x19, "tx_mcast" },
92 { 0x1a, "tx_ucast" },
93 { 0x1b, "tx_deferred" },
94 { 0x1c, "tx_total_col" },
95 { 0x1d, "tx_exc_col" },
96 { 0x1e, "tx_single_col" },
97 { 0x1f, "tx_mult_col" },
98 { 0x100, "rx_discards" },
99 { 0x101, "tx_discards" },
100 };
101
102 static const struct ksz_mib_names ksz9477_mib_names[] = {
103 { 0x00, "rx_hi" },
104 { 0x01, "rx_undersize" },
105 { 0x02, "rx_fragments" },
106 { 0x03, "rx_oversize" },
107 { 0x04, "rx_jabbers" },
108 { 0x05, "rx_symbol_err" },
109 { 0x06, "rx_crc_err" },
110 { 0x07, "rx_align_err" },
111 { 0x08, "rx_mac_ctrl" },
112 { 0x09, "rx_pause" },
113 { 0x0A, "rx_bcast" },
114 { 0x0B, "rx_mcast" },
115 { 0x0C, "rx_ucast" },
116 { 0x0D, "rx_64_or_less" },
117 { 0x0E, "rx_65_127" },
118 { 0x0F, "rx_128_255" },
119 { 0x10, "rx_256_511" },
120 { 0x11, "rx_512_1023" },
121 { 0x12, "rx_1024_1522" },
122 { 0x13, "rx_1523_2000" },
123 { 0x14, "rx_2001" },
124 { 0x15, "tx_hi" },
125 { 0x16, "tx_late_col" },
126 { 0x17, "tx_pause" },
127 { 0x18, "tx_bcast" },
128 { 0x19, "tx_mcast" },
129 { 0x1A, "tx_ucast" },
130 { 0x1B, "tx_deferred" },
131 { 0x1C, "tx_total_col" },
132 { 0x1D, "tx_exc_col" },
133 { 0x1E, "tx_single_col" },
134 { 0x1F, "tx_mult_col" },
135 { 0x80, "rx_total" },
136 { 0x81, "tx_total" },
137 { 0x82, "rx_discards" },
138 { 0x83, "tx_discards" },
139 };
140
141 const struct ksz_chip_data ksz_switch_chips[] = {
142 [KSZ8795] = {
143 .chip_id = KSZ8795_CHIP_ID,
144 .dev_name = "KSZ8795",
145 .num_vlans = 4096,
146 .num_alus = 0,
147 .num_statics = 8,
148 .cpu_ports = 0x10, /* can be configured as cpu port */
149 .port_cnt = 5, /* total cpu and user ports */
150 .ksz87xx_eee_link_erratum = true,
151 .mib_names = ksz9477_mib_names,
152 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
153 .reg_mib_cnt = MIB_COUNTER_NUM,
154 .supports_mii = {false, false, false, false, true},
155 .supports_rmii = {false, false, false, false, true},
156 .supports_rgmii = {false, false, false, false, true},
157 .internal_phy = {true, true, true, true, false},
158 },
159
160 [KSZ8794] = {
161 /* WARNING
162 * =======
163 * KSZ8794 is similar to KSZ8795, except the port map
164 * contains a gap between external and CPU ports, the
165 * port map is NOT continuous. The per-port register
166 * map is shifted accordingly too, i.e. registers at
167 * offset 0x40 are NOT used on KSZ8794 and they ARE
168 * used on KSZ8795 for external port 3.
169 * external cpu
170 * KSZ8794 0,1,2 4
171 * KSZ8795 0,1,2,3 4
172 * KSZ8765 0,1,2,3 4
173 * port_cnt is configured as 5, even though it is 4
174 */
175 .chip_id = KSZ8794_CHIP_ID,
176 .dev_name = "KSZ8794",
177 .num_vlans = 4096,
178 .num_alus = 0,
179 .num_statics = 8,
180 .cpu_ports = 0x10, /* can be configured as cpu port */
181 .port_cnt = 5, /* total cpu and user ports */
182 .ksz87xx_eee_link_erratum = true,
183 .mib_names = ksz9477_mib_names,
184 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
185 .reg_mib_cnt = MIB_COUNTER_NUM,
186 .supports_mii = {false, false, false, false, true},
187 .supports_rmii = {false, false, false, false, true},
188 .supports_rgmii = {false, false, false, false, true},
189 .internal_phy = {true, true, true, false, false},
190 },
191
192 [KSZ8765] = {
193 .chip_id = KSZ8765_CHIP_ID,
194 .dev_name = "KSZ8765",
195 .num_vlans = 4096,
196 .num_alus = 0,
197 .num_statics = 8,
198 .cpu_ports = 0x10, /* can be configured as cpu port */
199 .port_cnt = 5, /* total cpu and user ports */
200 .ksz87xx_eee_link_erratum = true,
201 .mib_names = ksz9477_mib_names,
202 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
203 .reg_mib_cnt = MIB_COUNTER_NUM,
204 .supports_mii = {false, false, false, false, true},
205 .supports_rmii = {false, false, false, false, true},
206 .supports_rgmii = {false, false, false, false, true},
207 .internal_phy = {true, true, true, true, false},
208 },
209
210 [KSZ8830] = {
211 .chip_id = KSZ8830_CHIP_ID,
212 .dev_name = "KSZ8863/KSZ8873",
213 .num_vlans = 16,
214 .num_alus = 0,
215 .num_statics = 8,
216 .cpu_ports = 0x4, /* can be configured as cpu port */
217 .port_cnt = 3,
218 .mib_names = ksz88xx_mib_names,
219 .mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),
220 .reg_mib_cnt = MIB_COUNTER_NUM,
221 .supports_mii = {false, false, true},
222 .supports_rmii = {false, false, true},
223 .internal_phy = {true, true, false},
224 },
225
226 [KSZ9477] = {
227 .chip_id = KSZ9477_CHIP_ID,
228 .dev_name = "KSZ9477",
229 .num_vlans = 4096,
230 .num_alus = 4096,
231 .num_statics = 16,
232 .cpu_ports = 0x7F, /* can be configured as cpu port */
233 .port_cnt = 7, /* total physical port count */
234 .phy_errata_9477 = true,
235 .mib_names = ksz9477_mib_names,
236 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
237 .reg_mib_cnt = MIB_COUNTER_NUM,
238 .supports_mii = {false, false, false, false,
239 false, true, false},
240 .supports_rmii = {false, false, false, false,
241 false, true, false},
242 .supports_rgmii = {false, false, false, false,
243 false, true, false},
244 .internal_phy = {true, true, true, true,
245 true, false, false},
246 },
247
248 [KSZ9897] = {
249 .chip_id = KSZ9897_CHIP_ID,
250 .dev_name = "KSZ9897",
251 .num_vlans = 4096,
252 .num_alus = 4096,
253 .num_statics = 16,
254 .cpu_ports = 0x7F, /* can be configured as cpu port */
255 .port_cnt = 7, /* total physical port count */
256 .phy_errata_9477 = true,
257 .mib_names = ksz9477_mib_names,
258 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
259 .reg_mib_cnt = MIB_COUNTER_NUM,
260 .supports_mii = {false, false, false, false,
261 false, true, true},
262 .supports_rmii = {false, false, false, false,
263 false, true, true},
264 .supports_rgmii = {false, false, false, false,
265 false, true, true},
266 .internal_phy = {true, true, true, true,
267 true, false, false},
268 },
269
270 [KSZ9893] = {
271 .chip_id = KSZ9893_CHIP_ID,
272 .dev_name = "KSZ9893",
273 .num_vlans = 4096,
274 .num_alus = 4096,
275 .num_statics = 16,
276 .cpu_ports = 0x07, /* can be configured as cpu port */
277 .port_cnt = 3, /* total port count */
278 .mib_names = ksz9477_mib_names,
279 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
280 .reg_mib_cnt = MIB_COUNTER_NUM,
281 .supports_mii = {false, false, true},
282 .supports_rmii = {false, false, true},
283 .supports_rgmii = {false, false, true},
284 .internal_phy = {true, true, false},
285 },
286
287 [KSZ9567] = {
288 .chip_id = KSZ9567_CHIP_ID,
289 .dev_name = "KSZ9567",
290 .num_vlans = 4096,
291 .num_alus = 4096,
292 .num_statics = 16,
293 .cpu_ports = 0x7F, /* can be configured as cpu port */
294 .port_cnt = 7, /* total physical port count */
295 .phy_errata_9477 = true,
296 .mib_names = ksz9477_mib_names,
297 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
298 .reg_mib_cnt = MIB_COUNTER_NUM,
299 .supports_mii = {false, false, false, false,
300 false, true, true},
301 .supports_rmii = {false, false, false, false,
302 false, true, true},
303 .supports_rgmii = {false, false, false, false,
304 false, true, true},
305 .internal_phy = {true, true, true, true,
306 true, false, false},
307 },
308
309 [LAN9370] = {
310 .chip_id = LAN9370_CHIP_ID,
311 .dev_name = "LAN9370",
312 .num_vlans = 4096,
313 .num_alus = 1024,
314 .num_statics = 256,
315 .cpu_ports = 0x10, /* can be configured as cpu port */
316 .port_cnt = 5, /* total physical port count */
317 .mib_names = ksz9477_mib_names,
318 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
319 .reg_mib_cnt = MIB_COUNTER_NUM,
320 .supports_mii = {false, false, false, false, true},
321 .supports_rmii = {false, false, false, false, true},
322 .supports_rgmii = {false, false, false, false, true},
323 .internal_phy = {true, true, true, true, false},
324 },
325
326 [LAN9371] = {
327 .chip_id = LAN9371_CHIP_ID,
328 .dev_name = "LAN9371",
329 .num_vlans = 4096,
330 .num_alus = 1024,
331 .num_statics = 256,
332 .cpu_ports = 0x30, /* can be configured as cpu port */
333 .port_cnt = 6, /* total physical port count */
334 .mib_names = ksz9477_mib_names,
335 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
336 .reg_mib_cnt = MIB_COUNTER_NUM,
337 .supports_mii = {false, false, false, false, true, true},
338 .supports_rmii = {false, false, false, false, true, true},
339 .supports_rgmii = {false, false, false, false, true, true},
340 .internal_phy = {true, true, true, true, false, false},
341 },
342
343 [LAN9372] = {
344 .chip_id = LAN9372_CHIP_ID,
345 .dev_name = "LAN9372",
346 .num_vlans = 4096,
347 .num_alus = 1024,
348 .num_statics = 256,
349 .cpu_ports = 0x30, /* can be configured as cpu port */
350 .port_cnt = 8, /* total physical port count */
351 .mib_names = ksz9477_mib_names,
352 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
353 .reg_mib_cnt = MIB_COUNTER_NUM,
354 .supports_mii = {false, false, false, false,
355 true, true, false, false},
356 .supports_rmii = {false, false, false, false,
357 true, true, false, false},
358 .supports_rgmii = {false, false, false, false,
359 true, true, false, false},
360 .internal_phy = {true, true, true, true,
361 false, false, true, true},
362 },
363
364 [LAN9373] = {
365 .chip_id = LAN9373_CHIP_ID,
366 .dev_name = "LAN9373",
367 .num_vlans = 4096,
368 .num_alus = 1024,
369 .num_statics = 256,
370 .cpu_ports = 0x38, /* can be configured as cpu port */
371 .port_cnt = 5, /* total physical port count */
372 .mib_names = ksz9477_mib_names,
373 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
374 .reg_mib_cnt = MIB_COUNTER_NUM,
375 .supports_mii = {false, false, false, false,
376 true, true, false, false},
377 .supports_rmii = {false, false, false, false,
378 true, true, false, false},
379 .supports_rgmii = {false, false, false, false,
380 true, true, false, false},
381 .internal_phy = {true, true, true, false,
382 false, false, true, true},
383 },
384
385 [LAN9374] = {
386 .chip_id = LAN9374_CHIP_ID,
387 .dev_name = "LAN9374",
388 .num_vlans = 4096,
389 .num_alus = 1024,
390 .num_statics = 256,
391 .cpu_ports = 0x30, /* can be configured as cpu port */
392 .port_cnt = 8, /* total physical port count */
393 .mib_names = ksz9477_mib_names,
394 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
395 .reg_mib_cnt = MIB_COUNTER_NUM,
396 .supports_mii = {false, false, false, false,
397 true, true, false, false},
398 .supports_rmii = {false, false, false, false,
399 true, true, false, false},
400 .supports_rgmii = {false, false, false, false,
401 true, true, false, false},
402 .internal_phy = {true, true, true, true,
403 false, false, true, true},
404 },
405 };
406 EXPORT_SYMBOL_GPL(ksz_switch_chips);
407
ksz_lookup_info(unsigned int prod_num)408 static const struct ksz_chip_data *ksz_lookup_info(unsigned int prod_num)
409 {
410 int i;
411
412 for (i = 0; i < ARRAY_SIZE(ksz_switch_chips); i++) {
413 const struct ksz_chip_data *chip = &ksz_switch_chips[i];
414
415 if (chip->chip_id == prod_num)
416 return chip;
417 }
418
419 return NULL;
420 }
421
ksz_check_device_id(struct ksz_device * dev)422 static int ksz_check_device_id(struct ksz_device *dev)
423 {
424 const struct ksz_chip_data *dt_chip_data;
425
426 dt_chip_data = of_device_get_match_data(dev->dev);
427
428 /* Check for Device Tree and Chip ID */
429 if (dt_chip_data->chip_id != dev->chip_id) {
430 dev_err(dev->dev,
431 "Device tree specifies chip %s but found %s, please fix it!\n",
432 dt_chip_data->dev_name, dev->info->dev_name);
433 return -ENODEV;
434 }
435
436 return 0;
437 }
438
ksz_phylink_get_caps(struct dsa_switch * ds,int port,struct phylink_config * config)439 void ksz_phylink_get_caps(struct dsa_switch *ds, int port,
440 struct phylink_config *config)
441 {
442 struct ksz_device *dev = ds->priv;
443
444 config->legacy_pre_march2020 = false;
445
446 if (dev->info->supports_mii[port])
447 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
448
449 if (dev->info->supports_rmii[port])
450 __set_bit(PHY_INTERFACE_MODE_RMII,
451 config->supported_interfaces);
452
453 if (dev->info->supports_rgmii[port])
454 phy_interface_set_rgmii(config->supported_interfaces);
455
456 if (dev->info->internal_phy[port]) {
457 __set_bit(PHY_INTERFACE_MODE_INTERNAL,
458 config->supported_interfaces);
459 /* Compatibility for phylib's default interface type when the
460 * phy-mode property is absent
461 */
462 __set_bit(PHY_INTERFACE_MODE_GMII,
463 config->supported_interfaces);
464 }
465
466 if (dev->dev_ops->get_caps)
467 dev->dev_ops->get_caps(dev, port, config);
468 }
469 EXPORT_SYMBOL_GPL(ksz_phylink_get_caps);
470
ksz_r_mib_stats64(struct ksz_device * dev,int port)471 void ksz_r_mib_stats64(struct ksz_device *dev, int port)
472 {
473 struct rtnl_link_stats64 *stats;
474 struct ksz_stats_raw *raw;
475 struct ksz_port_mib *mib;
476
477 mib = &dev->ports[port].mib;
478 stats = &mib->stats64;
479 raw = (struct ksz_stats_raw *)mib->counters;
480
481 spin_lock(&mib->stats64_lock);
482
483 stats->rx_packets = raw->rx_bcast + raw->rx_mcast + raw->rx_ucast;
484 stats->tx_packets = raw->tx_bcast + raw->tx_mcast + raw->tx_ucast;
485
486 /* HW counters are counting bytes + FCS which is not acceptable
487 * for rtnl_link_stats64 interface
488 */
489 stats->rx_bytes = raw->rx_total - stats->rx_packets * ETH_FCS_LEN;
490 stats->tx_bytes = raw->tx_total - stats->tx_packets * ETH_FCS_LEN;
491
492 stats->rx_length_errors = raw->rx_undersize + raw->rx_fragments +
493 raw->rx_oversize;
494
495 stats->rx_crc_errors = raw->rx_crc_err;
496 stats->rx_frame_errors = raw->rx_align_err;
497 stats->rx_dropped = raw->rx_discards;
498 stats->rx_errors = stats->rx_length_errors + stats->rx_crc_errors +
499 stats->rx_frame_errors + stats->rx_dropped;
500
501 stats->tx_window_errors = raw->tx_late_col;
502 stats->tx_fifo_errors = raw->tx_discards;
503 stats->tx_aborted_errors = raw->tx_exc_col;
504 stats->tx_errors = stats->tx_window_errors + stats->tx_fifo_errors +
505 stats->tx_aborted_errors;
506
507 stats->multicast = raw->rx_mcast;
508 stats->collisions = raw->tx_total_col;
509
510 spin_unlock(&mib->stats64_lock);
511 }
512 EXPORT_SYMBOL_GPL(ksz_r_mib_stats64);
513
ksz_get_stats64(struct dsa_switch * ds,int port,struct rtnl_link_stats64 * s)514 void ksz_get_stats64(struct dsa_switch *ds, int port,
515 struct rtnl_link_stats64 *s)
516 {
517 struct ksz_device *dev = ds->priv;
518 struct ksz_port_mib *mib;
519
520 mib = &dev->ports[port].mib;
521
522 spin_lock(&mib->stats64_lock);
523 memcpy(s, &mib->stats64, sizeof(*s));
524 spin_unlock(&mib->stats64_lock);
525 }
526 EXPORT_SYMBOL_GPL(ksz_get_stats64);
527
ksz_get_strings(struct dsa_switch * ds,int port,u32 stringset,uint8_t * buf)528 void ksz_get_strings(struct dsa_switch *ds, int port,
529 u32 stringset, uint8_t *buf)
530 {
531 struct ksz_device *dev = ds->priv;
532 int i;
533
534 if (stringset != ETH_SS_STATS)
535 return;
536
537 for (i = 0; i < dev->info->mib_cnt; i++) {
538 memcpy(buf + i * ETH_GSTRING_LEN,
539 dev->info->mib_names[i].string, ETH_GSTRING_LEN);
540 }
541 }
542 EXPORT_SYMBOL_GPL(ksz_get_strings);
543
ksz_update_port_member(struct ksz_device * dev,int port)544 void ksz_update_port_member(struct ksz_device *dev, int port)
545 {
546 struct ksz_port *p = &dev->ports[port];
547 struct dsa_switch *ds = dev->ds;
548 u8 port_member = 0, cpu_port;
549 const struct dsa_port *dp;
550 int i, j;
551
552 if (!dsa_is_user_port(ds, port))
553 return;
554
555 dp = dsa_to_port(ds, port);
556 cpu_port = BIT(dsa_upstream_port(ds, port));
557
558 for (i = 0; i < ds->num_ports; i++) {
559 const struct dsa_port *other_dp = dsa_to_port(ds, i);
560 struct ksz_port *other_p = &dev->ports[i];
561 u8 val = 0;
562
563 if (!dsa_is_user_port(ds, i))
564 continue;
565 if (port == i)
566 continue;
567 if (!dsa_port_bridge_same(dp, other_dp))
568 continue;
569 if (other_p->stp_state != BR_STATE_FORWARDING)
570 continue;
571
572 if (p->stp_state == BR_STATE_FORWARDING) {
573 val |= BIT(port);
574 port_member |= BIT(i);
575 }
576
577 /* Retain port [i]'s relationship to other ports than [port] */
578 for (j = 0; j < ds->num_ports; j++) {
579 const struct dsa_port *third_dp;
580 struct ksz_port *third_p;
581
582 if (j == i)
583 continue;
584 if (j == port)
585 continue;
586 if (!dsa_is_user_port(ds, j))
587 continue;
588 third_p = &dev->ports[j];
589 if (third_p->stp_state != BR_STATE_FORWARDING)
590 continue;
591 third_dp = dsa_to_port(ds, j);
592 if (dsa_port_bridge_same(other_dp, third_dp))
593 val |= BIT(j);
594 }
595
596 dev->dev_ops->cfg_port_member(dev, i, val | cpu_port);
597 }
598
599 dev->dev_ops->cfg_port_member(dev, port, port_member | cpu_port);
600 }
601 EXPORT_SYMBOL_GPL(ksz_update_port_member);
602
port_r_cnt(struct ksz_device * dev,int port)603 static void port_r_cnt(struct ksz_device *dev, int port)
604 {
605 struct ksz_port_mib *mib = &dev->ports[port].mib;
606 u64 *dropped;
607
608 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
609 while (mib->cnt_ptr < dev->info->reg_mib_cnt) {
610 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
611 &mib->counters[mib->cnt_ptr]);
612 ++mib->cnt_ptr;
613 }
614
615 /* last one in storage */
616 dropped = &mib->counters[dev->info->mib_cnt];
617
618 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
619 while (mib->cnt_ptr < dev->info->mib_cnt) {
620 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
621 dropped, &mib->counters[mib->cnt_ptr]);
622 ++mib->cnt_ptr;
623 }
624 mib->cnt_ptr = 0;
625 }
626
ksz_mib_read_work(struct work_struct * work)627 static void ksz_mib_read_work(struct work_struct *work)
628 {
629 struct ksz_device *dev = container_of(work, struct ksz_device,
630 mib_read.work);
631 struct ksz_port_mib *mib;
632 struct ksz_port *p;
633 int i;
634
635 for (i = 0; i < dev->info->port_cnt; i++) {
636 if (dsa_is_unused_port(dev->ds, i))
637 continue;
638
639 p = &dev->ports[i];
640 mib = &p->mib;
641 mutex_lock(&mib->cnt_mutex);
642
643 /* Only read MIB counters when the port is told to do.
644 * If not, read only dropped counters when link is not up.
645 */
646 if (!p->read) {
647 const struct dsa_port *dp = dsa_to_port(dev->ds, i);
648
649 if (!netif_carrier_ok(dp->slave))
650 mib->cnt_ptr = dev->info->reg_mib_cnt;
651 }
652 port_r_cnt(dev, i);
653 p->read = false;
654
655 if (dev->dev_ops->r_mib_stat64)
656 dev->dev_ops->r_mib_stat64(dev, i);
657
658 mutex_unlock(&mib->cnt_mutex);
659 }
660
661 schedule_delayed_work(&dev->mib_read, dev->mib_read_interval);
662 }
663
ksz_init_mib_timer(struct ksz_device * dev)664 void ksz_init_mib_timer(struct ksz_device *dev)
665 {
666 int i;
667
668 INIT_DELAYED_WORK(&dev->mib_read, ksz_mib_read_work);
669
670 for (i = 0; i < dev->info->port_cnt; i++) {
671 struct ksz_port_mib *mib = &dev->ports[i].mib;
672
673 dev->dev_ops->port_init_cnt(dev, i);
674
675 mib->cnt_ptr = 0;
676 memset(mib->counters, 0, dev->info->mib_cnt * sizeof(u64));
677 }
678 }
679 EXPORT_SYMBOL_GPL(ksz_init_mib_timer);
680
ksz_phy_read16(struct dsa_switch * ds,int addr,int reg)681 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg)
682 {
683 struct ksz_device *dev = ds->priv;
684 u16 val = 0xffff;
685
686 dev->dev_ops->r_phy(dev, addr, reg, &val);
687
688 return val;
689 }
690 EXPORT_SYMBOL_GPL(ksz_phy_read16);
691
ksz_phy_write16(struct dsa_switch * ds,int addr,int reg,u16 val)692 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
693 {
694 struct ksz_device *dev = ds->priv;
695
696 dev->dev_ops->w_phy(dev, addr, reg, val);
697
698 return 0;
699 }
700 EXPORT_SYMBOL_GPL(ksz_phy_write16);
701
ksz_mac_link_down(struct dsa_switch * ds,int port,unsigned int mode,phy_interface_t interface)702 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
703 phy_interface_t interface)
704 {
705 struct ksz_device *dev = ds->priv;
706 struct ksz_port *p = &dev->ports[port];
707
708 /* Read all MIB counters when the link is going down. */
709 p->read = true;
710 /* timer started */
711 if (dev->mib_read_interval)
712 schedule_delayed_work(&dev->mib_read, 0);
713 }
714 EXPORT_SYMBOL_GPL(ksz_mac_link_down);
715
ksz_sset_count(struct dsa_switch * ds,int port,int sset)716 int ksz_sset_count(struct dsa_switch *ds, int port, int sset)
717 {
718 struct ksz_device *dev = ds->priv;
719
720 if (sset != ETH_SS_STATS)
721 return 0;
722
723 return dev->info->mib_cnt;
724 }
725 EXPORT_SYMBOL_GPL(ksz_sset_count);
726
ksz_get_ethtool_stats(struct dsa_switch * ds,int port,uint64_t * buf)727 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf)
728 {
729 const struct dsa_port *dp = dsa_to_port(ds, port);
730 struct ksz_device *dev = ds->priv;
731 struct ksz_port_mib *mib;
732
733 mib = &dev->ports[port].mib;
734 mutex_lock(&mib->cnt_mutex);
735
736 /* Only read dropped counters if no link. */
737 if (!netif_carrier_ok(dp->slave))
738 mib->cnt_ptr = dev->info->reg_mib_cnt;
739 port_r_cnt(dev, port);
740 memcpy(buf, mib->counters, dev->info->mib_cnt * sizeof(u64));
741 mutex_unlock(&mib->cnt_mutex);
742 }
743 EXPORT_SYMBOL_GPL(ksz_get_ethtool_stats);
744
ksz_port_bridge_join(struct dsa_switch * ds,int port,struct dsa_bridge bridge,bool * tx_fwd_offload,struct netlink_ext_ack * extack)745 int ksz_port_bridge_join(struct dsa_switch *ds, int port,
746 struct dsa_bridge bridge,
747 bool *tx_fwd_offload,
748 struct netlink_ext_ack *extack)
749 {
750 /* port_stp_state_set() will be called after to put the port in
751 * appropriate state so there is no need to do anything.
752 */
753
754 return 0;
755 }
756 EXPORT_SYMBOL_GPL(ksz_port_bridge_join);
757
ksz_port_bridge_leave(struct dsa_switch * ds,int port,struct dsa_bridge bridge)758 void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
759 struct dsa_bridge bridge)
760 {
761 /* port_stp_state_set() will be called after to put the port in
762 * forwarding state so there is no need to do anything.
763 */
764 }
765 EXPORT_SYMBOL_GPL(ksz_port_bridge_leave);
766
ksz_port_fast_age(struct dsa_switch * ds,int port)767 void ksz_port_fast_age(struct dsa_switch *ds, int port)
768 {
769 struct ksz_device *dev = ds->priv;
770
771 dev->dev_ops->flush_dyn_mac_table(dev, port);
772 }
773 EXPORT_SYMBOL_GPL(ksz_port_fast_age);
774
ksz_port_fdb_dump(struct dsa_switch * ds,int port,dsa_fdb_dump_cb_t * cb,void * data)775 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
776 void *data)
777 {
778 struct ksz_device *dev = ds->priv;
779 int ret = 0;
780 u16 i = 0;
781 u16 entries = 0;
782 u8 timestamp = 0;
783 u8 fid;
784 u8 member;
785 struct alu_struct alu;
786
787 do {
788 alu.is_static = false;
789 ret = dev->dev_ops->r_dyn_mac_table(dev, i, alu.mac, &fid,
790 &member, ×tamp,
791 &entries);
792 if (!ret && (member & BIT(port))) {
793 ret = cb(alu.mac, alu.fid, alu.is_static, data);
794 if (ret)
795 break;
796 }
797 i++;
798 } while (i < entries);
799 if (i >= entries)
800 ret = 0;
801
802 return ret;
803 }
804 EXPORT_SYMBOL_GPL(ksz_port_fdb_dump);
805
ksz_port_mdb_add(struct dsa_switch * ds,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)806 int ksz_port_mdb_add(struct dsa_switch *ds, int port,
807 const struct switchdev_obj_port_mdb *mdb,
808 struct dsa_db db)
809 {
810 struct ksz_device *dev = ds->priv;
811 struct alu_struct alu;
812 int index;
813 int empty = 0;
814
815 alu.port_forward = 0;
816 for (index = 0; index < dev->info->num_statics; index++) {
817 if (!dev->dev_ops->r_sta_mac_table(dev, index, &alu)) {
818 /* Found one already in static MAC table. */
819 if (!memcmp(alu.mac, mdb->addr, ETH_ALEN) &&
820 alu.fid == mdb->vid)
821 break;
822 /* Remember the first empty entry. */
823 } else if (!empty) {
824 empty = index + 1;
825 }
826 }
827
828 /* no available entry */
829 if (index == dev->info->num_statics && !empty)
830 return -ENOSPC;
831
832 /* add entry */
833 if (index == dev->info->num_statics) {
834 index = empty - 1;
835 memset(&alu, 0, sizeof(alu));
836 memcpy(alu.mac, mdb->addr, ETH_ALEN);
837 alu.is_static = true;
838 }
839 alu.port_forward |= BIT(port);
840 if (mdb->vid) {
841 alu.is_use_fid = true;
842
843 /* Need a way to map VID to FID. */
844 alu.fid = mdb->vid;
845 }
846 dev->dev_ops->w_sta_mac_table(dev, index, &alu);
847
848 return 0;
849 }
850 EXPORT_SYMBOL_GPL(ksz_port_mdb_add);
851
ksz_port_mdb_del(struct dsa_switch * ds,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)852 int ksz_port_mdb_del(struct dsa_switch *ds, int port,
853 const struct switchdev_obj_port_mdb *mdb,
854 struct dsa_db db)
855 {
856 struct ksz_device *dev = ds->priv;
857 struct alu_struct alu;
858 int index;
859
860 for (index = 0; index < dev->info->num_statics; index++) {
861 if (!dev->dev_ops->r_sta_mac_table(dev, index, &alu)) {
862 /* Found one already in static MAC table. */
863 if (!memcmp(alu.mac, mdb->addr, ETH_ALEN) &&
864 alu.fid == mdb->vid)
865 break;
866 }
867 }
868
869 /* no available entry */
870 if (index == dev->info->num_statics)
871 goto exit;
872
873 /* clear port */
874 alu.port_forward &= ~BIT(port);
875 if (!alu.port_forward)
876 alu.is_static = false;
877 dev->dev_ops->w_sta_mac_table(dev, index, &alu);
878
879 exit:
880 return 0;
881 }
882 EXPORT_SYMBOL_GPL(ksz_port_mdb_del);
883
ksz_enable_port(struct dsa_switch * ds,int port,struct phy_device * phy)884 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)
885 {
886 struct ksz_device *dev = ds->priv;
887
888 if (!dsa_is_user_port(ds, port))
889 return 0;
890
891 /* setup slave port */
892 dev->dev_ops->port_setup(dev, port, false);
893
894 /* port_stp_state_set() will be called after to enable the port so
895 * there is no need to do anything.
896 */
897
898 return 0;
899 }
900 EXPORT_SYMBOL_GPL(ksz_enable_port);
901
ksz_port_stp_state_set(struct dsa_switch * ds,int port,u8 state,int reg)902 void ksz_port_stp_state_set(struct dsa_switch *ds, int port,
903 u8 state, int reg)
904 {
905 struct ksz_device *dev = ds->priv;
906 struct ksz_port *p;
907 u8 data;
908
909 ksz_pread8(dev, port, reg, &data);
910 data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);
911
912 switch (state) {
913 case BR_STATE_DISABLED:
914 data |= PORT_LEARN_DISABLE;
915 break;
916 case BR_STATE_LISTENING:
917 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);
918 break;
919 case BR_STATE_LEARNING:
920 data |= PORT_RX_ENABLE;
921 break;
922 case BR_STATE_FORWARDING:
923 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);
924 break;
925 case BR_STATE_BLOCKING:
926 data |= PORT_LEARN_DISABLE;
927 break;
928 default:
929 dev_err(ds->dev, "invalid STP state: %d\n", state);
930 return;
931 }
932
933 ksz_pwrite8(dev, port, reg, data);
934
935 p = &dev->ports[port];
936 p->stp_state = state;
937
938 ksz_update_port_member(dev, port);
939 }
940 EXPORT_SYMBOL_GPL(ksz_port_stp_state_set);
941
ksz_get_tag_protocol(struct dsa_switch * ds,int port,enum dsa_tag_protocol mp)942 enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds,
943 int port, enum dsa_tag_protocol mp)
944 {
945 struct ksz_device *dev = ds->priv;
946 enum dsa_tag_protocol proto = DSA_TAG_PROTO_NONE;
947
948 if (dev->chip_id == KSZ8795_CHIP_ID ||
949 dev->chip_id == KSZ8794_CHIP_ID ||
950 dev->chip_id == KSZ8765_CHIP_ID)
951 proto = DSA_TAG_PROTO_KSZ8795;
952
953 if (dev->chip_id == KSZ8830_CHIP_ID ||
954 dev->chip_id == KSZ9893_CHIP_ID)
955 proto = DSA_TAG_PROTO_KSZ9893;
956
957 if (dev->chip_id == KSZ9477_CHIP_ID ||
958 dev->chip_id == KSZ9897_CHIP_ID ||
959 dev->chip_id == KSZ9567_CHIP_ID)
960 proto = DSA_TAG_PROTO_KSZ9477;
961
962 return proto;
963 }
964 EXPORT_SYMBOL_GPL(ksz_get_tag_protocol);
965
ksz_port_vlan_filtering(struct dsa_switch * ds,int port,bool flag,struct netlink_ext_ack * extack)966 int ksz_port_vlan_filtering(struct dsa_switch *ds, int port,
967 bool flag, struct netlink_ext_ack *extack)
968 {
969 struct ksz_device *dev = ds->priv;
970
971 if (!dev->dev_ops->vlan_filtering)
972 return -EOPNOTSUPP;
973
974 return dev->dev_ops->vlan_filtering(dev, port, flag, extack);
975 }
976 EXPORT_SYMBOL_GPL(ksz_port_vlan_filtering);
977
ksz_port_vlan_add(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)978 int ksz_port_vlan_add(struct dsa_switch *ds, int port,
979 const struct switchdev_obj_port_vlan *vlan,
980 struct netlink_ext_ack *extack)
981 {
982 struct ksz_device *dev = ds->priv;
983
984 if (!dev->dev_ops->vlan_add)
985 return -EOPNOTSUPP;
986
987 return dev->dev_ops->vlan_add(dev, port, vlan, extack);
988 }
989 EXPORT_SYMBOL_GPL(ksz_port_vlan_add);
990
ksz_port_vlan_del(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan)991 int ksz_port_vlan_del(struct dsa_switch *ds, int port,
992 const struct switchdev_obj_port_vlan *vlan)
993 {
994 struct ksz_device *dev = ds->priv;
995
996 if (!dev->dev_ops->vlan_del)
997 return -EOPNOTSUPP;
998
999 return dev->dev_ops->vlan_del(dev, port, vlan);
1000 }
1001 EXPORT_SYMBOL_GPL(ksz_port_vlan_del);
1002
ksz_port_mirror_add(struct dsa_switch * ds,int port,struct dsa_mall_mirror_tc_entry * mirror,bool ingress,struct netlink_ext_ack * extack)1003 int ksz_port_mirror_add(struct dsa_switch *ds, int port,
1004 struct dsa_mall_mirror_tc_entry *mirror,
1005 bool ingress, struct netlink_ext_ack *extack)
1006 {
1007 struct ksz_device *dev = ds->priv;
1008
1009 if (!dev->dev_ops->mirror_add)
1010 return -EOPNOTSUPP;
1011
1012 return dev->dev_ops->mirror_add(dev, port, mirror, ingress, extack);
1013 }
1014 EXPORT_SYMBOL_GPL(ksz_port_mirror_add);
1015
ksz_port_mirror_del(struct dsa_switch * ds,int port,struct dsa_mall_mirror_tc_entry * mirror)1016 void ksz_port_mirror_del(struct dsa_switch *ds, int port,
1017 struct dsa_mall_mirror_tc_entry *mirror)
1018 {
1019 struct ksz_device *dev = ds->priv;
1020
1021 if (dev->dev_ops->mirror_del)
1022 dev->dev_ops->mirror_del(dev, port, mirror);
1023 }
1024 EXPORT_SYMBOL_GPL(ksz_port_mirror_del);
1025
ksz_switch_detect(struct ksz_device * dev)1026 static int ksz_switch_detect(struct ksz_device *dev)
1027 {
1028 u8 id1, id2;
1029 u16 id16;
1030 u32 id32;
1031 int ret;
1032
1033 /* read chip id */
1034 ret = ksz_read16(dev, REG_CHIP_ID0, &id16);
1035 if (ret)
1036 return ret;
1037
1038 id1 = FIELD_GET(SW_FAMILY_ID_M, id16);
1039 id2 = FIELD_GET(SW_CHIP_ID_M, id16);
1040
1041 switch (id1) {
1042 case KSZ87_FAMILY_ID:
1043 if (id2 == KSZ87_CHIP_ID_95) {
1044 u8 val;
1045
1046 dev->chip_id = KSZ8795_CHIP_ID;
1047
1048 ksz_read8(dev, KSZ8_PORT_STATUS_0, &val);
1049 if (val & KSZ8_PORT_FIBER_MODE)
1050 dev->chip_id = KSZ8765_CHIP_ID;
1051 } else if (id2 == KSZ87_CHIP_ID_94) {
1052 dev->chip_id = KSZ8794_CHIP_ID;
1053 } else {
1054 return -ENODEV;
1055 }
1056 break;
1057 case KSZ88_FAMILY_ID:
1058 if (id2 == KSZ88_CHIP_ID_63)
1059 dev->chip_id = KSZ8830_CHIP_ID;
1060 else
1061 return -ENODEV;
1062 break;
1063 default:
1064 ret = ksz_read32(dev, REG_CHIP_ID0, &id32);
1065 if (ret)
1066 return ret;
1067
1068 dev->chip_rev = FIELD_GET(SW_REV_ID_M, id32);
1069 id32 &= ~0xFF;
1070
1071 switch (id32) {
1072 case KSZ9477_CHIP_ID:
1073 case KSZ9897_CHIP_ID:
1074 case KSZ9893_CHIP_ID:
1075 case KSZ9567_CHIP_ID:
1076 case LAN9370_CHIP_ID:
1077 case LAN9371_CHIP_ID:
1078 case LAN9372_CHIP_ID:
1079 case LAN9373_CHIP_ID:
1080 case LAN9374_CHIP_ID:
1081 dev->chip_id = id32;
1082 break;
1083 default:
1084 dev_err(dev->dev,
1085 "unsupported switch detected %x)\n", id32);
1086 return -ENODEV;
1087 }
1088 }
1089 return 0;
1090 }
1091
ksz_switch_alloc(struct device * base,void * priv)1092 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv)
1093 {
1094 struct dsa_switch *ds;
1095 struct ksz_device *swdev;
1096
1097 ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL);
1098 if (!ds)
1099 return NULL;
1100
1101 ds->dev = base;
1102 ds->num_ports = DSA_MAX_PORTS;
1103
1104 swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL);
1105 if (!swdev)
1106 return NULL;
1107
1108 ds->priv = swdev;
1109 swdev->dev = base;
1110
1111 swdev->ds = ds;
1112 swdev->priv = priv;
1113
1114 return swdev;
1115 }
1116 EXPORT_SYMBOL(ksz_switch_alloc);
1117
ksz_switch_register(struct ksz_device * dev,const struct ksz_dev_ops * ops)1118 int ksz_switch_register(struct ksz_device *dev,
1119 const struct ksz_dev_ops *ops)
1120 {
1121 const struct ksz_chip_data *info;
1122 struct device_node *port, *ports;
1123 phy_interface_t interface;
1124 unsigned int port_num;
1125 int ret;
1126 int i;
1127
1128 if (dev->pdata)
1129 dev->chip_id = dev->pdata->chip_id;
1130
1131 dev->reset_gpio = devm_gpiod_get_optional(dev->dev, "reset",
1132 GPIOD_OUT_LOW);
1133 if (IS_ERR(dev->reset_gpio))
1134 return PTR_ERR(dev->reset_gpio);
1135
1136 if (dev->reset_gpio) {
1137 gpiod_set_value_cansleep(dev->reset_gpio, 1);
1138 usleep_range(10000, 12000);
1139 gpiod_set_value_cansleep(dev->reset_gpio, 0);
1140 msleep(100);
1141 }
1142
1143 mutex_init(&dev->dev_mutex);
1144 mutex_init(&dev->regmap_mutex);
1145 mutex_init(&dev->alu_mutex);
1146 mutex_init(&dev->vlan_mutex);
1147
1148 ret = ksz_switch_detect(dev);
1149 if (ret)
1150 return ret;
1151
1152 info = ksz_lookup_info(dev->chip_id);
1153 if (!info)
1154 return -ENODEV;
1155
1156 /* Update the compatible info with the probed one */
1157 dev->info = info;
1158
1159 dev_info(dev->dev, "found switch: %s, rev %i\n",
1160 dev->info->dev_name, dev->chip_rev);
1161
1162 ret = ksz_check_device_id(dev);
1163 if (ret)
1164 return ret;
1165
1166 dev->dev_ops = ops;
1167
1168 ret = dev->dev_ops->init(dev);
1169 if (ret)
1170 return ret;
1171
1172 dev->ports = devm_kzalloc(dev->dev,
1173 dev->info->port_cnt * sizeof(struct ksz_port),
1174 GFP_KERNEL);
1175 if (!dev->ports)
1176 return -ENOMEM;
1177
1178 for (i = 0; i < dev->info->port_cnt; i++) {
1179 spin_lock_init(&dev->ports[i].mib.stats64_lock);
1180 mutex_init(&dev->ports[i].mib.cnt_mutex);
1181 dev->ports[i].mib.counters =
1182 devm_kzalloc(dev->dev,
1183 sizeof(u64) * (dev->info->mib_cnt + 1),
1184 GFP_KERNEL);
1185 if (!dev->ports[i].mib.counters)
1186 return -ENOMEM;
1187 }
1188
1189 /* set the real number of ports */
1190 dev->ds->num_ports = dev->info->port_cnt;
1191
1192 /* Host port interface will be self detected, or specifically set in
1193 * device tree.
1194 */
1195 for (port_num = 0; port_num < dev->info->port_cnt; ++port_num)
1196 dev->ports[port_num].interface = PHY_INTERFACE_MODE_NA;
1197 if (dev->dev->of_node) {
1198 ret = of_get_phy_mode(dev->dev->of_node, &interface);
1199 if (ret == 0)
1200 dev->compat_interface = interface;
1201 ports = of_get_child_by_name(dev->dev->of_node, "ethernet-ports");
1202 if (!ports)
1203 ports = of_get_child_by_name(dev->dev->of_node, "ports");
1204 if (ports) {
1205 for_each_available_child_of_node(ports, port) {
1206 if (of_property_read_u32(port, "reg",
1207 &port_num))
1208 continue;
1209 if (!(dev->port_mask & BIT(port_num))) {
1210 of_node_put(port);
1211 of_node_put(ports);
1212 return -EINVAL;
1213 }
1214 of_get_phy_mode(port,
1215 &dev->ports[port_num].interface);
1216 }
1217 of_node_put(ports);
1218 }
1219 dev->synclko_125 = of_property_read_bool(dev->dev->of_node,
1220 "microchip,synclko-125");
1221 dev->synclko_disable = of_property_read_bool(dev->dev->of_node,
1222 "microchip,synclko-disable");
1223 if (dev->synclko_125 && dev->synclko_disable) {
1224 dev_err(dev->dev, "inconsistent synclko settings\n");
1225 return -EINVAL;
1226 }
1227 }
1228
1229 ret = dsa_register_switch(dev->ds);
1230 if (ret) {
1231 dev->dev_ops->exit(dev);
1232 return ret;
1233 }
1234
1235 /* Read MIB counters every 30 seconds to avoid overflow. */
1236 dev->mib_read_interval = msecs_to_jiffies(5000);
1237
1238 /* Start the MIB timer. */
1239 schedule_delayed_work(&dev->mib_read, 0);
1240
1241 return 0;
1242 }
1243 EXPORT_SYMBOL(ksz_switch_register);
1244
ksz_switch_remove(struct ksz_device * dev)1245 void ksz_switch_remove(struct ksz_device *dev)
1246 {
1247 /* timer started */
1248 if (dev->mib_read_interval) {
1249 dev->mib_read_interval = 0;
1250 cancel_delayed_work_sync(&dev->mib_read);
1251 }
1252
1253 dev->dev_ops->exit(dev);
1254 dsa_unregister_switch(dev->ds);
1255
1256 if (dev->reset_gpio)
1257 gpiod_set_value_cansleep(dev->reset_gpio, 1);
1258
1259 }
1260 EXPORT_SYMBOL(ksz_switch_remove);
1261
1262 MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>");
1263 MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver");
1264 MODULE_LICENSE("GPL");
1265