1 /*
2  * arch/arm/mach-kirkwood/mpp.c
3  *
4  * MPP functions for Marvell Kirkwood SoCs
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/mbus.h>
14 #include <linux/io.h>
15 #include <asm/gpio.h>
16 #include <mach/hardware.h>
17 #include "common.h"
18 #include "mpp.h"
19 
kirkwood_variant(void)20 static unsigned int __init kirkwood_variant(void)
21 {
22 	u32 dev, rev;
23 
24 	kirkwood_pcie_id(&dev, &rev);
25 
26 	if ((dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) ||
27 	    (dev == MV88F6282_DEV_ID))
28 		return MPP_F6281_MASK;
29 	if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0)
30 		return MPP_F6192_MASK;
31 	if (dev == MV88F6180_DEV_ID)
32 		return MPP_F6180_MASK;
33 
34 	printk(KERN_ERR "MPP setup: unknown kirkwood variant "
35 			"(dev %#x rev %#x)\n", dev, rev);
36 	return 0;
37 }
38 
39 #define MPP_CTRL(i)	(DEV_BUS_VIRT_BASE + (i) * 4)
40 #define MPP_NR_REGS	(1 + MPP_MAX/8)
41 
kirkwood_mpp_conf(unsigned int * mpp_list)42 void __init kirkwood_mpp_conf(unsigned int *mpp_list)
43 {
44 	u32 mpp_ctrl[MPP_NR_REGS];
45 	unsigned int variant_mask;
46 	int i;
47 
48 	variant_mask = kirkwood_variant();
49 	if (!variant_mask)
50 		return;
51 
52 	printk(KERN_DEBUG "initial MPP regs:");
53 	for (i = 0; i < MPP_NR_REGS; i++) {
54 		mpp_ctrl[i] = readl(MPP_CTRL(i));
55 		printk(" %08x", mpp_ctrl[i]);
56 	}
57 	printk("\n");
58 
59 	for ( ; *mpp_list; mpp_list++) {
60 		unsigned int num = MPP_NUM(*mpp_list);
61 		unsigned int sel = MPP_SEL(*mpp_list);
62 		int shift, gpio_mode;
63 
64 		if (num > MPP_MAX) {
65 			printk(KERN_ERR "kirkwood_mpp_conf: invalid MPP "
66 					"number (%u)\n", num);
67 			continue;
68 		}
69 		if (!(*mpp_list & variant_mask)) {
70 			printk(KERN_WARNING
71 			       "kirkwood_mpp_conf: requested MPP%u config "
72 			       "unavailable on this hardware\n", num);
73 			continue;
74 		}
75 
76 		shift = (num & 7) << 2;
77 		mpp_ctrl[num / 8] &= ~(0xf << shift);
78 		mpp_ctrl[num / 8] |= sel << shift;
79 
80 		gpio_mode = 0;
81 		if (*mpp_list & MPP_INPUT_MASK)
82 			gpio_mode |= GPIO_INPUT_OK;
83 		if (*mpp_list & MPP_OUTPUT_MASK)
84 			gpio_mode |= GPIO_OUTPUT_OK;
85 		if (sel != 0)
86 			gpio_mode = 0;
87 		orion_gpio_set_valid(num, gpio_mode);
88 	}
89 
90 	printk(KERN_DEBUG "  final MPP regs:");
91 	for (i = 0; i < MPP_NR_REGS; i++) {
92 		writel(mpp_ctrl[i], MPP_CTRL(i));
93 		printk(" %08x", mpp_ctrl[i]);
94 	}
95 	printk("\n");
96 }
97