1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29 
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47 
48 #include <net/ieee80211_radiotap.h>
49 #include <net/mac80211.h>
50 
51 #include <asm/div64.h>
52 
53 #define DRV_NAME	"iwl3945"
54 
55 #include "iwl-fh.h"
56 #include "iwl-3945-fh.h"
57 #include "iwl-commands.h"
58 #include "iwl-sta.h"
59 #include "iwl-3945.h"
60 #include "iwl-core.h"
61 #include "iwl-helpers.h"
62 #include "iwl-dev.h"
63 #include "iwl-spectrum.h"
64 
65 /*
66  * module name, copyright, version, etc.
67  */
68 
69 #define DRV_DESCRIPTION	\
70 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
71 
72 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
73 #define VD "d"
74 #else
75 #define VD
76 #endif
77 
78 /*
79  * add "s" to indicate spectrum measurement included.
80  * we add it here to be consistent with previous releases in which
81  * this was configurable.
82  */
83 #define DRV_VERSION  IWLWIFI_VERSION VD "s"
84 #define DRV_COPYRIGHT	"Copyright(c) 2003-2011 Intel Corporation"
85 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
86 
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91 
92  /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94 	.sw_crypto = 1,
95 	.restart_fw = 1,
96 	.disable_hw_scan = 1,
97 	/* the rest are 0 by default */
98 };
99 
100 /**
101  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
102  * @priv: eeprom and antenna fields are used to determine antenna flags
103  *
104  * priv->eeprom39  is used to determine if antenna AUX/MAIN are reversed
105  * iwl3945_mod_params.antenna specifies the antenna diversity mode:
106  *
107  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
108  * IWL_ANTENNA_MAIN      - Force MAIN antenna
109  * IWL_ANTENNA_AUX       - Force AUX antenna
110  */
iwl3945_get_antenna_flags(const struct iwl_priv * priv)111 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
112 {
113 	struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
114 
115 	switch (iwl3945_mod_params.antenna) {
116 	case IWL_ANTENNA_DIVERSITY:
117 		return 0;
118 
119 	case IWL_ANTENNA_MAIN:
120 		if (eeprom->antenna_switch_type)
121 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
122 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123 
124 	case IWL_ANTENNA_AUX:
125 		if (eeprom->antenna_switch_type)
126 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
127 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
128 	}
129 
130 	/* bad antenna selector value */
131 	IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
132 		iwl3945_mod_params.antenna);
133 
134 	return 0;		/* "diversity" is default if error */
135 }
136 
iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv * priv,struct ieee80211_key_conf * keyconf,u8 sta_id)137 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
138 				   struct ieee80211_key_conf *keyconf,
139 				   u8 sta_id)
140 {
141 	unsigned long flags;
142 	__le16 key_flags = 0;
143 	int ret;
144 
145 	key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
146 	key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
147 
148 	if (sta_id == priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id)
149 		key_flags |= STA_KEY_MULTICAST_MSK;
150 
151 	keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
152 	keyconf->hw_key_idx = keyconf->keyidx;
153 	key_flags &= ~STA_KEY_FLG_INVALID;
154 
155 	spin_lock_irqsave(&priv->sta_lock, flags);
156 	priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
157 	priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
158 	memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
159 	       keyconf->keylen);
160 
161 	memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
162 	       keyconf->keylen);
163 
164 	if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
165 			== STA_KEY_FLG_NO_ENC)
166 		priv->stations[sta_id].sta.key.key_offset =
167 				 iwl_legacy_get_free_ucode_key_index(priv);
168 	/* else, we are overriding an existing key => no need to allocated room
169 	* in uCode. */
170 
171 	WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
172 		"no space for a new key");
173 
174 	priv->stations[sta_id].sta.key.key_flags = key_flags;
175 	priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
176 	priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
177 
178 	IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
179 
180 	ret = iwl_legacy_send_add_sta(priv,
181 				&priv->stations[sta_id].sta, CMD_ASYNC);
182 
183 	spin_unlock_irqrestore(&priv->sta_lock, flags);
184 
185 	return ret;
186 }
187 
iwl3945_set_tkip_dynamic_key_info(struct iwl_priv * priv,struct ieee80211_key_conf * keyconf,u8 sta_id)188 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
189 				  struct ieee80211_key_conf *keyconf,
190 				  u8 sta_id)
191 {
192 	return -EOPNOTSUPP;
193 }
194 
iwl3945_set_wep_dynamic_key_info(struct iwl_priv * priv,struct ieee80211_key_conf * keyconf,u8 sta_id)195 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
196 				  struct ieee80211_key_conf *keyconf,
197 				  u8 sta_id)
198 {
199 	return -EOPNOTSUPP;
200 }
201 
iwl3945_clear_sta_key_info(struct iwl_priv * priv,u8 sta_id)202 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
203 {
204 	unsigned long flags;
205 	struct iwl_legacy_addsta_cmd sta_cmd;
206 
207 	spin_lock_irqsave(&priv->sta_lock, flags);
208 	memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
209 	memset(&priv->stations[sta_id].sta.key, 0,
210 		sizeof(struct iwl4965_keyinfo));
211 	priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
212 	priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
213 	priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
214 	memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_legacy_addsta_cmd));
215 	spin_unlock_irqrestore(&priv->sta_lock, flags);
216 
217 	IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
218 	return iwl_legacy_send_add_sta(priv, &sta_cmd, CMD_SYNC);
219 }
220 
iwl3945_set_dynamic_key(struct iwl_priv * priv,struct ieee80211_key_conf * keyconf,u8 sta_id)221 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
222 			struct ieee80211_key_conf *keyconf, u8 sta_id)
223 {
224 	int ret = 0;
225 
226 	keyconf->hw_key_idx = HW_KEY_DYNAMIC;
227 
228 	switch (keyconf->cipher) {
229 	case WLAN_CIPHER_SUITE_CCMP:
230 		ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
231 		break;
232 	case WLAN_CIPHER_SUITE_TKIP:
233 		ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
234 		break;
235 	case WLAN_CIPHER_SUITE_WEP40:
236 	case WLAN_CIPHER_SUITE_WEP104:
237 		ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
238 		break;
239 	default:
240 		IWL_ERR(priv, "Unknown alg: %s alg=%x\n", __func__,
241 			keyconf->cipher);
242 		ret = -EINVAL;
243 	}
244 
245 	IWL_DEBUG_WEP(priv, "Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
246 		      keyconf->cipher, keyconf->keylen, keyconf->keyidx,
247 		      sta_id, ret);
248 
249 	return ret;
250 }
251 
iwl3945_remove_static_key(struct iwl_priv * priv)252 static int iwl3945_remove_static_key(struct iwl_priv *priv)
253 {
254 	int ret = -EOPNOTSUPP;
255 
256 	return ret;
257 }
258 
iwl3945_set_static_key(struct iwl_priv * priv,struct ieee80211_key_conf * key)259 static int iwl3945_set_static_key(struct iwl_priv *priv,
260 				struct ieee80211_key_conf *key)
261 {
262 	if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
263 	    key->cipher == WLAN_CIPHER_SUITE_WEP104)
264 		return -EOPNOTSUPP;
265 
266 	IWL_ERR(priv, "Static key invalid: cipher %x\n", key->cipher);
267 	return -EINVAL;
268 }
269 
iwl3945_clear_free_frames(struct iwl_priv * priv)270 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
271 {
272 	struct list_head *element;
273 
274 	IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
275 		       priv->frames_count);
276 
277 	while (!list_empty(&priv->free_frames)) {
278 		element = priv->free_frames.next;
279 		list_del(element);
280 		kfree(list_entry(element, struct iwl3945_frame, list));
281 		priv->frames_count--;
282 	}
283 
284 	if (priv->frames_count) {
285 		IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
286 			    priv->frames_count);
287 		priv->frames_count = 0;
288 	}
289 }
290 
iwl3945_get_free_frame(struct iwl_priv * priv)291 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
292 {
293 	struct iwl3945_frame *frame;
294 	struct list_head *element;
295 	if (list_empty(&priv->free_frames)) {
296 		frame = kzalloc(sizeof(*frame), GFP_KERNEL);
297 		if (!frame) {
298 			IWL_ERR(priv, "Could not allocate frame!\n");
299 			return NULL;
300 		}
301 
302 		priv->frames_count++;
303 		return frame;
304 	}
305 
306 	element = priv->free_frames.next;
307 	list_del(element);
308 	return list_entry(element, struct iwl3945_frame, list);
309 }
310 
iwl3945_free_frame(struct iwl_priv * priv,struct iwl3945_frame * frame)311 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
312 {
313 	memset(frame, 0, sizeof(*frame));
314 	list_add(&frame->list, &priv->free_frames);
315 }
316 
iwl3945_fill_beacon_frame(struct iwl_priv * priv,struct ieee80211_hdr * hdr,int left)317 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
318 				struct ieee80211_hdr *hdr,
319 				int left)
320 {
321 
322 	if (!iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS) || !priv->beacon_skb)
323 		return 0;
324 
325 	if (priv->beacon_skb->len > left)
326 		return 0;
327 
328 	memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
329 
330 	return priv->beacon_skb->len;
331 }
332 
iwl3945_send_beacon_cmd(struct iwl_priv * priv)333 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
334 {
335 	struct iwl3945_frame *frame;
336 	unsigned int frame_size;
337 	int rc;
338 	u8 rate;
339 
340 	frame = iwl3945_get_free_frame(priv);
341 
342 	if (!frame) {
343 		IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
344 			  "command.\n");
345 		return -ENOMEM;
346 	}
347 
348 	rate = iwl_legacy_get_lowest_plcp(priv,
349 				&priv->contexts[IWL_RXON_CTX_BSS]);
350 
351 	frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
352 
353 	rc = iwl_legacy_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
354 			      &frame->u.cmd[0]);
355 
356 	iwl3945_free_frame(priv, frame);
357 
358 	return rc;
359 }
360 
iwl3945_unset_hw_params(struct iwl_priv * priv)361 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
362 {
363 	if (priv->_3945.shared_virt)
364 		dma_free_coherent(&priv->pci_dev->dev,
365 				  sizeof(struct iwl3945_shared),
366 				  priv->_3945.shared_virt,
367 				  priv->_3945.shared_phys);
368 }
369 
iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv * priv,struct ieee80211_tx_info * info,struct iwl_device_cmd * cmd,struct sk_buff * skb_frag,int sta_id)370 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
371 				      struct ieee80211_tx_info *info,
372 				      struct iwl_device_cmd *cmd,
373 				      struct sk_buff *skb_frag,
374 				      int sta_id)
375 {
376 	struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
377 	struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
378 
379 	tx_cmd->sec_ctl = 0;
380 
381 	switch (keyinfo->cipher) {
382 	case WLAN_CIPHER_SUITE_CCMP:
383 		tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
384 		memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
385 		IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
386 		break;
387 
388 	case WLAN_CIPHER_SUITE_TKIP:
389 		break;
390 
391 	case WLAN_CIPHER_SUITE_WEP104:
392 		tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
393 		/* fall through */
394 	case WLAN_CIPHER_SUITE_WEP40:
395 		tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
396 		    (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
397 
398 		memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
399 
400 		IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
401 			     "with key %d\n", info->control.hw_key->hw_key_idx);
402 		break;
403 
404 	default:
405 		IWL_ERR(priv, "Unknown encode cipher %x\n", keyinfo->cipher);
406 		break;
407 	}
408 }
409 
410 /*
411  * handle build REPLY_TX command notification.
412  */
iwl3945_build_tx_cmd_basic(struct iwl_priv * priv,struct iwl_device_cmd * cmd,struct ieee80211_tx_info * info,struct ieee80211_hdr * hdr,u8 std_id)413 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
414 				  struct iwl_device_cmd *cmd,
415 				  struct ieee80211_tx_info *info,
416 				  struct ieee80211_hdr *hdr, u8 std_id)
417 {
418 	struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
419 	__le32 tx_flags = tx_cmd->tx_flags;
420 	__le16 fc = hdr->frame_control;
421 
422 	tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
423 	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
424 		tx_flags |= TX_CMD_FLG_ACK_MSK;
425 		if (ieee80211_is_mgmt(fc))
426 			tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
427 		if (ieee80211_is_probe_resp(fc) &&
428 		    !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
429 			tx_flags |= TX_CMD_FLG_TSF_MSK;
430 	} else {
431 		tx_flags &= (~TX_CMD_FLG_ACK_MSK);
432 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
433 	}
434 
435 	tx_cmd->sta_id = std_id;
436 	if (ieee80211_has_morefrags(fc))
437 		tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
438 
439 	if (ieee80211_is_data_qos(fc)) {
440 		u8 *qc = ieee80211_get_qos_ctl(hdr);
441 		tx_cmd->tid_tspec = qc[0] & 0xf;
442 		tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
443 	} else {
444 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
445 	}
446 
447 	iwl_legacy_tx_cmd_protection(priv, info, fc, &tx_flags);
448 
449 	tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
450 	if (ieee80211_is_mgmt(fc)) {
451 		if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
452 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
453 		else
454 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
455 	} else {
456 		tx_cmd->timeout.pm_frame_timeout = 0;
457 	}
458 
459 	tx_cmd->driver_txop = 0;
460 	tx_cmd->tx_flags = tx_flags;
461 	tx_cmd->next_frame_len = 0;
462 }
463 
464 /*
465  * start REPLY_TX command process
466  */
iwl3945_tx_skb(struct iwl_priv * priv,struct sk_buff * skb)467 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
468 {
469 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
470 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
471 	struct iwl3945_tx_cmd *tx_cmd;
472 	struct iwl_tx_queue *txq = NULL;
473 	struct iwl_queue *q = NULL;
474 	struct iwl_device_cmd *out_cmd;
475 	struct iwl_cmd_meta *out_meta;
476 	dma_addr_t phys_addr;
477 	dma_addr_t txcmd_phys;
478 	int txq_id = skb_get_queue_mapping(skb);
479 	u16 len, idx, hdr_len;
480 	u8 id;
481 	u8 unicast;
482 	u8 sta_id;
483 	u8 tid = 0;
484 	__le16 fc;
485 	u8 wait_write_ptr = 0;
486 	unsigned long flags;
487 
488 	spin_lock_irqsave(&priv->lock, flags);
489 	if (iwl_legacy_is_rfkill(priv)) {
490 		IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
491 		goto drop_unlock;
492 	}
493 
494 	if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
495 		IWL_ERR(priv, "ERROR: No TX rate available.\n");
496 		goto drop_unlock;
497 	}
498 
499 	unicast = !is_multicast_ether_addr(hdr->addr1);
500 	id = 0;
501 
502 	fc = hdr->frame_control;
503 
504 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
505 	if (ieee80211_is_auth(fc))
506 		IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
507 	else if (ieee80211_is_assoc_req(fc))
508 		IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
509 	else if (ieee80211_is_reassoc_req(fc))
510 		IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
511 #endif
512 
513 	spin_unlock_irqrestore(&priv->lock, flags);
514 
515 	hdr_len = ieee80211_hdrlen(fc);
516 
517 	/* Find index into station table for destination station */
518 	sta_id = iwl_legacy_sta_id_or_broadcast(
519 			priv, &priv->contexts[IWL_RXON_CTX_BSS],
520 			info->control.sta);
521 	if (sta_id == IWL_INVALID_STATION) {
522 		IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
523 			       hdr->addr1);
524 		goto drop;
525 	}
526 
527 	IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
528 
529 	if (ieee80211_is_data_qos(fc)) {
530 		u8 *qc = ieee80211_get_qos_ctl(hdr);
531 		tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
532 		if (unlikely(tid >= MAX_TID_COUNT))
533 			goto drop;
534 	}
535 
536 	/* Descriptor for chosen Tx queue */
537 	txq = &priv->txq[txq_id];
538 	q = &txq->q;
539 
540 	if ((iwl_legacy_queue_space(q) < q->high_mark))
541 		goto drop;
542 
543 	spin_lock_irqsave(&priv->lock, flags);
544 
545 	idx = iwl_legacy_get_cmd_index(q, q->write_ptr, 0);
546 
547 	/* Set up driver data for this TFD */
548 	memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
549 	txq->txb[q->write_ptr].skb = skb;
550 	txq->txb[q->write_ptr].ctx = &priv->contexts[IWL_RXON_CTX_BSS];
551 
552 	/* Init first empty entry in queue's array of Tx/cmd buffers */
553 	out_cmd = txq->cmd[idx];
554 	out_meta = &txq->meta[idx];
555 	tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
556 	memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
557 	memset(tx_cmd, 0, sizeof(*tx_cmd));
558 
559 	/*
560 	 * Set up the Tx-command (not MAC!) header.
561 	 * Store the chosen Tx queue and TFD index within the sequence field;
562 	 * after Tx, uCode's Tx response will return this value so driver can
563 	 * locate the frame within the tx queue and do post-tx processing.
564 	 */
565 	out_cmd->hdr.cmd = REPLY_TX;
566 	out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
567 				INDEX_TO_SEQ(q->write_ptr)));
568 
569 	/* Copy MAC header from skb into command buffer */
570 	memcpy(tx_cmd->hdr, hdr, hdr_len);
571 
572 
573 	if (info->control.hw_key)
574 		iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
575 
576 	/* TODO need this for burst mode later on */
577 	iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
578 
579 	/* set is_hcca to 0; it probably will never be implemented */
580 	iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
581 
582 	/* Total # bytes to be transmitted */
583 	len = (u16)skb->len;
584 	tx_cmd->len = cpu_to_le16(len);
585 
586 	iwl_legacy_dbg_log_tx_data_frame(priv, len, hdr);
587 	iwl_legacy_update_stats(priv, true, fc, len);
588 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
589 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
590 
591 	if (!ieee80211_has_morefrags(hdr->frame_control)) {
592 		txq->need_update = 1;
593 	} else {
594 		wait_write_ptr = 1;
595 		txq->need_update = 0;
596 	}
597 
598 	IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
599 		     le16_to_cpu(out_cmd->hdr.sequence));
600 	IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
601 	iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
602 	iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
603 			   ieee80211_hdrlen(fc));
604 
605 	/*
606 	 * Use the first empty entry in this queue's command buffer array
607 	 * to contain the Tx command and MAC header concatenated together
608 	 * (payload data will be in another buffer).
609 	 * Size of this varies, due to varying MAC header length.
610 	 * If end is not dword aligned, we'll have 2 extra bytes at the end
611 	 * of the MAC header (device reads on dword boundaries).
612 	 * We'll tell device about this padding later.
613 	 */
614 	len = sizeof(struct iwl3945_tx_cmd) +
615 			sizeof(struct iwl_cmd_header) + hdr_len;
616 	len = (len + 3) & ~3;
617 
618 	/* Physical address of this Tx command's header (not MAC header!),
619 	 * within command buffer array. */
620 	txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
621 				    len, PCI_DMA_TODEVICE);
622 	/* we do not map meta data ... so we can safely access address to
623 	 * provide to unmap command*/
624 	dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
625 	dma_unmap_len_set(out_meta, len, len);
626 
627 	/* Add buffer containing Tx command and MAC(!) header to TFD's
628 	 * first entry */
629 	priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
630 						   txcmd_phys, len, 1, 0);
631 
632 
633 	/* Set up TFD's 2nd entry to point directly to remainder of skb,
634 	 * if any (802.11 null frames have no payload). */
635 	len = skb->len - hdr_len;
636 	if (len) {
637 		phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
638 					   len, PCI_DMA_TODEVICE);
639 		priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
640 							   phys_addr, len,
641 							   0, U32_PAD(len));
642 	}
643 
644 
645 	/* Tell device the write index *just past* this latest filled TFD */
646 	q->write_ptr = iwl_legacy_queue_inc_wrap(q->write_ptr, q->n_bd);
647 	iwl_legacy_txq_update_write_ptr(priv, txq);
648 	spin_unlock_irqrestore(&priv->lock, flags);
649 
650 	if ((iwl_legacy_queue_space(q) < q->high_mark)
651 	    && priv->mac80211_registered) {
652 		if (wait_write_ptr) {
653 			spin_lock_irqsave(&priv->lock, flags);
654 			txq->need_update = 1;
655 			iwl_legacy_txq_update_write_ptr(priv, txq);
656 			spin_unlock_irqrestore(&priv->lock, flags);
657 		}
658 
659 		iwl_legacy_stop_queue(priv, txq);
660 	}
661 
662 	return 0;
663 
664 drop_unlock:
665 	spin_unlock_irqrestore(&priv->lock, flags);
666 drop:
667 	return -1;
668 }
669 
iwl3945_get_measurement(struct iwl_priv * priv,struct ieee80211_measurement_params * params,u8 type)670 static int iwl3945_get_measurement(struct iwl_priv *priv,
671 			       struct ieee80211_measurement_params *params,
672 			       u8 type)
673 {
674 	struct iwl_spectrum_cmd spectrum;
675 	struct iwl_rx_packet *pkt;
676 	struct iwl_host_cmd cmd = {
677 		.id = REPLY_SPECTRUM_MEASUREMENT_CMD,
678 		.data = (void *)&spectrum,
679 		.flags = CMD_WANT_SKB,
680 	};
681 	u32 add_time = le64_to_cpu(params->start_time);
682 	int rc;
683 	int spectrum_resp_status;
684 	int duration = le16_to_cpu(params->duration);
685 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
686 
687 	if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))
688 		add_time = iwl_legacy_usecs_to_beacons(priv,
689 			le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
690 			le16_to_cpu(ctx->timing.beacon_interval));
691 
692 	memset(&spectrum, 0, sizeof(spectrum));
693 
694 	spectrum.channel_count = cpu_to_le16(1);
695 	spectrum.flags =
696 	    RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
697 	spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
698 	cmd.len = sizeof(spectrum);
699 	spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
700 
701 	if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))
702 		spectrum.start_time =
703 			iwl_legacy_add_beacon_time(priv,
704 				priv->_3945.last_beacon_time, add_time,
705 				le16_to_cpu(ctx->timing.beacon_interval));
706 	else
707 		spectrum.start_time = 0;
708 
709 	spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
710 	spectrum.channels[0].channel = params->channel;
711 	spectrum.channels[0].type = type;
712 	if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
713 		spectrum.flags |= RXON_FLG_BAND_24G_MSK |
714 		    RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
715 
716 	rc = iwl_legacy_send_cmd_sync(priv, &cmd);
717 	if (rc)
718 		return rc;
719 
720 	pkt = (struct iwl_rx_packet *)cmd.reply_page;
721 	if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
722 		IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
723 		rc = -EIO;
724 	}
725 
726 	spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
727 	switch (spectrum_resp_status) {
728 	case 0:		/* Command will be handled */
729 		if (pkt->u.spectrum.id != 0xff) {
730 			IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
731 						pkt->u.spectrum.id);
732 			priv->measurement_status &= ~MEASUREMENT_READY;
733 		}
734 		priv->measurement_status |= MEASUREMENT_ACTIVE;
735 		rc = 0;
736 		break;
737 
738 	case 1:		/* Command will not be handled */
739 		rc = -EAGAIN;
740 		break;
741 	}
742 
743 	iwl_legacy_free_pages(priv, cmd.reply_page);
744 
745 	return rc;
746 }
747 
iwl3945_rx_reply_alive(struct iwl_priv * priv,struct iwl_rx_mem_buffer * rxb)748 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
749 			       struct iwl_rx_mem_buffer *rxb)
750 {
751 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
752 	struct iwl_alive_resp *palive;
753 	struct delayed_work *pwork;
754 
755 	palive = &pkt->u.alive_frame;
756 
757 	IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
758 		       "0x%01X 0x%01X\n",
759 		       palive->is_valid, palive->ver_type,
760 		       palive->ver_subtype);
761 
762 	if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
763 		IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
764 		memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
765 		       sizeof(struct iwl_alive_resp));
766 		pwork = &priv->init_alive_start;
767 	} else {
768 		IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
769 		memcpy(&priv->card_alive, &pkt->u.alive_frame,
770 		       sizeof(struct iwl_alive_resp));
771 		pwork = &priv->alive_start;
772 		iwl3945_disable_events(priv);
773 	}
774 
775 	/* We delay the ALIVE response by 5ms to
776 	 * give the HW RF Kill time to activate... */
777 	if (palive->is_valid == UCODE_VALID_OK)
778 		queue_delayed_work(priv->workqueue, pwork,
779 				   msecs_to_jiffies(5));
780 	else
781 		IWL_WARN(priv, "uCode did not respond OK.\n");
782 }
783 
iwl3945_rx_reply_add_sta(struct iwl_priv * priv,struct iwl_rx_mem_buffer * rxb)784 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
785 				 struct iwl_rx_mem_buffer *rxb)
786 {
787 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
788 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
789 #endif
790 
791 	IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
792 }
793 
iwl3945_rx_beacon_notif(struct iwl_priv * priv,struct iwl_rx_mem_buffer * rxb)794 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
795 				struct iwl_rx_mem_buffer *rxb)
796 {
797 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
798 	struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
799 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
800 	u8 rate = beacon->beacon_notify_hdr.rate;
801 
802 	IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
803 		"tsf %d %d rate %d\n",
804 		le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
805 		beacon->beacon_notify_hdr.failure_frame,
806 		le32_to_cpu(beacon->ibss_mgr_status),
807 		le32_to_cpu(beacon->high_tsf),
808 		le32_to_cpu(beacon->low_tsf), rate);
809 #endif
810 
811 	priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
812 
813 }
814 
815 /* Handle notification from uCode that card's power state is changing
816  * due to software, hardware, or critical temperature RFKILL */
iwl3945_rx_card_state_notif(struct iwl_priv * priv,struct iwl_rx_mem_buffer * rxb)817 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
818 				    struct iwl_rx_mem_buffer *rxb)
819 {
820 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
821 	u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
822 	unsigned long status = priv->status;
823 
824 	IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
825 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
826 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On");
827 
828 	iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
829 		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
830 
831 	if (flags & HW_CARD_DISABLED)
832 		set_bit(STATUS_RF_KILL_HW, &priv->status);
833 	else
834 		clear_bit(STATUS_RF_KILL_HW, &priv->status);
835 
836 
837 	iwl_legacy_scan_cancel(priv);
838 
839 	if ((test_bit(STATUS_RF_KILL_HW, &status) !=
840 	     test_bit(STATUS_RF_KILL_HW, &priv->status)))
841 		wiphy_rfkill_set_hw_state(priv->hw->wiphy,
842 				test_bit(STATUS_RF_KILL_HW, &priv->status));
843 	else
844 		wake_up_interruptible(&priv->wait_command_queue);
845 }
846 
847 /**
848  * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
849  *
850  * Setup the RX handlers for each of the reply types sent from the uCode
851  * to the host.
852  *
853  * This function chains into the hardware specific files for them to setup
854  * any hardware specific handlers as well.
855  */
iwl3945_setup_rx_handlers(struct iwl_priv * priv)856 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
857 {
858 	priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
859 	priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
860 	priv->rx_handlers[REPLY_ERROR] = iwl_legacy_rx_reply_error;
861 	priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_legacy_rx_csa;
862 	priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
863 			iwl_legacy_rx_spectrum_measure_notif;
864 	priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_legacy_rx_pm_sleep_notif;
865 	priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
866 	    iwl_legacy_rx_pm_debug_statistics_notif;
867 	priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
868 
869 	/*
870 	 * The same handler is used for both the REPLY to a discrete
871 	 * statistics request from the host as well as for the periodic
872 	 * statistics notifications (after received beacons) from the uCode.
873 	 */
874 	priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
875 	priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
876 
877 	iwl_legacy_setup_rx_scan_handlers(priv);
878 	priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
879 
880 	/* Set up hardware specific Rx handlers */
881 	iwl3945_hw_rx_handler_setup(priv);
882 }
883 
884 /************************** RX-FUNCTIONS ****************************/
885 /*
886  * Rx theory of operation
887  *
888  * The host allocates 32 DMA target addresses and passes the host address
889  * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
890  * 0 to 31
891  *
892  * Rx Queue Indexes
893  * The host/firmware share two index registers for managing the Rx buffers.
894  *
895  * The READ index maps to the first position that the firmware may be writing
896  * to -- the driver can read up to (but not including) this position and get
897  * good data.
898  * The READ index is managed by the firmware once the card is enabled.
899  *
900  * The WRITE index maps to the last position the driver has read from -- the
901  * position preceding WRITE is the last slot the firmware can place a packet.
902  *
903  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
904  * WRITE = READ.
905  *
906  * During initialization, the host sets up the READ queue position to the first
907  * INDEX position, and WRITE to the last (READ - 1 wrapped)
908  *
909  * When the firmware places a packet in a buffer, it will advance the READ index
910  * and fire the RX interrupt.  The driver can then query the READ index and
911  * process as many packets as possible, moving the WRITE index forward as it
912  * resets the Rx queue buffers with new memory.
913  *
914  * The management in the driver is as follows:
915  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
916  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
917  *   to replenish the iwl->rxq->rx_free.
918  * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
919  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
920  *   'processed' and 'read' driver indexes as well)
921  * + A received packet is processed and handed to the kernel network stack,
922  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
923  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
924  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
925  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
926  *   were enough free buffers and RX_STALLED is set it is cleared.
927  *
928  *
929  * Driver sequence:
930  *
931  * iwl3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
932  *                            iwl3945_rx_queue_restock
933  * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
934  *                            queue, updates firmware pointers, and updates
935  *                            the WRITE index.  If insufficient rx_free buffers
936  *                            are available, schedules iwl3945_rx_replenish
937  *
938  * -- enable interrupts --
939  * ISR - iwl3945_rx()         Detach iwl_rx_mem_buffers from pool up to the
940  *                            READ INDEX, detaching the SKB from the pool.
941  *                            Moves the packet buffer from queue to rx_used.
942  *                            Calls iwl3945_rx_queue_restock to refill any empty
943  *                            slots.
944  * ...
945  *
946  */
947 
948 /**
949  * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
950  */
iwl3945_dma_addr2rbd_ptr(struct iwl_priv * priv,dma_addr_t dma_addr)951 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
952 					  dma_addr_t dma_addr)
953 {
954 	return cpu_to_le32((u32)dma_addr);
955 }
956 
957 /**
958  * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
959  *
960  * If there are slots in the RX queue that need to be restocked,
961  * and we have free pre-allocated buffers, fill the ranks as much
962  * as we can, pulling from rx_free.
963  *
964  * This moves the 'write' index forward to catch up with 'processed', and
965  * also updates the memory address in the firmware to reference the new
966  * target buffer.
967  */
iwl3945_rx_queue_restock(struct iwl_priv * priv)968 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
969 {
970 	struct iwl_rx_queue *rxq = &priv->rxq;
971 	struct list_head *element;
972 	struct iwl_rx_mem_buffer *rxb;
973 	unsigned long flags;
974 	int write;
975 
976 	spin_lock_irqsave(&rxq->lock, flags);
977 	write = rxq->write & ~0x7;
978 	while ((iwl_legacy_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
979 		/* Get next free Rx buffer, remove from free list */
980 		element = rxq->rx_free.next;
981 		rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
982 		list_del(element);
983 
984 		/* Point to Rx buffer via next RBD in circular buffer */
985 		rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
986 		rxq->queue[rxq->write] = rxb;
987 		rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
988 		rxq->free_count--;
989 	}
990 	spin_unlock_irqrestore(&rxq->lock, flags);
991 	/* If the pre-allocated buffer pool is dropping low, schedule to
992 	 * refill it */
993 	if (rxq->free_count <= RX_LOW_WATERMARK)
994 		queue_work(priv->workqueue, &priv->rx_replenish);
995 
996 
997 	/* If we've added more space for the firmware to place data, tell it.
998 	 * Increment device's write pointer in multiples of 8. */
999 	if ((rxq->write_actual != (rxq->write & ~0x7))
1000 	    || (abs(rxq->write - rxq->read) > 7)) {
1001 		spin_lock_irqsave(&rxq->lock, flags);
1002 		rxq->need_update = 1;
1003 		spin_unlock_irqrestore(&rxq->lock, flags);
1004 		iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
1005 	}
1006 }
1007 
1008 /**
1009  * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1010  *
1011  * When moving to rx_free an SKB is allocated for the slot.
1012  *
1013  * Also restock the Rx queue via iwl3945_rx_queue_restock.
1014  * This is called as a scheduled work item (except for during initialization)
1015  */
iwl3945_rx_allocate(struct iwl_priv * priv,gfp_t priority)1016 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1017 {
1018 	struct iwl_rx_queue *rxq = &priv->rxq;
1019 	struct list_head *element;
1020 	struct iwl_rx_mem_buffer *rxb;
1021 	struct page *page;
1022 	unsigned long flags;
1023 	gfp_t gfp_mask = priority;
1024 
1025 	while (1) {
1026 		spin_lock_irqsave(&rxq->lock, flags);
1027 
1028 		if (list_empty(&rxq->rx_used)) {
1029 			spin_unlock_irqrestore(&rxq->lock, flags);
1030 			return;
1031 		}
1032 		spin_unlock_irqrestore(&rxq->lock, flags);
1033 
1034 		if (rxq->free_count > RX_LOW_WATERMARK)
1035 			gfp_mask |= __GFP_NOWARN;
1036 
1037 		if (priv->hw_params.rx_page_order > 0)
1038 			gfp_mask |= __GFP_COMP;
1039 
1040 		/* Alloc a new receive buffer */
1041 		page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1042 		if (!page) {
1043 			if (net_ratelimit())
1044 				IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1045 			if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1046 			    net_ratelimit())
1047 				IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1048 					 priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
1049 					 rxq->free_count);
1050 			/* We don't reschedule replenish work here -- we will
1051 			 * call the restock method and if it still needs
1052 			 * more buffers it will schedule replenish */
1053 			break;
1054 		}
1055 
1056 		spin_lock_irqsave(&rxq->lock, flags);
1057 		if (list_empty(&rxq->rx_used)) {
1058 			spin_unlock_irqrestore(&rxq->lock, flags);
1059 			__free_pages(page, priv->hw_params.rx_page_order);
1060 			return;
1061 		}
1062 		element = rxq->rx_used.next;
1063 		rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1064 		list_del(element);
1065 		spin_unlock_irqrestore(&rxq->lock, flags);
1066 
1067 		rxb->page = page;
1068 		/* Get physical address of RB/SKB */
1069 		rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1070 				PAGE_SIZE << priv->hw_params.rx_page_order,
1071 				PCI_DMA_FROMDEVICE);
1072 
1073 		spin_lock_irqsave(&rxq->lock, flags);
1074 
1075 		list_add_tail(&rxb->list, &rxq->rx_free);
1076 		rxq->free_count++;
1077 		priv->alloc_rxb_page++;
1078 
1079 		spin_unlock_irqrestore(&rxq->lock, flags);
1080 	}
1081 }
1082 
iwl3945_rx_queue_reset(struct iwl_priv * priv,struct iwl_rx_queue * rxq)1083 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1084 {
1085 	unsigned long flags;
1086 	int i;
1087 	spin_lock_irqsave(&rxq->lock, flags);
1088 	INIT_LIST_HEAD(&rxq->rx_free);
1089 	INIT_LIST_HEAD(&rxq->rx_used);
1090 	/* Fill the rx_used queue with _all_ of the Rx buffers */
1091 	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1092 		/* In the reset function, these buffers may have been allocated
1093 		 * to an SKB, so we need to unmap and free potential storage */
1094 		if (rxq->pool[i].page != NULL) {
1095 			pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1096 				PAGE_SIZE << priv->hw_params.rx_page_order,
1097 				PCI_DMA_FROMDEVICE);
1098 			__iwl_legacy_free_pages(priv, rxq->pool[i].page);
1099 			rxq->pool[i].page = NULL;
1100 		}
1101 		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1102 	}
1103 
1104 	/* Set us so that we have processed and used all buffers, but have
1105 	 * not restocked the Rx queue with fresh buffers */
1106 	rxq->read = rxq->write = 0;
1107 	rxq->write_actual = 0;
1108 	rxq->free_count = 0;
1109 	spin_unlock_irqrestore(&rxq->lock, flags);
1110 }
1111 
iwl3945_rx_replenish(void * data)1112 void iwl3945_rx_replenish(void *data)
1113 {
1114 	struct iwl_priv *priv = data;
1115 	unsigned long flags;
1116 
1117 	iwl3945_rx_allocate(priv, GFP_KERNEL);
1118 
1119 	spin_lock_irqsave(&priv->lock, flags);
1120 	iwl3945_rx_queue_restock(priv);
1121 	spin_unlock_irqrestore(&priv->lock, flags);
1122 }
1123 
iwl3945_rx_replenish_now(struct iwl_priv * priv)1124 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1125 {
1126 	iwl3945_rx_allocate(priv, GFP_ATOMIC);
1127 
1128 	iwl3945_rx_queue_restock(priv);
1129 }
1130 
1131 
1132 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1133  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1134  * This free routine walks the list of POOL entries and if SKB is set to
1135  * non NULL it is unmapped and freed
1136  */
iwl3945_rx_queue_free(struct iwl_priv * priv,struct iwl_rx_queue * rxq)1137 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1138 {
1139 	int i;
1140 	for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1141 		if (rxq->pool[i].page != NULL) {
1142 			pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1143 				PAGE_SIZE << priv->hw_params.rx_page_order,
1144 				PCI_DMA_FROMDEVICE);
1145 			__iwl_legacy_free_pages(priv, rxq->pool[i].page);
1146 			rxq->pool[i].page = NULL;
1147 		}
1148 	}
1149 
1150 	dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1151 			  rxq->bd_dma);
1152 	dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1153 			  rxq->rb_stts, rxq->rb_stts_dma);
1154 	rxq->bd = NULL;
1155 	rxq->rb_stts  = NULL;
1156 }
1157 
1158 
1159 /* Convert linear signal-to-noise ratio into dB */
1160 static u8 ratio2dB[100] = {
1161 /*	 0   1   2   3   4   5   6   7   8   9 */
1162 	 0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1163 	20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1164 	26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1165 	29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1166 	32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1167 	34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1168 	36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1169 	37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1170 	38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1171 	39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
1172 };
1173 
1174 /* Calculates a relative dB value from a ratio of linear
1175  *   (i.e. not dB) signal levels.
1176  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
iwl3945_calc_db_from_ratio(int sig_ratio)1177 int iwl3945_calc_db_from_ratio(int sig_ratio)
1178 {
1179 	/* 1000:1 or higher just report as 60 dB */
1180 	if (sig_ratio >= 1000)
1181 		return 60;
1182 
1183 	/* 100:1 or higher, divide by 10 and use table,
1184 	 *   add 20 dB to make up for divide by 10 */
1185 	if (sig_ratio >= 100)
1186 		return 20 + (int)ratio2dB[sig_ratio/10];
1187 
1188 	/* We shouldn't see this */
1189 	if (sig_ratio < 1)
1190 		return 0;
1191 
1192 	/* Use table for ratios 1:1 - 99:1 */
1193 	return (int)ratio2dB[sig_ratio];
1194 }
1195 
1196 /**
1197  * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1198  *
1199  * Uses the priv->rx_handlers callback function array to invoke
1200  * the appropriate handlers, including command responses,
1201  * frame-received notifications, and other notifications.
1202  */
iwl3945_rx_handle(struct iwl_priv * priv)1203 static void iwl3945_rx_handle(struct iwl_priv *priv)
1204 {
1205 	struct iwl_rx_mem_buffer *rxb;
1206 	struct iwl_rx_packet *pkt;
1207 	struct iwl_rx_queue *rxq = &priv->rxq;
1208 	u32 r, i;
1209 	int reclaim;
1210 	unsigned long flags;
1211 	u8 fill_rx = 0;
1212 	u32 count = 8;
1213 	int total_empty = 0;
1214 
1215 	/* uCode's read index (stored in shared DRAM) indicates the last Rx
1216 	 * buffer that the driver may process (last buffer filled by ucode). */
1217 	r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1218 	i = rxq->read;
1219 
1220 	/* calculate total frames need to be restock after handling RX */
1221 	total_empty = r - rxq->write_actual;
1222 	if (total_empty < 0)
1223 		total_empty += RX_QUEUE_SIZE;
1224 
1225 	if (total_empty > (RX_QUEUE_SIZE / 2))
1226 		fill_rx = 1;
1227 	/* Rx interrupt, but nothing sent from uCode */
1228 	if (i == r)
1229 		IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1230 
1231 	while (i != r) {
1232 		int len;
1233 
1234 		rxb = rxq->queue[i];
1235 
1236 		/* If an RXB doesn't have a Rx queue slot associated with it,
1237 		 * then a bug has been introduced in the queue refilling
1238 		 * routines -- catch it here */
1239 		BUG_ON(rxb == NULL);
1240 
1241 		rxq->queue[i] = NULL;
1242 
1243 		pci_unmap_page(priv->pci_dev, rxb->page_dma,
1244 			       PAGE_SIZE << priv->hw_params.rx_page_order,
1245 			       PCI_DMA_FROMDEVICE);
1246 		pkt = rxb_addr(rxb);
1247 
1248 		len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1249 		len += sizeof(u32); /* account for status word */
1250 		trace_iwlwifi_legacy_dev_rx(priv, pkt, len);
1251 
1252 		/* Reclaim a command buffer only if this packet is a response
1253 		 *   to a (driver-originated) command.
1254 		 * If the packet (e.g. Rx frame) originated from uCode,
1255 		 *   there is no command buffer to reclaim.
1256 		 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1257 		 *   but apparently a few don't get set; catch them here. */
1258 		reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1259 			(pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1260 			(pkt->hdr.cmd != REPLY_TX);
1261 
1262 		/* Based on type of command response or notification,
1263 		 *   handle those that need handling via function in
1264 		 *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
1265 		if (priv->rx_handlers[pkt->hdr.cmd]) {
1266 			IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1267 			iwl_legacy_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1268 			priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1269 			priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1270 		} else {
1271 			/* No handling needed */
1272 			IWL_DEBUG_RX(priv,
1273 				"r %d i %d No handler needed for %s, 0x%02x\n",
1274 				r, i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
1275 				pkt->hdr.cmd);
1276 		}
1277 
1278 		/*
1279 		 * XXX: After here, we should always check rxb->page
1280 		 * against NULL before touching it or its virtual
1281 		 * memory (pkt). Because some rx_handler might have
1282 		 * already taken or freed the pages.
1283 		 */
1284 
1285 		if (reclaim) {
1286 			/* Invoke any callbacks, transfer the buffer to caller,
1287 			 * and fire off the (possibly) blocking iwl_legacy_send_cmd()
1288 			 * as we reclaim the driver command queue */
1289 			if (rxb->page)
1290 				iwl_legacy_tx_cmd_complete(priv, rxb);
1291 			else
1292 				IWL_WARN(priv, "Claim null rxb?\n");
1293 		}
1294 
1295 		/* Reuse the page if possible. For notification packets and
1296 		 * SKBs that fail to Rx correctly, add them back into the
1297 		 * rx_free list for reuse later. */
1298 		spin_lock_irqsave(&rxq->lock, flags);
1299 		if (rxb->page != NULL) {
1300 			rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1301 				0, PAGE_SIZE << priv->hw_params.rx_page_order,
1302 				PCI_DMA_FROMDEVICE);
1303 			list_add_tail(&rxb->list, &rxq->rx_free);
1304 			rxq->free_count++;
1305 		} else
1306 			list_add_tail(&rxb->list, &rxq->rx_used);
1307 
1308 		spin_unlock_irqrestore(&rxq->lock, flags);
1309 
1310 		i = (i + 1) & RX_QUEUE_MASK;
1311 		/* If there are a lot of unused frames,
1312 		 * restock the Rx queue so ucode won't assert. */
1313 		if (fill_rx) {
1314 			count++;
1315 			if (count >= 8) {
1316 				rxq->read = i;
1317 				iwl3945_rx_replenish_now(priv);
1318 				count = 0;
1319 			}
1320 		}
1321 	}
1322 
1323 	/* Backtrack one entry */
1324 	rxq->read = i;
1325 	if (fill_rx)
1326 		iwl3945_rx_replenish_now(priv);
1327 	else
1328 		iwl3945_rx_queue_restock(priv);
1329 }
1330 
1331 /* call this function to flush any scheduled tasklet */
iwl3945_synchronize_irq(struct iwl_priv * priv)1332 static inline void iwl3945_synchronize_irq(struct iwl_priv *priv)
1333 {
1334 	/* wait to make sure we flush pending tasklet*/
1335 	synchronize_irq(priv->pci_dev->irq);
1336 	tasklet_kill(&priv->irq_tasklet);
1337 }
1338 
iwl3945_desc_lookup(int i)1339 static const char *iwl3945_desc_lookup(int i)
1340 {
1341 	switch (i) {
1342 	case 1:
1343 		return "FAIL";
1344 	case 2:
1345 		return "BAD_PARAM";
1346 	case 3:
1347 		return "BAD_CHECKSUM";
1348 	case 4:
1349 		return "NMI_INTERRUPT";
1350 	case 5:
1351 		return "SYSASSERT";
1352 	case 6:
1353 		return "FATAL_ERROR";
1354 	}
1355 
1356 	return "UNKNOWN";
1357 }
1358 
1359 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1360 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1361 
iwl3945_dump_nic_error_log(struct iwl_priv * priv)1362 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1363 {
1364 	u32 i;
1365 	u32 desc, time, count, base, data1;
1366 	u32 blink1, blink2, ilink1, ilink2;
1367 
1368 	base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1369 
1370 	if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1371 		IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1372 		return;
1373 	}
1374 
1375 
1376 	count = iwl_legacy_read_targ_mem(priv, base);
1377 
1378 	if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1379 		IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1380 		IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1381 			priv->status, count);
1382 	}
1383 
1384 	IWL_ERR(priv, "Desc       Time       asrtPC  blink2 "
1385 		  "ilink1  nmiPC   Line\n");
1386 	for (i = ERROR_START_OFFSET;
1387 	     i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1388 	     i += ERROR_ELEM_SIZE) {
1389 		desc = iwl_legacy_read_targ_mem(priv, base + i);
1390 		time =
1391 		    iwl_legacy_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1392 		blink1 =
1393 		    iwl_legacy_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1394 		blink2 =
1395 		    iwl_legacy_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1396 		ilink1 =
1397 		    iwl_legacy_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1398 		ilink2 =
1399 		    iwl_legacy_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1400 		data1 =
1401 		    iwl_legacy_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1402 
1403 		IWL_ERR(priv,
1404 			"%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1405 			iwl3945_desc_lookup(desc), desc, time, blink1, blink2,
1406 			ilink1, ilink2, data1);
1407 		trace_iwlwifi_legacy_dev_ucode_error(priv, desc, time, data1, 0,
1408 					0, blink1, blink2, ilink1, ilink2);
1409 	}
1410 }
1411 
1412 #define EVENT_START_OFFSET  (6 * sizeof(u32))
1413 
1414 /**
1415  * iwl3945_print_event_log - Dump error event log to syslog
1416  *
1417  */
iwl3945_print_event_log(struct iwl_priv * priv,u32 start_idx,u32 num_events,u32 mode,int pos,char ** buf,size_t bufsz)1418 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1419 				  u32 num_events, u32 mode,
1420 				  int pos, char **buf, size_t bufsz)
1421 {
1422 	u32 i;
1423 	u32 base;       /* SRAM byte address of event log header */
1424 	u32 event_size;	/* 2 u32s, or 3 u32s if timestamp recorded */
1425 	u32 ptr;        /* SRAM byte address of log data */
1426 	u32 ev, time, data; /* event log data */
1427 	unsigned long reg_flags;
1428 
1429 	if (num_events == 0)
1430 		return pos;
1431 
1432 	base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1433 
1434 	if (mode == 0)
1435 		event_size = 2 * sizeof(u32);
1436 	else
1437 		event_size = 3 * sizeof(u32);
1438 
1439 	ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1440 
1441 	/* Make sure device is powered up for SRAM reads */
1442 	spin_lock_irqsave(&priv->reg_lock, reg_flags);
1443 	iwl_grab_nic_access(priv);
1444 
1445 	/* Set starting address; reads will auto-increment */
1446 	_iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1447 	rmb();
1448 
1449 	/* "time" is actually "data" for mode 0 (no timestamp).
1450 	 * place event id # at far right for easier visual parsing. */
1451 	for (i = 0; i < num_events; i++) {
1452 		ev = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1453 		time = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1454 		if (mode == 0) {
1455 			/* data, ev */
1456 			if (bufsz) {
1457 				pos += scnprintf(*buf + pos, bufsz - pos,
1458 						"0x%08x:%04u\n",
1459 						time, ev);
1460 			} else {
1461 				IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1462 				trace_iwlwifi_legacy_dev_ucode_event(priv, 0,
1463 							      time, ev);
1464 			}
1465 		} else {
1466 			data = _iwl_legacy_read_direct32(priv,
1467 							HBUS_TARG_MEM_RDAT);
1468 			if (bufsz) {
1469 				pos += scnprintf(*buf + pos, bufsz - pos,
1470 						"%010u:0x%08x:%04u\n",
1471 						 time, data, ev);
1472 			} else {
1473 				IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1474 					time, data, ev);
1475 				trace_iwlwifi_legacy_dev_ucode_event(priv, time,
1476 							      data, ev);
1477 			}
1478 		}
1479 	}
1480 
1481 	/* Allow device to power down */
1482 	iwl_release_nic_access(priv);
1483 	spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1484 	return pos;
1485 }
1486 
1487 /**
1488  * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1489  */
iwl3945_print_last_event_logs(struct iwl_priv * priv,u32 capacity,u32 num_wraps,u32 next_entry,u32 size,u32 mode,int pos,char ** buf,size_t bufsz)1490 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1491 				      u32 num_wraps, u32 next_entry,
1492 				      u32 size, u32 mode,
1493 				      int pos, char **buf, size_t bufsz)
1494 {
1495 	/*
1496 	 * display the newest DEFAULT_LOG_ENTRIES entries
1497 	 * i.e the entries just before the next ont that uCode would fill.
1498 	 */
1499 	if (num_wraps) {
1500 		if (next_entry < size) {
1501 			pos = iwl3945_print_event_log(priv,
1502 					     capacity - (size - next_entry),
1503 					     size - next_entry, mode,
1504 					     pos, buf, bufsz);
1505 			pos = iwl3945_print_event_log(priv, 0,
1506 						      next_entry, mode,
1507 						      pos, buf, bufsz);
1508 		} else
1509 			pos = iwl3945_print_event_log(priv, next_entry - size,
1510 						      size, mode,
1511 						      pos, buf, bufsz);
1512 	} else {
1513 		if (next_entry < size)
1514 			pos = iwl3945_print_event_log(priv, 0,
1515 						      next_entry, mode,
1516 						      pos, buf, bufsz);
1517 		else
1518 			pos = iwl3945_print_event_log(priv, next_entry - size,
1519 						      size, mode,
1520 						      pos, buf, bufsz);
1521 	}
1522 	return pos;
1523 }
1524 
1525 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1526 
iwl3945_dump_nic_event_log(struct iwl_priv * priv,bool full_log,char ** buf,bool display)1527 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1528 			    char **buf, bool display)
1529 {
1530 	u32 base;       /* SRAM byte address of event log header */
1531 	u32 capacity;   /* event log capacity in # entries */
1532 	u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1533 	u32 num_wraps;  /* # times uCode wrapped to top of log */
1534 	u32 next_entry; /* index of next entry to be written by uCode */
1535 	u32 size;       /* # entries that we'll print */
1536 	int pos = 0;
1537 	size_t bufsz = 0;
1538 
1539 	base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1540 	if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1541 		IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1542 		return  -EINVAL;
1543 	}
1544 
1545 	/* event log header */
1546 	capacity = iwl_legacy_read_targ_mem(priv, base);
1547 	mode = iwl_legacy_read_targ_mem(priv, base + (1 * sizeof(u32)));
1548 	num_wraps = iwl_legacy_read_targ_mem(priv, base + (2 * sizeof(u32)));
1549 	next_entry = iwl_legacy_read_targ_mem(priv, base + (3 * sizeof(u32)));
1550 
1551 	if (capacity > priv->cfg->base_params->max_event_log_size) {
1552 		IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1553 			capacity, priv->cfg->base_params->max_event_log_size);
1554 		capacity = priv->cfg->base_params->max_event_log_size;
1555 	}
1556 
1557 	if (next_entry > priv->cfg->base_params->max_event_log_size) {
1558 		IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1559 			next_entry, priv->cfg->base_params->max_event_log_size);
1560 		next_entry = priv->cfg->base_params->max_event_log_size;
1561 	}
1562 
1563 	size = num_wraps ? capacity : next_entry;
1564 
1565 	/* bail out if nothing in log */
1566 	if (size == 0) {
1567 		IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1568 		return pos;
1569 	}
1570 
1571 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1572 	if (!(iwl_legacy_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1573 		size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1574 			? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1575 #else
1576 	size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1577 		? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1578 #endif
1579 
1580 	IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1581 		  size);
1582 
1583 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1584 	if (display) {
1585 		if (full_log)
1586 			bufsz = capacity * 48;
1587 		else
1588 			bufsz = size * 48;
1589 		*buf = kmalloc(bufsz, GFP_KERNEL);
1590 		if (!*buf)
1591 			return -ENOMEM;
1592 	}
1593 	if ((iwl_legacy_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1594 		/* if uCode has wrapped back to top of log,
1595 		 * start at the oldest entry,
1596 		 * i.e the next one that uCode would fill.
1597 		 */
1598 		if (num_wraps)
1599 			pos = iwl3945_print_event_log(priv, next_entry,
1600 						capacity - next_entry, mode,
1601 						pos, buf, bufsz);
1602 
1603 		/* (then/else) start at top of log */
1604 		pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1605 					      pos, buf, bufsz);
1606 	} else
1607 		pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1608 						    next_entry, size, mode,
1609 						    pos, buf, bufsz);
1610 #else
1611 	pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1612 					    next_entry, size, mode,
1613 					    pos, buf, bufsz);
1614 #endif
1615 	return pos;
1616 }
1617 
iwl3945_irq_tasklet(struct iwl_priv * priv)1618 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1619 {
1620 	u32 inta, handled = 0;
1621 	u32 inta_fh;
1622 	unsigned long flags;
1623 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1624 	u32 inta_mask;
1625 #endif
1626 
1627 	spin_lock_irqsave(&priv->lock, flags);
1628 
1629 	/* Ack/clear/reset pending uCode interrupts.
1630 	 * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1631 	 *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1632 	inta = iwl_read32(priv, CSR_INT);
1633 	iwl_write32(priv, CSR_INT, inta);
1634 
1635 	/* Ack/clear/reset pending flow-handler (DMA) interrupts.
1636 	 * Any new interrupts that happen after this, either while we're
1637 	 * in this tasklet, or later, will show up in next ISR/tasklet. */
1638 	inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1639 	iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1640 
1641 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1642 	if (iwl_legacy_get_debug_level(priv) & IWL_DL_ISR) {
1643 		/* just for debug */
1644 		inta_mask = iwl_read32(priv, CSR_INT_MASK);
1645 		IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1646 			      inta, inta_mask, inta_fh);
1647 	}
1648 #endif
1649 
1650 	spin_unlock_irqrestore(&priv->lock, flags);
1651 
1652 	/* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1653 	 * atomic, make sure that inta covers all the interrupts that
1654 	 * we've discovered, even if FH interrupt came in just after
1655 	 * reading CSR_INT. */
1656 	if (inta_fh & CSR39_FH_INT_RX_MASK)
1657 		inta |= CSR_INT_BIT_FH_RX;
1658 	if (inta_fh & CSR39_FH_INT_TX_MASK)
1659 		inta |= CSR_INT_BIT_FH_TX;
1660 
1661 	/* Now service all interrupt bits discovered above. */
1662 	if (inta & CSR_INT_BIT_HW_ERR) {
1663 		IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1664 
1665 		/* Tell the device to stop sending interrupts */
1666 		iwl_legacy_disable_interrupts(priv);
1667 
1668 		priv->isr_stats.hw++;
1669 		iwl_legacy_irq_handle_error(priv);
1670 
1671 		handled |= CSR_INT_BIT_HW_ERR;
1672 
1673 		return;
1674 	}
1675 
1676 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1677 	if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
1678 		/* NIC fires this, but we don't use it, redundant with WAKEUP */
1679 		if (inta & CSR_INT_BIT_SCD) {
1680 			IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1681 				      "the frame/frames.\n");
1682 			priv->isr_stats.sch++;
1683 		}
1684 
1685 		/* Alive notification via Rx interrupt will do the real work */
1686 		if (inta & CSR_INT_BIT_ALIVE) {
1687 			IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1688 			priv->isr_stats.alive++;
1689 		}
1690 	}
1691 #endif
1692 	/* Safely ignore these bits for debug checks below */
1693 	inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1694 
1695 	/* Error detected by uCode */
1696 	if (inta & CSR_INT_BIT_SW_ERR) {
1697 		IWL_ERR(priv, "Microcode SW error detected. "
1698 			"Restarting 0x%X.\n", inta);
1699 		priv->isr_stats.sw++;
1700 		iwl_legacy_irq_handle_error(priv);
1701 		handled |= CSR_INT_BIT_SW_ERR;
1702 	}
1703 
1704 	/* uCode wakes up after power-down sleep */
1705 	if (inta & CSR_INT_BIT_WAKEUP) {
1706 		IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1707 		iwl_legacy_rx_queue_update_write_ptr(priv, &priv->rxq);
1708 		iwl_legacy_txq_update_write_ptr(priv, &priv->txq[0]);
1709 		iwl_legacy_txq_update_write_ptr(priv, &priv->txq[1]);
1710 		iwl_legacy_txq_update_write_ptr(priv, &priv->txq[2]);
1711 		iwl_legacy_txq_update_write_ptr(priv, &priv->txq[3]);
1712 		iwl_legacy_txq_update_write_ptr(priv, &priv->txq[4]);
1713 		iwl_legacy_txq_update_write_ptr(priv, &priv->txq[5]);
1714 
1715 		priv->isr_stats.wakeup++;
1716 		handled |= CSR_INT_BIT_WAKEUP;
1717 	}
1718 
1719 	/* All uCode command responses, including Tx command responses,
1720 	 * Rx "responses" (frame-received notification), and other
1721 	 * notifications from uCode come through here*/
1722 	if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1723 		iwl3945_rx_handle(priv);
1724 		priv->isr_stats.rx++;
1725 		handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1726 	}
1727 
1728 	if (inta & CSR_INT_BIT_FH_TX) {
1729 		IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1730 		priv->isr_stats.tx++;
1731 
1732 		iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1733 		iwl_legacy_write_direct32(priv, FH39_TCSR_CREDIT
1734 					(FH39_SRVC_CHNL), 0x0);
1735 		handled |= CSR_INT_BIT_FH_TX;
1736 	}
1737 
1738 	if (inta & ~handled) {
1739 		IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1740 		priv->isr_stats.unhandled++;
1741 	}
1742 
1743 	if (inta & ~priv->inta_mask) {
1744 		IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1745 			 inta & ~priv->inta_mask);
1746 		IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1747 	}
1748 
1749 	/* Re-enable all interrupts */
1750 	/* only Re-enable if disabled by irq */
1751 	if (test_bit(STATUS_INT_ENABLED, &priv->status))
1752 		iwl_legacy_enable_interrupts(priv);
1753 
1754 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1755 	if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
1756 		inta = iwl_read32(priv, CSR_INT);
1757 		inta_mask = iwl_read32(priv, CSR_INT_MASK);
1758 		inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1759 		IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1760 			"flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1761 	}
1762 #endif
1763 }
1764 
iwl3945_get_single_channel_for_scan(struct iwl_priv * priv,struct ieee80211_vif * vif,enum ieee80211_band band,struct iwl3945_scan_channel * scan_ch)1765 static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
1766 					       struct ieee80211_vif *vif,
1767 					       enum ieee80211_band band,
1768 					       struct iwl3945_scan_channel *scan_ch)
1769 {
1770 	const struct ieee80211_supported_band *sband;
1771 	u16 passive_dwell = 0;
1772 	u16 active_dwell = 0;
1773 	int added = 0;
1774 	u8 channel = 0;
1775 
1776 	sband = iwl_get_hw_mode(priv, band);
1777 	if (!sband) {
1778 		IWL_ERR(priv, "invalid band\n");
1779 		return added;
1780 	}
1781 
1782 	active_dwell = iwl_legacy_get_active_dwell_time(priv, band, 0);
1783 	passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
1784 
1785 	if (passive_dwell <= active_dwell)
1786 		passive_dwell = active_dwell + 1;
1787 
1788 
1789 	channel = iwl_legacy_get_single_channel_number(priv, band);
1790 
1791 	if (channel) {
1792 		scan_ch->channel = channel;
1793 		scan_ch->type = 0;	/* passive */
1794 		scan_ch->active_dwell = cpu_to_le16(active_dwell);
1795 		scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1796 		/* Set txpower levels to defaults */
1797 		scan_ch->tpc.dsp_atten = 110;
1798 		if (band == IEEE80211_BAND_5GHZ)
1799 			scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1800 		else
1801 			scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1802 		added++;
1803 	} else
1804 		IWL_ERR(priv, "no valid channel found\n");
1805 	return added;
1806 }
1807 
iwl3945_get_channels_for_scan(struct iwl_priv * priv,enum ieee80211_band band,u8 is_active,u8 n_probes,struct iwl3945_scan_channel * scan_ch,struct ieee80211_vif * vif)1808 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1809 					 enum ieee80211_band band,
1810 				     u8 is_active, u8 n_probes,
1811 				     struct iwl3945_scan_channel *scan_ch,
1812 				     struct ieee80211_vif *vif)
1813 {
1814 	struct ieee80211_channel *chan;
1815 	const struct ieee80211_supported_band *sband;
1816 	const struct iwl_channel_info *ch_info;
1817 	u16 passive_dwell = 0;
1818 	u16 active_dwell = 0;
1819 	int added, i;
1820 
1821 	sband = iwl_get_hw_mode(priv, band);
1822 	if (!sband)
1823 		return 0;
1824 
1825 	active_dwell = iwl_legacy_get_active_dwell_time(priv, band, n_probes);
1826 	passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
1827 
1828 	if (passive_dwell <= active_dwell)
1829 		passive_dwell = active_dwell + 1;
1830 
1831 	for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1832 		chan = priv->scan_request->channels[i];
1833 
1834 		if (chan->band != band)
1835 			continue;
1836 
1837 		scan_ch->channel = chan->hw_value;
1838 
1839 		ch_info = iwl_legacy_get_channel_info(priv, band,
1840 							scan_ch->channel);
1841 		if (!iwl_legacy_is_channel_valid(ch_info)) {
1842 			IWL_DEBUG_SCAN(priv,
1843 				"Channel %d is INVALID for this band.\n",
1844 			       scan_ch->channel);
1845 			continue;
1846 		}
1847 
1848 		scan_ch->active_dwell = cpu_to_le16(active_dwell);
1849 		scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1850 		/* If passive , set up for auto-switch
1851 		 *  and use long active_dwell time.
1852 		 */
1853 		if (!is_active || iwl_legacy_is_channel_passive(ch_info) ||
1854 		    (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1855 			scan_ch->type = 0;	/* passive */
1856 			if (IWL_UCODE_API(priv->ucode_ver) == 1)
1857 				scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1858 		} else {
1859 			scan_ch->type = 1;	/* active */
1860 		}
1861 
1862 		/* Set direct probe bits. These may be used both for active
1863 		 * scan channels (probes gets sent right away),
1864 		 * or for passive channels (probes get se sent only after
1865 		 * hearing clear Rx packet).*/
1866 		if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1867 			if (n_probes)
1868 				scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1869 		} else {
1870 			/* uCode v1 does not allow setting direct probe bits on
1871 			 * passive channel. */
1872 			if ((scan_ch->type & 1) && n_probes)
1873 				scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1874 		}
1875 
1876 		/* Set txpower levels to defaults */
1877 		scan_ch->tpc.dsp_atten = 110;
1878 		/* scan_pwr_info->tpc.dsp_atten; */
1879 
1880 		/*scan_pwr_info->tpc.tx_gain; */
1881 		if (band == IEEE80211_BAND_5GHZ)
1882 			scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1883 		else {
1884 			scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1885 			/* NOTE: if we were doing 6Mb OFDM for scans we'd use
1886 			 * power level:
1887 			 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1888 			 */
1889 		}
1890 
1891 		IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1892 			       scan_ch->channel,
1893 			       (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1894 			       (scan_ch->type & 1) ?
1895 			       active_dwell : passive_dwell);
1896 
1897 		scan_ch++;
1898 		added++;
1899 	}
1900 
1901 	IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1902 	return added;
1903 }
1904 
iwl3945_init_hw_rates(struct iwl_priv * priv,struct ieee80211_rate * rates)1905 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1906 			      struct ieee80211_rate *rates)
1907 {
1908 	int i;
1909 
1910 	for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1911 		rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1912 		rates[i].hw_value = i; /* Rate scaling will work on indexes */
1913 		rates[i].hw_value_short = i;
1914 		rates[i].flags = 0;
1915 		if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1916 			/*
1917 			 * If CCK != 1M then set short preamble rate flag.
1918 			 */
1919 			rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1920 				0 : IEEE80211_RATE_SHORT_PREAMBLE;
1921 		}
1922 	}
1923 }
1924 
1925 /******************************************************************************
1926  *
1927  * uCode download functions
1928  *
1929  ******************************************************************************/
1930 
iwl3945_dealloc_ucode_pci(struct iwl_priv * priv)1931 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1932 {
1933 	iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1934 	iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1935 	iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1936 	iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1937 	iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1938 	iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1939 }
1940 
1941 /**
1942  * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1943  *     looking at all data.
1944  */
iwl3945_verify_inst_full(struct iwl_priv * priv,__le32 * image,u32 len)1945 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1946 {
1947 	u32 val;
1948 	u32 save_len = len;
1949 	int rc = 0;
1950 	u32 errcnt;
1951 
1952 	IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1953 
1954 	iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1955 			       IWL39_RTC_INST_LOWER_BOUND);
1956 
1957 	errcnt = 0;
1958 	for (; len > 0; len -= sizeof(u32), image++) {
1959 		/* read data comes through single port, auto-incr addr */
1960 		/* NOTE: Use the debugless read so we don't flood kernel log
1961 		 * if IWL_DL_IO is set */
1962 		val = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1963 		if (val != le32_to_cpu(*image)) {
1964 			IWL_ERR(priv, "uCode INST section is invalid at "
1965 				  "offset 0x%x, is 0x%x, s/b 0x%x\n",
1966 				  save_len - len, val, le32_to_cpu(*image));
1967 			rc = -EIO;
1968 			errcnt++;
1969 			if (errcnt >= 20)
1970 				break;
1971 		}
1972 	}
1973 
1974 
1975 	if (!errcnt)
1976 		IWL_DEBUG_INFO(priv,
1977 			"ucode image in INSTRUCTION memory is good\n");
1978 
1979 	return rc;
1980 }
1981 
1982 
1983 /**
1984  * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1985  *   using sample data 100 bytes apart.  If these sample points are good,
1986  *   it's a pretty good bet that everything between them is good, too.
1987  */
iwl3945_verify_inst_sparse(struct iwl_priv * priv,__le32 * image,u32 len)1988 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1989 {
1990 	u32 val;
1991 	int rc = 0;
1992 	u32 errcnt = 0;
1993 	u32 i;
1994 
1995 	IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1996 
1997 	for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1998 		/* read data comes through single port, auto-incr addr */
1999 		/* NOTE: Use the debugless read so we don't flood kernel log
2000 		 * if IWL_DL_IO is set */
2001 		iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2002 			i + IWL39_RTC_INST_LOWER_BOUND);
2003 		val = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2004 		if (val != le32_to_cpu(*image)) {
2005 #if 0 /* Enable this if you want to see details */
2006 			IWL_ERR(priv, "uCode INST section is invalid at "
2007 				  "offset 0x%x, is 0x%x, s/b 0x%x\n",
2008 				  i, val, *image);
2009 #endif
2010 			rc = -EIO;
2011 			errcnt++;
2012 			if (errcnt >= 3)
2013 				break;
2014 		}
2015 	}
2016 
2017 	return rc;
2018 }
2019 
2020 
2021 /**
2022  * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2023  *    and verify its contents
2024  */
iwl3945_verify_ucode(struct iwl_priv * priv)2025 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2026 {
2027 	__le32 *image;
2028 	u32 len;
2029 	int rc = 0;
2030 
2031 	/* Try bootstrap */
2032 	image = (__le32 *)priv->ucode_boot.v_addr;
2033 	len = priv->ucode_boot.len;
2034 	rc = iwl3945_verify_inst_sparse(priv, image, len);
2035 	if (rc == 0) {
2036 		IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2037 		return 0;
2038 	}
2039 
2040 	/* Try initialize */
2041 	image = (__le32 *)priv->ucode_init.v_addr;
2042 	len = priv->ucode_init.len;
2043 	rc = iwl3945_verify_inst_sparse(priv, image, len);
2044 	if (rc == 0) {
2045 		IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2046 		return 0;
2047 	}
2048 
2049 	/* Try runtime/protocol */
2050 	image = (__le32 *)priv->ucode_code.v_addr;
2051 	len = priv->ucode_code.len;
2052 	rc = iwl3945_verify_inst_sparse(priv, image, len);
2053 	if (rc == 0) {
2054 		IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2055 		return 0;
2056 	}
2057 
2058 	IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2059 
2060 	/* Since nothing seems to match, show first several data entries in
2061 	 * instruction SRAM, so maybe visual inspection will give a clue.
2062 	 * Selection of bootstrap image (vs. other images) is arbitrary. */
2063 	image = (__le32 *)priv->ucode_boot.v_addr;
2064 	len = priv->ucode_boot.len;
2065 	rc = iwl3945_verify_inst_full(priv, image, len);
2066 
2067 	return rc;
2068 }
2069 
iwl3945_nic_start(struct iwl_priv * priv)2070 static void iwl3945_nic_start(struct iwl_priv *priv)
2071 {
2072 	/* Remove all resets to allow NIC to operate */
2073 	iwl_write32(priv, CSR_RESET, 0);
2074 }
2075 
2076 #define IWL3945_UCODE_GET(item)						\
2077 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2078 {									\
2079 	return le32_to_cpu(ucode->v1.item);				\
2080 }
2081 
iwl3945_ucode_get_header_size(u32 api_ver)2082 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2083 {
2084 	return 24;
2085 }
2086 
iwl3945_ucode_get_data(const struct iwl_ucode_header * ucode)2087 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2088 {
2089 	return (u8 *) ucode->v1.data;
2090 }
2091 
2092 IWL3945_UCODE_GET(inst_size);
2093 IWL3945_UCODE_GET(data_size);
2094 IWL3945_UCODE_GET(init_size);
2095 IWL3945_UCODE_GET(init_data_size);
2096 IWL3945_UCODE_GET(boot_size);
2097 
2098 /**
2099  * iwl3945_read_ucode - Read uCode images from disk file.
2100  *
2101  * Copy into buffers for card to fetch via bus-mastering
2102  */
iwl3945_read_ucode(struct iwl_priv * priv)2103 static int iwl3945_read_ucode(struct iwl_priv *priv)
2104 {
2105 	const struct iwl_ucode_header *ucode;
2106 	int ret = -EINVAL, index;
2107 	const struct firmware *ucode_raw;
2108 	/* firmware file name contains uCode/driver compatibility version */
2109 	const char *name_pre = priv->cfg->fw_name_pre;
2110 	const unsigned int api_max = priv->cfg->ucode_api_max;
2111 	const unsigned int api_min = priv->cfg->ucode_api_min;
2112 	char buf[25];
2113 	u8 *src;
2114 	size_t len;
2115 	u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2116 
2117 	/* Ask kernel firmware_class module to get the boot firmware off disk.
2118 	 * request_firmware() is synchronous, file is in memory on return. */
2119 	for (index = api_max; index >= api_min; index--) {
2120 		sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2121 		ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2122 		if (ret < 0) {
2123 			IWL_ERR(priv, "%s firmware file req failed: %d\n",
2124 				  buf, ret);
2125 			if (ret == -ENOENT)
2126 				continue;
2127 			else
2128 				goto error;
2129 		} else {
2130 			if (index < api_max)
2131 				IWL_ERR(priv, "Loaded firmware %s, "
2132 					"which is deprecated. "
2133 					" Please use API v%u instead.\n",
2134 					  buf, api_max);
2135 			IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2136 				       "(%zd bytes) from disk\n",
2137 				       buf, ucode_raw->size);
2138 			break;
2139 		}
2140 	}
2141 
2142 	if (ret < 0)
2143 		goto error;
2144 
2145 	/* Make sure that we got at least our header! */
2146 	if (ucode_raw->size <  iwl3945_ucode_get_header_size(1)) {
2147 		IWL_ERR(priv, "File size way too small!\n");
2148 		ret = -EINVAL;
2149 		goto err_release;
2150 	}
2151 
2152 	/* Data from ucode file:  header followed by uCode images */
2153 	ucode = (struct iwl_ucode_header *)ucode_raw->data;
2154 
2155 	priv->ucode_ver = le32_to_cpu(ucode->ver);
2156 	api_ver = IWL_UCODE_API(priv->ucode_ver);
2157 	inst_size = iwl3945_ucode_get_inst_size(ucode);
2158 	data_size = iwl3945_ucode_get_data_size(ucode);
2159 	init_size = iwl3945_ucode_get_init_size(ucode);
2160 	init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2161 	boot_size = iwl3945_ucode_get_boot_size(ucode);
2162 	src = iwl3945_ucode_get_data(ucode);
2163 
2164 	/* api_ver should match the api version forming part of the
2165 	 * firmware filename ... but we don't check for that and only rely
2166 	 * on the API version read from firmware header from here on forward */
2167 
2168 	if (api_ver < api_min || api_ver > api_max) {
2169 		IWL_ERR(priv, "Driver unable to support your firmware API. "
2170 			  "Driver supports v%u, firmware is v%u.\n",
2171 			  api_max, api_ver);
2172 		priv->ucode_ver = 0;
2173 		ret = -EINVAL;
2174 		goto err_release;
2175 	}
2176 	if (api_ver != api_max)
2177 		IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2178 			  "got %u. New firmware can be obtained "
2179 			  "from http://www.intellinuxwireless.org.\n",
2180 			  api_max, api_ver);
2181 
2182 	IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2183 		IWL_UCODE_MAJOR(priv->ucode_ver),
2184 		IWL_UCODE_MINOR(priv->ucode_ver),
2185 		IWL_UCODE_API(priv->ucode_ver),
2186 		IWL_UCODE_SERIAL(priv->ucode_ver));
2187 
2188 	snprintf(priv->hw->wiphy->fw_version,
2189 		 sizeof(priv->hw->wiphy->fw_version),
2190 		 "%u.%u.%u.%u",
2191 		 IWL_UCODE_MAJOR(priv->ucode_ver),
2192 		 IWL_UCODE_MINOR(priv->ucode_ver),
2193 		 IWL_UCODE_API(priv->ucode_ver),
2194 		 IWL_UCODE_SERIAL(priv->ucode_ver));
2195 
2196 	IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2197 		       priv->ucode_ver);
2198 	IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2199 		       inst_size);
2200 	IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2201 		       data_size);
2202 	IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2203 		       init_size);
2204 	IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2205 		       init_data_size);
2206 	IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2207 		       boot_size);
2208 
2209 
2210 	/* Verify size of file vs. image size info in file's header */
2211 	if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2212 		inst_size + data_size + init_size +
2213 		init_data_size + boot_size) {
2214 
2215 		IWL_DEBUG_INFO(priv,
2216 			"uCode file size %zd does not match expected size\n",
2217 			ucode_raw->size);
2218 		ret = -EINVAL;
2219 		goto err_release;
2220 	}
2221 
2222 	/* Verify that uCode images will fit in card's SRAM */
2223 	if (inst_size > IWL39_MAX_INST_SIZE) {
2224 		IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2225 			       inst_size);
2226 		ret = -EINVAL;
2227 		goto err_release;
2228 	}
2229 
2230 	if (data_size > IWL39_MAX_DATA_SIZE) {
2231 		IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2232 			       data_size);
2233 		ret = -EINVAL;
2234 		goto err_release;
2235 	}
2236 	if (init_size > IWL39_MAX_INST_SIZE) {
2237 		IWL_DEBUG_INFO(priv,
2238 				"uCode init instr len %d too large to fit in\n",
2239 				init_size);
2240 		ret = -EINVAL;
2241 		goto err_release;
2242 	}
2243 	if (init_data_size > IWL39_MAX_DATA_SIZE) {
2244 		IWL_DEBUG_INFO(priv,
2245 				"uCode init data len %d too large to fit in\n",
2246 				init_data_size);
2247 		ret = -EINVAL;
2248 		goto err_release;
2249 	}
2250 	if (boot_size > IWL39_MAX_BSM_SIZE) {
2251 		IWL_DEBUG_INFO(priv,
2252 				"uCode boot instr len %d too large to fit in\n",
2253 				boot_size);
2254 		ret = -EINVAL;
2255 		goto err_release;
2256 	}
2257 
2258 	/* Allocate ucode buffers for card's bus-master loading ... */
2259 
2260 	/* Runtime instructions and 2 copies of data:
2261 	 * 1) unmodified from disk
2262 	 * 2) backup cache for save/restore during power-downs */
2263 	priv->ucode_code.len = inst_size;
2264 	iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2265 
2266 	priv->ucode_data.len = data_size;
2267 	iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2268 
2269 	priv->ucode_data_backup.len = data_size;
2270 	iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2271 
2272 	if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2273 	    !priv->ucode_data_backup.v_addr)
2274 		goto err_pci_alloc;
2275 
2276 	/* Initialization instructions and data */
2277 	if (init_size && init_data_size) {
2278 		priv->ucode_init.len = init_size;
2279 		iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2280 
2281 		priv->ucode_init_data.len = init_data_size;
2282 		iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2283 
2284 		if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2285 			goto err_pci_alloc;
2286 	}
2287 
2288 	/* Bootstrap (instructions only, no data) */
2289 	if (boot_size) {
2290 		priv->ucode_boot.len = boot_size;
2291 		iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2292 
2293 		if (!priv->ucode_boot.v_addr)
2294 			goto err_pci_alloc;
2295 	}
2296 
2297 	/* Copy images into buffers for card's bus-master reads ... */
2298 
2299 	/* Runtime instructions (first block of data in file) */
2300 	len = inst_size;
2301 	IWL_DEBUG_INFO(priv,
2302 		"Copying (but not loading) uCode instr len %zd\n", len);
2303 	memcpy(priv->ucode_code.v_addr, src, len);
2304 	src += len;
2305 
2306 	IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2307 		priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2308 
2309 	/* Runtime data (2nd block)
2310 	 * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
2311 	len = data_size;
2312 	IWL_DEBUG_INFO(priv,
2313 		"Copying (but not loading) uCode data len %zd\n", len);
2314 	memcpy(priv->ucode_data.v_addr, src, len);
2315 	memcpy(priv->ucode_data_backup.v_addr, src, len);
2316 	src += len;
2317 
2318 	/* Initialization instructions (3rd block) */
2319 	if (init_size) {
2320 		len = init_size;
2321 		IWL_DEBUG_INFO(priv,
2322 			"Copying (but not loading) init instr len %zd\n", len);
2323 		memcpy(priv->ucode_init.v_addr, src, len);
2324 		src += len;
2325 	}
2326 
2327 	/* Initialization data (4th block) */
2328 	if (init_data_size) {
2329 		len = init_data_size;
2330 		IWL_DEBUG_INFO(priv,
2331 			"Copying (but not loading) init data len %zd\n", len);
2332 		memcpy(priv->ucode_init_data.v_addr, src, len);
2333 		src += len;
2334 	}
2335 
2336 	/* Bootstrap instructions (5th block) */
2337 	len = boot_size;
2338 	IWL_DEBUG_INFO(priv,
2339 		"Copying (but not loading) boot instr len %zd\n", len);
2340 	memcpy(priv->ucode_boot.v_addr, src, len);
2341 
2342 	/* We have our copies now, allow OS release its copies */
2343 	release_firmware(ucode_raw);
2344 	return 0;
2345 
2346  err_pci_alloc:
2347 	IWL_ERR(priv, "failed to allocate pci memory\n");
2348 	ret = -ENOMEM;
2349 	iwl3945_dealloc_ucode_pci(priv);
2350 
2351  err_release:
2352 	release_firmware(ucode_raw);
2353 
2354  error:
2355 	return ret;
2356 }
2357 
2358 
2359 /**
2360  * iwl3945_set_ucode_ptrs - Set uCode address location
2361  *
2362  * Tell initialization uCode where to find runtime uCode.
2363  *
2364  * BSM registers initially contain pointers to initialization uCode.
2365  * We need to replace them to load runtime uCode inst and data,
2366  * and to save runtime data when powering down.
2367  */
iwl3945_set_ucode_ptrs(struct iwl_priv * priv)2368 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2369 {
2370 	dma_addr_t pinst;
2371 	dma_addr_t pdata;
2372 
2373 	/* bits 31:0 for 3945 */
2374 	pinst = priv->ucode_code.p_addr;
2375 	pdata = priv->ucode_data_backup.p_addr;
2376 
2377 	/* Tell bootstrap uCode where to find image to load */
2378 	iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2379 	iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2380 	iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2381 				 priv->ucode_data.len);
2382 
2383 	/* Inst byte count must be last to set up, bit 31 signals uCode
2384 	 *   that all new ptr/size info is in place */
2385 	iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2386 				 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2387 
2388 	IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2389 
2390 	return 0;
2391 }
2392 
2393 /**
2394  * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2395  *
2396  * Called after REPLY_ALIVE notification received from "initialize" uCode.
2397  *
2398  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2399  */
iwl3945_init_alive_start(struct iwl_priv * priv)2400 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2401 {
2402 	/* Check alive response for "valid" sign from uCode */
2403 	if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2404 		/* We had an error bringing up the hardware, so take it
2405 		 * all the way back down so we can try again */
2406 		IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2407 		goto restart;
2408 	}
2409 
2410 	/* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2411 	 * This is a paranoid check, because we would not have gotten the
2412 	 * "initialize" alive if code weren't properly loaded.  */
2413 	if (iwl3945_verify_ucode(priv)) {
2414 		/* Runtime instruction load was bad;
2415 		 * take it all the way back down so we can try again */
2416 		IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2417 		goto restart;
2418 	}
2419 
2420 	/* Send pointers to protocol/runtime uCode image ... init code will
2421 	 * load and launch runtime uCode, which will send us another "Alive"
2422 	 * notification. */
2423 	IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2424 	if (iwl3945_set_ucode_ptrs(priv)) {
2425 		/* Runtime instruction load won't happen;
2426 		 * take it all the way back down so we can try again */
2427 		IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2428 		goto restart;
2429 	}
2430 	return;
2431 
2432  restart:
2433 	queue_work(priv->workqueue, &priv->restart);
2434 }
2435 
2436 /**
2437  * iwl3945_alive_start - called after REPLY_ALIVE notification received
2438  *                   from protocol/runtime uCode (initialization uCode's
2439  *                   Alive gets handled by iwl3945_init_alive_start()).
2440  */
iwl3945_alive_start(struct iwl_priv * priv)2441 static void iwl3945_alive_start(struct iwl_priv *priv)
2442 {
2443 	int thermal_spin = 0;
2444 	u32 rfkill;
2445 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2446 
2447 	IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2448 
2449 	if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2450 		/* We had an error bringing up the hardware, so take it
2451 		 * all the way back down so we can try again */
2452 		IWL_DEBUG_INFO(priv, "Alive failed.\n");
2453 		goto restart;
2454 	}
2455 
2456 	/* Initialize uCode has loaded Runtime uCode ... verify inst image.
2457 	 * This is a paranoid check, because we would not have gotten the
2458 	 * "runtime" alive if code weren't properly loaded.  */
2459 	if (iwl3945_verify_ucode(priv)) {
2460 		/* Runtime instruction load was bad;
2461 		 * take it all the way back down so we can try again */
2462 		IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2463 		goto restart;
2464 	}
2465 
2466 	rfkill = iwl_legacy_read_prph(priv, APMG_RFKILL_REG);
2467 	IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2468 
2469 	if (rfkill & 0x1) {
2470 		clear_bit(STATUS_RF_KILL_HW, &priv->status);
2471 		/* if RFKILL is not on, then wait for thermal
2472 		 * sensor in adapter to kick in */
2473 		while (iwl3945_hw_get_temperature(priv) == 0) {
2474 			thermal_spin++;
2475 			udelay(10);
2476 		}
2477 
2478 		if (thermal_spin)
2479 			IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2480 				       thermal_spin * 10);
2481 	} else
2482 		set_bit(STATUS_RF_KILL_HW, &priv->status);
2483 
2484 	/* After the ALIVE response, we can send commands to 3945 uCode */
2485 	set_bit(STATUS_ALIVE, &priv->status);
2486 
2487 	/* Enable watchdog to monitor the driver tx queues */
2488 	iwl_legacy_setup_watchdog(priv);
2489 
2490 	if (iwl_legacy_is_rfkill(priv))
2491 		return;
2492 
2493 	ieee80211_wake_queues(priv->hw);
2494 
2495 	priv->active_rate = IWL_RATES_MASK_3945;
2496 
2497 	iwl_legacy_power_update_mode(priv, true);
2498 
2499 	if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
2500 		struct iwl3945_rxon_cmd *active_rxon =
2501 				(struct iwl3945_rxon_cmd *)(&ctx->active);
2502 
2503 		ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2504 		active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2505 	} else {
2506 		/* Initialize our rx_config data */
2507 		iwl_legacy_connection_init_rx_config(priv, ctx);
2508 	}
2509 
2510 	/* Configure Bluetooth device coexistence support */
2511 	iwl_legacy_send_bt_config(priv);
2512 
2513 	set_bit(STATUS_READY, &priv->status);
2514 
2515 	/* Configure the adapter for unassociated operation */
2516 	iwl3945_commit_rxon(priv, ctx);
2517 
2518 	iwl3945_reg_txpower_periodic(priv);
2519 
2520 	IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2521 	wake_up_interruptible(&priv->wait_command_queue);
2522 
2523 	return;
2524 
2525  restart:
2526 	queue_work(priv->workqueue, &priv->restart);
2527 }
2528 
2529 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2530 
__iwl3945_down(struct iwl_priv * priv)2531 static void __iwl3945_down(struct iwl_priv *priv)
2532 {
2533 	unsigned long flags;
2534 	int exit_pending;
2535 
2536 	IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2537 
2538 	iwl_legacy_scan_cancel_timeout(priv, 200);
2539 
2540 	exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2541 
2542 	/* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2543 	 * to prevent rearm timer */
2544 	del_timer_sync(&priv->watchdog);
2545 
2546 	/* Station information will now be cleared in device */
2547 	iwl_legacy_clear_ucode_stations(priv, NULL);
2548 	iwl_legacy_dealloc_bcast_stations(priv);
2549 	iwl_legacy_clear_driver_stations(priv);
2550 
2551 	/* Unblock any waiting calls */
2552 	wake_up_interruptible_all(&priv->wait_command_queue);
2553 
2554 	/* Wipe out the EXIT_PENDING status bit if we are not actually
2555 	 * exiting the module */
2556 	if (!exit_pending)
2557 		clear_bit(STATUS_EXIT_PENDING, &priv->status);
2558 
2559 	/* stop and reset the on-board processor */
2560 	iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2561 
2562 	/* tell the device to stop sending interrupts */
2563 	spin_lock_irqsave(&priv->lock, flags);
2564 	iwl_legacy_disable_interrupts(priv);
2565 	spin_unlock_irqrestore(&priv->lock, flags);
2566 	iwl3945_synchronize_irq(priv);
2567 
2568 	if (priv->mac80211_registered)
2569 		ieee80211_stop_queues(priv->hw);
2570 
2571 	/* If we have not previously called iwl3945_init() then
2572 	 * clear all bits but the RF Kill bits and return */
2573 	if (!iwl_legacy_is_init(priv)) {
2574 		priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2575 					STATUS_RF_KILL_HW |
2576 			       test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2577 					STATUS_GEO_CONFIGURED |
2578 				test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2579 					STATUS_EXIT_PENDING;
2580 		goto exit;
2581 	}
2582 
2583 	/* ...otherwise clear out all the status bits but the RF Kill
2584 	 * bit and continue taking the NIC down. */
2585 	priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2586 				STATUS_RF_KILL_HW |
2587 			test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2588 				STATUS_GEO_CONFIGURED |
2589 			test_bit(STATUS_FW_ERROR, &priv->status) <<
2590 				STATUS_FW_ERROR |
2591 			test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2592 				STATUS_EXIT_PENDING;
2593 
2594 	iwl3945_hw_txq_ctx_stop(priv);
2595 	iwl3945_hw_rxq_stop(priv);
2596 
2597 	/* Power-down device's busmaster DMA clocks */
2598 	iwl_legacy_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2599 	udelay(5);
2600 
2601 	/* Stop the device, and put it in low power state */
2602 	iwl_legacy_apm_stop(priv);
2603 
2604  exit:
2605 	memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2606 
2607 	if (priv->beacon_skb)
2608 		dev_kfree_skb(priv->beacon_skb);
2609 	priv->beacon_skb = NULL;
2610 
2611 	/* clear out any free frames */
2612 	iwl3945_clear_free_frames(priv);
2613 }
2614 
iwl3945_down(struct iwl_priv * priv)2615 static void iwl3945_down(struct iwl_priv *priv)
2616 {
2617 	mutex_lock(&priv->mutex);
2618 	__iwl3945_down(priv);
2619 	mutex_unlock(&priv->mutex);
2620 
2621 	iwl3945_cancel_deferred_work(priv);
2622 }
2623 
2624 #define MAX_HW_RESTARTS 5
2625 
iwl3945_alloc_bcast_station(struct iwl_priv * priv)2626 static int iwl3945_alloc_bcast_station(struct iwl_priv *priv)
2627 {
2628 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2629 	unsigned long flags;
2630 	u8 sta_id;
2631 
2632 	spin_lock_irqsave(&priv->sta_lock, flags);
2633 	sta_id = iwl_legacy_prep_station(priv, ctx,
2634 					iwlegacy_bcast_addr, false, NULL);
2635 	if (sta_id == IWL_INVALID_STATION) {
2636 		IWL_ERR(priv, "Unable to prepare broadcast station\n");
2637 		spin_unlock_irqrestore(&priv->sta_lock, flags);
2638 
2639 		return -EINVAL;
2640 	}
2641 
2642 	priv->stations[sta_id].used |= IWL_STA_DRIVER_ACTIVE;
2643 	priv->stations[sta_id].used |= IWL_STA_BCAST;
2644 	spin_unlock_irqrestore(&priv->sta_lock, flags);
2645 
2646 	return 0;
2647 }
2648 
__iwl3945_up(struct iwl_priv * priv)2649 static int __iwl3945_up(struct iwl_priv *priv)
2650 {
2651 	int rc, i;
2652 
2653 	rc = iwl3945_alloc_bcast_station(priv);
2654 	if (rc)
2655 		return rc;
2656 
2657 	if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2658 		IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2659 		return -EIO;
2660 	}
2661 
2662 	if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2663 		IWL_ERR(priv, "ucode not available for device bring up\n");
2664 		return -EIO;
2665 	}
2666 
2667 	/* If platform's RF_KILL switch is NOT set to KILL */
2668 	if (iwl_read32(priv, CSR_GP_CNTRL) &
2669 				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2670 		clear_bit(STATUS_RF_KILL_HW, &priv->status);
2671 	else {
2672 		set_bit(STATUS_RF_KILL_HW, &priv->status);
2673 		IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2674 		return -ENODEV;
2675 	}
2676 
2677 	iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2678 
2679 	rc = iwl3945_hw_nic_init(priv);
2680 	if (rc) {
2681 		IWL_ERR(priv, "Unable to int nic\n");
2682 		return rc;
2683 	}
2684 
2685 	/* make sure rfkill handshake bits are cleared */
2686 	iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2687 	iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2688 		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2689 
2690 	/* clear (again), then enable host interrupts */
2691 	iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2692 	iwl_legacy_enable_interrupts(priv);
2693 
2694 	/* really make sure rfkill handshake bits are cleared */
2695 	iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2696 	iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2697 
2698 	/* Copy original ucode data image from disk into backup cache.
2699 	 * This will be used to initialize the on-board processor's
2700 	 * data SRAM for a clean start when the runtime program first loads. */
2701 	memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2702 	       priv->ucode_data.len);
2703 
2704 	/* We return success when we resume from suspend and rf_kill is on. */
2705 	if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2706 		return 0;
2707 
2708 	for (i = 0; i < MAX_HW_RESTARTS; i++) {
2709 
2710 		/* load bootstrap state machine,
2711 		 * load bootstrap program into processor's memory,
2712 		 * prepare to load the "initialize" uCode */
2713 		rc = priv->cfg->ops->lib->load_ucode(priv);
2714 
2715 		if (rc) {
2716 			IWL_ERR(priv,
2717 				"Unable to set up bootstrap uCode: %d\n", rc);
2718 			continue;
2719 		}
2720 
2721 		/* start card; "initialize" will load runtime ucode */
2722 		iwl3945_nic_start(priv);
2723 
2724 		IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2725 
2726 		return 0;
2727 	}
2728 
2729 	set_bit(STATUS_EXIT_PENDING, &priv->status);
2730 	__iwl3945_down(priv);
2731 	clear_bit(STATUS_EXIT_PENDING, &priv->status);
2732 
2733 	/* tried to restart and config the device for as long as our
2734 	 * patience could withstand */
2735 	IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2736 	return -EIO;
2737 }
2738 
2739 
2740 /*****************************************************************************
2741  *
2742  * Workqueue callbacks
2743  *
2744  *****************************************************************************/
2745 
iwl3945_bg_init_alive_start(struct work_struct * data)2746 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2747 {
2748 	struct iwl_priv *priv =
2749 	    container_of(data, struct iwl_priv, init_alive_start.work);
2750 
2751 	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2752 		return;
2753 
2754 	mutex_lock(&priv->mutex);
2755 	iwl3945_init_alive_start(priv);
2756 	mutex_unlock(&priv->mutex);
2757 }
2758 
iwl3945_bg_alive_start(struct work_struct * data)2759 static void iwl3945_bg_alive_start(struct work_struct *data)
2760 {
2761 	struct iwl_priv *priv =
2762 	    container_of(data, struct iwl_priv, alive_start.work);
2763 
2764 	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2765 		return;
2766 
2767 	mutex_lock(&priv->mutex);
2768 	iwl3945_alive_start(priv);
2769 	mutex_unlock(&priv->mutex);
2770 }
2771 
2772 /*
2773  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2774  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
2775  * *is* readable even when device has been SW_RESET into low power mode
2776  * (e.g. during RF KILL).
2777  */
iwl3945_rfkill_poll(struct work_struct * data)2778 static void iwl3945_rfkill_poll(struct work_struct *data)
2779 {
2780 	struct iwl_priv *priv =
2781 	    container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2782 	bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2783 	bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2784 			& CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2785 
2786 	if (new_rfkill != old_rfkill) {
2787 		if (new_rfkill)
2788 			set_bit(STATUS_RF_KILL_HW, &priv->status);
2789 		else
2790 			clear_bit(STATUS_RF_KILL_HW, &priv->status);
2791 
2792 		wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2793 
2794 		IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2795 				new_rfkill ? "disable radio" : "enable radio");
2796 	}
2797 
2798 	/* Keep this running, even if radio now enabled.  This will be
2799 	 * cancelled in mac_start() if system decides to start again */
2800 	queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2801 			   round_jiffies_relative(2 * HZ));
2802 
2803 }
2804 
iwl3945_request_scan(struct iwl_priv * priv,struct ieee80211_vif * vif)2805 int iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2806 {
2807 	struct iwl_host_cmd cmd = {
2808 		.id = REPLY_SCAN_CMD,
2809 		.len = sizeof(struct iwl3945_scan_cmd),
2810 		.flags = CMD_SIZE_HUGE,
2811 	};
2812 	struct iwl3945_scan_cmd *scan;
2813 	u8 n_probes = 0;
2814 	enum ieee80211_band band;
2815 	bool is_active = false;
2816 	int ret;
2817 
2818 	lockdep_assert_held(&priv->mutex);
2819 
2820 	if (!priv->scan_cmd) {
2821 		priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2822 					 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2823 		if (!priv->scan_cmd) {
2824 			IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2825 			return -ENOMEM;
2826 		}
2827 	}
2828 	scan = priv->scan_cmd;
2829 	memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2830 
2831 	scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2832 	scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2833 
2834 	if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
2835 		u16 interval = 0;
2836 		u32 extra;
2837 		u32 suspend_time = 100;
2838 		u32 scan_suspend_time = 100;
2839 
2840 		IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2841 
2842 		if (priv->is_internal_short_scan)
2843 			interval = 0;
2844 		else
2845 			interval = vif->bss_conf.beacon_int;
2846 
2847 		scan->suspend_time = 0;
2848 		scan->max_out_time = cpu_to_le32(200 * 1024);
2849 		if (!interval)
2850 			interval = suspend_time;
2851 		/*
2852 		 * suspend time format:
2853 		 *  0-19: beacon interval in usec (time before exec.)
2854 		 * 20-23: 0
2855 		 * 24-31: number of beacons (suspend between channels)
2856 		 */
2857 
2858 		extra = (suspend_time / interval) << 24;
2859 		scan_suspend_time = 0xFF0FFFFF &
2860 		    (extra | ((suspend_time % interval) * 1024));
2861 
2862 		scan->suspend_time = cpu_to_le32(scan_suspend_time);
2863 		IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2864 			       scan_suspend_time, interval);
2865 	}
2866 
2867 	if (priv->is_internal_short_scan) {
2868 		IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2869 	} else if (priv->scan_request->n_ssids) {
2870 		int i, p = 0;
2871 		IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2872 		for (i = 0; i < priv->scan_request->n_ssids; i++) {
2873 			/* always does wildcard anyway */
2874 			if (!priv->scan_request->ssids[i].ssid_len)
2875 				continue;
2876 			scan->direct_scan[p].id = WLAN_EID_SSID;
2877 			scan->direct_scan[p].len =
2878 				priv->scan_request->ssids[i].ssid_len;
2879 			memcpy(scan->direct_scan[p].ssid,
2880 			       priv->scan_request->ssids[i].ssid,
2881 			       priv->scan_request->ssids[i].ssid_len);
2882 			n_probes++;
2883 			p++;
2884 		}
2885 		is_active = true;
2886 	} else
2887 		IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2888 
2889 	/* We don't build a direct scan probe request; the uCode will do
2890 	 * that based on the direct_mask added to each channel entry */
2891 	scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2892 	scan->tx_cmd.sta_id = priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2893 	scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2894 
2895 	/* flags + rate selection */
2896 
2897 	switch (priv->scan_band) {
2898 	case IEEE80211_BAND_2GHZ:
2899 		scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2900 		scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2901 		band = IEEE80211_BAND_2GHZ;
2902 		break;
2903 	case IEEE80211_BAND_5GHZ:
2904 		scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2905 		band = IEEE80211_BAND_5GHZ;
2906 		break;
2907 	default:
2908 		IWL_WARN(priv, "Invalid scan band\n");
2909 		return -EIO;
2910 	}
2911 
2912 	/*
2913 	 * If active scaning is requested but a certain channel
2914 	 * is marked passive, we can do active scanning if we
2915 	 * detect transmissions.
2916 	 */
2917 	scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2918 					IWL_GOOD_CRC_TH_DISABLED;
2919 
2920 	if (!priv->is_internal_short_scan) {
2921 		scan->tx_cmd.len = cpu_to_le16(
2922 			iwl_legacy_fill_probe_req(priv,
2923 				(struct ieee80211_mgmt *)scan->data,
2924 				vif->addr,
2925 				priv->scan_request->ie,
2926 				priv->scan_request->ie_len,
2927 				IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2928 	} else {
2929 		/* use bcast addr, will not be transmitted but must be valid */
2930 		scan->tx_cmd.len = cpu_to_le16(
2931 			iwl_legacy_fill_probe_req(priv,
2932 				(struct ieee80211_mgmt *)scan->data,
2933 				iwlegacy_bcast_addr, NULL, 0,
2934 				IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2935 	}
2936 	/* select Rx antennas */
2937 	scan->flags |= iwl3945_get_antenna_flags(priv);
2938 
2939 	if (priv->is_internal_short_scan) {
2940 		scan->channel_count =
2941 			iwl3945_get_single_channel_for_scan(priv, vif, band,
2942 				(void *)&scan->data[le16_to_cpu(
2943 				scan->tx_cmd.len)]);
2944 	} else {
2945 		scan->channel_count =
2946 			iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2947 				(void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
2948 	}
2949 
2950 	if (scan->channel_count == 0) {
2951 		IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2952 		return -EIO;
2953 	}
2954 
2955 	cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2956 	    scan->channel_count * sizeof(struct iwl3945_scan_channel);
2957 	cmd.data = scan;
2958 	scan->len = cpu_to_le16(cmd.len);
2959 
2960 	set_bit(STATUS_SCAN_HW, &priv->status);
2961 	ret = iwl_legacy_send_cmd_sync(priv, &cmd);
2962 	if (ret)
2963 		clear_bit(STATUS_SCAN_HW, &priv->status);
2964 	return ret;
2965 }
2966 
iwl3945_post_scan(struct iwl_priv * priv)2967 void iwl3945_post_scan(struct iwl_priv *priv)
2968 {
2969 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2970 
2971 	/*
2972 	 * Since setting the RXON may have been deferred while
2973 	 * performing the scan, fire one off if needed
2974 	 */
2975 	if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2976 		iwl3945_commit_rxon(priv, ctx);
2977 }
2978 
iwl3945_bg_restart(struct work_struct * data)2979 static void iwl3945_bg_restart(struct work_struct *data)
2980 {
2981 	struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2982 
2983 	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2984 		return;
2985 
2986 	if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2987 		struct iwl_rxon_context *ctx;
2988 		mutex_lock(&priv->mutex);
2989 		for_each_context(priv, ctx)
2990 			ctx->vif = NULL;
2991 		priv->is_open = 0;
2992 		mutex_unlock(&priv->mutex);
2993 		iwl3945_down(priv);
2994 		ieee80211_restart_hw(priv->hw);
2995 	} else {
2996 		iwl3945_down(priv);
2997 
2998 		if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2999 			return;
3000 
3001 		mutex_lock(&priv->mutex);
3002 		__iwl3945_up(priv);
3003 		mutex_unlock(&priv->mutex);
3004 	}
3005 }
3006 
iwl3945_bg_rx_replenish(struct work_struct * data)3007 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3008 {
3009 	struct iwl_priv *priv =
3010 	    container_of(data, struct iwl_priv, rx_replenish);
3011 
3012 	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3013 		return;
3014 
3015 	mutex_lock(&priv->mutex);
3016 	iwl3945_rx_replenish(priv);
3017 	mutex_unlock(&priv->mutex);
3018 }
3019 
iwl3945_post_associate(struct iwl_priv * priv)3020 void iwl3945_post_associate(struct iwl_priv *priv)
3021 {
3022 	int rc = 0;
3023 	struct ieee80211_conf *conf = NULL;
3024 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3025 
3026 	if (!ctx->vif || !priv->is_open)
3027 		return;
3028 
3029 	IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3030 			ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
3031 
3032 	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3033 		return;
3034 
3035 	iwl_legacy_scan_cancel_timeout(priv, 200);
3036 
3037 	conf = iwl_legacy_ieee80211_get_hw_conf(priv->hw);
3038 
3039 	ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3040 	iwl3945_commit_rxon(priv, ctx);
3041 
3042 	rc = iwl_legacy_send_rxon_timing(priv, ctx);
3043 	if (rc)
3044 		IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3045 			    "Attempting to continue.\n");
3046 
3047 	ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3048 
3049 	ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
3050 
3051 	IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3052 			ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
3053 
3054 	if (ctx->vif->bss_conf.use_short_preamble)
3055 		ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3056 	else
3057 		ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3058 
3059 	if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3060 		if (ctx->vif->bss_conf.use_short_slot)
3061 			ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3062 		else
3063 			ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3064 	}
3065 
3066 	iwl3945_commit_rxon(priv, ctx);
3067 
3068 	switch (ctx->vif->type) {
3069 	case NL80211_IFTYPE_STATION:
3070 		iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3071 		break;
3072 	case NL80211_IFTYPE_ADHOC:
3073 		iwl3945_send_beacon_cmd(priv);
3074 		break;
3075 	default:
3076 		IWL_ERR(priv, "%s Should not be called in %d mode\n",
3077 			__func__, ctx->vif->type);
3078 		break;
3079 	}
3080 }
3081 
3082 /*****************************************************************************
3083  *
3084  * mac80211 entry point functions
3085  *
3086  *****************************************************************************/
3087 
3088 #define UCODE_READY_TIMEOUT	(2 * HZ)
3089 
iwl3945_mac_start(struct ieee80211_hw * hw)3090 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3091 {
3092 	struct iwl_priv *priv = hw->priv;
3093 	int ret;
3094 
3095 	IWL_DEBUG_MAC80211(priv, "enter\n");
3096 
3097 	/* we should be verifying the device is ready to be opened */
3098 	mutex_lock(&priv->mutex);
3099 
3100 	/* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3101 	 * ucode filename and max sizes are card-specific. */
3102 
3103 	if (!priv->ucode_code.len) {
3104 		ret = iwl3945_read_ucode(priv);
3105 		if (ret) {
3106 			IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3107 			mutex_unlock(&priv->mutex);
3108 			goto out_release_irq;
3109 		}
3110 	}
3111 
3112 	ret = __iwl3945_up(priv);
3113 
3114 	mutex_unlock(&priv->mutex);
3115 
3116 	if (ret)
3117 		goto out_release_irq;
3118 
3119 	IWL_DEBUG_INFO(priv, "Start UP work.\n");
3120 
3121 	/* Wait for START_ALIVE from ucode. Otherwise callbacks from
3122 	 * mac80211 will not be run successfully. */
3123 	ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3124 			test_bit(STATUS_READY, &priv->status),
3125 			UCODE_READY_TIMEOUT);
3126 	if (!ret) {
3127 		if (!test_bit(STATUS_READY, &priv->status)) {
3128 			IWL_ERR(priv,
3129 				"Wait for START_ALIVE timeout after %dms.\n",
3130 				jiffies_to_msecs(UCODE_READY_TIMEOUT));
3131 			ret = -ETIMEDOUT;
3132 			goto out_release_irq;
3133 		}
3134 	}
3135 
3136 	/* ucode is running and will send rfkill notifications,
3137 	 * no need to poll the killswitch state anymore */
3138 	cancel_delayed_work(&priv->_3945.rfkill_poll);
3139 
3140 	priv->is_open = 1;
3141 	IWL_DEBUG_MAC80211(priv, "leave\n");
3142 	return 0;
3143 
3144 out_release_irq:
3145 	priv->is_open = 0;
3146 	IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3147 	return ret;
3148 }
3149 
iwl3945_mac_stop(struct ieee80211_hw * hw)3150 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3151 {
3152 	struct iwl_priv *priv = hw->priv;
3153 
3154 	IWL_DEBUG_MAC80211(priv, "enter\n");
3155 
3156 	if (!priv->is_open) {
3157 		IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3158 		return;
3159 	}
3160 
3161 	priv->is_open = 0;
3162 
3163 	iwl3945_down(priv);
3164 
3165 	flush_workqueue(priv->workqueue);
3166 
3167 	/* start polling the killswitch state again */
3168 	queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3169 			   round_jiffies_relative(2 * HZ));
3170 
3171 	IWL_DEBUG_MAC80211(priv, "leave\n");
3172 }
3173 
iwl3945_mac_tx(struct ieee80211_hw * hw,struct sk_buff * skb)3174 static void iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3175 {
3176 	struct iwl_priv *priv = hw->priv;
3177 
3178 	IWL_DEBUG_MAC80211(priv, "enter\n");
3179 
3180 	IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3181 		     ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3182 
3183 	if (iwl3945_tx_skb(priv, skb))
3184 		dev_kfree_skb_any(skb);
3185 
3186 	IWL_DEBUG_MAC80211(priv, "leave\n");
3187 }
3188 
iwl3945_config_ap(struct iwl_priv * priv)3189 void iwl3945_config_ap(struct iwl_priv *priv)
3190 {
3191 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3192 	struct ieee80211_vif *vif = ctx->vif;
3193 	int rc = 0;
3194 
3195 	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3196 		return;
3197 
3198 	/* The following should be done only at AP bring up */
3199 	if (!(iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))) {
3200 
3201 		/* RXON - unassoc (to set timing command) */
3202 		ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3203 		iwl3945_commit_rxon(priv, ctx);
3204 
3205 		/* RXON Timing */
3206 		rc = iwl_legacy_send_rxon_timing(priv, ctx);
3207 		if (rc)
3208 			IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3209 					"Attempting to continue.\n");
3210 
3211 		ctx->staging.assoc_id = 0;
3212 
3213 		if (vif->bss_conf.use_short_preamble)
3214 			ctx->staging.flags |=
3215 				RXON_FLG_SHORT_PREAMBLE_MSK;
3216 		else
3217 			ctx->staging.flags &=
3218 				~RXON_FLG_SHORT_PREAMBLE_MSK;
3219 
3220 		if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3221 			if (vif->bss_conf.use_short_slot)
3222 				ctx->staging.flags |=
3223 					RXON_FLG_SHORT_SLOT_MSK;
3224 			else
3225 				ctx->staging.flags &=
3226 					~RXON_FLG_SHORT_SLOT_MSK;
3227 		}
3228 		/* restore RXON assoc */
3229 		ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3230 		iwl3945_commit_rxon(priv, ctx);
3231 	}
3232 	iwl3945_send_beacon_cmd(priv);
3233 }
3234 
iwl3945_mac_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)3235 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3236 			       struct ieee80211_vif *vif,
3237 			       struct ieee80211_sta *sta,
3238 			       struct ieee80211_key_conf *key)
3239 {
3240 	struct iwl_priv *priv = hw->priv;
3241 	int ret = 0;
3242 	u8 sta_id = IWL_INVALID_STATION;
3243 	u8 static_key;
3244 
3245 	IWL_DEBUG_MAC80211(priv, "enter\n");
3246 
3247 	if (iwl3945_mod_params.sw_crypto) {
3248 		IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3249 		return -EOPNOTSUPP;
3250 	}
3251 
3252 	/*
3253 	 * To support IBSS RSN, don't program group keys in IBSS, the
3254 	 * hardware will then not attempt to decrypt the frames.
3255 	 */
3256 	if (vif->type == NL80211_IFTYPE_ADHOC &&
3257 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
3258 		return -EOPNOTSUPP;
3259 
3260 	static_key = !iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS);
3261 
3262 	if (!static_key) {
3263 		sta_id = iwl_legacy_sta_id_or_broadcast(
3264 				priv, &priv->contexts[IWL_RXON_CTX_BSS], sta);
3265 		if (sta_id == IWL_INVALID_STATION)
3266 			return -EINVAL;
3267 	}
3268 
3269 	mutex_lock(&priv->mutex);
3270 	iwl_legacy_scan_cancel_timeout(priv, 100);
3271 
3272 	switch (cmd) {
3273 	case SET_KEY:
3274 		if (static_key)
3275 			ret = iwl3945_set_static_key(priv, key);
3276 		else
3277 			ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3278 		IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3279 		break;
3280 	case DISABLE_KEY:
3281 		if (static_key)
3282 			ret = iwl3945_remove_static_key(priv);
3283 		else
3284 			ret = iwl3945_clear_sta_key_info(priv, sta_id);
3285 		IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3286 		break;
3287 	default:
3288 		ret = -EINVAL;
3289 	}
3290 
3291 	mutex_unlock(&priv->mutex);
3292 	IWL_DEBUG_MAC80211(priv, "leave\n");
3293 
3294 	return ret;
3295 }
3296 
iwl3945_mac_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)3297 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3298 			       struct ieee80211_vif *vif,
3299 			       struct ieee80211_sta *sta)
3300 {
3301 	struct iwl_priv *priv = hw->priv;
3302 	struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3303 	int ret;
3304 	bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3305 	u8 sta_id;
3306 
3307 	IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3308 			sta->addr);
3309 	mutex_lock(&priv->mutex);
3310 	IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3311 			sta->addr);
3312 	sta_priv->common.sta_id = IWL_INVALID_STATION;
3313 
3314 
3315 	ret = iwl_legacy_add_station_common(priv,
3316 				&priv->contexts[IWL_RXON_CTX_BSS],
3317 				     sta->addr, is_ap, sta, &sta_id);
3318 	if (ret) {
3319 		IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3320 			sta->addr, ret);
3321 		/* Should we return success if return code is EEXIST ? */
3322 		mutex_unlock(&priv->mutex);
3323 		return ret;
3324 	}
3325 
3326 	sta_priv->common.sta_id = sta_id;
3327 
3328 	/* Initialize rate scaling */
3329 	IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3330 		       sta->addr);
3331 	iwl3945_rs_rate_init(priv, sta, sta_id);
3332 	mutex_unlock(&priv->mutex);
3333 
3334 	return 0;
3335 }
3336 
iwl3945_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)3337 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
3338 				     unsigned int changed_flags,
3339 				     unsigned int *total_flags,
3340 				     u64 multicast)
3341 {
3342 	struct iwl_priv *priv = hw->priv;
3343 	__le32 filter_or = 0, filter_nand = 0;
3344 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3345 
3346 #define CHK(test, flag)	do { \
3347 	if (*total_flags & (test))		\
3348 		filter_or |= (flag);		\
3349 	else					\
3350 		filter_nand |= (flag);		\
3351 	} while (0)
3352 
3353 	IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3354 			changed_flags, *total_flags);
3355 
3356 	CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3357 	CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3358 	CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3359 
3360 #undef CHK
3361 
3362 	mutex_lock(&priv->mutex);
3363 
3364 	ctx->staging.filter_flags &= ~filter_nand;
3365 	ctx->staging.filter_flags |= filter_or;
3366 
3367 	/*
3368 	 * Not committing directly because hardware can perform a scan,
3369 	 * but even if hw is ready, committing here breaks for some reason,
3370 	 * we'll eventually commit the filter flags change anyway.
3371 	 */
3372 
3373 	mutex_unlock(&priv->mutex);
3374 
3375 	/*
3376 	 * Receiving all multicast frames is always enabled by the
3377 	 * default flags setup in iwl_legacy_connection_init_rx_config()
3378 	 * since we currently do not support programming multicast
3379 	 * filters into the device.
3380 	 */
3381 	*total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3382 			FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3383 }
3384 
3385 
3386 /*****************************************************************************
3387  *
3388  * sysfs attributes
3389  *
3390  *****************************************************************************/
3391 
3392 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
3393 
3394 /*
3395  * The following adds a new attribute to the sysfs representation
3396  * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3397  * used for controlling the debug level.
3398  *
3399  * See the level definitions in iwl for details.
3400  *
3401  * The debug_level being managed using sysfs below is a per device debug
3402  * level that is used instead of the global debug level if it (the per
3403  * device debug level) is set.
3404  */
iwl3945_show_debug_level(struct device * d,struct device_attribute * attr,char * buf)3405 static ssize_t iwl3945_show_debug_level(struct device *d,
3406 				struct device_attribute *attr, char *buf)
3407 {
3408 	struct iwl_priv *priv = dev_get_drvdata(d);
3409 	return sprintf(buf, "0x%08X\n", iwl_legacy_get_debug_level(priv));
3410 }
iwl3945_store_debug_level(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3411 static ssize_t iwl3945_store_debug_level(struct device *d,
3412 				struct device_attribute *attr,
3413 				 const char *buf, size_t count)
3414 {
3415 	struct iwl_priv *priv = dev_get_drvdata(d);
3416 	unsigned long val;
3417 	int ret;
3418 
3419 	ret = strict_strtoul(buf, 0, &val);
3420 	if (ret)
3421 		IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3422 	else {
3423 		priv->debug_level = val;
3424 		if (iwl_legacy_alloc_traffic_mem(priv))
3425 			IWL_ERR(priv,
3426 				"Not enough memory to generate traffic log\n");
3427 	}
3428 	return strnlen(buf, count);
3429 }
3430 
3431 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3432 			iwl3945_show_debug_level, iwl3945_store_debug_level);
3433 
3434 #endif /* CONFIG_IWLWIFI_LEGACY_DEBUG */
3435 
iwl3945_show_temperature(struct device * d,struct device_attribute * attr,char * buf)3436 static ssize_t iwl3945_show_temperature(struct device *d,
3437 				struct device_attribute *attr, char *buf)
3438 {
3439 	struct iwl_priv *priv = dev_get_drvdata(d);
3440 
3441 	if (!iwl_legacy_is_alive(priv))
3442 		return -EAGAIN;
3443 
3444 	return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3445 }
3446 
3447 static DEVICE_ATTR(temperature, S_IRUGO, iwl3945_show_temperature, NULL);
3448 
iwl3945_show_tx_power(struct device * d,struct device_attribute * attr,char * buf)3449 static ssize_t iwl3945_show_tx_power(struct device *d,
3450 			     struct device_attribute *attr, char *buf)
3451 {
3452 	struct iwl_priv *priv = dev_get_drvdata(d);
3453 	return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3454 }
3455 
iwl3945_store_tx_power(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3456 static ssize_t iwl3945_store_tx_power(struct device *d,
3457 			      struct device_attribute *attr,
3458 			      const char *buf, size_t count)
3459 {
3460 	struct iwl_priv *priv = dev_get_drvdata(d);
3461 	char *p = (char *)buf;
3462 	u32 val;
3463 
3464 	val = simple_strtoul(p, &p, 10);
3465 	if (p == buf)
3466 		IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3467 	else
3468 		iwl3945_hw_reg_set_txpower(priv, val);
3469 
3470 	return count;
3471 }
3472 
3473 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, iwl3945_show_tx_power, iwl3945_store_tx_power);
3474 
iwl3945_show_flags(struct device * d,struct device_attribute * attr,char * buf)3475 static ssize_t iwl3945_show_flags(struct device *d,
3476 			  struct device_attribute *attr, char *buf)
3477 {
3478 	struct iwl_priv *priv = dev_get_drvdata(d);
3479 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3480 
3481 	return sprintf(buf, "0x%04X\n", ctx->active.flags);
3482 }
3483 
iwl3945_store_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3484 static ssize_t iwl3945_store_flags(struct device *d,
3485 			   struct device_attribute *attr,
3486 			   const char *buf, size_t count)
3487 {
3488 	struct iwl_priv *priv = dev_get_drvdata(d);
3489 	u32 flags = simple_strtoul(buf, NULL, 0);
3490 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3491 
3492 	mutex_lock(&priv->mutex);
3493 	if (le32_to_cpu(ctx->staging.flags) != flags) {
3494 		/* Cancel any currently running scans... */
3495 		if (iwl_legacy_scan_cancel_timeout(priv, 100))
3496 			IWL_WARN(priv, "Could not cancel scan.\n");
3497 		else {
3498 			IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3499 				       flags);
3500 			ctx->staging.flags = cpu_to_le32(flags);
3501 			iwl3945_commit_rxon(priv, ctx);
3502 		}
3503 	}
3504 	mutex_unlock(&priv->mutex);
3505 
3506 	return count;
3507 }
3508 
3509 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, iwl3945_show_flags, iwl3945_store_flags);
3510 
iwl3945_show_filter_flags(struct device * d,struct device_attribute * attr,char * buf)3511 static ssize_t iwl3945_show_filter_flags(struct device *d,
3512 				 struct device_attribute *attr, char *buf)
3513 {
3514 	struct iwl_priv *priv = dev_get_drvdata(d);
3515 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3516 
3517 	return sprintf(buf, "0x%04X\n",
3518 		le32_to_cpu(ctx->active.filter_flags));
3519 }
3520 
iwl3945_store_filter_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3521 static ssize_t iwl3945_store_filter_flags(struct device *d,
3522 				  struct device_attribute *attr,
3523 				  const char *buf, size_t count)
3524 {
3525 	struct iwl_priv *priv = dev_get_drvdata(d);
3526 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3527 	u32 filter_flags = simple_strtoul(buf, NULL, 0);
3528 
3529 	mutex_lock(&priv->mutex);
3530 	if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
3531 		/* Cancel any currently running scans... */
3532 		if (iwl_legacy_scan_cancel_timeout(priv, 100))
3533 			IWL_WARN(priv, "Could not cancel scan.\n");
3534 		else {
3535 			IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3536 				       "0x%04X\n", filter_flags);
3537 			ctx->staging.filter_flags =
3538 				cpu_to_le32(filter_flags);
3539 			iwl3945_commit_rxon(priv, ctx);
3540 		}
3541 	}
3542 	mutex_unlock(&priv->mutex);
3543 
3544 	return count;
3545 }
3546 
3547 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, iwl3945_show_filter_flags,
3548 		   iwl3945_store_filter_flags);
3549 
iwl3945_show_measurement(struct device * d,struct device_attribute * attr,char * buf)3550 static ssize_t iwl3945_show_measurement(struct device *d,
3551 				struct device_attribute *attr, char *buf)
3552 {
3553 	struct iwl_priv *priv = dev_get_drvdata(d);
3554 	struct iwl_spectrum_notification measure_report;
3555 	u32 size = sizeof(measure_report), len = 0, ofs = 0;
3556 	u8 *data = (u8 *)&measure_report;
3557 	unsigned long flags;
3558 
3559 	spin_lock_irqsave(&priv->lock, flags);
3560 	if (!(priv->measurement_status & MEASUREMENT_READY)) {
3561 		spin_unlock_irqrestore(&priv->lock, flags);
3562 		return 0;
3563 	}
3564 	memcpy(&measure_report, &priv->measure_report, size);
3565 	priv->measurement_status = 0;
3566 	spin_unlock_irqrestore(&priv->lock, flags);
3567 
3568 	while (size && (PAGE_SIZE - len)) {
3569 		hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3570 				   PAGE_SIZE - len, 1);
3571 		len = strlen(buf);
3572 		if (PAGE_SIZE - len)
3573 			buf[len++] = '\n';
3574 
3575 		ofs += 16;
3576 		size -= min(size, 16U);
3577 	}
3578 
3579 	return len;
3580 }
3581 
iwl3945_store_measurement(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3582 static ssize_t iwl3945_store_measurement(struct device *d,
3583 				 struct device_attribute *attr,
3584 				 const char *buf, size_t count)
3585 {
3586 	struct iwl_priv *priv = dev_get_drvdata(d);
3587 	struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3588 	struct ieee80211_measurement_params params = {
3589 		.channel = le16_to_cpu(ctx->active.channel),
3590 		.start_time = cpu_to_le64(priv->_3945.last_tsf),
3591 		.duration = cpu_to_le16(1),
3592 	};
3593 	u8 type = IWL_MEASURE_BASIC;
3594 	u8 buffer[32];
3595 	u8 channel;
3596 
3597 	if (count) {
3598 		char *p = buffer;
3599 		strncpy(buffer, buf, min(sizeof(buffer), count));
3600 		channel = simple_strtoul(p, NULL, 0);
3601 		if (channel)
3602 			params.channel = channel;
3603 
3604 		p = buffer;
3605 		while (*p && *p != ' ')
3606 			p++;
3607 		if (*p)
3608 			type = simple_strtoul(p + 1, NULL, 0);
3609 	}
3610 
3611 	IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3612 		       "channel %d (for '%s')\n", type, params.channel, buf);
3613 	iwl3945_get_measurement(priv, &params, type);
3614 
3615 	return count;
3616 }
3617 
3618 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3619 		   iwl3945_show_measurement, iwl3945_store_measurement);
3620 
iwl3945_store_retry_rate(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3621 static ssize_t iwl3945_store_retry_rate(struct device *d,
3622 				struct device_attribute *attr,
3623 				const char *buf, size_t count)
3624 {
3625 	struct iwl_priv *priv = dev_get_drvdata(d);
3626 
3627 	priv->retry_rate = simple_strtoul(buf, NULL, 0);
3628 	if (priv->retry_rate <= 0)
3629 		priv->retry_rate = 1;
3630 
3631 	return count;
3632 }
3633 
iwl3945_show_retry_rate(struct device * d,struct device_attribute * attr,char * buf)3634 static ssize_t iwl3945_show_retry_rate(struct device *d,
3635 			       struct device_attribute *attr, char *buf)
3636 {
3637 	struct iwl_priv *priv = dev_get_drvdata(d);
3638 	return sprintf(buf, "%d", priv->retry_rate);
3639 }
3640 
3641 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, iwl3945_show_retry_rate,
3642 		   iwl3945_store_retry_rate);
3643 
3644 
iwl3945_show_channels(struct device * d,struct device_attribute * attr,char * buf)3645 static ssize_t iwl3945_show_channels(struct device *d,
3646 			     struct device_attribute *attr, char *buf)
3647 {
3648 	/* all this shit doesn't belong into sysfs anyway */
3649 	return 0;
3650 }
3651 
3652 static DEVICE_ATTR(channels, S_IRUSR, iwl3945_show_channels, NULL);
3653 
iwl3945_show_antenna(struct device * d,struct device_attribute * attr,char * buf)3654 static ssize_t iwl3945_show_antenna(struct device *d,
3655 			    struct device_attribute *attr, char *buf)
3656 {
3657 	struct iwl_priv *priv = dev_get_drvdata(d);
3658 
3659 	if (!iwl_legacy_is_alive(priv))
3660 		return -EAGAIN;
3661 
3662 	return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3663 }
3664 
iwl3945_store_antenna(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3665 static ssize_t iwl3945_store_antenna(struct device *d,
3666 			     struct device_attribute *attr,
3667 			     const char *buf, size_t count)
3668 {
3669 	struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3670 	int ant;
3671 
3672 	if (count == 0)
3673 		return 0;
3674 
3675 	if (sscanf(buf, "%1i", &ant) != 1) {
3676 		IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3677 		return count;
3678 	}
3679 
3680 	if ((ant >= 0) && (ant <= 2)) {
3681 		IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3682 		iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3683 	} else
3684 		IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3685 
3686 
3687 	return count;
3688 }
3689 
3690 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, iwl3945_show_antenna, iwl3945_store_antenna);
3691 
iwl3945_show_status(struct device * d,struct device_attribute * attr,char * buf)3692 static ssize_t iwl3945_show_status(struct device *d,
3693 			   struct device_attribute *attr, char *buf)
3694 {
3695 	struct iwl_priv *priv = dev_get_drvdata(d);
3696 	if (!iwl_legacy_is_alive(priv))
3697 		return -EAGAIN;
3698 	return sprintf(buf, "0x%08x\n", (int)priv->status);
3699 }
3700 
3701 static DEVICE_ATTR(status, S_IRUGO, iwl3945_show_status, NULL);
3702 
iwl3945_dump_error_log(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3703 static ssize_t iwl3945_dump_error_log(struct device *d,
3704 			      struct device_attribute *attr,
3705 			      const char *buf, size_t count)
3706 {
3707 	struct iwl_priv *priv = dev_get_drvdata(d);
3708 	char *p = (char *)buf;
3709 
3710 	if (p[0] == '1')
3711 		iwl3945_dump_nic_error_log(priv);
3712 
3713 	return strnlen(buf, count);
3714 }
3715 
3716 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, iwl3945_dump_error_log);
3717 
3718 /*****************************************************************************
3719  *
3720  * driver setup and tear down
3721  *
3722  *****************************************************************************/
3723 
iwl3945_setup_deferred_work(struct iwl_priv * priv)3724 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3725 {
3726 	priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3727 
3728 	init_waitqueue_head(&priv->wait_command_queue);
3729 
3730 	INIT_WORK(&priv->restart, iwl3945_bg_restart);
3731 	INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3732 	INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3733 	INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3734 	INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3735 
3736 	iwl_legacy_setup_scan_deferred_work(priv);
3737 
3738 	iwl3945_hw_setup_deferred_work(priv);
3739 
3740 	init_timer(&priv->watchdog);
3741 	priv->watchdog.data = (unsigned long)priv;
3742 	priv->watchdog.function = iwl_legacy_bg_watchdog;
3743 
3744 	tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3745 		     iwl3945_irq_tasklet, (unsigned long)priv);
3746 }
3747 
iwl3945_cancel_deferred_work(struct iwl_priv * priv)3748 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3749 {
3750 	iwl3945_hw_cancel_deferred_work(priv);
3751 
3752 	cancel_delayed_work_sync(&priv->init_alive_start);
3753 	cancel_delayed_work(&priv->alive_start);
3754 
3755 	iwl_legacy_cancel_scan_deferred_work(priv);
3756 }
3757 
3758 static struct attribute *iwl3945_sysfs_entries[] = {
3759 	&dev_attr_antenna.attr,
3760 	&dev_attr_channels.attr,
3761 	&dev_attr_dump_errors.attr,
3762 	&dev_attr_flags.attr,
3763 	&dev_attr_filter_flags.attr,
3764 	&dev_attr_measurement.attr,
3765 	&dev_attr_retry_rate.attr,
3766 	&dev_attr_status.attr,
3767 	&dev_attr_temperature.attr,
3768 	&dev_attr_tx_power.attr,
3769 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
3770 	&dev_attr_debug_level.attr,
3771 #endif
3772 	NULL
3773 };
3774 
3775 static struct attribute_group iwl3945_attribute_group = {
3776 	.name = NULL,		/* put in device directory */
3777 	.attrs = iwl3945_sysfs_entries,
3778 };
3779 
3780 struct ieee80211_ops iwl3945_hw_ops = {
3781 	.tx = iwl3945_mac_tx,
3782 	.start = iwl3945_mac_start,
3783 	.stop = iwl3945_mac_stop,
3784 	.add_interface = iwl_legacy_mac_add_interface,
3785 	.remove_interface = iwl_legacy_mac_remove_interface,
3786 	.change_interface = iwl_legacy_mac_change_interface,
3787 	.config = iwl_legacy_mac_config,
3788 	.configure_filter = iwl3945_configure_filter,
3789 	.set_key = iwl3945_mac_set_key,
3790 	.conf_tx = iwl_legacy_mac_conf_tx,
3791 	.reset_tsf = iwl_legacy_mac_reset_tsf,
3792 	.bss_info_changed = iwl_legacy_mac_bss_info_changed,
3793 	.hw_scan = iwl_legacy_mac_hw_scan,
3794 	.sta_add = iwl3945_mac_sta_add,
3795 	.sta_remove = iwl_legacy_mac_sta_remove,
3796 	.tx_last_beacon = iwl_legacy_mac_tx_last_beacon,
3797 };
3798 
iwl3945_init_drv(struct iwl_priv * priv)3799 static int iwl3945_init_drv(struct iwl_priv *priv)
3800 {
3801 	int ret;
3802 	struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3803 
3804 	priv->retry_rate = 1;
3805 	priv->beacon_skb = NULL;
3806 
3807 	spin_lock_init(&priv->sta_lock);
3808 	spin_lock_init(&priv->hcmd_lock);
3809 
3810 	INIT_LIST_HEAD(&priv->free_frames);
3811 
3812 	mutex_init(&priv->mutex);
3813 	mutex_init(&priv->sync_cmd_mutex);
3814 
3815 	priv->ieee_channels = NULL;
3816 	priv->ieee_rates = NULL;
3817 	priv->band = IEEE80211_BAND_2GHZ;
3818 
3819 	priv->iw_mode = NL80211_IFTYPE_STATION;
3820 	priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3821 
3822 	/* initialize force reset */
3823 	priv->force_reset[IWL_RF_RESET].reset_duration =
3824 		IWL_DELAY_NEXT_FORCE_RF_RESET;
3825 	priv->force_reset[IWL_FW_RESET].reset_duration =
3826 		IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3827 
3828 	if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3829 		IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3830 			 eeprom->version);
3831 		ret = -EINVAL;
3832 		goto err;
3833 	}
3834 	ret = iwl_legacy_init_channel_map(priv);
3835 	if (ret) {
3836 		IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3837 		goto err;
3838 	}
3839 
3840 	/* Set up txpower settings in driver for all channels */
3841 	if (iwl3945_txpower_set_from_eeprom(priv)) {
3842 		ret = -EIO;
3843 		goto err_free_channel_map;
3844 	}
3845 
3846 	ret = iwl_legacy_init_geos(priv);
3847 	if (ret) {
3848 		IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3849 		goto err_free_channel_map;
3850 	}
3851 	iwl3945_init_hw_rates(priv, priv->ieee_rates);
3852 
3853 	return 0;
3854 
3855 err_free_channel_map:
3856 	iwl_legacy_free_channel_map(priv);
3857 err:
3858 	return ret;
3859 }
3860 
3861 #define IWL3945_MAX_PROBE_REQUEST	200
3862 
iwl3945_setup_mac(struct iwl_priv * priv)3863 static int iwl3945_setup_mac(struct iwl_priv *priv)
3864 {
3865 	int ret;
3866 	struct ieee80211_hw *hw = priv->hw;
3867 
3868 	hw->rate_control_algorithm = "iwl-3945-rs";
3869 	hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3870 	hw->vif_data_size = sizeof(struct iwl_vif_priv);
3871 
3872 	/* Tell mac80211 our characteristics */
3873 	hw->flags = IEEE80211_HW_SIGNAL_DBM |
3874 		    IEEE80211_HW_SPECTRUM_MGMT;
3875 
3876 	hw->wiphy->interface_modes =
3877 		priv->contexts[IWL_RXON_CTX_BSS].interface_modes;
3878 
3879 	hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3880 			    WIPHY_FLAG_DISABLE_BEACON_HINTS |
3881 			    WIPHY_FLAG_IBSS_RSN;
3882 
3883 	hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3884 	/* we create the 802.11 header and a zero-length SSID element */
3885 	hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
3886 
3887 	/* Default value; 4 EDCA QOS priorities */
3888 	hw->queues = 4;
3889 
3890 	if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3891 		priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3892 			&priv->bands[IEEE80211_BAND_2GHZ];
3893 
3894 	if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3895 		priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3896 			&priv->bands[IEEE80211_BAND_5GHZ];
3897 
3898 	iwl_legacy_leds_init(priv);
3899 
3900 	ret = ieee80211_register_hw(priv->hw);
3901 	if (ret) {
3902 		IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3903 		return ret;
3904 	}
3905 	priv->mac80211_registered = 1;
3906 
3907 	return 0;
3908 }
3909 
iwl3945_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)3910 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3911 {
3912 	int err = 0, i;
3913 	struct iwl_priv *priv;
3914 	struct ieee80211_hw *hw;
3915 	struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3916 	struct iwl3945_eeprom *eeprom;
3917 	unsigned long flags;
3918 
3919 	/***********************
3920 	 * 1. Allocating HW data
3921 	 * ********************/
3922 
3923 	/* mac80211 allocates memory for this device instance, including
3924 	 *   space for this driver's private structure */
3925 	hw = iwl_legacy_alloc_all(cfg);
3926 	if (hw == NULL) {
3927 		pr_err("Can not allocate network device\n");
3928 		err = -ENOMEM;
3929 		goto out;
3930 	}
3931 	priv = hw->priv;
3932 	SET_IEEE80211_DEV(hw, &pdev->dev);
3933 
3934 	priv->cmd_queue = IWL39_CMD_QUEUE_NUM;
3935 
3936 	/* 3945 has only one valid context */
3937 	priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3938 
3939 	for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3940 		priv->contexts[i].ctxid = i;
3941 
3942 	priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3943 	priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3944 	priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3945 	priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3946 	priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3947 	priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3948 	priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3949 		BIT(NL80211_IFTYPE_STATION) |
3950 		BIT(NL80211_IFTYPE_ADHOC);
3951 	priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3952 	priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3953 	priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3954 
3955 	/*
3956 	 * Disabling hardware scan means that mac80211 will perform scans
3957 	 * "the hard way", rather than using device's scan.
3958 	 */
3959 	if (iwl3945_mod_params.disable_hw_scan) {
3960 		IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3961 		iwl3945_hw_ops.hw_scan = NULL;
3962 	}
3963 
3964 	IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3965 	priv->cfg = cfg;
3966 	priv->pci_dev = pdev;
3967 	priv->inta_mask = CSR_INI_SET_MASK;
3968 
3969 	if (iwl_legacy_alloc_traffic_mem(priv))
3970 		IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3971 
3972 	/***************************
3973 	 * 2. Initializing PCI bus
3974 	 * *************************/
3975 	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3976 				PCIE_LINK_STATE_CLKPM);
3977 
3978 	if (pci_enable_device(pdev)) {
3979 		err = -ENODEV;
3980 		goto out_ieee80211_free_hw;
3981 	}
3982 
3983 	pci_set_master(pdev);
3984 
3985 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3986 	if (!err)
3987 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3988 	if (err) {
3989 		IWL_WARN(priv, "No suitable DMA available.\n");
3990 		goto out_pci_disable_device;
3991 	}
3992 
3993 	pci_set_drvdata(pdev, priv);
3994 	err = pci_request_regions(pdev, DRV_NAME);
3995 	if (err)
3996 		goto out_pci_disable_device;
3997 
3998 	/***********************
3999 	 * 3. Read REV Register
4000 	 * ********************/
4001 	priv->hw_base = pci_iomap(pdev, 0, 0);
4002 	if (!priv->hw_base) {
4003 		err = -ENODEV;
4004 		goto out_pci_release_regions;
4005 	}
4006 
4007 	IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4008 			(unsigned long long) pci_resource_len(pdev, 0));
4009 	IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4010 
4011 	/* We disable the RETRY_TIMEOUT register (0x41) to keep
4012 	 * PCI Tx retries from interfering with C3 CPU state */
4013 	pci_write_config_byte(pdev, 0x41, 0x00);
4014 
4015 	/* these spin locks will be used in apm_ops.init and EEPROM access
4016 	 * we should init now
4017 	 */
4018 	spin_lock_init(&priv->reg_lock);
4019 	spin_lock_init(&priv->lock);
4020 
4021 	/*
4022 	 * stop and reset the on-board processor just in case it is in a
4023 	 * strange state ... like being left stranded by a primary kernel
4024 	 * and this is now the kdump kernel trying to start up
4025 	 */
4026 	iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4027 
4028 	/***********************
4029 	 * 4. Read EEPROM
4030 	 * ********************/
4031 
4032 	/* Read the EEPROM */
4033 	err = iwl_legacy_eeprom_init(priv);
4034 	if (err) {
4035 		IWL_ERR(priv, "Unable to init EEPROM\n");
4036 		goto out_iounmap;
4037 	}
4038 	/* MAC Address location in EEPROM same for 3945/4965 */
4039 	eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4040 	IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
4041 	SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
4042 
4043 	/***********************
4044 	 * 5. Setup HW Constants
4045 	 * ********************/
4046 	/* Device-specific setup */
4047 	if (iwl3945_hw_set_hw_params(priv)) {
4048 		IWL_ERR(priv, "failed to set hw settings\n");
4049 		goto out_eeprom_free;
4050 	}
4051 
4052 	/***********************
4053 	 * 6. Setup priv
4054 	 * ********************/
4055 
4056 	err = iwl3945_init_drv(priv);
4057 	if (err) {
4058 		IWL_ERR(priv, "initializing driver failed\n");
4059 		goto out_unset_hw_params;
4060 	}
4061 
4062 	IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4063 		priv->cfg->name);
4064 
4065 	/***********************
4066 	 * 7. Setup Services
4067 	 * ********************/
4068 
4069 	spin_lock_irqsave(&priv->lock, flags);
4070 	iwl_legacy_disable_interrupts(priv);
4071 	spin_unlock_irqrestore(&priv->lock, flags);
4072 
4073 	pci_enable_msi(priv->pci_dev);
4074 
4075 	err = request_irq(priv->pci_dev->irq, iwl_legacy_isr,
4076 			  IRQF_SHARED, DRV_NAME, priv);
4077 	if (err) {
4078 		IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4079 		goto out_disable_msi;
4080 	}
4081 
4082 	err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4083 	if (err) {
4084 		IWL_ERR(priv, "failed to create sysfs device attributes\n");
4085 		goto out_release_irq;
4086 	}
4087 
4088 	iwl_legacy_set_rxon_channel(priv,
4089 			     &priv->bands[IEEE80211_BAND_2GHZ].channels[5],
4090 			     &priv->contexts[IWL_RXON_CTX_BSS]);
4091 	iwl3945_setup_deferred_work(priv);
4092 	iwl3945_setup_rx_handlers(priv);
4093 	iwl_legacy_power_initialize(priv);
4094 
4095 	/*********************************
4096 	 * 8. Setup and Register mac80211
4097 	 * *******************************/
4098 
4099 	iwl_legacy_enable_interrupts(priv);
4100 
4101 	err = iwl3945_setup_mac(priv);
4102 	if (err)
4103 		goto  out_remove_sysfs;
4104 
4105 	err = iwl_legacy_dbgfs_register(priv, DRV_NAME);
4106 	if (err)
4107 		IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4108 
4109 	/* Start monitoring the killswitch */
4110 	queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4111 			   2 * HZ);
4112 
4113 	return 0;
4114 
4115  out_remove_sysfs:
4116 	destroy_workqueue(priv->workqueue);
4117 	priv->workqueue = NULL;
4118 	sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4119  out_release_irq:
4120 	free_irq(priv->pci_dev->irq, priv);
4121  out_disable_msi:
4122 	pci_disable_msi(priv->pci_dev);
4123 	iwl_legacy_free_geos(priv);
4124 	iwl_legacy_free_channel_map(priv);
4125  out_unset_hw_params:
4126 	iwl3945_unset_hw_params(priv);
4127  out_eeprom_free:
4128 	iwl_legacy_eeprom_free(priv);
4129  out_iounmap:
4130 	pci_iounmap(pdev, priv->hw_base);
4131  out_pci_release_regions:
4132 	pci_release_regions(pdev);
4133  out_pci_disable_device:
4134 	pci_set_drvdata(pdev, NULL);
4135 	pci_disable_device(pdev);
4136  out_ieee80211_free_hw:
4137 	iwl_legacy_free_traffic_mem(priv);
4138 	ieee80211_free_hw(priv->hw);
4139  out:
4140 	return err;
4141 }
4142 
iwl3945_pci_remove(struct pci_dev * pdev)4143 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4144 {
4145 	struct iwl_priv *priv = pci_get_drvdata(pdev);
4146 	unsigned long flags;
4147 
4148 	if (!priv)
4149 		return;
4150 
4151 	IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4152 
4153 	iwl_legacy_dbgfs_unregister(priv);
4154 
4155 	set_bit(STATUS_EXIT_PENDING, &priv->status);
4156 
4157 	iwl_legacy_leds_exit(priv);
4158 
4159 	if (priv->mac80211_registered) {
4160 		ieee80211_unregister_hw(priv->hw);
4161 		priv->mac80211_registered = 0;
4162 	} else {
4163 		iwl3945_down(priv);
4164 	}
4165 
4166 	/*
4167 	 * Make sure device is reset to low power before unloading driver.
4168 	 * This may be redundant with iwl_down(), but there are paths to
4169 	 * run iwl_down() without calling apm_ops.stop(), and there are
4170 	 * paths to avoid running iwl_down() at all before leaving driver.
4171 	 * This (inexpensive) call *makes sure* device is reset.
4172 	 */
4173 	iwl_legacy_apm_stop(priv);
4174 
4175 	/* make sure we flush any pending irq or
4176 	 * tasklet for the driver
4177 	 */
4178 	spin_lock_irqsave(&priv->lock, flags);
4179 	iwl_legacy_disable_interrupts(priv);
4180 	spin_unlock_irqrestore(&priv->lock, flags);
4181 
4182 	iwl3945_synchronize_irq(priv);
4183 
4184 	sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4185 
4186 	cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4187 
4188 	iwl3945_dealloc_ucode_pci(priv);
4189 
4190 	if (priv->rxq.bd)
4191 		iwl3945_rx_queue_free(priv, &priv->rxq);
4192 	iwl3945_hw_txq_ctx_free(priv);
4193 
4194 	iwl3945_unset_hw_params(priv);
4195 
4196 	/*netif_stop_queue(dev); */
4197 	flush_workqueue(priv->workqueue);
4198 
4199 	/* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4200 	 * priv->workqueue... so we can't take down the workqueue
4201 	 * until now... */
4202 	destroy_workqueue(priv->workqueue);
4203 	priv->workqueue = NULL;
4204 	iwl_legacy_free_traffic_mem(priv);
4205 
4206 	free_irq(pdev->irq, priv);
4207 	pci_disable_msi(pdev);
4208 
4209 	pci_iounmap(pdev, priv->hw_base);
4210 	pci_release_regions(pdev);
4211 	pci_disable_device(pdev);
4212 	pci_set_drvdata(pdev, NULL);
4213 
4214 	iwl_legacy_free_channel_map(priv);
4215 	iwl_legacy_free_geos(priv);
4216 	kfree(priv->scan_cmd);
4217 	if (priv->beacon_skb)
4218 		dev_kfree_skb(priv->beacon_skb);
4219 
4220 	ieee80211_free_hw(priv->hw);
4221 }
4222 
4223 
4224 /*****************************************************************************
4225  *
4226  * driver and module entry point
4227  *
4228  *****************************************************************************/
4229 
4230 static struct pci_driver iwl3945_driver = {
4231 	.name = DRV_NAME,
4232 	.id_table = iwl3945_hw_card_ids,
4233 	.probe = iwl3945_pci_probe,
4234 	.remove = __devexit_p(iwl3945_pci_remove),
4235 	.driver.pm = IWL_LEGACY_PM_OPS,
4236 };
4237 
iwl3945_init(void)4238 static int __init iwl3945_init(void)
4239 {
4240 
4241 	int ret;
4242 	pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4243 	pr_info(DRV_COPYRIGHT "\n");
4244 
4245 	ret = iwl3945_rate_control_register();
4246 	if (ret) {
4247 		pr_err("Unable to register rate control algorithm: %d\n", ret);
4248 		return ret;
4249 	}
4250 
4251 	ret = pci_register_driver(&iwl3945_driver);
4252 	if (ret) {
4253 		pr_err("Unable to initialize PCI module\n");
4254 		goto error_register;
4255 	}
4256 
4257 	return ret;
4258 
4259 error_register:
4260 	iwl3945_rate_control_unregister();
4261 	return ret;
4262 }
4263 
iwl3945_exit(void)4264 static void __exit iwl3945_exit(void)
4265 {
4266 	pci_unregister_driver(&iwl3945_driver);
4267 	iwl3945_rate_control_unregister();
4268 }
4269 
4270 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4271 
4272 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4273 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4274 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4275 MODULE_PARM_DESC(swcrypto,
4276 		"using software crypto (default 1 [software])");
4277 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4278 		int, S_IRUGO);
4279 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
4280 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
4281 module_param_named(debug, iwlegacy_debug_level, uint, S_IRUGO | S_IWUSR);
4282 MODULE_PARM_DESC(debug, "debug output mask");
4283 #endif
4284 module_param_named(fw_restart, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4285 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4286 
4287 module_exit(iwl3945_exit);
4288 module_init(iwl3945_init);
4289