1 #ifndef _ASM_IA64_HW_IRQ_H
2 #define _ASM_IA64_HW_IRQ_H
3
4 /*
5 * Copyright (C) 2001, 2002 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8
9 #include <linux/sched.h>
10 #include <linux/types.h>
11
12 #include <asm/machvec.h>
13 #include <asm/ptrace.h>
14 #include <asm/smp.h>
15
16 typedef u8 ia64_vector;
17
18 /*
19 * 0 special
20 *
21 * 1,3-14 are reserved from firmware
22 *
23 * 16-255 (vectored external interrupts) are available
24 *
25 * 15 spurious interrupt (see IVR)
26 *
27 * 16 lowest priority, 255 highest priority
28 *
29 * 15 classes of 16 interrupts each.
30 */
31 #define IA64_MIN_VECTORED_IRQ 16
32 #define IA64_MAX_VECTORED_IRQ 255
33 #define IA64_NUM_VECTORS 256
34
35 #define IA64_SPURIOUS_INT_VECTOR 0x0f
36
37 /*
38 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
39 */
40 #define IA64_CPEP_VECTOR 0x1c /* corrected platform error polling vector */
41 #define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */
42 #define IA64_CPE_VECTOR 0x1e /* corrected platform error interrupt vector */
43 #define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
44 /*
45 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
46 */
47 #define IA64_FIRST_DEVICE_VECTOR 0x30
48 #define IA64_LAST_DEVICE_VECTOR 0xe7
49
50 #define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */
51 #define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */
52 #define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */
53 #define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
54 #define IA64_IPI_RESCHEDULE 0xfd /* SMP reschedule */
55 #define IA64_IPI_VECTOR 0xfe /* inter-processor interrupt vector */
56
57 /* Used for encoding redirected irqs */
58
59 #define IA64_IRQ_REDIRECTED (1 << 31)
60
61 /* IA64 inter-cpu interrupt related definitions */
62
63 #define IA64_IPI_DEFAULT_BASE_ADDR 0xfee00000
64
65 /* Delivery modes for inter-cpu interrupts */
66 enum {
67 IA64_IPI_DM_INT = 0x0, /* pend an external interrupt */
68 IA64_IPI_DM_PMI = 0x2, /* pend a PMI */
69 IA64_IPI_DM_NMI = 0x4, /* pend an NMI (vector 2) */
70 IA64_IPI_DM_INIT = 0x5, /* pend an INIT interrupt */
71 IA64_IPI_DM_EXTINT = 0x7, /* pend an 8259-compatible interrupt. */
72 };
73
74 extern __u8 isa_irq_to_vector_map[16];
75 #define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)]
76
77 extern unsigned long ipi_base_addr;
78
79 extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
80
81 extern int ia64_alloc_vector (void); /* allocate a free vector */
82 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
83 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
84
85 static inline void
hw_resend_irq(struct hw_interrupt_type * h,unsigned int vector)86 hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
87 {
88 platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
89 }
90
91 /*
92 * Default implementations for the irq-descriptor API:
93 */
94
95 extern struct irq_desc _irq_desc[NR_IRQS];
96
97 #ifndef CONFIG_IA64_GENERIC
98 static inline struct irq_desc *
__ia64_irq_desc(unsigned int irq)99 __ia64_irq_desc (unsigned int irq)
100 {
101 return _irq_desc + irq;
102 }
103
104 static inline ia64_vector
__ia64_irq_to_vector(unsigned int irq)105 __ia64_irq_to_vector (unsigned int irq)
106 {
107 return (ia64_vector) irq;
108 }
109
110 static inline unsigned int
__ia64_local_vector_to_irq(ia64_vector vec)111 __ia64_local_vector_to_irq (ia64_vector vec)
112 {
113 return (unsigned int) vec;
114 }
115 #endif
116
117 /*
118 * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt
119 * vectors. On smaller systems, there is a one-to-one correspondence between interrupt
120 * vectors and the Linux irq numbers. However, larger systems may have multiple interrupt
121 * domains meaning that the translation from vector number to irq number depends on the
122 * interrupt domain that a CPU belongs to. This API abstracts such platform-dependent
123 * differences and provides a uniform means to translate between vector and irq numbers
124 * and to obtain the irq descriptor for a given irq number.
125 */
126
127 /* Return a pointer to the irq descriptor for IRQ. */
128 static inline struct irq_desc *
irq_desc(int irq)129 irq_desc (int irq)
130 {
131 return platform_irq_desc(irq);
132 }
133
134 /* Extract the IA-64 vector that corresponds to IRQ. */
135 static inline ia64_vector
irq_to_vector(int irq)136 irq_to_vector (int irq)
137 {
138 return platform_irq_to_vector(irq);
139 }
140
141 /*
142 * Convert the local IA-64 vector to the corresponding irq number. This translation is
143 * done in the context of the interrupt domain that the currently executing CPU belongs
144 * to.
145 */
146 static inline unsigned int
local_vector_to_irq(ia64_vector vec)147 local_vector_to_irq (ia64_vector vec)
148 {
149 return platform_local_vector_to_irq(vec);
150 }
151
152 #endif /* _ASM_IA64_HW_IRQ_H */
153