1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
4 */
5 #include <linux/scatterlist.h>
6 #include <linux/memregion.h>
7 #include <linux/highmem.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/hash.h>
11 #include <linux/sort.h>
12 #include <linux/io.h>
13 #include <linux/nd.h>
14 #include "nd-core.h"
15 #include "nd.h"
16
17 /*
18 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
19 * irrelevant.
20 */
21 #include <linux/io-64-nonatomic-hi-lo.h>
22
23 static DEFINE_PER_CPU(int, flush_idx);
24
nvdimm_map_flush(struct device * dev,struct nvdimm * nvdimm,int dimm,struct nd_region_data * ndrd)25 static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
26 struct nd_region_data *ndrd)
27 {
28 int i, j;
29
30 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
31 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
32 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
33 struct resource *res = &nvdimm->flush_wpq[i];
34 unsigned long pfn = PHYS_PFN(res->start);
35 void __iomem *flush_page;
36
37 /* check if flush hints share a page */
38 for (j = 0; j < i; j++) {
39 struct resource *res_j = &nvdimm->flush_wpq[j];
40 unsigned long pfn_j = PHYS_PFN(res_j->start);
41
42 if (pfn == pfn_j)
43 break;
44 }
45
46 if (j < i)
47 flush_page = (void __iomem *) ((unsigned long)
48 ndrd_get_flush_wpq(ndrd, dimm, j)
49 & PAGE_MASK);
50 else
51 flush_page = devm_nvdimm_ioremap(dev,
52 PFN_PHYS(pfn), PAGE_SIZE);
53 if (!flush_page)
54 return -ENXIO;
55 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
56 + (res->start & ~PAGE_MASK));
57 }
58
59 return 0;
60 }
61
nd_region_activate(struct nd_region * nd_region)62 int nd_region_activate(struct nd_region *nd_region)
63 {
64 int i, j, num_flush = 0;
65 struct nd_region_data *ndrd;
66 struct device *dev = &nd_region->dev;
67 size_t flush_data_size = sizeof(void *);
68
69 nvdimm_bus_lock(&nd_region->dev);
70 for (i = 0; i < nd_region->ndr_mappings; i++) {
71 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
72 struct nvdimm *nvdimm = nd_mapping->nvdimm;
73
74 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
75 nvdimm_bus_unlock(&nd_region->dev);
76 return -EBUSY;
77 }
78
79 /* at least one null hint slot per-dimm for the "no-hint" case */
80 flush_data_size += sizeof(void *);
81 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
82 if (!nvdimm->num_flush)
83 continue;
84 flush_data_size += nvdimm->num_flush * sizeof(void *);
85 }
86 nvdimm_bus_unlock(&nd_region->dev);
87
88 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
89 if (!ndrd)
90 return -ENOMEM;
91 dev_set_drvdata(dev, ndrd);
92
93 if (!num_flush)
94 return 0;
95
96 ndrd->hints_shift = ilog2(num_flush);
97 for (i = 0; i < nd_region->ndr_mappings; i++) {
98 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
99 struct nvdimm *nvdimm = nd_mapping->nvdimm;
100 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
101
102 if (rc)
103 return rc;
104 }
105
106 /*
107 * Clear out entries that are duplicates. This should prevent the
108 * extra flushings.
109 */
110 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
111 /* ignore if NULL already */
112 if (!ndrd_get_flush_wpq(ndrd, i, 0))
113 continue;
114
115 for (j = i + 1; j < nd_region->ndr_mappings; j++)
116 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
117 ndrd_get_flush_wpq(ndrd, j, 0))
118 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
119 }
120
121 return 0;
122 }
123
nd_region_release(struct device * dev)124 static void nd_region_release(struct device *dev)
125 {
126 struct nd_region *nd_region = to_nd_region(dev);
127 u16 i;
128
129 for (i = 0; i < nd_region->ndr_mappings; i++) {
130 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
131 struct nvdimm *nvdimm = nd_mapping->nvdimm;
132
133 put_device(&nvdimm->dev);
134 }
135 free_percpu(nd_region->lane);
136 if (!test_bit(ND_REGION_CXL, &nd_region->flags))
137 memregion_free(nd_region->id);
138 kfree(nd_region);
139 }
140
to_nd_region(struct device * dev)141 struct nd_region *to_nd_region(struct device *dev)
142 {
143 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
144
145 WARN_ON(dev->type->release != nd_region_release);
146 return nd_region;
147 }
148 EXPORT_SYMBOL_GPL(to_nd_region);
149
nd_region_dev(struct nd_region * nd_region)150 struct device *nd_region_dev(struct nd_region *nd_region)
151 {
152 if (!nd_region)
153 return NULL;
154 return &nd_region->dev;
155 }
156 EXPORT_SYMBOL_GPL(nd_region_dev);
157
nd_region_provider_data(struct nd_region * nd_region)158 void *nd_region_provider_data(struct nd_region *nd_region)
159 {
160 return nd_region->provider_data;
161 }
162 EXPORT_SYMBOL_GPL(nd_region_provider_data);
163
164 /**
165 * nd_region_to_nstype() - region to an integer namespace type
166 * @nd_region: region-device to interrogate
167 *
168 * This is the 'nstype' attribute of a region as well, an input to the
169 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
170 * namespace devices with namespace drivers.
171 */
nd_region_to_nstype(struct nd_region * nd_region)172 int nd_region_to_nstype(struct nd_region *nd_region)
173 {
174 if (is_memory(&nd_region->dev)) {
175 u16 i, label;
176
177 for (i = 0, label = 0; i < nd_region->ndr_mappings; i++) {
178 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
179 struct nvdimm *nvdimm = nd_mapping->nvdimm;
180
181 if (test_bit(NDD_LABELING, &nvdimm->flags))
182 label++;
183 }
184 if (label)
185 return ND_DEVICE_NAMESPACE_PMEM;
186 else
187 return ND_DEVICE_NAMESPACE_IO;
188 }
189
190 return 0;
191 }
192 EXPORT_SYMBOL(nd_region_to_nstype);
193
region_size(struct nd_region * nd_region)194 static unsigned long long region_size(struct nd_region *nd_region)
195 {
196 if (is_memory(&nd_region->dev)) {
197 return nd_region->ndr_size;
198 } else if (nd_region->ndr_mappings == 1) {
199 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
200
201 return nd_mapping->size;
202 }
203
204 return 0;
205 }
206
size_show(struct device * dev,struct device_attribute * attr,char * buf)207 static ssize_t size_show(struct device *dev,
208 struct device_attribute *attr, char *buf)
209 {
210 struct nd_region *nd_region = to_nd_region(dev);
211
212 return sprintf(buf, "%llu\n", region_size(nd_region));
213 }
214 static DEVICE_ATTR_RO(size);
215
deep_flush_show(struct device * dev,struct device_attribute * attr,char * buf)216 static ssize_t deep_flush_show(struct device *dev,
217 struct device_attribute *attr, char *buf)
218 {
219 struct nd_region *nd_region = to_nd_region(dev);
220
221 /*
222 * NOTE: in the nvdimm_has_flush() error case this attribute is
223 * not visible.
224 */
225 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
226 }
227
deep_flush_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)228 static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
229 const char *buf, size_t len)
230 {
231 bool flush;
232 int rc = strtobool(buf, &flush);
233 struct nd_region *nd_region = to_nd_region(dev);
234
235 if (rc)
236 return rc;
237 if (!flush)
238 return -EINVAL;
239 rc = nvdimm_flush(nd_region, NULL);
240 if (rc)
241 return rc;
242
243 return len;
244 }
245 static DEVICE_ATTR_RW(deep_flush);
246
mappings_show(struct device * dev,struct device_attribute * attr,char * buf)247 static ssize_t mappings_show(struct device *dev,
248 struct device_attribute *attr, char *buf)
249 {
250 struct nd_region *nd_region = to_nd_region(dev);
251
252 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
253 }
254 static DEVICE_ATTR_RO(mappings);
255
nstype_show(struct device * dev,struct device_attribute * attr,char * buf)256 static ssize_t nstype_show(struct device *dev,
257 struct device_attribute *attr, char *buf)
258 {
259 struct nd_region *nd_region = to_nd_region(dev);
260
261 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
262 }
263 static DEVICE_ATTR_RO(nstype);
264
set_cookie_show(struct device * dev,struct device_attribute * attr,char * buf)265 static ssize_t set_cookie_show(struct device *dev,
266 struct device_attribute *attr, char *buf)
267 {
268 struct nd_region *nd_region = to_nd_region(dev);
269 struct nd_interleave_set *nd_set = nd_region->nd_set;
270 ssize_t rc = 0;
271
272 if (is_memory(dev) && nd_set)
273 /* pass, should be precluded by region_visible */;
274 else
275 return -ENXIO;
276
277 /*
278 * The cookie to show depends on which specification of the
279 * labels we are using. If there are not labels then default to
280 * the v1.1 namespace label cookie definition. To read all this
281 * data we need to wait for probing to settle.
282 */
283 device_lock(dev);
284 nvdimm_bus_lock(dev);
285 wait_nvdimm_bus_probe_idle(dev);
286 if (nd_region->ndr_mappings) {
287 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
288 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
289
290 if (ndd) {
291 struct nd_namespace_index *nsindex;
292
293 nsindex = to_namespace_index(ndd, ndd->ns_current);
294 rc = sprintf(buf, "%#llx\n",
295 nd_region_interleave_set_cookie(nd_region,
296 nsindex));
297 }
298 }
299 nvdimm_bus_unlock(dev);
300 device_unlock(dev);
301
302 if (rc)
303 return rc;
304 return sprintf(buf, "%#llx\n", nd_set->cookie1);
305 }
306 static DEVICE_ATTR_RO(set_cookie);
307
nd_region_available_dpa(struct nd_region * nd_region)308 resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
309 {
310 resource_size_t available;
311 int i;
312
313 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
314
315 available = 0;
316 for (i = 0; i < nd_region->ndr_mappings; i++) {
317 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
318 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
319
320 /* if a dimm is disabled the available capacity is zero */
321 if (!ndd)
322 return 0;
323
324 available += nd_pmem_available_dpa(nd_region, nd_mapping);
325 }
326
327 return available;
328 }
329
nd_region_allocatable_dpa(struct nd_region * nd_region)330 resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
331 {
332 resource_size_t avail = 0;
333 int i;
334
335 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
336 for (i = 0; i < nd_region->ndr_mappings; i++) {
337 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
338
339 avail = min_not_zero(avail, nd_pmem_max_contiguous_dpa(
340 nd_region, nd_mapping));
341 }
342 return avail * nd_region->ndr_mappings;
343 }
344
available_size_show(struct device * dev,struct device_attribute * attr,char * buf)345 static ssize_t available_size_show(struct device *dev,
346 struct device_attribute *attr, char *buf)
347 {
348 struct nd_region *nd_region = to_nd_region(dev);
349 unsigned long long available = 0;
350
351 /*
352 * Flush in-flight updates and grab a snapshot of the available
353 * size. Of course, this value is potentially invalidated the
354 * memory nvdimm_bus_lock() is dropped, but that's userspace's
355 * problem to not race itself.
356 */
357 device_lock(dev);
358 nvdimm_bus_lock(dev);
359 wait_nvdimm_bus_probe_idle(dev);
360 available = nd_region_available_dpa(nd_region);
361 nvdimm_bus_unlock(dev);
362 device_unlock(dev);
363
364 return sprintf(buf, "%llu\n", available);
365 }
366 static DEVICE_ATTR_RO(available_size);
367
max_available_extent_show(struct device * dev,struct device_attribute * attr,char * buf)368 static ssize_t max_available_extent_show(struct device *dev,
369 struct device_attribute *attr, char *buf)
370 {
371 struct nd_region *nd_region = to_nd_region(dev);
372 unsigned long long available = 0;
373
374 device_lock(dev);
375 nvdimm_bus_lock(dev);
376 wait_nvdimm_bus_probe_idle(dev);
377 available = nd_region_allocatable_dpa(nd_region);
378 nvdimm_bus_unlock(dev);
379 device_unlock(dev);
380
381 return sprintf(buf, "%llu\n", available);
382 }
383 static DEVICE_ATTR_RO(max_available_extent);
384
init_namespaces_show(struct device * dev,struct device_attribute * attr,char * buf)385 static ssize_t init_namespaces_show(struct device *dev,
386 struct device_attribute *attr, char *buf)
387 {
388 struct nd_region_data *ndrd = dev_get_drvdata(dev);
389 ssize_t rc;
390
391 nvdimm_bus_lock(dev);
392 if (ndrd)
393 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
394 else
395 rc = -ENXIO;
396 nvdimm_bus_unlock(dev);
397
398 return rc;
399 }
400 static DEVICE_ATTR_RO(init_namespaces);
401
namespace_seed_show(struct device * dev,struct device_attribute * attr,char * buf)402 static ssize_t namespace_seed_show(struct device *dev,
403 struct device_attribute *attr, char *buf)
404 {
405 struct nd_region *nd_region = to_nd_region(dev);
406 ssize_t rc;
407
408 nvdimm_bus_lock(dev);
409 if (nd_region->ns_seed)
410 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
411 else
412 rc = sprintf(buf, "\n");
413 nvdimm_bus_unlock(dev);
414 return rc;
415 }
416 static DEVICE_ATTR_RO(namespace_seed);
417
btt_seed_show(struct device * dev,struct device_attribute * attr,char * buf)418 static ssize_t btt_seed_show(struct device *dev,
419 struct device_attribute *attr, char *buf)
420 {
421 struct nd_region *nd_region = to_nd_region(dev);
422 ssize_t rc;
423
424 nvdimm_bus_lock(dev);
425 if (nd_region->btt_seed)
426 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
427 else
428 rc = sprintf(buf, "\n");
429 nvdimm_bus_unlock(dev);
430
431 return rc;
432 }
433 static DEVICE_ATTR_RO(btt_seed);
434
pfn_seed_show(struct device * dev,struct device_attribute * attr,char * buf)435 static ssize_t pfn_seed_show(struct device *dev,
436 struct device_attribute *attr, char *buf)
437 {
438 struct nd_region *nd_region = to_nd_region(dev);
439 ssize_t rc;
440
441 nvdimm_bus_lock(dev);
442 if (nd_region->pfn_seed)
443 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
444 else
445 rc = sprintf(buf, "\n");
446 nvdimm_bus_unlock(dev);
447
448 return rc;
449 }
450 static DEVICE_ATTR_RO(pfn_seed);
451
dax_seed_show(struct device * dev,struct device_attribute * attr,char * buf)452 static ssize_t dax_seed_show(struct device *dev,
453 struct device_attribute *attr, char *buf)
454 {
455 struct nd_region *nd_region = to_nd_region(dev);
456 ssize_t rc;
457
458 nvdimm_bus_lock(dev);
459 if (nd_region->dax_seed)
460 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
461 else
462 rc = sprintf(buf, "\n");
463 nvdimm_bus_unlock(dev);
464
465 return rc;
466 }
467 static DEVICE_ATTR_RO(dax_seed);
468
read_only_show(struct device * dev,struct device_attribute * attr,char * buf)469 static ssize_t read_only_show(struct device *dev,
470 struct device_attribute *attr, char *buf)
471 {
472 struct nd_region *nd_region = to_nd_region(dev);
473
474 return sprintf(buf, "%d\n", nd_region->ro);
475 }
476
revalidate_read_only(struct device * dev,void * data)477 static int revalidate_read_only(struct device *dev, void *data)
478 {
479 nd_device_notify(dev, NVDIMM_REVALIDATE_REGION);
480 return 0;
481 }
482
read_only_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)483 static ssize_t read_only_store(struct device *dev,
484 struct device_attribute *attr, const char *buf, size_t len)
485 {
486 bool ro;
487 int rc = strtobool(buf, &ro);
488 struct nd_region *nd_region = to_nd_region(dev);
489
490 if (rc)
491 return rc;
492
493 nd_region->ro = ro;
494 device_for_each_child(dev, NULL, revalidate_read_only);
495 return len;
496 }
497 static DEVICE_ATTR_RW(read_only);
498
align_show(struct device * dev,struct device_attribute * attr,char * buf)499 static ssize_t align_show(struct device *dev,
500 struct device_attribute *attr, char *buf)
501 {
502 struct nd_region *nd_region = to_nd_region(dev);
503
504 return sprintf(buf, "%#lx\n", nd_region->align);
505 }
506
align_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)507 static ssize_t align_store(struct device *dev,
508 struct device_attribute *attr, const char *buf, size_t len)
509 {
510 struct nd_region *nd_region = to_nd_region(dev);
511 unsigned long val, dpa;
512 u32 mappings, remainder;
513 int rc;
514
515 rc = kstrtoul(buf, 0, &val);
516 if (rc)
517 return rc;
518
519 /*
520 * Ensure space-align is evenly divisible by the region
521 * interleave-width because the kernel typically has no facility
522 * to determine which DIMM(s), dimm-physical-addresses, would
523 * contribute to the tail capacity in system-physical-address
524 * space for the namespace.
525 */
526 mappings = max_t(u32, 1, nd_region->ndr_mappings);
527 dpa = div_u64_rem(val, mappings, &remainder);
528 if (!is_power_of_2(dpa) || dpa < PAGE_SIZE
529 || val > region_size(nd_region) || remainder)
530 return -EINVAL;
531
532 /*
533 * Given that space allocation consults this value multiple
534 * times ensure it does not change for the duration of the
535 * allocation.
536 */
537 nvdimm_bus_lock(dev);
538 nd_region->align = val;
539 nvdimm_bus_unlock(dev);
540
541 return len;
542 }
543 static DEVICE_ATTR_RW(align);
544
region_badblocks_show(struct device * dev,struct device_attribute * attr,char * buf)545 static ssize_t region_badblocks_show(struct device *dev,
546 struct device_attribute *attr, char *buf)
547 {
548 struct nd_region *nd_region = to_nd_region(dev);
549 ssize_t rc;
550
551 device_lock(dev);
552 if (dev->driver)
553 rc = badblocks_show(&nd_region->bb, buf, 0);
554 else
555 rc = -ENXIO;
556 device_unlock(dev);
557
558 return rc;
559 }
560 static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
561
resource_show(struct device * dev,struct device_attribute * attr,char * buf)562 static ssize_t resource_show(struct device *dev,
563 struct device_attribute *attr, char *buf)
564 {
565 struct nd_region *nd_region = to_nd_region(dev);
566
567 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
568 }
569 static DEVICE_ATTR_ADMIN_RO(resource);
570
persistence_domain_show(struct device * dev,struct device_attribute * attr,char * buf)571 static ssize_t persistence_domain_show(struct device *dev,
572 struct device_attribute *attr, char *buf)
573 {
574 struct nd_region *nd_region = to_nd_region(dev);
575
576 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
577 return sprintf(buf, "cpu_cache\n");
578 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
579 return sprintf(buf, "memory_controller\n");
580 else
581 return sprintf(buf, "\n");
582 }
583 static DEVICE_ATTR_RO(persistence_domain);
584
585 static struct attribute *nd_region_attributes[] = {
586 &dev_attr_size.attr,
587 &dev_attr_align.attr,
588 &dev_attr_nstype.attr,
589 &dev_attr_mappings.attr,
590 &dev_attr_btt_seed.attr,
591 &dev_attr_pfn_seed.attr,
592 &dev_attr_dax_seed.attr,
593 &dev_attr_deep_flush.attr,
594 &dev_attr_read_only.attr,
595 &dev_attr_set_cookie.attr,
596 &dev_attr_available_size.attr,
597 &dev_attr_max_available_extent.attr,
598 &dev_attr_namespace_seed.attr,
599 &dev_attr_init_namespaces.attr,
600 &dev_attr_badblocks.attr,
601 &dev_attr_resource.attr,
602 &dev_attr_persistence_domain.attr,
603 NULL,
604 };
605
region_visible(struct kobject * kobj,struct attribute * a,int n)606 static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
607 {
608 struct device *dev = container_of(kobj, typeof(*dev), kobj);
609 struct nd_region *nd_region = to_nd_region(dev);
610 struct nd_interleave_set *nd_set = nd_region->nd_set;
611 int type = nd_region_to_nstype(nd_region);
612
613 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
614 return 0;
615
616 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
617 return 0;
618
619 if (!is_memory(dev) && a == &dev_attr_badblocks.attr)
620 return 0;
621
622 if (a == &dev_attr_resource.attr && !is_memory(dev))
623 return 0;
624
625 if (a == &dev_attr_deep_flush.attr) {
626 int has_flush = nvdimm_has_flush(nd_region);
627
628 if (has_flush == 1)
629 return a->mode;
630 else if (has_flush == 0)
631 return 0444;
632 else
633 return 0;
634 }
635
636 if (a == &dev_attr_persistence_domain.attr) {
637 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
638 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
639 return 0;
640 return a->mode;
641 }
642
643 if (a == &dev_attr_align.attr)
644 return a->mode;
645
646 if (a != &dev_attr_set_cookie.attr
647 && a != &dev_attr_available_size.attr)
648 return a->mode;
649
650 if (type == ND_DEVICE_NAMESPACE_PMEM &&
651 a == &dev_attr_available_size.attr)
652 return a->mode;
653 else if (is_memory(dev) && nd_set)
654 return a->mode;
655
656 return 0;
657 }
658
mappingN(struct device * dev,char * buf,int n)659 static ssize_t mappingN(struct device *dev, char *buf, int n)
660 {
661 struct nd_region *nd_region = to_nd_region(dev);
662 struct nd_mapping *nd_mapping;
663 struct nvdimm *nvdimm;
664
665 if (n >= nd_region->ndr_mappings)
666 return -ENXIO;
667 nd_mapping = &nd_region->mapping[n];
668 nvdimm = nd_mapping->nvdimm;
669
670 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
671 nd_mapping->start, nd_mapping->size,
672 nd_mapping->position);
673 }
674
675 #define REGION_MAPPING(idx) \
676 static ssize_t mapping##idx##_show(struct device *dev, \
677 struct device_attribute *attr, char *buf) \
678 { \
679 return mappingN(dev, buf, idx); \
680 } \
681 static DEVICE_ATTR_RO(mapping##idx)
682
683 /*
684 * 32 should be enough for a while, even in the presence of socket
685 * interleave a 32-way interleave set is a degenerate case.
686 */
687 REGION_MAPPING(0);
688 REGION_MAPPING(1);
689 REGION_MAPPING(2);
690 REGION_MAPPING(3);
691 REGION_MAPPING(4);
692 REGION_MAPPING(5);
693 REGION_MAPPING(6);
694 REGION_MAPPING(7);
695 REGION_MAPPING(8);
696 REGION_MAPPING(9);
697 REGION_MAPPING(10);
698 REGION_MAPPING(11);
699 REGION_MAPPING(12);
700 REGION_MAPPING(13);
701 REGION_MAPPING(14);
702 REGION_MAPPING(15);
703 REGION_MAPPING(16);
704 REGION_MAPPING(17);
705 REGION_MAPPING(18);
706 REGION_MAPPING(19);
707 REGION_MAPPING(20);
708 REGION_MAPPING(21);
709 REGION_MAPPING(22);
710 REGION_MAPPING(23);
711 REGION_MAPPING(24);
712 REGION_MAPPING(25);
713 REGION_MAPPING(26);
714 REGION_MAPPING(27);
715 REGION_MAPPING(28);
716 REGION_MAPPING(29);
717 REGION_MAPPING(30);
718 REGION_MAPPING(31);
719
mapping_visible(struct kobject * kobj,struct attribute * a,int n)720 static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
721 {
722 struct device *dev = container_of(kobj, struct device, kobj);
723 struct nd_region *nd_region = to_nd_region(dev);
724
725 if (n < nd_region->ndr_mappings)
726 return a->mode;
727 return 0;
728 }
729
730 static struct attribute *mapping_attributes[] = {
731 &dev_attr_mapping0.attr,
732 &dev_attr_mapping1.attr,
733 &dev_attr_mapping2.attr,
734 &dev_attr_mapping3.attr,
735 &dev_attr_mapping4.attr,
736 &dev_attr_mapping5.attr,
737 &dev_attr_mapping6.attr,
738 &dev_attr_mapping7.attr,
739 &dev_attr_mapping8.attr,
740 &dev_attr_mapping9.attr,
741 &dev_attr_mapping10.attr,
742 &dev_attr_mapping11.attr,
743 &dev_attr_mapping12.attr,
744 &dev_attr_mapping13.attr,
745 &dev_attr_mapping14.attr,
746 &dev_attr_mapping15.attr,
747 &dev_attr_mapping16.attr,
748 &dev_attr_mapping17.attr,
749 &dev_attr_mapping18.attr,
750 &dev_attr_mapping19.attr,
751 &dev_attr_mapping20.attr,
752 &dev_attr_mapping21.attr,
753 &dev_attr_mapping22.attr,
754 &dev_attr_mapping23.attr,
755 &dev_attr_mapping24.attr,
756 &dev_attr_mapping25.attr,
757 &dev_attr_mapping26.attr,
758 &dev_attr_mapping27.attr,
759 &dev_attr_mapping28.attr,
760 &dev_attr_mapping29.attr,
761 &dev_attr_mapping30.attr,
762 &dev_attr_mapping31.attr,
763 NULL,
764 };
765
766 static const struct attribute_group nd_mapping_attribute_group = {
767 .is_visible = mapping_visible,
768 .attrs = mapping_attributes,
769 };
770
771 static const struct attribute_group nd_region_attribute_group = {
772 .attrs = nd_region_attributes,
773 .is_visible = region_visible,
774 };
775
776 static const struct attribute_group *nd_region_attribute_groups[] = {
777 &nd_device_attribute_group,
778 &nd_region_attribute_group,
779 &nd_numa_attribute_group,
780 &nd_mapping_attribute_group,
781 NULL,
782 };
783
784 static const struct device_type nd_pmem_device_type = {
785 .name = "nd_pmem",
786 .release = nd_region_release,
787 .groups = nd_region_attribute_groups,
788 };
789
790 static const struct device_type nd_volatile_device_type = {
791 .name = "nd_volatile",
792 .release = nd_region_release,
793 .groups = nd_region_attribute_groups,
794 };
795
is_nd_pmem(struct device * dev)796 bool is_nd_pmem(struct device *dev)
797 {
798 return dev ? dev->type == &nd_pmem_device_type : false;
799 }
800
is_nd_volatile(struct device * dev)801 bool is_nd_volatile(struct device *dev)
802 {
803 return dev ? dev->type == &nd_volatile_device_type : false;
804 }
805
nd_region_interleave_set_cookie(struct nd_region * nd_region,struct nd_namespace_index * nsindex)806 u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
807 struct nd_namespace_index *nsindex)
808 {
809 struct nd_interleave_set *nd_set = nd_region->nd_set;
810
811 if (!nd_set)
812 return 0;
813
814 if (nsindex && __le16_to_cpu(nsindex->major) == 1
815 && __le16_to_cpu(nsindex->minor) == 1)
816 return nd_set->cookie1;
817 return nd_set->cookie2;
818 }
819
nd_region_interleave_set_altcookie(struct nd_region * nd_region)820 u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
821 {
822 struct nd_interleave_set *nd_set = nd_region->nd_set;
823
824 if (nd_set)
825 return nd_set->altcookie;
826 return 0;
827 }
828
nd_mapping_free_labels(struct nd_mapping * nd_mapping)829 void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
830 {
831 struct nd_label_ent *label_ent, *e;
832
833 lockdep_assert_held(&nd_mapping->lock);
834 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
835 list_del(&label_ent->list);
836 kfree(label_ent);
837 }
838 }
839
840 /*
841 * When a namespace is activated create new seeds for the next
842 * namespace, or namespace-personality to be configured.
843 */
nd_region_advance_seeds(struct nd_region * nd_region,struct device * dev)844 void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev)
845 {
846 nvdimm_bus_lock(dev);
847 if (nd_region->ns_seed == dev) {
848 nd_region_create_ns_seed(nd_region);
849 } else if (is_nd_btt(dev)) {
850 struct nd_btt *nd_btt = to_nd_btt(dev);
851
852 if (nd_region->btt_seed == dev)
853 nd_region_create_btt_seed(nd_region);
854 if (nd_region->ns_seed == &nd_btt->ndns->dev)
855 nd_region_create_ns_seed(nd_region);
856 } else if (is_nd_pfn(dev)) {
857 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
858
859 if (nd_region->pfn_seed == dev)
860 nd_region_create_pfn_seed(nd_region);
861 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
862 nd_region_create_ns_seed(nd_region);
863 } else if (is_nd_dax(dev)) {
864 struct nd_dax *nd_dax = to_nd_dax(dev);
865
866 if (nd_region->dax_seed == dev)
867 nd_region_create_dax_seed(nd_region);
868 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
869 nd_region_create_ns_seed(nd_region);
870 }
871 nvdimm_bus_unlock(dev);
872 }
873
874 /**
875 * nd_region_acquire_lane - allocate and lock a lane
876 * @nd_region: region id and number of lanes possible
877 *
878 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
879 * We optimize for the common case where there are 256 lanes, one
880 * per-cpu. For larger systems we need to lock to share lanes. For now
881 * this implementation assumes the cost of maintaining an allocator for
882 * free lanes is on the order of the lock hold time, so it implements a
883 * static lane = cpu % num_lanes mapping.
884 *
885 * In the case of a BTT instance on top of a BLK namespace a lane may be
886 * acquired recursively. We lock on the first instance.
887 *
888 * In the case of a BTT instance on top of PMEM, we only acquire a lane
889 * for the BTT metadata updates.
890 */
nd_region_acquire_lane(struct nd_region * nd_region)891 unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
892 {
893 unsigned int cpu, lane;
894
895 cpu = get_cpu();
896 if (nd_region->num_lanes < nr_cpu_ids) {
897 struct nd_percpu_lane *ndl_lock, *ndl_count;
898
899 lane = cpu % nd_region->num_lanes;
900 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
901 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
902 if (ndl_count->count++ == 0)
903 spin_lock(&ndl_lock->lock);
904 } else
905 lane = cpu;
906
907 return lane;
908 }
909 EXPORT_SYMBOL(nd_region_acquire_lane);
910
nd_region_release_lane(struct nd_region * nd_region,unsigned int lane)911 void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
912 {
913 if (nd_region->num_lanes < nr_cpu_ids) {
914 unsigned int cpu = get_cpu();
915 struct nd_percpu_lane *ndl_lock, *ndl_count;
916
917 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
918 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
919 if (--ndl_count->count == 0)
920 spin_unlock(&ndl_lock->lock);
921 put_cpu();
922 }
923 put_cpu();
924 }
925 EXPORT_SYMBOL(nd_region_release_lane);
926
927 /*
928 * PowerPC requires this alignment for memremap_pages(). All other archs
929 * should be ok with SUBSECTION_SIZE (see memremap_compat_align()).
930 */
931 #define MEMREMAP_COMPAT_ALIGN_MAX SZ_16M
932
default_align(struct nd_region * nd_region)933 static unsigned long default_align(struct nd_region *nd_region)
934 {
935 unsigned long align;
936 u32 remainder;
937 int mappings;
938
939 align = MEMREMAP_COMPAT_ALIGN_MAX;
940 if (nd_region->ndr_size < MEMREMAP_COMPAT_ALIGN_MAX)
941 align = PAGE_SIZE;
942
943 mappings = max_t(u16, 1, nd_region->ndr_mappings);
944 div_u64_rem(align, mappings, &remainder);
945 if (remainder)
946 align *= mappings;
947
948 return align;
949 }
950
951 static struct lock_class_key nvdimm_region_key;
952
nd_region_create(struct nvdimm_bus * nvdimm_bus,struct nd_region_desc * ndr_desc,const struct device_type * dev_type,const char * caller)953 static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
954 struct nd_region_desc *ndr_desc,
955 const struct device_type *dev_type, const char *caller)
956 {
957 struct nd_region *nd_region;
958 struct device *dev;
959 unsigned int i;
960 int ro = 0;
961
962 for (i = 0; i < ndr_desc->num_mappings; i++) {
963 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
964 struct nvdimm *nvdimm = mapping->nvdimm;
965
966 if ((mapping->start | mapping->size) % PAGE_SIZE) {
967 dev_err(&nvdimm_bus->dev,
968 "%s: %s mapping%d is not %ld aligned\n",
969 caller, dev_name(&nvdimm->dev), i, PAGE_SIZE);
970 return NULL;
971 }
972
973 if (test_bit(NDD_UNARMED, &nvdimm->flags))
974 ro = 1;
975
976 }
977
978 nd_region =
979 kzalloc(struct_size(nd_region, mapping, ndr_desc->num_mappings),
980 GFP_KERNEL);
981
982 if (!nd_region)
983 return NULL;
984 /* CXL pre-assigns memregion ids before creating nvdimm regions */
985 if (test_bit(ND_REGION_CXL, &ndr_desc->flags)) {
986 nd_region->id = ndr_desc->memregion;
987 } else {
988 nd_region->id = memregion_alloc(GFP_KERNEL);
989 if (nd_region->id < 0)
990 goto err_id;
991 }
992
993 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
994 if (!nd_region->lane)
995 goto err_percpu;
996
997 for (i = 0; i < nr_cpu_ids; i++) {
998 struct nd_percpu_lane *ndl;
999
1000 ndl = per_cpu_ptr(nd_region->lane, i);
1001 spin_lock_init(&ndl->lock);
1002 ndl->count = 0;
1003 }
1004
1005 for (i = 0; i < ndr_desc->num_mappings; i++) {
1006 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1007 struct nvdimm *nvdimm = mapping->nvdimm;
1008
1009 nd_region->mapping[i].nvdimm = nvdimm;
1010 nd_region->mapping[i].start = mapping->start;
1011 nd_region->mapping[i].size = mapping->size;
1012 nd_region->mapping[i].position = mapping->position;
1013 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1014 mutex_init(&nd_region->mapping[i].lock);
1015
1016 get_device(&nvdimm->dev);
1017 }
1018 nd_region->ndr_mappings = ndr_desc->num_mappings;
1019 nd_region->provider_data = ndr_desc->provider_data;
1020 nd_region->nd_set = ndr_desc->nd_set;
1021 nd_region->num_lanes = ndr_desc->num_lanes;
1022 nd_region->flags = ndr_desc->flags;
1023 nd_region->ro = ro;
1024 nd_region->numa_node = ndr_desc->numa_node;
1025 nd_region->target_node = ndr_desc->target_node;
1026 ida_init(&nd_region->ns_ida);
1027 ida_init(&nd_region->btt_ida);
1028 ida_init(&nd_region->pfn_ida);
1029 ida_init(&nd_region->dax_ida);
1030 dev = &nd_region->dev;
1031 dev_set_name(dev, "region%d", nd_region->id);
1032 dev->parent = &nvdimm_bus->dev;
1033 dev->type = dev_type;
1034 dev->groups = ndr_desc->attr_groups;
1035 dev->of_node = ndr_desc->of_node;
1036 nd_region->ndr_size = resource_size(ndr_desc->res);
1037 nd_region->ndr_start = ndr_desc->res->start;
1038 nd_region->align = default_align(nd_region);
1039 if (ndr_desc->flush)
1040 nd_region->flush = ndr_desc->flush;
1041 else
1042 nd_region->flush = NULL;
1043
1044 device_initialize(dev);
1045 lockdep_set_class(&dev->mutex, &nvdimm_region_key);
1046 nd_device_register(dev);
1047
1048 return nd_region;
1049
1050 err_percpu:
1051 if (!test_bit(ND_REGION_CXL, &ndr_desc->flags))
1052 memregion_free(nd_region->id);
1053 err_id:
1054 kfree(nd_region);
1055 return NULL;
1056 }
1057
nvdimm_pmem_region_create(struct nvdimm_bus * nvdimm_bus,struct nd_region_desc * ndr_desc)1058 struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1059 struct nd_region_desc *ndr_desc)
1060 {
1061 ndr_desc->num_lanes = ND_MAX_LANES;
1062 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1063 __func__);
1064 }
1065 EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1066
nvdimm_volatile_region_create(struct nvdimm_bus * nvdimm_bus,struct nd_region_desc * ndr_desc)1067 struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1068 struct nd_region_desc *ndr_desc)
1069 {
1070 ndr_desc->num_lanes = ND_MAX_LANES;
1071 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1072 __func__);
1073 }
1074 EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
1075
nvdimm_region_delete(struct nd_region * nd_region)1076 void nvdimm_region_delete(struct nd_region *nd_region)
1077 {
1078 if (nd_region)
1079 nd_device_unregister(&nd_region->dev, ND_SYNC);
1080 }
1081 EXPORT_SYMBOL_GPL(nvdimm_region_delete);
1082
nvdimm_flush(struct nd_region * nd_region,struct bio * bio)1083 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1084 {
1085 int rc = 0;
1086
1087 if (!nd_region->flush)
1088 rc = generic_nvdimm_flush(nd_region);
1089 else {
1090 if (nd_region->flush(nd_region, bio))
1091 rc = -EIO;
1092 }
1093
1094 return rc;
1095 }
1096 /**
1097 * generic_nvdimm_flush() - flush any posted write queues between the cpu and pmem media
1098 * @nd_region: interleaved pmem region
1099 */
generic_nvdimm_flush(struct nd_region * nd_region)1100 int generic_nvdimm_flush(struct nd_region *nd_region)
1101 {
1102 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
1103 int i, idx;
1104
1105 /*
1106 * Try to encourage some diversity in flush hint addresses
1107 * across cpus assuming a limited number of flush hints.
1108 */
1109 idx = this_cpu_read(flush_idx);
1110 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
1111
1112 /*
1113 * The pmem_wmb() is needed to 'sfence' all
1114 * previous writes such that they are architecturally visible for
1115 * the platform buffer flush. Note that we've already arranged for pmem
1116 * writes to avoid the cache via memcpy_flushcache(). The final
1117 * wmb() ensures ordering for the NVDIMM flush write.
1118 */
1119 pmem_wmb();
1120 for (i = 0; i < nd_region->ndr_mappings; i++)
1121 if (ndrd_get_flush_wpq(ndrd, i, 0))
1122 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
1123 wmb();
1124
1125 return 0;
1126 }
1127 EXPORT_SYMBOL_GPL(nvdimm_flush);
1128
1129 /**
1130 * nvdimm_has_flush - determine write flushing requirements
1131 * @nd_region: interleaved pmem region
1132 *
1133 * Returns 1 if writes require flushing
1134 * Returns 0 if writes do not require flushing
1135 * Returns -ENXIO if flushing capability can not be determined
1136 */
nvdimm_has_flush(struct nd_region * nd_region)1137 int nvdimm_has_flush(struct nd_region *nd_region)
1138 {
1139 int i;
1140
1141 /* no nvdimm or pmem api == flushing capability unknown */
1142 if (nd_region->ndr_mappings == 0
1143 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
1144 return -ENXIO;
1145
1146 /* Test if an explicit flush function is defined */
1147 if (test_bit(ND_REGION_ASYNC, &nd_region->flags) && nd_region->flush)
1148 return 1;
1149
1150 /* Test if any flush hints for the region are available */
1151 for (i = 0; i < nd_region->ndr_mappings; i++) {
1152 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1153 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1154
1155 /* flush hints present / available */
1156 if (nvdimm->num_flush)
1157 return 1;
1158 }
1159
1160 /*
1161 * The platform defines dimm devices without hints nor explicit flush,
1162 * assume platform persistence mechanism like ADR
1163 */
1164 return 0;
1165 }
1166 EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1167
nvdimm_has_cache(struct nd_region * nd_region)1168 int nvdimm_has_cache(struct nd_region *nd_region)
1169 {
1170 return is_nd_pmem(&nd_region->dev) &&
1171 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
1172 }
1173 EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1174
is_nvdimm_sync(struct nd_region * nd_region)1175 bool is_nvdimm_sync(struct nd_region *nd_region)
1176 {
1177 if (is_nd_volatile(&nd_region->dev))
1178 return true;
1179
1180 return is_nd_pmem(&nd_region->dev) &&
1181 !test_bit(ND_REGION_ASYNC, &nd_region->flags);
1182 }
1183 EXPORT_SYMBOL_GPL(is_nvdimm_sync);
1184
1185 struct conflict_context {
1186 struct nd_region *nd_region;
1187 resource_size_t start, size;
1188 };
1189
region_conflict(struct device * dev,void * data)1190 static int region_conflict(struct device *dev, void *data)
1191 {
1192 struct nd_region *nd_region;
1193 struct conflict_context *ctx = data;
1194 resource_size_t res_end, region_end, region_start;
1195
1196 if (!is_memory(dev))
1197 return 0;
1198
1199 nd_region = to_nd_region(dev);
1200 if (nd_region == ctx->nd_region)
1201 return 0;
1202
1203 res_end = ctx->start + ctx->size;
1204 region_start = nd_region->ndr_start;
1205 region_end = region_start + nd_region->ndr_size;
1206 if (ctx->start >= region_start && ctx->start < region_end)
1207 return -EBUSY;
1208 if (res_end > region_start && res_end <= region_end)
1209 return -EBUSY;
1210 return 0;
1211 }
1212
nd_region_conflict(struct nd_region * nd_region,resource_size_t start,resource_size_t size)1213 int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1214 resource_size_t size)
1215 {
1216 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1217 struct conflict_context ctx = {
1218 .nd_region = nd_region,
1219 .start = start,
1220 .size = size,
1221 };
1222
1223 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
1224 }
1225