1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2022 Intel Corporation. All rights reserved.
7 //
8 // Authors: Rander Wang <rander.wang@linux.intel.com>
9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
10 //
11 #include <sound/sof/header.h>
12 #include <sound/sof/ipc4/header.h>
13 #include "sof-priv.h"
14 #include "sof-audio.h"
15 #include "ipc4-priv.h"
16 #include "ops.h"
17
18 #ifdef DEBUG_VERBOSE
19 #define sof_ipc4_dump_payload(sdev, ipc_data, size) \
20 print_hex_dump_debug("Message payload: ", \
21 DUMP_PREFIX_OFFSET, \
22 16, 4, ipc_data, size, false)
23 #else
24 #define sof_ipc4_dump_payload(sdev, ipc_data, size) do { } while (0)
25 #endif
26
27 static const struct sof_ipc4_fw_status {
28 int status;
29 char *msg;
30 } ipc4_status[] = {
31 {0, "The operation was successful"},
32 {1, "Invalid parameter specified"},
33 {2, "Unknown message type specified"},
34 {3, "Not enough space in the IPC reply buffer to complete the request"},
35 {4, "The system or resource is busy"},
36 {5, "Replaced ADSP IPC PENDING (unused)"},
37 {6, "Unknown error while processing the request"},
38 {7, "Unsupported operation requested"},
39 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"},
40 {9, "Specified resource not found"},
41 {10, "A resource's ID requested to be created is already assigned"},
42 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
43 {12, "Required resource is in invalid state"},
44 {13, "Requested power transition failed to complete"},
45 {14, "Manifest of the library being loaded is invalid"},
46 {15, "Requested service or data is unavailable on the target platform"},
47 {42, "Library target address is out of storage memory range"},
48 {43, "Reserved"},
49 {44, "Image verification by CSE failed"},
50 {100, "General module management error"},
51 {101, "Module loading failed"},
52 {102, "Integrity check of the loaded module content failed"},
53 {103, "Attempt to unload code of the module in use"},
54 {104, "Other failure of module instance initialization request"},
55 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
56 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"},
57 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"},
58 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"},
59 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"},
60 {110, "Invalid (out of range) module ID provided"},
61 {111, "Invalid module instance ID provided"},
62 {112, "Invalid queue (pin) ID provided"},
63 {113, "Invalid destination queue (pin) ID provided"},
64 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"},
65 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"},
66 {116, "Invalid target code ID provided"},
67 {117, "Injection DMA buffer is too small for probing the input pin"},
68 {118, "Extraction DMA buffer is too small for probing the output pin"},
69 {120, "Invalid ID of configuration item provided in TLV list"},
70 {121, "Invalid length of configuration item provided in TLV list"},
71 {122, "Invalid structure of configuration item provided"},
72 {140, "Initialization of DMA Gateway failed"},
73 {141, "Invalid ID of gateway provided"},
74 {142, "Setting state of DMA Gateway failed"},
75 {143, "DMA_CONTROL message targeting gateway not allocated yet"},
76 {150, "Attempt to configure SCLK while I2S port is running"},
77 {151, "Attempt to configure MCLK while I2S port is running"},
78 {152, "Attempt to stop SCLK that is not running"},
79 {153, "Attempt to stop MCLK that is not running"},
80 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"},
81 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"},
82 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"},
83 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"},
84 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"},
85 };
86
sof_ipc4_check_reply_status(struct snd_sof_dev * sdev,u32 status)87 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status)
88 {
89 int i, ret;
90
91 status &= SOF_IPC4_REPLY_STATUS;
92
93 if (!status)
94 return 0;
95
96 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) {
97 if (ipc4_status[i].status == status) {
98 dev_err(sdev->dev, "FW reported error: %u - %s\n",
99 status, ipc4_status[i].msg);
100 goto to_errno;
101 }
102 }
103
104 if (i == ARRAY_SIZE(ipc4_status))
105 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status);
106
107 to_errno:
108 switch (status) {
109 case 8:
110 case 11:
111 case 105 ... 109:
112 case 114 ... 115:
113 case 160 ... 163:
114 case 165:
115 ret = -ENOENT;
116 break;
117 case 4:
118 case 150:
119 case 151:
120 ret = -EBUSY;
121 break;
122 default:
123 ret = -EINVAL;
124 break;
125 }
126
127 return ret;
128 }
129
130 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
131 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type
132 static const char * const ipc4_dbg_mod_msg_type[] = {
133 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE),
134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET),
135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET),
136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET),
137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET),
138 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND),
139 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND),
140 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX),
141 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX),
142 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE),
143 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE),
144 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE),
145 };
146
147 static const char * const ipc4_dbg_glb_msg_type[] = {
148 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG),
149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL),
150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD),
151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD),
152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA),
153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES),
154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES),
155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE),
156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE),
157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE),
158 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE),
159 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE),
160 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE),
161 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE),
162 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY),
163 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE),
164 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION),
165 };
166
167 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type
168 static const char * const ipc4_dbg_notification_type[] = {
169 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED),
170 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT),
171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS),
172 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED),
173 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY),
174 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT),
175 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT),
176 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION),
177 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE),
178 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE),
179 };
180
sof_ipc4_log_header(struct device * dev,u8 * text,struct sof_ipc4_msg * msg,bool data_size_valid)181 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
182 bool data_size_valid)
183 {
184 u32 val, type;
185 const u8 *str2 = NULL;
186 const u8 *str = NULL;
187
188 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK;
189 type = SOF_IPC4_MSG_TYPE_GET(msg->primary);
190
191 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) {
192 /* Module message */
193 if (type < SOF_IPC4_MOD_TYPE_LAST)
194 str = ipc4_dbg_mod_msg_type[type];
195 if (!str)
196 str = "Unknown Module message type";
197 } else {
198 /* Global FW message */
199 if (type < SOF_IPC4_GLB_TYPE_LAST)
200 str = ipc4_dbg_glb_msg_type[type];
201 if (!str)
202 str = "Unknown Global message type";
203
204 if (type == SOF_IPC4_GLB_NOTIFICATION) {
205 /* Notification message */
206 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary);
207
208 /* Do not print log buffer notification if not desired */
209 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS &&
210 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
211 return;
212
213 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST)
214 str2 = ipc4_dbg_notification_type[notif];
215 if (!str2)
216 str2 = "Unknown Global notification";
217 }
218 }
219
220 if (str2) {
221 if (data_size_valid && msg->data_size)
222 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n",
223 text, msg->primary, msg->extension, str, str2,
224 msg->data_size);
225 else
226 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary,
227 msg->extension, str, str2);
228 } else {
229 if (data_size_valid && msg->data_size)
230 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n",
231 text, msg->primary, msg->extension, str,
232 msg->data_size);
233 else
234 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary,
235 msg->extension, str);
236 }
237 }
238 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */
sof_ipc4_log_header(struct device * dev,u8 * text,struct sof_ipc4_msg * msg,bool data_size_valid)239 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
240 bool data_size_valid)
241 {
242 /* Do not print log buffer notification if not desired */
243 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) &&
244 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) &&
245 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION &&
246 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS)
247 return;
248
249 if (data_size_valid && msg->data_size)
250 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text,
251 msg->primary, msg->extension, msg->data_size);
252 else
253 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension);
254 }
255 #endif
256
sof_ipc4_get_reply(struct snd_sof_dev * sdev)257 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev)
258 {
259 struct snd_sof_ipc_msg *msg = sdev->msg;
260 struct sof_ipc4_msg *ipc4_reply;
261 int ret;
262
263 /* get the generic reply */
264 ipc4_reply = msg->reply_data;
265
266 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false);
267
268 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary);
269 if (ret)
270 return ret;
271
272 /* No other information is expected for non large config get replies */
273 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) ||
274 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET))
275 return 0;
276
277 /* Read the requested payload */
278 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr,
279 msg->reply_size);
280
281 return 0;
282 }
283
284 /* wait for IPC message reply */
ipc4_wait_tx_done(struct snd_sof_ipc * ipc,void * reply_data)285 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
286 {
287 struct snd_sof_ipc_msg *msg = &ipc->msg;
288 struct sof_ipc4_msg *ipc4_msg = msg->msg_data;
289 struct snd_sof_dev *sdev = ipc->sdev;
290 int ret;
291
292 /* wait for DSP IPC completion */
293 ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
294 msecs_to_jiffies(sdev->ipc_timeout));
295 if (ret == 0) {
296 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n",
297 ipc4_msg->primary, ipc4_msg->extension);
298 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
299 return -ETIMEDOUT;
300 }
301
302 if (msg->reply_error) {
303 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n",
304 ipc4_msg->primary, ipc4_msg->extension);
305 ret = msg->reply_error;
306 } else {
307 if (reply_data) {
308 struct sof_ipc4_msg *ipc4_reply = msg->reply_data;
309 struct sof_ipc4_msg *ipc4_reply_data = reply_data;
310
311 /* Copy the header */
312 ipc4_reply_data->header_u64 = ipc4_reply->header_u64;
313 if (msg->reply_size && ipc4_reply_data->data_ptr) {
314 /* copy the payload returned from DSP */
315 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr,
316 msg->reply_size);
317 ipc4_reply_data->data_size = msg->reply_size;
318 }
319 }
320
321 ret = 0;
322 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true);
323 }
324
325 /* re-enable dumps after successful IPC tx */
326 if (sdev->ipc_dump_printed) {
327 sdev->dbg_dump_printed = false;
328 sdev->ipc_dump_printed = false;
329 }
330
331 return ret;
332 }
333
ipc4_tx_msg_unlocked(struct snd_sof_ipc * ipc,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)334 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc,
335 void *msg_data, size_t msg_bytes,
336 void *reply_data, size_t reply_bytes)
337 {
338 struct sof_ipc4_msg *ipc4_msg = msg_data;
339 struct snd_sof_dev *sdev = ipc->sdev;
340 int ret;
341
342 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size)
343 return -EINVAL;
344
345 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
346 if (ret) {
347 dev_err_ratelimited(sdev->dev,
348 "%s: ipc message send for %#x|%#x failed: %d\n",
349 __func__, ipc4_msg->primary, ipc4_msg->extension, ret);
350 return ret;
351 }
352
353 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true);
354
355 /* now wait for completion */
356 return ipc4_wait_tx_done(ipc, reply_data);
357 }
358
sof_ipc4_tx_msg(struct snd_sof_dev * sdev,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes,bool no_pm)359 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
360 void *reply_data, size_t reply_bytes, bool no_pm)
361 {
362 struct snd_sof_ipc *ipc = sdev->ipc;
363 #ifdef DEBUG_VERBOSE
364 struct sof_ipc4_msg *msg = NULL;
365 #endif
366 int ret;
367
368 if (!msg_data)
369 return -EINVAL;
370
371 /* Serialise IPC TX */
372 mutex_lock(&ipc->tx_mutex);
373
374 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
375
376 mutex_unlock(&ipc->tx_mutex);
377
378 #ifdef DEBUG_VERBOSE
379 /* payload is indicated by non zero msg/reply_bytes */
380 if (msg_bytes)
381 msg = msg_data;
382 else if (reply_bytes)
383 msg = reply_data;
384
385 if (msg)
386 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size);
387 #endif
388
389 return ret;
390 }
391
sof_ipc4_set_get_data(struct snd_sof_dev * sdev,void * data,size_t payload_bytes,bool set)392 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data,
393 size_t payload_bytes, bool set)
394 {
395 size_t payload_limit = sdev->ipc->max_payload_size;
396 struct sof_ipc4_msg *ipc4_msg = data;
397 struct sof_ipc4_msg tx = {{ 0 }};
398 struct sof_ipc4_msg rx = {{ 0 }};
399 size_t remaining = payload_bytes;
400 size_t offset = 0;
401 size_t chunk_size;
402 int ret;
403
404 if (!data)
405 return -EINVAL;
406
407 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) !=
408 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG))
409 return -EINVAL;
410
411 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK;
412 tx.primary = ipc4_msg->primary;
413 tx.extension = ipc4_msg->extension;
414
415 if (set)
416 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET);
417 else
418 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET);
419
420 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
421 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes);
422
423 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1);
424
425 /* Serialise IPC TX */
426 mutex_lock(&sdev->ipc->tx_mutex);
427
428 do {
429 size_t tx_size, rx_size;
430
431 if (remaining > payload_limit) {
432 chunk_size = payload_limit;
433 } else {
434 chunk_size = remaining;
435 if (set)
436 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1);
437 }
438
439 if (offset) {
440 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK;
441 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
442 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset);
443 }
444
445 if (set) {
446 tx.data_size = chunk_size;
447 tx.data_ptr = ipc4_msg->data_ptr + offset;
448
449 tx_size = chunk_size;
450 rx_size = 0;
451 } else {
452 rx.primary = 0;
453 rx.extension = 0;
454 rx.data_size = chunk_size;
455 rx.data_ptr = ipc4_msg->data_ptr + offset;
456
457 tx_size = 0;
458 rx_size = chunk_size;
459 }
460
461 /* Send the message for the current chunk */
462 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size);
463 if (ret < 0) {
464 dev_err(sdev->dev,
465 "%s: large config %s failed at offset %zu: %d\n",
466 __func__, set ? "set" : "get", offset, ret);
467 goto out;
468 }
469
470 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) {
471 /* Verify the firmware reported total payload size */
472 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
473
474 if (rx_size > payload_bytes) {
475 dev_err(sdev->dev,
476 "%s: Receive buffer (%zu) is too small for %zu\n",
477 __func__, payload_bytes, rx_size);
478 ret = -ENOMEM;
479 goto out;
480 }
481
482 if (rx_size < chunk_size) {
483 chunk_size = rx_size;
484 remaining = rx_size;
485 } else if (rx_size < payload_bytes) {
486 remaining = rx_size;
487 }
488 }
489
490 offset += chunk_size;
491 remaining -= chunk_size;
492 } while (remaining);
493
494 /* Adjust the received data size if needed */
495 if (!set && payload_bytes != offset)
496 ipc4_msg->data_size = offset;
497
498 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size);
499
500 out:
501 mutex_unlock(&sdev->ipc->tx_mutex);
502
503 return ret;
504 }
505
sof_ipc4_init_msg_memory(struct snd_sof_dev * sdev)506 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev)
507 {
508 struct sof_ipc4_msg *ipc4_msg;
509 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
510
511 /* TODO: get max_payload_size from firmware */
512 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE;
513
514 /* Allocate memory for the ipc4 container and the maximum payload */
515 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size +
516 sizeof(struct sof_ipc4_msg), GFP_KERNEL);
517 if (!msg->reply_data)
518 return -ENOMEM;
519
520 ipc4_msg = msg->reply_data;
521 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg);
522
523 return 0;
524 }
525
ipc4_fw_ready(struct snd_sof_dev * sdev,struct sof_ipc4_msg * ipc4_msg)526 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg)
527 {
528 int inbox_offset, inbox_size, outbox_offset, outbox_size;
529
530 /* no need to re-check version/ABI for subsequent boots */
531 if (!sdev->first_boot)
532 return 0;
533
534 /* Set up the windows for IPC communication */
535 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev);
536 if (inbox_offset < 0) {
537 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__);
538 return inbox_offset;
539 }
540 inbox_size = SOF_IPC4_MSG_MAX_SIZE;
541 outbox_offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_OUTBOX_WINDOW_IDX);
542 outbox_size = SOF_IPC4_MSG_MAX_SIZE;
543
544 sdev->dsp_box.offset = inbox_offset;
545 sdev->dsp_box.size = inbox_size;
546 sdev->host_box.offset = outbox_offset;
547 sdev->host_box.size = outbox_size;
548
549 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev,
550 SOF_IPC4_DEBUG_WINDOW_IDX);
551
552 dev_dbg(sdev->dev, "mailbox upstream 0x%x - size 0x%x\n",
553 inbox_offset, inbox_size);
554 dev_dbg(sdev->dev, "mailbox downstream 0x%x - size 0x%x\n",
555 outbox_offset, outbox_size);
556 dev_dbg(sdev->dev, "debug box 0x%x\n", sdev->debug_box.offset);
557
558 return sof_ipc4_init_msg_memory(sdev);
559 }
560
sof_ipc4_rx_msg(struct snd_sof_dev * sdev)561 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev)
562 {
563 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data;
564 size_t data_size = 0;
565 int err;
566
567 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary))
568 return;
569
570 ipc4_msg->data_ptr = NULL;
571 ipc4_msg->data_size = 0;
572
573 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false);
574
575 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) {
576 case SOF_IPC4_NOTIFY_FW_READY:
577 /* check for FW boot completion */
578 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
579 err = ipc4_fw_ready(sdev, ipc4_msg);
580 if (err < 0)
581 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
582 else
583 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
584
585 /* wake up firmware loader */
586 wake_up(&sdev->boot_wait);
587 }
588
589 break;
590 case SOF_IPC4_NOTIFY_RESOURCE_EVENT:
591 data_size = sizeof(struct sof_ipc4_notify_resource_data);
592 break;
593 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS:
594 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary));
595 break;
596 default:
597 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n",
598 ipc4_msg->primary, ipc4_msg->extension);
599 break;
600 }
601
602 if (data_size) {
603 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL);
604 if (!ipc4_msg->data_ptr)
605 return;
606
607 ipc4_msg->data_size = data_size;
608 snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size);
609 }
610
611 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true);
612
613 if (data_size) {
614 kfree(ipc4_msg->data_ptr);
615 ipc4_msg->data_ptr = NULL;
616 ipc4_msg->data_size = 0;
617 }
618 }
619
sof_ipc4_set_core_state(struct snd_sof_dev * sdev,int core_idx,bool on)620 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
621 {
622 struct sof_ipc4_dx_state_info dx_state;
623 struct sof_ipc4_msg msg;
624
625 dx_state.core_mask = BIT(core_idx);
626 if (on)
627 dx_state.dx_mask = BIT(core_idx);
628 else
629 dx_state.dx_mask = 0;
630
631 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX);
632 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
633 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
634 msg.extension = 0;
635 msg.data_ptr = &dx_state;
636 msg.data_size = sizeof(dx_state);
637
638 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false);
639 }
640
641 /*
642 * The context save callback is used to send a message to the firmware notifying
643 * it that the primary core is going to be turned off, which is used as an
644 * indication to prepare for a full power down, thus preparing for IMR boot
645 * (when supported)
646 *
647 * Note: in IPC4 there is no message used to restore context, thus no context
648 * restore callback is implemented
649 */
sof_ipc4_ctx_save(struct snd_sof_dev * sdev)650 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
651 {
652 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
653 }
654
655 static const struct sof_ipc_pm_ops ipc4_pm_ops = {
656 .ctx_save = sof_ipc4_ctx_save,
657 .set_core_state = sof_ipc4_set_core_state,
658 };
659
660 const struct sof_ipc_ops ipc4_ops = {
661 .tx_msg = sof_ipc4_tx_msg,
662 .rx_msg = sof_ipc4_rx_msg,
663 .set_get_data = sof_ipc4_set_get_data,
664 .get_reply = sof_ipc4_get_reply,
665 .pm = &ipc4_pm_ops,
666 .fw_loader = &ipc4_loader_ops,
667 .tplg = &ipc4_tplg_ops,
668 .pcm = &ipc4_pcm_ops,
669 .fw_tracing = &ipc4_mtrace_ops,
670 };
671