1 // SPDX-License-Identifier: GPL-2.0
2 
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2018-2020 Linaro Ltd.
5  */
6 
7 /* DOC: IPA Interrupts
8  *
9  * The IPA has an interrupt line distinct from the interrupt used by the GSI
10  * code.  Whereas GSI interrupts are generally related to channel events (like
11  * transfer completions), IPA interrupts are related to other events related
12  * to the IPA.  Some of the IPA interrupts come from a microcontroller
13  * embedded in the IPA.  Each IPA interrupt type can be both masked and
14  * acknowledged independent of the others.
15  *
16  * Two of the IPA interrupts are initiated by the microcontroller.  A third
17  * can be generated to signal the need for a wakeup/resume when an IPA
18  * endpoint has been suspended.  There are other IPA events, but at this
19  * time only these three are supported.
20  */
21 
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/pm_runtime.h>
25 
26 #include "ipa.h"
27 #include "ipa_reg.h"
28 #include "ipa_endpoint.h"
29 #include "ipa_interrupt.h"
30 
31 /**
32  * struct ipa_interrupt - IPA interrupt information
33  * @ipa:		IPA pointer
34  * @irq:		Linux IRQ number used for IPA interrupts
35  * @enabled:		Mask indicating which interrupts are enabled
36  * @handler:		Array of handlers indexed by IPA interrupt ID
37  */
38 struct ipa_interrupt {
39 	struct ipa *ipa;
40 	u32 irq;
41 	u32 enabled;
42 	ipa_irq_handler_t handler[IPA_IRQ_COUNT];
43 };
44 
45 /* Returns true if the interrupt type is associated with the microcontroller */
ipa_interrupt_uc(struct ipa_interrupt * interrupt,u32 irq_id)46 static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id)
47 {
48 	return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1;
49 }
50 
51 /* Process a particular interrupt type that has been received */
ipa_interrupt_process(struct ipa_interrupt * interrupt,u32 irq_id)52 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
53 {
54 	bool uc_irq = ipa_interrupt_uc(interrupt, irq_id);
55 	struct ipa *ipa = interrupt->ipa;
56 	u32 mask = BIT(irq_id);
57 	u32 offset;
58 
59 	/* For microcontroller interrupts, clear the interrupt right away,
60 	 * "to avoid clearing unhandled interrupts."
61 	 */
62 	offset = ipa_reg_irq_clr_offset(ipa->version);
63 	if (uc_irq)
64 		iowrite32(mask, ipa->reg_virt + offset);
65 
66 	if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id])
67 		interrupt->handler[irq_id](interrupt->ipa, irq_id);
68 
69 	/* Clearing the SUSPEND_TX interrupt also clears the register
70 	 * that tells us which suspended endpoint(s) caused the interrupt,
71 	 * so defer clearing until after the handler has been called.
72 	 */
73 	if (!uc_irq)
74 		iowrite32(mask, ipa->reg_virt + offset);
75 }
76 
77 /* IPA IRQ handler is threaded */
ipa_isr_thread(int irq,void * dev_id)78 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
79 {
80 	struct ipa_interrupt *interrupt = dev_id;
81 	struct ipa *ipa = interrupt->ipa;
82 	u32 enabled = interrupt->enabled;
83 	struct device *dev;
84 	u32 pending;
85 	u32 offset;
86 	u32 mask;
87 	int ret;
88 
89 	dev = &ipa->pdev->dev;
90 	ret = pm_runtime_get_sync(dev);
91 	if (WARN_ON(ret < 0))
92 		goto out_power_put;
93 
94 	/* The status register indicates which conditions are present,
95 	 * including conditions whose interrupt is not enabled.  Handle
96 	 * only the enabled ones.
97 	 */
98 	offset = ipa_reg_irq_stts_offset(ipa->version);
99 	pending = ioread32(ipa->reg_virt + offset);
100 	while ((mask = pending & enabled)) {
101 		do {
102 			u32 irq_id = __ffs(mask);
103 
104 			mask ^= BIT(irq_id);
105 
106 			ipa_interrupt_process(interrupt, irq_id);
107 		} while (mask);
108 		pending = ioread32(ipa->reg_virt + offset);
109 	}
110 
111 	/* If any disabled interrupts are pending, clear them */
112 	if (pending) {
113 		dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
114 			pending);
115 		offset = ipa_reg_irq_clr_offset(ipa->version);
116 		iowrite32(pending, ipa->reg_virt + offset);
117 	}
118 out_power_put:
119 	pm_runtime_mark_last_busy(dev);
120 	(void)pm_runtime_put_autosuspend(dev);
121 
122 	return IRQ_HANDLED;
123 }
124 
125 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
ipa_interrupt_suspend_control(struct ipa_interrupt * interrupt,u32 endpoint_id,bool enable)126 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
127 					  u32 endpoint_id, bool enable)
128 {
129 	struct ipa *ipa = interrupt->ipa;
130 	u32 mask = BIT(endpoint_id);
131 	u32 offset;
132 	u32 val;
133 
134 	WARN_ON(!(mask & ipa->available));
135 
136 	/* IPA version 3.0 does not support TX_SUSPEND interrupt control */
137 	if (ipa->version == IPA_VERSION_3_0)
138 		return;
139 
140 	offset = ipa_reg_irq_suspend_en_offset(ipa->version);
141 	val = ioread32(ipa->reg_virt + offset);
142 	if (enable)
143 		val |= mask;
144 	else
145 		val &= ~mask;
146 	iowrite32(val, ipa->reg_virt + offset);
147 }
148 
149 /* Enable TX_SUSPEND for an endpoint */
150 void
ipa_interrupt_suspend_enable(struct ipa_interrupt * interrupt,u32 endpoint_id)151 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
152 {
153 	ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
154 }
155 
156 /* Disable TX_SUSPEND for an endpoint */
157 void
ipa_interrupt_suspend_disable(struct ipa_interrupt * interrupt,u32 endpoint_id)158 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
159 {
160 	ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
161 }
162 
163 /* Clear the suspend interrupt for all endpoints that signaled it */
ipa_interrupt_suspend_clear_all(struct ipa_interrupt * interrupt)164 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
165 {
166 	struct ipa *ipa = interrupt->ipa;
167 	u32 offset;
168 	u32 val;
169 
170 	offset = ipa_reg_irq_suspend_info_offset(ipa->version);
171 	val = ioread32(ipa->reg_virt + offset);
172 
173 	/* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
174 	if (ipa->version == IPA_VERSION_3_0)
175 		return;
176 
177 	offset = ipa_reg_irq_suspend_clr_offset(ipa->version);
178 	iowrite32(val, ipa->reg_virt + offset);
179 }
180 
181 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
ipa_interrupt_simulate_suspend(struct ipa_interrupt * interrupt)182 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
183 {
184 	ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
185 }
186 
187 /* Add a handler for an IPA interrupt */
ipa_interrupt_add(struct ipa_interrupt * interrupt,enum ipa_irq_id ipa_irq,ipa_irq_handler_t handler)188 void ipa_interrupt_add(struct ipa_interrupt *interrupt,
189 		       enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler)
190 {
191 	struct ipa *ipa = interrupt->ipa;
192 	u32 offset;
193 
194 	if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT))
195 		return;
196 
197 	interrupt->handler[ipa_irq] = handler;
198 
199 	/* Update the IPA interrupt mask to enable it */
200 	interrupt->enabled |= BIT(ipa_irq);
201 	offset = ipa_reg_irq_en_offset(ipa->version);
202 	iowrite32(interrupt->enabled, ipa->reg_virt + offset);
203 }
204 
205 /* Remove the handler for an IPA interrupt type */
206 void
ipa_interrupt_remove(struct ipa_interrupt * interrupt,enum ipa_irq_id ipa_irq)207 ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq)
208 {
209 	struct ipa *ipa = interrupt->ipa;
210 	u32 offset;
211 
212 	if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT))
213 		return;
214 
215 	/* Update the IPA interrupt mask to disable it */
216 	interrupt->enabled &= ~BIT(ipa_irq);
217 	offset = ipa_reg_irq_en_offset(ipa->version);
218 	iowrite32(interrupt->enabled, ipa->reg_virt + offset);
219 
220 	interrupt->handler[ipa_irq] = NULL;
221 }
222 
223 /* Configure the IPA interrupt framework */
ipa_interrupt_config(struct ipa * ipa)224 struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa)
225 {
226 	struct device *dev = &ipa->pdev->dev;
227 	struct ipa_interrupt *interrupt;
228 	unsigned int irq;
229 	u32 offset;
230 	int ret;
231 
232 	ret = platform_get_irq_byname(ipa->pdev, "ipa");
233 	if (ret <= 0) {
234 		dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
235 			ret);
236 		return ERR_PTR(ret ? : -EINVAL);
237 	}
238 	irq = ret;
239 
240 	interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
241 	if (!interrupt)
242 		return ERR_PTR(-ENOMEM);
243 	interrupt->ipa = ipa;
244 	interrupt->irq = irq;
245 
246 	/* Start with all IPA interrupts disabled */
247 	offset = ipa_reg_irq_en_offset(ipa->version);
248 	iowrite32(0, ipa->reg_virt + offset);
249 
250 	ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
251 				   "ipa", interrupt);
252 	if (ret) {
253 		dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
254 		goto err_kfree;
255 	}
256 
257 	ret = enable_irq_wake(irq);
258 	if (ret) {
259 		dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
260 		goto err_free_irq;
261 	}
262 
263 	return interrupt;
264 
265 err_free_irq:
266 	free_irq(interrupt->irq, interrupt);
267 err_kfree:
268 	kfree(interrupt);
269 
270 	return ERR_PTR(ret);
271 }
272 
273 /* Inverse of ipa_interrupt_config() */
ipa_interrupt_deconfig(struct ipa_interrupt * interrupt)274 void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt)
275 {
276 	struct device *dev = &interrupt->ipa->pdev->dev;
277 	int ret;
278 
279 	ret = disable_irq_wake(interrupt->irq);
280 	if (ret)
281 		dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
282 	free_irq(interrupt->irq, interrupt);
283 	kfree(interrupt);
284 }
285