1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45 struct intel_encoder base;
46
47 struct edid *edid;
48
49 int fitting_mode;
50 u32 pfit_control;
51 u32 pfit_pgm_ratios;
52 bool pfit_dirty;
53
54 struct drm_display_mode *fixed_mode;
55 };
56
to_intel_lvds(struct drm_encoder * encoder)57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
58 {
59 return container_of(encoder, struct intel_lvds, base.base);
60 }
61
intel_attached_lvds(struct drm_connector * connector)62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
63 {
64 return container_of(intel_attached_encoder(connector),
65 struct intel_lvds, base);
66 }
67
68 /**
69 * Sets the power state for the panel.
70 */
intel_lvds_enable(struct intel_lvds * intel_lvds)71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
72 {
73 struct drm_device *dev = intel_lvds->base.base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 u32 ctl_reg, lvds_reg;
76
77 if (HAS_PCH_SPLIT(dev)) {
78 ctl_reg = PCH_PP_CONTROL;
79 lvds_reg = PCH_LVDS;
80 } else {
81 ctl_reg = PP_CONTROL;
82 lvds_reg = LVDS;
83 }
84
85 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
86
87 if (intel_lvds->pfit_dirty) {
88 /*
89 * Enable automatic panel scaling so that non-native modes
90 * fill the screen. The panel fitter should only be
91 * adjusted whilst the pipe is disabled, according to
92 * register description and PRM.
93 */
94 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
95 intel_lvds->pfit_control,
96 intel_lvds->pfit_pgm_ratios);
97 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
98 DRM_ERROR("timed out waiting for panel to power off\n");
99 } else {
100 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
101 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
102 intel_lvds->pfit_dirty = false;
103 }
104 }
105
106 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
107 POSTING_READ(lvds_reg);
108
109 intel_panel_enable_backlight(dev);
110 }
111
intel_lvds_disable(struct intel_lvds * intel_lvds)112 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
113 {
114 struct drm_device *dev = intel_lvds->base.base.dev;
115 struct drm_i915_private *dev_priv = dev->dev_private;
116 u32 ctl_reg, lvds_reg;
117
118 if (HAS_PCH_SPLIT(dev)) {
119 ctl_reg = PCH_PP_CONTROL;
120 lvds_reg = PCH_LVDS;
121 } else {
122 ctl_reg = PP_CONTROL;
123 lvds_reg = LVDS;
124 }
125
126 intel_panel_disable_backlight(dev);
127
128 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
129
130 if (intel_lvds->pfit_control) {
131 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
132 DRM_ERROR("timed out waiting for panel to power off\n");
133
134 I915_WRITE(PFIT_CONTROL, 0);
135 intel_lvds->pfit_dirty = true;
136 }
137
138 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
139 POSTING_READ(lvds_reg);
140 }
141
intel_lvds_dpms(struct drm_encoder * encoder,int mode)142 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
143 {
144 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
145
146 if (mode == DRM_MODE_DPMS_ON)
147 intel_lvds_enable(intel_lvds);
148 else
149 intel_lvds_disable(intel_lvds);
150
151 /* XXX: We never power down the LVDS pairs. */
152 }
153
intel_lvds_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)154 static int intel_lvds_mode_valid(struct drm_connector *connector,
155 struct drm_display_mode *mode)
156 {
157 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
158 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
159
160 if (mode->hdisplay > fixed_mode->hdisplay)
161 return MODE_PANEL;
162 if (mode->vdisplay > fixed_mode->vdisplay)
163 return MODE_PANEL;
164
165 return MODE_OK;
166 }
167
168 static void
centre_horizontally(struct drm_display_mode * mode,int width)169 centre_horizontally(struct drm_display_mode *mode,
170 int width)
171 {
172 u32 border, sync_pos, blank_width, sync_width;
173
174 /* keep the hsync and hblank widths constant */
175 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
176 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
177 sync_pos = (blank_width - sync_width + 1) / 2;
178
179 border = (mode->hdisplay - width + 1) / 2;
180 border += border & 1; /* make the border even */
181
182 mode->crtc_hdisplay = width;
183 mode->crtc_hblank_start = width + border;
184 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
185
186 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
187 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
188 }
189
190 static void
centre_vertically(struct drm_display_mode * mode,int height)191 centre_vertically(struct drm_display_mode *mode,
192 int height)
193 {
194 u32 border, sync_pos, blank_width, sync_width;
195
196 /* keep the vsync and vblank widths constant */
197 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
198 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
199 sync_pos = (blank_width - sync_width + 1) / 2;
200
201 border = (mode->vdisplay - height + 1) / 2;
202
203 mode->crtc_vdisplay = height;
204 mode->crtc_vblank_start = height + border;
205 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
206
207 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
208 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
209 }
210
panel_fitter_scaling(u32 source,u32 target)211 static inline u32 panel_fitter_scaling(u32 source, u32 target)
212 {
213 /*
214 * Floating point operation is not supported. So the FACTOR
215 * is defined, which can avoid the floating point computation
216 * when calculating the panel ratio.
217 */
218 #define ACCURACY 12
219 #define FACTOR (1 << ACCURACY)
220 u32 ratio = source * FACTOR / target;
221 return (FACTOR * ratio + FACTOR/2) / FACTOR;
222 }
223
intel_lvds_mode_fixup(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)224 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
225 struct drm_display_mode *mode,
226 struct drm_display_mode *adjusted_mode)
227 {
228 struct drm_device *dev = encoder->dev;
229 struct drm_i915_private *dev_priv = dev->dev_private;
230 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
231 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
232 struct drm_encoder *tmp_encoder;
233 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
234 int pipe;
235
236 /* Should never happen!! */
237 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
238 DRM_ERROR("Can't support LVDS on pipe A\n");
239 return false;
240 }
241
242 /* Should never happen!! */
243 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
244 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
245 DRM_ERROR("Can't enable LVDS and another "
246 "encoder on the same pipe\n");
247 return false;
248 }
249 }
250
251 /*
252 * We have timings from the BIOS for the panel, put them in
253 * to the adjusted mode. The CRTC will be set up for this mode,
254 * with the panel scaling set up to source from the H/VDisplay
255 * of the original mode.
256 */
257 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
258
259 if (HAS_PCH_SPLIT(dev)) {
260 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
261 mode, adjusted_mode);
262 return true;
263 }
264
265 /* Native modes don't need fitting */
266 if (adjusted_mode->hdisplay == mode->hdisplay &&
267 adjusted_mode->vdisplay == mode->vdisplay)
268 goto out;
269
270 /* 965+ wants fuzzy fitting */
271 if (INTEL_INFO(dev)->gen >= 4)
272 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
273 PFIT_FILTER_FUZZY);
274
275 /*
276 * Enable automatic panel scaling for non-native modes so that they fill
277 * the screen. Should be enabled before the pipe is enabled, according
278 * to register description and PRM.
279 * Change the value here to see the borders for debugging
280 */
281 for_each_pipe(pipe)
282 I915_WRITE(BCLRPAT(pipe), 0);
283
284 switch (intel_lvds->fitting_mode) {
285 case DRM_MODE_SCALE_CENTER:
286 /*
287 * For centered modes, we have to calculate border widths &
288 * heights and modify the values programmed into the CRTC.
289 */
290 centre_horizontally(adjusted_mode, mode->hdisplay);
291 centre_vertically(adjusted_mode, mode->vdisplay);
292 border = LVDS_BORDER_ENABLE;
293 break;
294
295 case DRM_MODE_SCALE_ASPECT:
296 /* Scale but preserve the aspect ratio */
297 if (INTEL_INFO(dev)->gen >= 4) {
298 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
299 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
300
301 /* 965+ is easy, it does everything in hw */
302 if (scaled_width > scaled_height)
303 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
304 else if (scaled_width < scaled_height)
305 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
306 else if (adjusted_mode->hdisplay != mode->hdisplay)
307 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
308 } else {
309 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
310 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
311 /*
312 * For earlier chips we have to calculate the scaling
313 * ratio by hand and program it into the
314 * PFIT_PGM_RATIO register
315 */
316 if (scaled_width > scaled_height) { /* pillar */
317 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
318
319 border = LVDS_BORDER_ENABLE;
320 if (mode->vdisplay != adjusted_mode->vdisplay) {
321 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
322 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
323 bits << PFIT_VERT_SCALE_SHIFT);
324 pfit_control |= (PFIT_ENABLE |
325 VERT_INTERP_BILINEAR |
326 HORIZ_INTERP_BILINEAR);
327 }
328 } else if (scaled_width < scaled_height) { /* letter */
329 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
330
331 border = LVDS_BORDER_ENABLE;
332 if (mode->hdisplay != adjusted_mode->hdisplay) {
333 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
334 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
335 bits << PFIT_VERT_SCALE_SHIFT);
336 pfit_control |= (PFIT_ENABLE |
337 VERT_INTERP_BILINEAR |
338 HORIZ_INTERP_BILINEAR);
339 }
340 } else
341 /* Aspects match, Let hw scale both directions */
342 pfit_control |= (PFIT_ENABLE |
343 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
344 VERT_INTERP_BILINEAR |
345 HORIZ_INTERP_BILINEAR);
346 }
347 break;
348
349 case DRM_MODE_SCALE_FULLSCREEN:
350 /*
351 * Full scaling, even if it changes the aspect ratio.
352 * Fortunately this is all done for us in hw.
353 */
354 if (mode->vdisplay != adjusted_mode->vdisplay ||
355 mode->hdisplay != adjusted_mode->hdisplay) {
356 pfit_control |= PFIT_ENABLE;
357 if (INTEL_INFO(dev)->gen >= 4)
358 pfit_control |= PFIT_SCALING_AUTO;
359 else
360 pfit_control |= (VERT_AUTO_SCALE |
361 VERT_INTERP_BILINEAR |
362 HORIZ_AUTO_SCALE |
363 HORIZ_INTERP_BILINEAR);
364 }
365 break;
366
367 default:
368 break;
369 }
370
371 out:
372 /* If not enabling scaling, be consistent and always use 0. */
373 if ((pfit_control & PFIT_ENABLE) == 0) {
374 pfit_control = 0;
375 pfit_pgm_ratios = 0;
376 }
377
378 /* Make sure pre-965 set dither correctly */
379 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
380 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
381
382 if (pfit_control != intel_lvds->pfit_control ||
383 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
384 intel_lvds->pfit_control = pfit_control;
385 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
386 intel_lvds->pfit_dirty = true;
387 }
388 dev_priv->lvds_border_bits = border;
389
390 /*
391 * XXX: It would be nice to support lower refresh rates on the
392 * panels to reduce power consumption, and perhaps match the
393 * user's requested refresh rate.
394 */
395
396 return true;
397 }
398
intel_lvds_prepare(struct drm_encoder * encoder)399 static void intel_lvds_prepare(struct drm_encoder *encoder)
400 {
401 struct drm_device *dev = encoder->dev;
402 struct drm_i915_private *dev_priv = dev->dev_private;
403 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
404
405 /* We try to do the minimum that is necessary in order to unlock
406 * the registers for mode setting.
407 *
408 * On Ironlake, this is quite simple as we just set the unlock key
409 * and ignore all subtleties. (This may cause some issues...)
410 *
411 * Prior to Ironlake, we must disable the pipe if we want to adjust
412 * the panel fitter. However at all other times we can just reset
413 * the registers regardless.
414 */
415
416 if (HAS_PCH_SPLIT(dev)) {
417 I915_WRITE(PCH_PP_CONTROL,
418 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
419 } else if (intel_lvds->pfit_dirty) {
420 I915_WRITE(PP_CONTROL,
421 (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
422 & ~POWER_TARGET_ON);
423 } else {
424 I915_WRITE(PP_CONTROL,
425 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
426 }
427 }
428
intel_lvds_commit(struct drm_encoder * encoder)429 static void intel_lvds_commit(struct drm_encoder *encoder)
430 {
431 struct drm_device *dev = encoder->dev;
432 struct drm_i915_private *dev_priv = dev->dev_private;
433 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
434
435 /* Undo any unlocking done in prepare to prevent accidental
436 * adjustment of the registers.
437 */
438 if (HAS_PCH_SPLIT(dev)) {
439 u32 val = I915_READ(PCH_PP_CONTROL);
440 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
441 I915_WRITE(PCH_PP_CONTROL, val & 0x3);
442 } else {
443 u32 val = I915_READ(PP_CONTROL);
444 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
445 I915_WRITE(PP_CONTROL, val & 0x3);
446 }
447
448 /* Always do a full power on as we do not know what state
449 * we were left in.
450 */
451 intel_lvds_enable(intel_lvds);
452 }
453
intel_lvds_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)454 static void intel_lvds_mode_set(struct drm_encoder *encoder,
455 struct drm_display_mode *mode,
456 struct drm_display_mode *adjusted_mode)
457 {
458 /*
459 * The LVDS pin pair will already have been turned on in the
460 * intel_crtc_mode_set since it has a large impact on the DPLL
461 * settings.
462 */
463 }
464
465 /**
466 * Detect the LVDS connection.
467 *
468 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
469 * connected and closed means disconnected. We also send hotplug events as
470 * needed, using lid status notification from the input layer.
471 */
472 static enum drm_connector_status
intel_lvds_detect(struct drm_connector * connector,bool force)473 intel_lvds_detect(struct drm_connector *connector, bool force)
474 {
475 struct drm_device *dev = connector->dev;
476 enum drm_connector_status status;
477
478 status = intel_panel_detect(dev);
479 if (status != connector_status_unknown)
480 return status;
481
482 return connector_status_connected;
483 }
484
485 /**
486 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
487 */
intel_lvds_get_modes(struct drm_connector * connector)488 static int intel_lvds_get_modes(struct drm_connector *connector)
489 {
490 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
491 struct drm_device *dev = connector->dev;
492 struct drm_display_mode *mode;
493
494 if (intel_lvds->edid)
495 return drm_add_edid_modes(connector, intel_lvds->edid);
496
497 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
498 if (mode == NULL)
499 return 0;
500
501 drm_mode_probed_add(connector, mode);
502 return 1;
503 }
504
intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id * id)505 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
506 {
507 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
508 return 1;
509 }
510
511 /* The GPU hangs up on these systems if modeset is performed on LID open */
512 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
513 {
514 .callback = intel_no_modeset_on_lid_dmi_callback,
515 .ident = "Toshiba Tecra A11",
516 .matches = {
517 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
518 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
519 },
520 },
521
522 { } /* terminating entry */
523 };
524
525 /*
526 * Lid events. Note the use of 'modeset_on_lid':
527 * - we set it on lid close, and reset it on open
528 * - we use it as a "only once" bit (ie we ignore
529 * duplicate events where it was already properly
530 * set/reset)
531 * - the suspend/resume paths will also set it to
532 * zero, since they restore the mode ("lid open").
533 */
intel_lid_notify(struct notifier_block * nb,unsigned long val,void * unused)534 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
535 void *unused)
536 {
537 struct drm_i915_private *dev_priv =
538 container_of(nb, struct drm_i915_private, lid_notifier);
539 struct drm_device *dev = dev_priv->dev;
540 struct drm_connector *connector = dev_priv->int_lvds_connector;
541
542 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
543 return NOTIFY_OK;
544
545 /*
546 * check and update the status of LVDS connector after receiving
547 * the LID nofication event.
548 */
549 if (connector)
550 connector->status = connector->funcs->detect(connector,
551 false);
552
553 /* Don't force modeset on machines where it causes a GPU lockup */
554 if (dmi_check_system(intel_no_modeset_on_lid))
555 return NOTIFY_OK;
556 if (!acpi_lid_open()) {
557 dev_priv->modeset_on_lid = 1;
558 return NOTIFY_OK;
559 }
560
561 if (!dev_priv->modeset_on_lid)
562 return NOTIFY_OK;
563
564 dev_priv->modeset_on_lid = 0;
565
566 mutex_lock(&dev->mode_config.mutex);
567 drm_helper_resume_force_mode(dev);
568 mutex_unlock(&dev->mode_config.mutex);
569
570 return NOTIFY_OK;
571 }
572
573 /**
574 * intel_lvds_destroy - unregister and free LVDS structures
575 * @connector: connector to free
576 *
577 * Unregister the DDC bus for this connector then free the driver private
578 * structure.
579 */
intel_lvds_destroy(struct drm_connector * connector)580 static void intel_lvds_destroy(struct drm_connector *connector)
581 {
582 struct drm_device *dev = connector->dev;
583 struct drm_i915_private *dev_priv = dev->dev_private;
584
585 if (dev_priv->lid_notifier.notifier_call)
586 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
587 drm_sysfs_connector_remove(connector);
588 drm_connector_cleanup(connector);
589 kfree(connector);
590 }
591
intel_lvds_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t value)592 static int intel_lvds_set_property(struct drm_connector *connector,
593 struct drm_property *property,
594 uint64_t value)
595 {
596 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
597 struct drm_device *dev = connector->dev;
598
599 if (property == dev->mode_config.scaling_mode_property) {
600 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
601
602 if (value == DRM_MODE_SCALE_NONE) {
603 DRM_DEBUG_KMS("no scaling not supported\n");
604 return -EINVAL;
605 }
606
607 if (intel_lvds->fitting_mode == value) {
608 /* the LVDS scaling property is not changed */
609 return 0;
610 }
611 intel_lvds->fitting_mode = value;
612 if (crtc && crtc->enabled) {
613 /*
614 * If the CRTC is enabled, the display will be changed
615 * according to the new panel fitting mode.
616 */
617 drm_crtc_helper_set_mode(crtc, &crtc->mode,
618 crtc->x, crtc->y, crtc->fb);
619 }
620 }
621
622 return 0;
623 }
624
625 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
626 .dpms = intel_lvds_dpms,
627 .mode_fixup = intel_lvds_mode_fixup,
628 .prepare = intel_lvds_prepare,
629 .mode_set = intel_lvds_mode_set,
630 .commit = intel_lvds_commit,
631 };
632
633 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
634 .get_modes = intel_lvds_get_modes,
635 .mode_valid = intel_lvds_mode_valid,
636 .best_encoder = intel_best_encoder,
637 };
638
639 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
640 .dpms = drm_helper_connector_dpms,
641 .detect = intel_lvds_detect,
642 .fill_modes = drm_helper_probe_single_connector_modes,
643 .set_property = intel_lvds_set_property,
644 .destroy = intel_lvds_destroy,
645 };
646
647 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
648 .destroy = intel_encoder_destroy,
649 };
650
intel_no_lvds_dmi_callback(const struct dmi_system_id * id)651 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
652 {
653 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
654 return 1;
655 }
656
657 /* These systems claim to have LVDS, but really don't */
658 static const struct dmi_system_id intel_no_lvds[] = {
659 {
660 .callback = intel_no_lvds_dmi_callback,
661 .ident = "Apple Mac Mini (Core series)",
662 .matches = {
663 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
664 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
665 },
666 },
667 {
668 .callback = intel_no_lvds_dmi_callback,
669 .ident = "Apple Mac Mini (Core 2 series)",
670 .matches = {
671 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
672 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
673 },
674 },
675 {
676 .callback = intel_no_lvds_dmi_callback,
677 .ident = "MSI IM-945GSE-A",
678 .matches = {
679 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
680 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
681 },
682 },
683 {
684 .callback = intel_no_lvds_dmi_callback,
685 .ident = "Dell Studio Hybrid",
686 .matches = {
687 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
688 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
689 },
690 },
691 {
692 .callback = intel_no_lvds_dmi_callback,
693 .ident = "AOpen Mini PC",
694 .matches = {
695 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
696 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
697 },
698 },
699 {
700 .callback = intel_no_lvds_dmi_callback,
701 .ident = "AOpen Mini PC MP915",
702 .matches = {
703 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
704 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
705 },
706 },
707 {
708 .callback = intel_no_lvds_dmi_callback,
709 .ident = "AOpen i915GMm-HFS",
710 .matches = {
711 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
712 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
713 },
714 },
715 {
716 .callback = intel_no_lvds_dmi_callback,
717 .ident = "Aopen i945GTt-VFA",
718 .matches = {
719 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
720 },
721 },
722 {
723 .callback = intel_no_lvds_dmi_callback,
724 .ident = "Clientron U800",
725 .matches = {
726 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
727 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
728 },
729 },
730
731 { } /* terminating entry */
732 };
733
734 /**
735 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
736 * @dev: drm device
737 * @connector: LVDS connector
738 *
739 * Find the reduced downclock for LVDS in EDID.
740 */
intel_find_lvds_downclock(struct drm_device * dev,struct drm_display_mode * fixed_mode,struct drm_connector * connector)741 static void intel_find_lvds_downclock(struct drm_device *dev,
742 struct drm_display_mode *fixed_mode,
743 struct drm_connector *connector)
744 {
745 struct drm_i915_private *dev_priv = dev->dev_private;
746 struct drm_display_mode *scan;
747 int temp_downclock;
748
749 temp_downclock = fixed_mode->clock;
750 list_for_each_entry(scan, &connector->probed_modes, head) {
751 /*
752 * If one mode has the same resolution with the fixed_panel
753 * mode while they have the different refresh rate, it means
754 * that the reduced downclock is found for the LVDS. In such
755 * case we can set the different FPx0/1 to dynamically select
756 * between low and high frequency.
757 */
758 if (scan->hdisplay == fixed_mode->hdisplay &&
759 scan->hsync_start == fixed_mode->hsync_start &&
760 scan->hsync_end == fixed_mode->hsync_end &&
761 scan->htotal == fixed_mode->htotal &&
762 scan->vdisplay == fixed_mode->vdisplay &&
763 scan->vsync_start == fixed_mode->vsync_start &&
764 scan->vsync_end == fixed_mode->vsync_end &&
765 scan->vtotal == fixed_mode->vtotal) {
766 if (scan->clock < temp_downclock) {
767 /*
768 * The downclock is already found. But we
769 * expect to find the lower downclock.
770 */
771 temp_downclock = scan->clock;
772 }
773 }
774 }
775 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
776 /* We found the downclock for LVDS. */
777 dev_priv->lvds_downclock_avail = 1;
778 dev_priv->lvds_downclock = temp_downclock;
779 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
780 "Normal clock %dKhz, downclock %dKhz\n",
781 fixed_mode->clock, temp_downclock);
782 }
783 }
784
785 /*
786 * Enumerate the child dev array parsed from VBT to check whether
787 * the LVDS is present.
788 * If it is present, return 1.
789 * If it is not present, return false.
790 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
791 */
lvds_is_present_in_vbt(struct drm_device * dev,u8 * i2c_pin)792 static bool lvds_is_present_in_vbt(struct drm_device *dev,
793 u8 *i2c_pin)
794 {
795 struct drm_i915_private *dev_priv = dev->dev_private;
796 int i;
797
798 if (!dev_priv->child_dev_num)
799 return true;
800
801 for (i = 0; i < dev_priv->child_dev_num; i++) {
802 struct child_device_config *child = dev_priv->child_dev + i;
803
804 /* If the device type is not LFP, continue.
805 * We have to check both the new identifiers as well as the
806 * old for compatibility with some BIOSes.
807 */
808 if (child->device_type != DEVICE_TYPE_INT_LFP &&
809 child->device_type != DEVICE_TYPE_LFP)
810 continue;
811
812 if (child->i2c_pin)
813 *i2c_pin = child->i2c_pin;
814
815 /* However, we cannot trust the BIOS writers to populate
816 * the VBT correctly. Since LVDS requires additional
817 * information from AIM blocks, a non-zero addin offset is
818 * a good indicator that the LVDS is actually present.
819 */
820 if (child->addin_offset)
821 return true;
822
823 /* But even then some BIOS writers perform some black magic
824 * and instantiate the device without reference to any
825 * additional data. Trust that if the VBT was written into
826 * the OpRegion then they have validated the LVDS's existence.
827 */
828 if (dev_priv->opregion.vbt)
829 return true;
830 }
831
832 return false;
833 }
834
835 /**
836 * intel_lvds_init - setup LVDS connectors on this device
837 * @dev: drm device
838 *
839 * Create the connector, register the LVDS DDC bus, and try to figure out what
840 * modes we can display on the LVDS panel (if present).
841 */
intel_lvds_init(struct drm_device * dev)842 bool intel_lvds_init(struct drm_device *dev)
843 {
844 struct drm_i915_private *dev_priv = dev->dev_private;
845 struct intel_lvds *intel_lvds;
846 struct intel_encoder *intel_encoder;
847 struct intel_connector *intel_connector;
848 struct drm_connector *connector;
849 struct drm_encoder *encoder;
850 struct drm_display_mode *scan; /* *modes, *bios_mode; */
851 struct drm_crtc *crtc;
852 u32 lvds;
853 int pipe;
854 u8 pin;
855
856 /* Skip init on machines we know falsely report LVDS */
857 if (dmi_check_system(intel_no_lvds))
858 return false;
859
860 pin = GMBUS_PORT_PANEL;
861 if (!lvds_is_present_in_vbt(dev, &pin)) {
862 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
863 return false;
864 }
865
866 if (HAS_PCH_SPLIT(dev)) {
867 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
868 return false;
869 if (dev_priv->edp.support) {
870 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
871 return false;
872 }
873 }
874
875 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
876 if (!intel_lvds) {
877 return false;
878 }
879
880 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
881 if (!intel_connector) {
882 kfree(intel_lvds);
883 return false;
884 }
885
886 if (!HAS_PCH_SPLIT(dev)) {
887 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
888 }
889
890 intel_encoder = &intel_lvds->base;
891 encoder = &intel_encoder->base;
892 connector = &intel_connector->base;
893 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
894 DRM_MODE_CONNECTOR_LVDS);
895
896 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
897 DRM_MODE_ENCODER_LVDS);
898
899 intel_connector_attach_encoder(intel_connector, intel_encoder);
900 intel_encoder->type = INTEL_OUTPUT_LVDS;
901
902 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
903 intel_encoder->crtc_mask = (1 << 1);
904 if (INTEL_INFO(dev)->gen >= 5)
905 intel_encoder->crtc_mask |= (1 << 0);
906 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
907 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
908 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
909 connector->interlace_allowed = false;
910 connector->doublescan_allowed = false;
911
912 /* create the scaling mode property */
913 drm_mode_create_scaling_mode_property(dev);
914 /*
915 * the initial panel fitting mode will be FULL_SCREEN.
916 */
917
918 drm_connector_attach_property(&intel_connector->base,
919 dev->mode_config.scaling_mode_property,
920 DRM_MODE_SCALE_ASPECT);
921 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
922 /*
923 * LVDS discovery:
924 * 1) check for EDID on DDC
925 * 2) check for VBT data
926 * 3) check to see if LVDS is already on
927 * if none of the above, no panel
928 * 4) make sure lid is open
929 * if closed, act like it's not there for now
930 */
931
932 /*
933 * Attempt to get the fixed panel mode from DDC. Assume that the
934 * preferred mode is the right one.
935 */
936 intel_lvds->edid = drm_get_edid(connector,
937 &dev_priv->gmbus[pin].adapter);
938 if (intel_lvds->edid) {
939 if (drm_add_edid_modes(connector,
940 intel_lvds->edid)) {
941 drm_mode_connector_update_edid_property(connector,
942 intel_lvds->edid);
943 } else {
944 kfree(intel_lvds->edid);
945 intel_lvds->edid = NULL;
946 }
947 }
948 if (!intel_lvds->edid) {
949 /* Didn't get an EDID, so
950 * Set wide sync ranges so we get all modes
951 * handed to valid_mode for checking
952 */
953 connector->display_info.min_vfreq = 0;
954 connector->display_info.max_vfreq = 200;
955 connector->display_info.min_hfreq = 0;
956 connector->display_info.max_hfreq = 200;
957 }
958
959 list_for_each_entry(scan, &connector->probed_modes, head) {
960 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
961 intel_lvds->fixed_mode =
962 drm_mode_duplicate(dev, scan);
963 intel_find_lvds_downclock(dev,
964 intel_lvds->fixed_mode,
965 connector);
966 goto out;
967 }
968 }
969
970 /* Failed to get EDID, what about VBT? */
971 if (dev_priv->lfp_lvds_vbt_mode) {
972 intel_lvds->fixed_mode =
973 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
974 if (intel_lvds->fixed_mode) {
975 intel_lvds->fixed_mode->type |=
976 DRM_MODE_TYPE_PREFERRED;
977 goto out;
978 }
979 }
980
981 /*
982 * If we didn't get EDID, try checking if the panel is already turned
983 * on. If so, assume that whatever is currently programmed is the
984 * correct mode.
985 */
986
987 /* Ironlake: FIXME if still fail, not try pipe mode now */
988 if (HAS_PCH_SPLIT(dev))
989 goto failed;
990
991 lvds = I915_READ(LVDS);
992 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
993 crtc = intel_get_crtc_for_pipe(dev, pipe);
994
995 if (crtc && (lvds & LVDS_PORT_EN)) {
996 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
997 if (intel_lvds->fixed_mode) {
998 intel_lvds->fixed_mode->type |=
999 DRM_MODE_TYPE_PREFERRED;
1000 goto out;
1001 }
1002 }
1003
1004 /* If we still don't have a mode after all that, give up. */
1005 if (!intel_lvds->fixed_mode)
1006 goto failed;
1007
1008 out:
1009 if (HAS_PCH_SPLIT(dev)) {
1010 u32 pwm;
1011
1012 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1013
1014 /* make sure PWM is enabled and locked to the LVDS pipe */
1015 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1016 if (pipe == 0 && (pwm & PWM_PIPE_B))
1017 I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1018 if (pipe)
1019 pwm |= PWM_PIPE_B;
1020 else
1021 pwm &= ~PWM_PIPE_B;
1022 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1023
1024 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1025 pwm |= PWM_PCH_ENABLE;
1026 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1027 }
1028 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1029 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1030 DRM_DEBUG_KMS("lid notifier registration failed\n");
1031 dev_priv->lid_notifier.notifier_call = NULL;
1032 }
1033 /* keep the LVDS connector */
1034 dev_priv->int_lvds_connector = connector;
1035 drm_sysfs_connector_add(connector);
1036 return true;
1037
1038 failed:
1039 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1040 drm_connector_cleanup(connector);
1041 drm_encoder_cleanup(encoder);
1042 kfree(intel_lvds);
1043 kfree(intel_connector);
1044 return false;
1045 }
1046