1 /*
2 * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/gpio.h>
16 #include <mach/hardware.h>
17 #include <mach/imx-uart.h>
18 #include <mach/irqs.h>
19
20 static struct resource mxc_hsi2c_resources[] = {
21 {
22 .start = MX51_HSI2C_DMA_BASE_ADDR,
23 .end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1,
24 .flags = IORESOURCE_MEM,
25 },
26 {
27 .start = MX51_MXC_INT_HS_I2C,
28 .end = MX51_MXC_INT_HS_I2C,
29 .flags = IORESOURCE_IRQ,
30 },
31 };
32
33 struct platform_device mxc_hsi2c_device = {
34 .name = "imx-i2c",
35 .id = 2,
36 .num_resources = ARRAY_SIZE(mxc_hsi2c_resources),
37 .resource = mxc_hsi2c_resources
38 };
39
40 static u64 usb_dma_mask = DMA_BIT_MASK(32);
41
42 static struct resource usbotg_resources[] = {
43 {
44 .start = MX51_OTG_BASE_ADDR,
45 .end = MX51_OTG_BASE_ADDR + 0x1ff,
46 .flags = IORESOURCE_MEM,
47 },
48 {
49 .start = MX51_MXC_INT_USB_OTG,
50 .flags = IORESOURCE_IRQ,
51 },
52 };
53
54 /* OTG gadget device */
55 struct platform_device mxc_usbdr_udc_device = {
56 .name = "fsl-usb2-udc",
57 .id = -1,
58 .num_resources = ARRAY_SIZE(usbotg_resources),
59 .resource = usbotg_resources,
60 .dev = {
61 .dma_mask = &usb_dma_mask,
62 .coherent_dma_mask = DMA_BIT_MASK(32),
63 },
64 };
65
66 struct platform_device mxc_usbdr_host_device = {
67 .name = "mxc-ehci",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(usbotg_resources),
70 .resource = usbotg_resources,
71 .dev = {
72 .dma_mask = &usb_dma_mask,
73 .coherent_dma_mask = DMA_BIT_MASK(32),
74 },
75 };
76
77 static struct resource usbh1_resources[] = {
78 {
79 .start = MX51_OTG_BASE_ADDR + 0x200,
80 .end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff,
81 .flags = IORESOURCE_MEM,
82 },
83 {
84 .start = MX51_MXC_INT_USB_H1,
85 .flags = IORESOURCE_IRQ,
86 },
87 };
88
89 struct platform_device mxc_usbh1_device = {
90 .name = "mxc-ehci",
91 .id = 1,
92 .num_resources = ARRAY_SIZE(usbh1_resources),
93 .resource = usbh1_resources,
94 .dev = {
95 .dma_mask = &usb_dma_mask,
96 .coherent_dma_mask = DMA_BIT_MASK(32),
97 },
98 };
99
100 static struct resource usbh2_resources[] = {
101 {
102 .start = MX51_OTG_BASE_ADDR + 0x400,
103 .end = MX51_OTG_BASE_ADDR + 0x400 + 0x1ff,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .start = MX51_MXC_INT_USB_H2,
108 .flags = IORESOURCE_IRQ,
109 },
110 };
111
112 struct platform_device mxc_usbh2_device = {
113 .name = "mxc-ehci",
114 .id = 2,
115 .num_resources = ARRAY_SIZE(usbh2_resources),
116 .resource = usbh2_resources,
117 .dev = {
118 .dma_mask = &usb_dma_mask,
119 .coherent_dma_mask = DMA_BIT_MASK(32),
120 },
121 };
122
123 static struct mxc_gpio_port mxc_gpio_ports[] = {
124 {
125 .chip.label = "gpio-0",
126 .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
127 .irq = MX51_MXC_INT_GPIO1_LOW,
128 .irq_high = MX51_MXC_INT_GPIO1_HIGH,
129 .virtual_irq_start = MXC_GPIO_IRQ_START
130 },
131 {
132 .chip.label = "gpio-1",
133 .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
134 .irq = MX51_MXC_INT_GPIO2_LOW,
135 .irq_high = MX51_MXC_INT_GPIO2_HIGH,
136 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
137 },
138 {
139 .chip.label = "gpio-2",
140 .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
141 .irq = MX51_MXC_INT_GPIO3_LOW,
142 .irq_high = MX51_MXC_INT_GPIO3_HIGH,
143 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
144 },
145 {
146 .chip.label = "gpio-3",
147 .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
148 .irq = MX51_MXC_INT_GPIO4_LOW,
149 .irq_high = MX51_MXC_INT_GPIO4_HIGH,
150 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
151 },
152 {
153 .chip.label = "gpio-4",
154 .base = MX53_IO_ADDRESS(MX53_GPIO5_BASE_ADDR),
155 .irq = MX53_INT_GPIO5_LOW,
156 .irq_high = MX53_INT_GPIO5_HIGH,
157 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 4
158 },
159 {
160 .chip.label = "gpio-5",
161 .base = MX53_IO_ADDRESS(MX53_GPIO6_BASE_ADDR),
162 .irq = MX53_INT_GPIO6_LOW,
163 .irq_high = MX53_INT_GPIO6_HIGH,
164 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 5
165 },
166 {
167 .chip.label = "gpio-6",
168 .base = MX53_IO_ADDRESS(MX53_GPIO7_BASE_ADDR),
169 .irq = MX53_INT_GPIO7_LOW,
170 .irq_high = MX53_INT_GPIO7_HIGH,
171 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 6
172 },
173 };
174
imx51_register_gpios(void)175 int __init imx51_register_gpios(void)
176 {
177 return mxc_gpio_init(mxc_gpio_ports, 4);
178 }
179
imx53_register_gpios(void)180 int __init imx53_register_gpios(void)
181 {
182 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
183 }
184
185