1 #include <linux/config.h>
2 #define __NO_VERSION__
3 #include <linux/module.h>
4 #include <linux/types.h>
5 #include <linux/string.h>
6 #include <linux/kernel.h>
7 #include <linux/timer.h>
8 #include <linux/mm.h>
9 #include <linux/interrupt.h>
10 #include <linux/major.h>
11 #include <linux/errno.h>
12 #include <linux/genhd.h>
13 #include <linux/blkpg.h>
14 #include <linux/slab.h>
15 #include <linux/pci.h>
16 #include <linux/delay.h>
17 #include <linux/hdreg.h>
18 #include <linux/ide.h>
19 
20 #include <asm/byteorder.h>
21 #include <asm/irq.h>
22 #include <asm/uaccess.h>
23 #include <asm/io.h>
24 #include <asm/bitops.h>
25 
26 #include "ide_modes.h"
27 
28 /*
29  *	IDE library routines. These are plug in code that most
30  *	drivers can use but occasionally may be weird enough
31  *	to want to do their own thing with
32  *
33  *	Add common non I/O op stuff here. Make sure it has proper
34  *	kernel-doc function headers or your patch will be rejected
35  */
36 
37 
38 /**
39  *	ide_xfer_verbose	-	return IDE mode names
40  *	@xfer_rate: rate to name
41  *
42  *	Returns a constant string giving the name of the mode
43  *	requested.
44  */
45 
ide_xfer_verbose(u8 xfer_rate)46 char *ide_xfer_verbose (u8 xfer_rate)
47 {
48         switch(xfer_rate) {
49                 case XFER_UDMA_7:	return("UDMA 7");
50                 case XFER_UDMA_6:	return("UDMA 6");
51                 case XFER_UDMA_5:	return("UDMA 5");
52                 case XFER_UDMA_4:	return("UDMA 4");
53                 case XFER_UDMA_3:	return("UDMA 3");
54                 case XFER_UDMA_2:	return("UDMA 2");
55                 case XFER_UDMA_1:	return("UDMA 1");
56                 case XFER_UDMA_0:	return("UDMA 0");
57                 case XFER_MW_DMA_2:	return("MW DMA 2");
58                 case XFER_MW_DMA_1:	return("MW DMA 1");
59                 case XFER_MW_DMA_0:	return("MW DMA 0");
60                 case XFER_SW_DMA_2:	return("SW DMA 2");
61                 case XFER_SW_DMA_1:	return("SW DMA 1");
62                 case XFER_SW_DMA_0:	return("SW DMA 0");
63                 case XFER_PIO_4:	return("PIO 4");
64                 case XFER_PIO_3:	return("PIO 3");
65                 case XFER_PIO_2:	return("PIO 2");
66                 case XFER_PIO_1:	return("PIO 1");
67                 case XFER_PIO_0:	return("PIO 0");
68                 case XFER_PIO_SLOW:	return("PIO SLOW");
69                 default:		return("XFER ERROR");
70         }
71 }
72 
73 EXPORT_SYMBOL(ide_xfer_verbose);
74 
75 /**
76  *	ide_dma_speed	-	compute DMA speed
77  *	@drive: drive
78  *	@mode; intended mode
79  *
80  *	Checks the drive capabilities and returns the speed to use
81  *	for the transfer. Returns -1 if the requested mode is unknown
82  *	(eg PIO)
83  */
84 
ide_dma_speed(ide_drive_t * drive,u8 mode)85 u8 ide_dma_speed(ide_drive_t *drive, u8 mode)
86 {
87 	struct hd_driveid *id   = drive->id;
88 	ide_hwif_t *hwif	= HWIF(drive);
89 	u8 speed = 0;
90 
91 	if (drive->media != ide_disk && hwif->atapi_dma == 0)
92 		return 0;
93 
94 	switch(mode) {
95 		case 0x04:
96 			if ((id->dma_ultra & 0x0040) &&
97 			    (id->dma_ultra & hwif->ultra_mask))
98 				{ speed = XFER_UDMA_6; break; }
99 		case 0x03:
100 			if ((id->dma_ultra & 0x0020) &&
101 			    (id->dma_ultra & hwif->ultra_mask))
102 				{ speed = XFER_UDMA_5; break; }
103 		case 0x02:
104 			if ((id->dma_ultra & 0x0010) &&
105 			    (id->dma_ultra & hwif->ultra_mask))
106 				{ speed = XFER_UDMA_4; break; }
107 			if ((id->dma_ultra & 0x0008) &&
108 			    (id->dma_ultra & hwif->ultra_mask))
109 				{ speed = XFER_UDMA_3; break; }
110 		case 0x01:
111 			if ((id->dma_ultra & 0x0004) &&
112 			    (id->dma_ultra & hwif->ultra_mask))
113 				{ speed = XFER_UDMA_2; break; }
114 			if ((id->dma_ultra & 0x0002) &&
115 			    (id->dma_ultra & hwif->ultra_mask))
116 				{ speed = XFER_UDMA_1; break; }
117 			if ((id->dma_ultra & 0x0001) &&
118 			    (id->dma_ultra & hwif->ultra_mask))
119 				{ speed = XFER_UDMA_0; break; }
120 		case 0x00:
121 			if ((id->dma_mword & 0x0004) &&
122 			    (id->dma_mword & hwif->mwdma_mask))
123 				{ speed = XFER_MW_DMA_2; break; }
124 			if ((id->dma_mword & 0x0002) &&
125 			    (id->dma_mword & hwif->mwdma_mask))
126 				{ speed = XFER_MW_DMA_1; break; }
127 			if ((id->dma_mword & 0x0001) &&
128 			    (id->dma_mword & hwif->mwdma_mask))
129 				{ speed = XFER_MW_DMA_0; break; }
130 			if ((id->dma_1word & 0x0004) &&
131 			    (id->dma_1word & hwif->swdma_mask))
132 				{ speed = XFER_SW_DMA_2; break; }
133 			if ((id->dma_1word & 0x0002) &&
134 			    (id->dma_1word & hwif->swdma_mask))
135 				{ speed = XFER_SW_DMA_1; break; }
136 			if ((id->dma_1word & 0x0001) &&
137 			    (id->dma_1word & hwif->swdma_mask))
138 				{ speed = XFER_SW_DMA_0; break; }
139 	}
140 
141 //	printk("%s: %s: mode 0x%02x, speed 0x%02x\n",
142 //		__FUNCTION__, drive->name, mode, speed);
143 
144 	return speed;
145 }
146 
147 EXPORT_SYMBOL(ide_dma_speed);
148 
149 
150 /**
151  *	ide_rate_filter		-	return best speed for mode
152  *	@mode: modes available
153  *	@speed: desired speed
154  *
155  *	Given the available DMA/UDMA mode this function returns
156  *	the best available speed at or below the speed requested.
157  */
158 
ide_rate_filter(u8 mode,u8 speed)159 u8 ide_rate_filter (u8 mode, u8 speed)
160 {
161 #ifdef CONFIG_BLK_DEV_IDEDMA
162 	static u8 speed_max[] = {
163 		XFER_MW_DMA_2, XFER_UDMA_2, XFER_UDMA_4,
164 		XFER_UDMA_5, XFER_UDMA_6
165 	};
166 
167 //	printk("%s: mode 0x%02x, speed 0x%02x\n", __FUNCTION__, mode, speed);
168 
169 	/* So that we remember to update this if new modes appear */
170 	if (mode > 4)
171 		BUG();
172 	return min(speed, speed_max[mode]);
173 #else /* !CONFIG_BLK_DEV_IDEDMA */
174 	return min(speed, XFER_PIO_4);
175 #endif /* CONFIG_BLK_DEV_IDEDMA */
176 }
177 
178 EXPORT_SYMBOL(ide_rate_filter);
179 
ide_dma_enable(ide_drive_t * drive)180 int ide_dma_enable (ide_drive_t *drive)
181 {
182 	ide_hwif_t *hwif	= HWIF(drive);
183 	struct hd_driveid *id	= drive->id;
184 
185 	return ((int)	((((id->dma_ultra >> 8) & hwif->ultra_mask) ||
186 			  ((id->dma_mword >> 8) & hwif->mwdma_mask) ||
187 			  ((id->dma_1word >> 8) & hwif->swdma_mask)) ? 1 : 0));
188 }
189 
190 EXPORT_SYMBOL(ide_dma_enable);
191 
192 const ide_pio_timings_t ide_pio_timings[6] = {
193 	{ 70,	165,	600 },	/* PIO Mode 0 */
194 	{ 50,	125,	383 },	/* PIO Mode 1 */
195 	{ 30,	100,	240 },	/* PIO Mode 2 */
196 	{ 30,	80,	180 },	/* PIO Mode 3 with IORDY */
197 	{ 25,	70,	120 },	/* PIO Mode 4 with IORDY */
198 	{ 20,	50,	100 }	/* PIO Mode 5 with IORDY (nonstandard) */
199 };
200 
201 EXPORT_SYMBOL_GPL(ide_pio_timings);
202 
203 /*
204  * Black list. Some drives incorrectly report their maximal PIO mode,
205  * at least in respect to CMD640. Here we keep info on some known drives.
206  */
207 static struct ide_pio_info {
208 	const char	*name;
209 	int		pio;
210 } ide_pio_blacklist [] = {
211 /*	{ "Conner Peripherals 1275MB - CFS1275A", 4 }, */
212 	{ "Conner Peripherals 540MB - CFS540A", 3 },
213 
214 	{ "WDC AC2700",  3 },
215 	{ "WDC AC2540",  3 },
216 	{ "WDC AC2420",  3 },
217 	{ "WDC AC2340",  3 },
218 	{ "WDC AC2250",  0 },
219 	{ "WDC AC2200",  0 },
220 	{ "WDC AC21200", 4 },
221 	{ "WDC AC2120",  0 },
222 	{ "WDC AC2850",  3 },
223 	{ "WDC AC1270",  3 },
224 	{ "WDC AC1170",  1 },
225 	{ "WDC AC1210",  1 },
226 	{ "WDC AC280",   0 },
227 /*	{ "WDC AC21000", 4 }, */
228 	{ "WDC AC31000", 3 },
229 	{ "WDC AC31200", 3 },
230 /*	{ "WDC AC31600", 4 }, */
231 
232 	{ "Maxtor 7131 AT", 1 },
233 	{ "Maxtor 7171 AT", 1 },
234 	{ "Maxtor 7213 AT", 1 },
235 	{ "Maxtor 7245 AT", 1 },
236 	{ "Maxtor 7345 AT", 1 },
237 	{ "Maxtor 7546 AT", 3 },
238 	{ "Maxtor 7540 AV", 3 },
239 
240 	{ "SAMSUNG SHD-3121A", 1 },
241 	{ "SAMSUNG SHD-3122A", 1 },
242 	{ "SAMSUNG SHD-3172A", 1 },
243 
244 /*	{ "ST51080A", 4 },
245  *	{ "ST51270A", 4 },
246  *	{ "ST31220A", 4 },
247  *	{ "ST31640A", 4 },
248  *	{ "ST32140A", 4 },
249  *	{ "ST3780A",  4 },
250  */
251 	{ "ST5660A",  3 },
252 	{ "ST3660A",  3 },
253 	{ "ST3630A",  3 },
254 	{ "ST3655A",  3 },
255 	{ "ST3391A",  3 },
256 	{ "ST3390A",  1 },
257 	{ "ST3600A",  1 },
258 	{ "ST3290A",  0 },
259 	{ "ST3144A",  0 },
260 	{ "ST3491A",  1 },	/* reports 3, should be 1 or 2 (depending on */
261 				/* drive) according to Seagates FIND-ATA program */
262 
263 	{ "QUANTUM ELS127A", 0 },
264 	{ "QUANTUM ELS170A", 0 },
265 	{ "QUANTUM LPS240A", 0 },
266 	{ "QUANTUM LPS210A", 3 },
267 	{ "QUANTUM LPS270A", 3 },
268 	{ "QUANTUM LPS365A", 3 },
269 	{ "QUANTUM LPS540A", 3 },
270 	{ "QUANTUM LIGHTNING 540A", 3 },
271 	{ "QUANTUM LIGHTNING 730A", 3 },
272 
273         { "QUANTUM FIREBALL_540", 3 }, /* Older Quantum Fireballs don't work */
274         { "QUANTUM FIREBALL_640", 3 },
275         { "QUANTUM FIREBALL_1080", 3 },
276         { "QUANTUM FIREBALL_1280", 3 },
277 	{ NULL,	0 }
278 };
279 
280 /**
281  *	ide_scan_pio_blacklist 	-	check for a blacklisted drive
282  *	@model: Drive model string
283  *
284  *	This routine searches the ide_pio_blacklist for an entry
285  *	matching the start/whole of the supplied model name.
286  *
287  *	Returns -1 if no match found.
288  *	Otherwise returns the recommended PIO mode from ide_pio_blacklist[].
289  */
290 
ide_scan_pio_blacklist(char * model)291 static int ide_scan_pio_blacklist (char *model)
292 {
293 	struct ide_pio_info *p;
294 
295 	for (p = ide_pio_blacklist; p->name != NULL; p++) {
296 		if (strncmp(p->name, model, strlen(p->name)) == 0)
297 			return p->pio;
298 	}
299 	return -1;
300 }
301 
302 /**
303  *	ide_get_best_pio_mode	-	get PIO mode from drive
304  *	@driver: drive to consider
305  *	@mode_wanted: preferred mode
306  *	@max_mode: highest allowed
307  *	@d: pio data
308  *
309  *	This routine returns the recommended PIO settings for a given drive,
310  *	based on the drive->id information and the ide_pio_blacklist[].
311  *	This is used by most chipset support modules when "auto-tuning".
312  *
313  *	Drive PIO mode auto selection
314  */
315 
ide_get_best_pio_mode(ide_drive_t * drive,u8 mode_wanted,u8 max_mode,ide_pio_data_t * d)316 u8 ide_get_best_pio_mode (ide_drive_t *drive, u8 mode_wanted, u8 max_mode, ide_pio_data_t *d)
317 {
318 	int pio_mode;
319 	int cycle_time = 0;
320 	int use_iordy = 0;
321 	struct hd_driveid* id = drive->id;
322 	int overridden  = 0;
323 	int blacklisted = 0;
324 
325 	if (mode_wanted != 255) {
326 		pio_mode = mode_wanted;
327 	} else if (!drive->id) {
328 		pio_mode = 0;
329 	} else if ((pio_mode = ide_scan_pio_blacklist(id->model)) != -1) {
330 		overridden = 1;
331 		blacklisted = 1;
332 		use_iordy = (pio_mode > 2);
333 	} else {
334 		pio_mode = id->tPIO;
335 		if (pio_mode > 2) {	/* 2 is maximum allowed tPIO value */
336 			pio_mode = 2;
337 			overridden = 1;
338 		}
339 		if (id->field_valid & 2) {	  /* drive implements ATA2? */
340 			if (id->capability & 8) { /* drive supports use_iordy? */
341 				use_iordy = 1;
342 				cycle_time = id->eide_pio_iordy;
343 				if (id->eide_pio_modes & 7) {
344 					overridden = 0;
345 					if (id->eide_pio_modes & 4)
346 						pio_mode = 5;
347 					else if (id->eide_pio_modes & 2)
348 						pio_mode = 4;
349 					else
350 						pio_mode = 3;
351 				}
352 			} else {
353 				cycle_time = id->eide_pio;
354 			}
355 		}
356 
357 #if 0
358 		if (drive->id->major_rev_num & 0x0004) printk("ATA-2 ");
359 #endif
360 
361 		/*
362 		 * Conservative "downgrade" for all pre-ATA2 drives
363 		 */
364 		if (pio_mode && pio_mode < 4) {
365 			pio_mode--;
366 			overridden = 1;
367 #if 0
368 			use_iordy = (pio_mode > 2);
369 #endif
370 			if (cycle_time && cycle_time < ide_pio_timings[pio_mode].cycle_time)
371 				cycle_time = 0; /* use standard timing */
372 		}
373 	}
374 	if (pio_mode > max_mode) {
375 		pio_mode = max_mode;
376 		cycle_time = 0;
377 	}
378 	if (d) {
379 		d->pio_mode = pio_mode;
380 		d->cycle_time = cycle_time ? cycle_time : ide_pio_timings[pio_mode].cycle_time;
381 		d->use_iordy = use_iordy;
382 		d->overridden = overridden;
383 		d->blacklisted = blacklisted;
384 	}
385 	return pio_mode;
386 }
387 
388 EXPORT_SYMBOL_GPL(ide_get_best_pio_mode);
389 
390 /**
391  *	ide_toggle_bounce	-	handle bounce buffering
392  *	@drive: drive to update
393  *	@on: on/off boolean
394  *
395  *	Enable or disable bounce buffering for the device. Drives move
396  *	between PIO and DMA and that changes the rules we need.
397  */
398 
ide_toggle_bounce(ide_drive_t * drive,int on)399 void ide_toggle_bounce(ide_drive_t *drive, int on)
400 {
401 	u64 addr = BLK_BOUNCE_HIGH;	/* dma64_addr_t */
402 
403 	if (on && drive->media == ide_disk) {
404 		if (!PCI_DMA_BUS_IS_PHYS)
405 			addr = BLK_BOUNCE_ANY;
406 		else
407 			addr = HWIF(drive)->pci_dev->dma_mask;
408 	}
409 
410 	blk_queue_bounce_limit(&drive->queue, addr);
411 }
412 
413 EXPORT_SYMBOL(ide_toggle_bounce);
414 
415 
416 /**
417  *	ide_set_xfer_rate	-	set transfer rate
418  *	@drive: drive to set
419  *	@speed: speed to attempt to set
420  *
421  *	General helper for setting the speed of an IDE device. This
422  *	function knows about user enforced limits from the configuration
423  *	which speedproc() does not.  High level drivers should never
424  *	invoke speedproc() directly.
425  */
426 
ide_set_xfer_rate(ide_drive_t * drive,u8 rate)427 int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
428 {
429 #ifndef CONFIG_BLK_DEV_IDEDMA
430 	rate = min(rate, (u8) XFER_PIO_4);
431 #endif
432 	if(HWIF(drive)->speedproc)
433 		return HWIF(drive)->speedproc(drive, rate);
434 	else
435 		return -1;
436 }
437 
438 EXPORT_SYMBOL_GPL(ide_set_xfer_rate);
439 
440