1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3
4 #include "ice.h"
5 #include "ice_base.h"
6 #include "ice_flow.h"
7 #include "ice_lib.h"
8 #include "ice_fltr.h"
9 #include "ice_dcb_lib.h"
10 #include "ice_devlink.h"
11 #include "ice_vsi_vlan_ops.h"
12
13 /**
14 * ice_vsi_type_str - maps VSI type enum to string equivalents
15 * @vsi_type: VSI type enum
16 */
ice_vsi_type_str(enum ice_vsi_type vsi_type)17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
18 {
19 switch (vsi_type) {
20 case ICE_VSI_PF:
21 return "ICE_VSI_PF";
22 case ICE_VSI_VF:
23 return "ICE_VSI_VF";
24 case ICE_VSI_CTRL:
25 return "ICE_VSI_CTRL";
26 case ICE_VSI_CHNL:
27 return "ICE_VSI_CHNL";
28 case ICE_VSI_LB:
29 return "ICE_VSI_LB";
30 case ICE_VSI_SWITCHDEV_CTRL:
31 return "ICE_VSI_SWITCHDEV_CTRL";
32 default:
33 return "unknown";
34 }
35 }
36
37 /**
38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
39 * @vsi: the VSI being configured
40 * @ena: start or stop the Rx rings
41 *
42 * First enable/disable all of the Rx rings, flush any remaining writes, and
43 * then verify that they have all been enabled/disabled successfully. This will
44 * let all of the register writes complete when enabling/disabling the Rx rings
45 * before waiting for the change in hardware to complete.
46 */
ice_vsi_ctrl_all_rx_rings(struct ice_vsi * vsi,bool ena)47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
48 {
49 int ret = 0;
50 u16 i;
51
52 ice_for_each_rxq(vsi, i)
53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false);
54
55 ice_flush(&vsi->back->hw);
56
57 ice_for_each_rxq(vsi, i) {
58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i);
59 if (ret)
60 break;
61 }
62
63 return ret;
64 }
65
66 /**
67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
68 * @vsi: VSI pointer
69 *
70 * On error: returns error code (negative)
71 * On success: returns 0
72 */
ice_vsi_alloc_arrays(struct ice_vsi * vsi)73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
74 {
75 struct ice_pf *pf = vsi->back;
76 struct device *dev;
77
78 dev = ice_pf_to_dev(pf);
79 if (vsi->type == ICE_VSI_CHNL)
80 return 0;
81
82 /* allocate memory for both Tx and Rx ring pointers */
83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq,
84 sizeof(*vsi->tx_rings), GFP_KERNEL);
85 if (!vsi->tx_rings)
86 return -ENOMEM;
87
88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq,
89 sizeof(*vsi->rx_rings), GFP_KERNEL);
90 if (!vsi->rx_rings)
91 goto err_rings;
92
93 /* txq_map needs to have enough space to track both Tx (stack) rings
94 * and XDP rings; at this point vsi->num_xdp_txq might not be set,
95 * so use num_possible_cpus() as we want to always provide XDP ring
96 * per CPU, regardless of queue count settings from user that might
97 * have come from ethtool's set_channels() callback;
98 */
99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()),
100 sizeof(*vsi->txq_map), GFP_KERNEL);
101
102 if (!vsi->txq_map)
103 goto err_txq_map;
104
105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq,
106 sizeof(*vsi->rxq_map), GFP_KERNEL);
107 if (!vsi->rxq_map)
108 goto err_rxq_map;
109
110 /* There is no need to allocate q_vectors for a loopback VSI. */
111 if (vsi->type == ICE_VSI_LB)
112 return 0;
113
114 /* allocate memory for q_vector pointers */
115 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors,
116 sizeof(*vsi->q_vectors), GFP_KERNEL);
117 if (!vsi->q_vectors)
118 goto err_vectors;
119
120 vsi->af_xdp_zc_qps = bitmap_zalloc(max_t(int, vsi->alloc_txq, vsi->alloc_rxq), GFP_KERNEL);
121 if (!vsi->af_xdp_zc_qps)
122 goto err_zc_qps;
123
124 return 0;
125
126 err_zc_qps:
127 devm_kfree(dev, vsi->q_vectors);
128 err_vectors:
129 devm_kfree(dev, vsi->rxq_map);
130 err_rxq_map:
131 devm_kfree(dev, vsi->txq_map);
132 err_txq_map:
133 devm_kfree(dev, vsi->rx_rings);
134 err_rings:
135 devm_kfree(dev, vsi->tx_rings);
136 return -ENOMEM;
137 }
138
139 /**
140 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
141 * @vsi: the VSI being configured
142 */
ice_vsi_set_num_desc(struct ice_vsi * vsi)143 static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
144 {
145 switch (vsi->type) {
146 case ICE_VSI_PF:
147 case ICE_VSI_SWITCHDEV_CTRL:
148 case ICE_VSI_CTRL:
149 case ICE_VSI_LB:
150 /* a user could change the values of num_[tr]x_desc using
151 * ethtool -G so we should keep those values instead of
152 * overwriting them with the defaults.
153 */
154 if (!vsi->num_rx_desc)
155 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
156 if (!vsi->num_tx_desc)
157 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
158 break;
159 default:
160 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
161 vsi->type);
162 break;
163 }
164 }
165
166 /**
167 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
168 * @vsi: the VSI being configured
169 * @vf: the VF associated with this VSI, if any
170 *
171 * Return 0 on success and a negative value on error
172 */
ice_vsi_set_num_qs(struct ice_vsi * vsi,struct ice_vf * vf)173 static void ice_vsi_set_num_qs(struct ice_vsi *vsi, struct ice_vf *vf)
174 {
175 enum ice_vsi_type vsi_type = vsi->type;
176 struct ice_pf *pf = vsi->back;
177
178 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
179 return;
180
181 switch (vsi_type) {
182 case ICE_VSI_PF:
183 if (vsi->req_txq) {
184 vsi->alloc_txq = vsi->req_txq;
185 vsi->num_txq = vsi->req_txq;
186 } else {
187 vsi->alloc_txq = min3(pf->num_lan_msix,
188 ice_get_avail_txq_count(pf),
189 (u16)num_online_cpus());
190 }
191
192 pf->num_lan_tx = vsi->alloc_txq;
193
194 /* only 1 Rx queue unless RSS is enabled */
195 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
196 vsi->alloc_rxq = 1;
197 } else {
198 if (vsi->req_rxq) {
199 vsi->alloc_rxq = vsi->req_rxq;
200 vsi->num_rxq = vsi->req_rxq;
201 } else {
202 vsi->alloc_rxq = min3(pf->num_lan_msix,
203 ice_get_avail_rxq_count(pf),
204 (u16)num_online_cpus());
205 }
206 }
207
208 pf->num_lan_rx = vsi->alloc_rxq;
209
210 vsi->num_q_vectors = min_t(int, pf->num_lan_msix,
211 max_t(int, vsi->alloc_rxq,
212 vsi->alloc_txq));
213 break;
214 case ICE_VSI_SWITCHDEV_CTRL:
215 /* The number of queues for ctrl VSI is equal to number of VFs.
216 * Each ring is associated to the corresponding VF_PR netdev.
217 */
218 vsi->alloc_txq = ice_get_num_vfs(pf);
219 vsi->alloc_rxq = vsi->alloc_txq;
220 vsi->num_q_vectors = 1;
221 break;
222 case ICE_VSI_VF:
223 if (vf->num_req_qs)
224 vf->num_vf_qs = vf->num_req_qs;
225 vsi->alloc_txq = vf->num_vf_qs;
226 vsi->alloc_rxq = vf->num_vf_qs;
227 /* pf->vfs.num_msix_per includes (VF miscellaneous vector +
228 * data queue interrupts). Since vsi->num_q_vectors is number
229 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the
230 * original vector count
231 */
232 vsi->num_q_vectors = pf->vfs.num_msix_per - ICE_NONQ_VECS_VF;
233 break;
234 case ICE_VSI_CTRL:
235 vsi->alloc_txq = 1;
236 vsi->alloc_rxq = 1;
237 vsi->num_q_vectors = 1;
238 break;
239 case ICE_VSI_CHNL:
240 vsi->alloc_txq = 0;
241 vsi->alloc_rxq = 0;
242 break;
243 case ICE_VSI_LB:
244 vsi->alloc_txq = 1;
245 vsi->alloc_rxq = 1;
246 break;
247 default:
248 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type);
249 break;
250 }
251
252 ice_vsi_set_num_desc(vsi);
253 }
254
255 /**
256 * ice_get_free_slot - get the next non-NULL location index in array
257 * @array: array to search
258 * @size: size of the array
259 * @curr: last known occupied index to be used as a search hint
260 *
261 * void * is being used to keep the functionality generic. This lets us use this
262 * function on any array of pointers.
263 */
ice_get_free_slot(void * array,int size,int curr)264 static int ice_get_free_slot(void *array, int size, int curr)
265 {
266 int **tmp_array = (int **)array;
267 int next;
268
269 if (curr < (size - 1) && !tmp_array[curr + 1]) {
270 next = curr + 1;
271 } else {
272 int i = 0;
273
274 while ((i < size) && (tmp_array[i]))
275 i++;
276 if (i == size)
277 next = ICE_NO_VSI;
278 else
279 next = i;
280 }
281 return next;
282 }
283
284 /**
285 * ice_vsi_delete - delete a VSI from the switch
286 * @vsi: pointer to VSI being removed
287 */
ice_vsi_delete(struct ice_vsi * vsi)288 void ice_vsi_delete(struct ice_vsi *vsi)
289 {
290 struct ice_pf *pf = vsi->back;
291 struct ice_vsi_ctx *ctxt;
292 int status;
293
294 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
295 if (!ctxt)
296 return;
297
298 if (vsi->type == ICE_VSI_VF)
299 ctxt->vf_num = vsi->vf->vf_id;
300 ctxt->vsi_num = vsi->vsi_num;
301
302 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
303
304 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
305 if (status)
306 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n",
307 vsi->vsi_num, status);
308
309 kfree(ctxt);
310 }
311
312 /**
313 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI
314 * @vsi: pointer to VSI being cleared
315 */
ice_vsi_free_arrays(struct ice_vsi * vsi)316 static void ice_vsi_free_arrays(struct ice_vsi *vsi)
317 {
318 struct ice_pf *pf = vsi->back;
319 struct device *dev;
320
321 dev = ice_pf_to_dev(pf);
322
323 if (vsi->af_xdp_zc_qps) {
324 bitmap_free(vsi->af_xdp_zc_qps);
325 vsi->af_xdp_zc_qps = NULL;
326 }
327 /* free the ring and vector containers */
328 if (vsi->q_vectors) {
329 devm_kfree(dev, vsi->q_vectors);
330 vsi->q_vectors = NULL;
331 }
332 if (vsi->tx_rings) {
333 devm_kfree(dev, vsi->tx_rings);
334 vsi->tx_rings = NULL;
335 }
336 if (vsi->rx_rings) {
337 devm_kfree(dev, vsi->rx_rings);
338 vsi->rx_rings = NULL;
339 }
340 if (vsi->txq_map) {
341 devm_kfree(dev, vsi->txq_map);
342 vsi->txq_map = NULL;
343 }
344 if (vsi->rxq_map) {
345 devm_kfree(dev, vsi->rxq_map);
346 vsi->rxq_map = NULL;
347 }
348 }
349
350 /**
351 * ice_vsi_clear - clean up and deallocate the provided VSI
352 * @vsi: pointer to VSI being cleared
353 *
354 * This deallocates the VSI's queue resources, removes it from the PF's
355 * VSI array if necessary, and deallocates the VSI
356 *
357 * Returns 0 on success, negative on failure
358 */
ice_vsi_clear(struct ice_vsi * vsi)359 int ice_vsi_clear(struct ice_vsi *vsi)
360 {
361 struct ice_pf *pf = NULL;
362 struct device *dev;
363
364 if (!vsi)
365 return 0;
366
367 if (!vsi->back)
368 return -EINVAL;
369
370 pf = vsi->back;
371 dev = ice_pf_to_dev(pf);
372
373 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
374 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
375 return -EINVAL;
376 }
377
378 mutex_lock(&pf->sw_mutex);
379 /* updates the PF for this cleared VSI */
380
381 pf->vsi[vsi->idx] = NULL;
382 if (vsi->idx < pf->next_vsi && vsi->type != ICE_VSI_CTRL)
383 pf->next_vsi = vsi->idx;
384 if (vsi->idx < pf->next_vsi && vsi->type == ICE_VSI_CTRL && vsi->vf)
385 pf->next_vsi = vsi->idx;
386
387 ice_vsi_free_arrays(vsi);
388 mutex_unlock(&pf->sw_mutex);
389 devm_kfree(dev, vsi);
390
391 return 0;
392 }
393
394 /**
395 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI
396 * @irq: interrupt number
397 * @data: pointer to a q_vector
398 */
ice_msix_clean_ctrl_vsi(int __always_unused irq,void * data)399 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
400 {
401 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
402
403 if (!q_vector->tx.tx_ring)
404 return IRQ_HANDLED;
405
406 #define FDIR_RX_DESC_CLEAN_BUDGET 64
407 ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET);
408 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring);
409
410 return IRQ_HANDLED;
411 }
412
413 /**
414 * ice_msix_clean_rings - MSIX mode Interrupt Handler
415 * @irq: interrupt number
416 * @data: pointer to a q_vector
417 */
ice_msix_clean_rings(int __always_unused irq,void * data)418 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
419 {
420 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
421
422 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
423 return IRQ_HANDLED;
424
425 q_vector->total_events++;
426
427 napi_schedule(&q_vector->napi);
428
429 return IRQ_HANDLED;
430 }
431
ice_eswitch_msix_clean_rings(int __always_unused irq,void * data)432 static irqreturn_t ice_eswitch_msix_clean_rings(int __always_unused irq, void *data)
433 {
434 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
435 struct ice_pf *pf = q_vector->vsi->back;
436 struct ice_vf *vf;
437 unsigned int bkt;
438
439 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
440 return IRQ_HANDLED;
441
442 rcu_read_lock();
443 ice_for_each_vf_rcu(pf, bkt, vf)
444 napi_schedule(&vf->repr->q_vector->napi);
445 rcu_read_unlock();
446
447 return IRQ_HANDLED;
448 }
449
450 /**
451 * ice_vsi_alloc - Allocates the next available struct VSI in the PF
452 * @pf: board private structure
453 * @vsi_type: type of VSI
454 * @ch: ptr to channel
455 * @vf: VF for ICE_VSI_VF and ICE_VSI_CTRL
456 *
457 * The VF pointer is used for ICE_VSI_VF and ICE_VSI_CTRL. For ICE_VSI_CTRL,
458 * it may be NULL in the case there is no association with a VF. For
459 * ICE_VSI_VF the VF pointer *must not* be NULL.
460 *
461 * returns a pointer to a VSI on success, NULL on failure.
462 */
463 static struct ice_vsi *
ice_vsi_alloc(struct ice_pf * pf,enum ice_vsi_type vsi_type,struct ice_channel * ch,struct ice_vf * vf)464 ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type vsi_type,
465 struct ice_channel *ch, struct ice_vf *vf)
466 {
467 struct device *dev = ice_pf_to_dev(pf);
468 struct ice_vsi *vsi = NULL;
469
470 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
471 return NULL;
472
473 /* Need to protect the allocation of the VSIs at the PF level */
474 mutex_lock(&pf->sw_mutex);
475
476 /* If we have already allocated our maximum number of VSIs,
477 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
478 * is available to be populated
479 */
480 if (pf->next_vsi == ICE_NO_VSI) {
481 dev_dbg(dev, "out of VSI slots!\n");
482 goto unlock_pf;
483 }
484
485 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL);
486 if (!vsi)
487 goto unlock_pf;
488
489 vsi->type = vsi_type;
490 vsi->back = pf;
491 set_bit(ICE_VSI_DOWN, vsi->state);
492
493 if (vsi_type == ICE_VSI_VF)
494 ice_vsi_set_num_qs(vsi, vf);
495 else if (vsi_type != ICE_VSI_CHNL)
496 ice_vsi_set_num_qs(vsi, NULL);
497
498 switch (vsi->type) {
499 case ICE_VSI_SWITCHDEV_CTRL:
500 if (ice_vsi_alloc_arrays(vsi))
501 goto err_rings;
502
503 /* Setup eswitch MSIX irq handler for VSI */
504 vsi->irq_handler = ice_eswitch_msix_clean_rings;
505 break;
506 case ICE_VSI_PF:
507 if (ice_vsi_alloc_arrays(vsi))
508 goto err_rings;
509
510 /* Setup default MSIX irq handler for VSI */
511 vsi->irq_handler = ice_msix_clean_rings;
512 break;
513 case ICE_VSI_CTRL:
514 if (ice_vsi_alloc_arrays(vsi))
515 goto err_rings;
516
517 /* Setup ctrl VSI MSIX irq handler */
518 vsi->irq_handler = ice_msix_clean_ctrl_vsi;
519
520 /* For the PF control VSI this is NULL, for the VF control VSI
521 * this will be the first VF to allocate it.
522 */
523 vsi->vf = vf;
524 break;
525 case ICE_VSI_VF:
526 if (ice_vsi_alloc_arrays(vsi))
527 goto err_rings;
528 vsi->vf = vf;
529 break;
530 case ICE_VSI_CHNL:
531 if (!ch)
532 goto err_rings;
533 vsi->num_rxq = ch->num_rxq;
534 vsi->num_txq = ch->num_txq;
535 vsi->next_base_q = ch->base_q;
536 break;
537 case ICE_VSI_LB:
538 if (ice_vsi_alloc_arrays(vsi))
539 goto err_rings;
540 break;
541 default:
542 dev_warn(dev, "Unknown VSI type %d\n", vsi->type);
543 goto unlock_pf;
544 }
545
546 if (vsi->type == ICE_VSI_CTRL && !vf) {
547 /* Use the last VSI slot as the index for PF control VSI */
548 vsi->idx = pf->num_alloc_vsi - 1;
549 pf->ctrl_vsi_idx = vsi->idx;
550 pf->vsi[vsi->idx] = vsi;
551 } else {
552 /* fill slot and make note of the index */
553 vsi->idx = pf->next_vsi;
554 pf->vsi[pf->next_vsi] = vsi;
555
556 /* prepare pf->next_vsi for next use */
557 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
558 pf->next_vsi);
559 }
560
561 if (vsi->type == ICE_VSI_CTRL && vf)
562 vf->ctrl_vsi_idx = vsi->idx;
563 goto unlock_pf;
564
565 err_rings:
566 devm_kfree(dev, vsi);
567 vsi = NULL;
568 unlock_pf:
569 mutex_unlock(&pf->sw_mutex);
570 return vsi;
571 }
572
573 /**
574 * ice_alloc_fd_res - Allocate FD resource for a VSI
575 * @vsi: pointer to the ice_vsi
576 *
577 * This allocates the FD resources
578 *
579 * Returns 0 on success, -EPERM on no-op or -EIO on failure
580 */
ice_alloc_fd_res(struct ice_vsi * vsi)581 static int ice_alloc_fd_res(struct ice_vsi *vsi)
582 {
583 struct ice_pf *pf = vsi->back;
584 u32 g_val, b_val;
585
586 /* Flow Director filters are only allocated/assigned to the PF VSI or
587 * CHNL VSI which passes the traffic. The CTRL VSI is only used to
588 * add/delete filters so resources are not allocated to it
589 */
590 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
591 return -EPERM;
592
593 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF ||
594 vsi->type == ICE_VSI_CHNL))
595 return -EPERM;
596
597 /* FD filters from guaranteed pool per VSI */
598 g_val = pf->hw.func_caps.fd_fltr_guar;
599 if (!g_val)
600 return -EPERM;
601
602 /* FD filters from best effort pool */
603 b_val = pf->hw.func_caps.fd_fltr_best_effort;
604 if (!b_val)
605 return -EPERM;
606
607 /* PF main VSI gets only 64 FD resources from guaranteed pool
608 * when ADQ is configured.
609 */
610 #define ICE_PF_VSI_GFLTR 64
611
612 /* determine FD filter resources per VSI from shared(best effort) and
613 * dedicated pool
614 */
615 if (vsi->type == ICE_VSI_PF) {
616 vsi->num_gfltr = g_val;
617 /* if MQPRIO is configured, main VSI doesn't get all FD
618 * resources from guaranteed pool. PF VSI gets 64 FD resources
619 */
620 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) {
621 if (g_val < ICE_PF_VSI_GFLTR)
622 return -EPERM;
623 /* allow bare minimum entries for PF VSI */
624 vsi->num_gfltr = ICE_PF_VSI_GFLTR;
625 }
626
627 /* each VSI gets same "best_effort" quota */
628 vsi->num_bfltr = b_val;
629 } else if (vsi->type == ICE_VSI_VF) {
630 vsi->num_gfltr = 0;
631
632 /* each VSI gets same "best_effort" quota */
633 vsi->num_bfltr = b_val;
634 } else {
635 struct ice_vsi *main_vsi;
636 int numtc;
637
638 main_vsi = ice_get_main_vsi(pf);
639 if (!main_vsi)
640 return -EPERM;
641
642 if (!main_vsi->all_numtc)
643 return -EINVAL;
644
645 /* figure out ADQ numtc */
646 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC;
647
648 /* only one TC but still asking resources for channels,
649 * invalid config
650 */
651 if (numtc < ICE_CHNL_START_TC)
652 return -EPERM;
653
654 g_val -= ICE_PF_VSI_GFLTR;
655 /* channel VSIs gets equal share from guaranteed pool */
656 vsi->num_gfltr = g_val / numtc;
657
658 /* each VSI gets same "best_effort" quota */
659 vsi->num_bfltr = b_val;
660 }
661
662 return 0;
663 }
664
665 /**
666 * ice_vsi_get_qs - Assign queues from PF to VSI
667 * @vsi: the VSI to assign queues to
668 *
669 * Returns 0 on success and a negative value on error
670 */
ice_vsi_get_qs(struct ice_vsi * vsi)671 static int ice_vsi_get_qs(struct ice_vsi *vsi)
672 {
673 struct ice_pf *pf = vsi->back;
674 struct ice_qs_cfg tx_qs_cfg = {
675 .qs_mutex = &pf->avail_q_mutex,
676 .pf_map = pf->avail_txqs,
677 .pf_map_size = pf->max_pf_txqs,
678 .q_count = vsi->alloc_txq,
679 .scatter_count = ICE_MAX_SCATTER_TXQS,
680 .vsi_map = vsi->txq_map,
681 .vsi_map_offset = 0,
682 .mapping_mode = ICE_VSI_MAP_CONTIG
683 };
684 struct ice_qs_cfg rx_qs_cfg = {
685 .qs_mutex = &pf->avail_q_mutex,
686 .pf_map = pf->avail_rxqs,
687 .pf_map_size = pf->max_pf_rxqs,
688 .q_count = vsi->alloc_rxq,
689 .scatter_count = ICE_MAX_SCATTER_RXQS,
690 .vsi_map = vsi->rxq_map,
691 .vsi_map_offset = 0,
692 .mapping_mode = ICE_VSI_MAP_CONTIG
693 };
694 int ret;
695
696 if (vsi->type == ICE_VSI_CHNL)
697 return 0;
698
699 ret = __ice_vsi_get_qs(&tx_qs_cfg);
700 if (ret)
701 return ret;
702 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
703
704 ret = __ice_vsi_get_qs(&rx_qs_cfg);
705 if (ret)
706 return ret;
707 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
708
709 return 0;
710 }
711
712 /**
713 * ice_vsi_put_qs - Release queues from VSI to PF
714 * @vsi: the VSI that is going to release queues
715 */
ice_vsi_put_qs(struct ice_vsi * vsi)716 static void ice_vsi_put_qs(struct ice_vsi *vsi)
717 {
718 struct ice_pf *pf = vsi->back;
719 int i;
720
721 mutex_lock(&pf->avail_q_mutex);
722
723 ice_for_each_alloc_txq(vsi, i) {
724 clear_bit(vsi->txq_map[i], pf->avail_txqs);
725 vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
726 }
727
728 ice_for_each_alloc_rxq(vsi, i) {
729 clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
730 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
731 }
732
733 mutex_unlock(&pf->avail_q_mutex);
734 }
735
736 /**
737 * ice_is_safe_mode
738 * @pf: pointer to the PF struct
739 *
740 * returns true if driver is in safe mode, false otherwise
741 */
ice_is_safe_mode(struct ice_pf * pf)742 bool ice_is_safe_mode(struct ice_pf *pf)
743 {
744 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
745 }
746
747 /**
748 * ice_is_rdma_ena
749 * @pf: pointer to the PF struct
750 *
751 * returns true if RDMA is currently supported, false otherwise
752 */
ice_is_rdma_ena(struct ice_pf * pf)753 bool ice_is_rdma_ena(struct ice_pf *pf)
754 {
755 return test_bit(ICE_FLAG_RDMA_ENA, pf->flags);
756 }
757
758 /**
759 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration
760 * @vsi: the VSI being cleaned up
761 *
762 * This function deletes RSS input set for all flows that were configured
763 * for this VSI
764 */
ice_vsi_clean_rss_flow_fld(struct ice_vsi * vsi)765 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
766 {
767 struct ice_pf *pf = vsi->back;
768 int status;
769
770 if (ice_is_safe_mode(pf))
771 return;
772
773 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx);
774 if (status)
775 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n",
776 vsi->vsi_num, status);
777 }
778
779 /**
780 * ice_rss_clean - Delete RSS related VSI structures and configuration
781 * @vsi: the VSI being removed
782 */
ice_rss_clean(struct ice_vsi * vsi)783 static void ice_rss_clean(struct ice_vsi *vsi)
784 {
785 struct ice_pf *pf = vsi->back;
786 struct device *dev;
787
788 dev = ice_pf_to_dev(pf);
789
790 if (vsi->rss_hkey_user)
791 devm_kfree(dev, vsi->rss_hkey_user);
792 if (vsi->rss_lut_user)
793 devm_kfree(dev, vsi->rss_lut_user);
794
795 ice_vsi_clean_rss_flow_fld(vsi);
796 /* remove RSS replay list */
797 if (!ice_is_safe_mode(pf))
798 ice_rem_vsi_rss_list(&pf->hw, vsi->idx);
799 }
800
801 /**
802 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
803 * @vsi: the VSI being configured
804 */
ice_vsi_set_rss_params(struct ice_vsi * vsi)805 static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
806 {
807 struct ice_hw_common_caps *cap;
808 struct ice_pf *pf = vsi->back;
809
810 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
811 vsi->rss_size = 1;
812 return;
813 }
814
815 cap = &pf->hw.func_caps.common_cap;
816 switch (vsi->type) {
817 case ICE_VSI_CHNL:
818 case ICE_VSI_PF:
819 /* PF VSI will inherit RSS instance of PF */
820 vsi->rss_table_size = (u16)cap->rss_table_size;
821 if (vsi->type == ICE_VSI_CHNL)
822 vsi->rss_size = min_t(u16, vsi->num_rxq,
823 BIT(cap->rss_table_entry_width));
824 else
825 vsi->rss_size = min_t(u16, num_online_cpus(),
826 BIT(cap->rss_table_entry_width));
827 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
828 break;
829 case ICE_VSI_SWITCHDEV_CTRL:
830 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
831 vsi->rss_size = min_t(u16, num_online_cpus(),
832 BIT(cap->rss_table_entry_width));
833 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
834 break;
835 case ICE_VSI_VF:
836 /* VF VSI will get a small RSS table.
837 * For VSI_LUT, LUT size should be set to 64 bytes.
838 */
839 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
840 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
841 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
842 break;
843 case ICE_VSI_LB:
844 break;
845 default:
846 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
847 ice_vsi_type_str(vsi->type));
848 break;
849 }
850 }
851
852 /**
853 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
854 * @hw: HW structure used to determine the VLAN mode of the device
855 * @ctxt: the VSI context being set
856 *
857 * This initializes a default VSI context for all sections except the Queues.
858 */
ice_set_dflt_vsi_ctx(struct ice_hw * hw,struct ice_vsi_ctx * ctxt)859 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt)
860 {
861 u32 table = 0;
862
863 memset(&ctxt->info, 0, sizeof(ctxt->info));
864 /* VSI's should be allocated from shared pool */
865 ctxt->alloc_from_pool = true;
866 /* Src pruning enabled by default */
867 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
868 /* Traffic from VSI can be sent to LAN */
869 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
870 /* allow all untagged/tagged packets by default on Tx */
871 ctxt->info.inner_vlan_flags = ((ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL &
872 ICE_AQ_VSI_INNER_VLAN_TX_MODE_M) >>
873 ICE_AQ_VSI_INNER_VLAN_TX_MODE_S);
874 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which
875 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor.
876 *
877 * DVM - leave inner VLAN in packet by default
878 */
879 if (ice_is_dvm_ena(hw)) {
880 ctxt->info.inner_vlan_flags |=
881 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING;
882 ctxt->info.outer_vlan_flags =
883 (ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL <<
884 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S) &
885 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M;
886 ctxt->info.outer_vlan_flags |=
887 (ICE_AQ_VSI_OUTER_TAG_VLAN_8100 <<
888 ICE_AQ_VSI_OUTER_TAG_TYPE_S) &
889 ICE_AQ_VSI_OUTER_TAG_TYPE_M;
890 }
891 /* Have 1:1 UP mapping for both ingress/egress tables */
892 table |= ICE_UP_TABLE_TRANSLATE(0, 0);
893 table |= ICE_UP_TABLE_TRANSLATE(1, 1);
894 table |= ICE_UP_TABLE_TRANSLATE(2, 2);
895 table |= ICE_UP_TABLE_TRANSLATE(3, 3);
896 table |= ICE_UP_TABLE_TRANSLATE(4, 4);
897 table |= ICE_UP_TABLE_TRANSLATE(5, 5);
898 table |= ICE_UP_TABLE_TRANSLATE(6, 6);
899 table |= ICE_UP_TABLE_TRANSLATE(7, 7);
900 ctxt->info.ingress_table = cpu_to_le32(table);
901 ctxt->info.egress_table = cpu_to_le32(table);
902 /* Have 1:1 UP mapping for outer to inner UP table */
903 ctxt->info.outer_up_table = cpu_to_le32(table);
904 /* No Outer tag support outer_tag_flags remains to zero */
905 }
906
907 /**
908 * ice_vsi_setup_q_map - Setup a VSI queue map
909 * @vsi: the VSI being configured
910 * @ctxt: VSI context structure
911 */
ice_vsi_setup_q_map(struct ice_vsi * vsi,struct ice_vsi_ctx * ctxt)912 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
913 {
914 u16 offset = 0, qmap = 0, tx_count = 0, pow = 0;
915 u16 num_txq_per_tc, num_rxq_per_tc;
916 u16 qcount_tx = vsi->alloc_txq;
917 u16 qcount_rx = vsi->alloc_rxq;
918 u8 netdev_tc = 0;
919 int i;
920
921 if (!vsi->tc_cfg.numtc) {
922 /* at least TC0 should be enabled by default */
923 vsi->tc_cfg.numtc = 1;
924 vsi->tc_cfg.ena_tc = 1;
925 }
926
927 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);
928 if (!num_rxq_per_tc)
929 num_rxq_per_tc = 1;
930 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;
931 if (!num_txq_per_tc)
932 num_txq_per_tc = 1;
933
934 /* find the (rounded up) power-of-2 of qcount */
935 pow = (u16)order_base_2(num_rxq_per_tc);
936
937 /* TC mapping is a function of the number of Rx queues assigned to the
938 * VSI for each traffic class and the offset of these queues.
939 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
940 * queues allocated to TC0. No:of queues is a power-of-2.
941 *
942 * If TC is not enabled, the queue offset is set to 0, and allocate one
943 * queue, this way, traffic for the given TC will be sent to the default
944 * queue.
945 *
946 * Setup number and offset of Rx queues for all TCs for the VSI
947 */
948 ice_for_each_traffic_class(i) {
949 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
950 /* TC is not enabled */
951 vsi->tc_cfg.tc_info[i].qoffset = 0;
952 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
953 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
954 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
955 ctxt->info.tc_mapping[i] = 0;
956 continue;
957 }
958
959 /* TC is enabled */
960 vsi->tc_cfg.tc_info[i].qoffset = offset;
961 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;
962 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;
963 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
964
965 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
966 ICE_AQ_VSI_TC_Q_OFFSET_M) |
967 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
968 ICE_AQ_VSI_TC_Q_NUM_M);
969 offset += num_rxq_per_tc;
970 tx_count += num_txq_per_tc;
971 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
972 }
973
974 /* if offset is non-zero, means it is calculated correctly based on
975 * enabled TCs for a given VSI otherwise qcount_rx will always
976 * be correct and non-zero because it is based off - VSI's
977 * allocated Rx queues which is at least 1 (hence qcount_tx will be
978 * at least 1)
979 */
980 if (offset)
981 vsi->num_rxq = offset;
982 else
983 vsi->num_rxq = num_rxq_per_tc;
984
985 if (vsi->num_rxq > vsi->alloc_rxq) {
986 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
987 vsi->num_rxq, vsi->alloc_rxq);
988 return -EINVAL;
989 }
990
991 vsi->num_txq = tx_count;
992 if (vsi->num_txq > vsi->alloc_txq) {
993 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
994 vsi->num_txq, vsi->alloc_txq);
995 return -EINVAL;
996 }
997
998 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
999 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
1000 /* since there is a chance that num_rxq could have been changed
1001 * in the above for loop, make num_txq equal to num_rxq.
1002 */
1003 vsi->num_txq = vsi->num_rxq;
1004 }
1005
1006 /* Rx queue mapping */
1007 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1008 /* q_mapping buffer holds the info for the first queue allocated for
1009 * this VSI in the PF space and also the number of queues associated
1010 * with this VSI.
1011 */
1012 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
1013 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
1014
1015 return 0;
1016 }
1017
1018 /**
1019 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI
1020 * @ctxt: the VSI context being set
1021 * @vsi: the VSI being configured
1022 */
ice_set_fd_vsi_ctx(struct ice_vsi_ctx * ctxt,struct ice_vsi * vsi)1023 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1024 {
1025 u8 dflt_q_group, dflt_q_prio;
1026 u16 dflt_q, report_q, val;
1027
1028 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL &&
1029 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL)
1030 return;
1031
1032 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
1033 ctxt->info.valid_sections |= cpu_to_le16(val);
1034 dflt_q = 0;
1035 dflt_q_group = 0;
1036 report_q = 0;
1037 dflt_q_prio = 0;
1038
1039 /* enable flow director filtering/programming */
1040 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
1041 ctxt->info.fd_options = cpu_to_le16(val);
1042 /* max of allocated flow director filters */
1043 ctxt->info.max_fd_fltr_dedicated =
1044 cpu_to_le16(vsi->num_gfltr);
1045 /* max of shared flow director filters any VSI may program */
1046 ctxt->info.max_fd_fltr_shared =
1047 cpu_to_le16(vsi->num_bfltr);
1048 /* default queue index within the VSI of the default FD */
1049 val = ((dflt_q << ICE_AQ_VSI_FD_DEF_Q_S) &
1050 ICE_AQ_VSI_FD_DEF_Q_M);
1051 /* target queue or queue group to the FD filter */
1052 val |= ((dflt_q_group << ICE_AQ_VSI_FD_DEF_GRP_S) &
1053 ICE_AQ_VSI_FD_DEF_GRP_M);
1054 ctxt->info.fd_def_q = cpu_to_le16(val);
1055 /* queue index on which FD filter completion is reported */
1056 val = ((report_q << ICE_AQ_VSI_FD_REPORT_Q_S) &
1057 ICE_AQ_VSI_FD_REPORT_Q_M);
1058 /* priority of the default qindex action */
1059 val |= ((dflt_q_prio << ICE_AQ_VSI_FD_DEF_PRIORITY_S) &
1060 ICE_AQ_VSI_FD_DEF_PRIORITY_M);
1061 ctxt->info.fd_report_opt = cpu_to_le16(val);
1062 }
1063
1064 /**
1065 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
1066 * @ctxt: the VSI context being set
1067 * @vsi: the VSI being configured
1068 */
ice_set_rss_vsi_ctx(struct ice_vsi_ctx * ctxt,struct ice_vsi * vsi)1069 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1070 {
1071 u8 lut_type, hash_type;
1072 struct device *dev;
1073 struct ice_pf *pf;
1074
1075 pf = vsi->back;
1076 dev = ice_pf_to_dev(pf);
1077
1078 switch (vsi->type) {
1079 case ICE_VSI_CHNL:
1080 case ICE_VSI_PF:
1081 /* PF VSI will inherit RSS instance of PF */
1082 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
1083 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1084 break;
1085 case ICE_VSI_VF:
1086 /* VF VSI will gets a small RSS table which is a VSI LUT type */
1087 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
1088 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1089 break;
1090 default:
1091 dev_dbg(dev, "Unsupported VSI type %s\n",
1092 ice_vsi_type_str(vsi->type));
1093 return;
1094 }
1095
1096 ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
1097 ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
1098 ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
1099 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
1100 }
1101
1102 static void
ice_chnl_vsi_setup_q_map(struct ice_vsi * vsi,struct ice_vsi_ctx * ctxt)1103 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1104 {
1105 struct ice_pf *pf = vsi->back;
1106 u16 qcount, qmap;
1107 u8 offset = 0;
1108 int pow;
1109
1110 qcount = min_t(int, vsi->num_rxq, pf->num_lan_msix);
1111
1112 pow = order_base_2(qcount);
1113 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
1114 ICE_AQ_VSI_TC_Q_OFFSET_M) |
1115 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
1116 ICE_AQ_VSI_TC_Q_NUM_M);
1117
1118 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1119 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1120 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q);
1121 ctxt->info.q_mapping[1] = cpu_to_le16(qcount);
1122 }
1123
1124 /**
1125 * ice_vsi_init - Create and initialize a VSI
1126 * @vsi: the VSI being configured
1127 * @init_vsi: is this call creating a VSI
1128 *
1129 * This initializes a VSI context depending on the VSI type to be added and
1130 * passes it down to the add_vsi aq command to create a new VSI.
1131 */
ice_vsi_init(struct ice_vsi * vsi,bool init_vsi)1132 static int ice_vsi_init(struct ice_vsi *vsi, bool init_vsi)
1133 {
1134 struct ice_pf *pf = vsi->back;
1135 struct ice_hw *hw = &pf->hw;
1136 struct ice_vsi_ctx *ctxt;
1137 struct device *dev;
1138 int ret = 0;
1139
1140 dev = ice_pf_to_dev(pf);
1141 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1142 if (!ctxt)
1143 return -ENOMEM;
1144
1145 switch (vsi->type) {
1146 case ICE_VSI_CTRL:
1147 case ICE_VSI_LB:
1148 case ICE_VSI_PF:
1149 ctxt->flags = ICE_AQ_VSI_TYPE_PF;
1150 break;
1151 case ICE_VSI_SWITCHDEV_CTRL:
1152 case ICE_VSI_CHNL:
1153 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2;
1154 break;
1155 case ICE_VSI_VF:
1156 ctxt->flags = ICE_AQ_VSI_TYPE_VF;
1157 /* VF number here is the absolute VF number (0-255) */
1158 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id;
1159 break;
1160 default:
1161 ret = -ENODEV;
1162 goto out;
1163 }
1164
1165 /* Handle VLAN pruning for channel VSI if main VSI has VLAN
1166 * prune enabled
1167 */
1168 if (vsi->type == ICE_VSI_CHNL) {
1169 struct ice_vsi *main_vsi;
1170
1171 main_vsi = ice_get_main_vsi(pf);
1172 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi))
1173 ctxt->info.sw_flags2 |=
1174 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1175 else
1176 ctxt->info.sw_flags2 &=
1177 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1178 }
1179
1180 ice_set_dflt_vsi_ctx(hw, ctxt);
1181 if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
1182 ice_set_fd_vsi_ctx(ctxt, vsi);
1183 /* if the switch is in VEB mode, allow VSI loopback */
1184 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
1185 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
1186
1187 /* Set LUT type and HASH type if RSS is enabled */
1188 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
1189 vsi->type != ICE_VSI_CTRL) {
1190 ice_set_rss_vsi_ctx(ctxt, vsi);
1191 /* if updating VSI context, make sure to set valid_section:
1192 * to indicate which section of VSI context being updated
1193 */
1194 if (!init_vsi)
1195 ctxt->info.valid_sections |=
1196 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1197 }
1198
1199 ctxt->info.sw_id = vsi->port_info->sw_id;
1200 if (vsi->type == ICE_VSI_CHNL) {
1201 ice_chnl_vsi_setup_q_map(vsi, ctxt);
1202 } else {
1203 ret = ice_vsi_setup_q_map(vsi, ctxt);
1204 if (ret)
1205 goto out;
1206
1207 if (!init_vsi) /* means VSI being updated */
1208 /* must to indicate which section of VSI context are
1209 * being modified
1210 */
1211 ctxt->info.valid_sections |=
1212 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
1213 }
1214
1215 /* Allow control frames out of main VSI */
1216 if (vsi->type == ICE_VSI_PF) {
1217 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1218 ctxt->info.valid_sections |=
1219 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1220 }
1221
1222 if (init_vsi) {
1223 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
1224 if (ret) {
1225 dev_err(dev, "Add VSI failed, err %d\n", ret);
1226 ret = -EIO;
1227 goto out;
1228 }
1229 } else {
1230 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1231 if (ret) {
1232 dev_err(dev, "Update VSI failed, err %d\n", ret);
1233 ret = -EIO;
1234 goto out;
1235 }
1236 }
1237
1238 /* keep context for update VSI operations */
1239 vsi->info = ctxt->info;
1240
1241 /* record VSI number returned */
1242 vsi->vsi_num = ctxt->vsi_num;
1243
1244 out:
1245 kfree(ctxt);
1246 return ret;
1247 }
1248
1249 /**
1250 * ice_free_res - free a block of resources
1251 * @res: pointer to the resource
1252 * @index: starting index previously returned by ice_get_res
1253 * @id: identifier to track owner
1254 *
1255 * Returns number of resources freed
1256 */
ice_free_res(struct ice_res_tracker * res,u16 index,u16 id)1257 int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
1258 {
1259 int count = 0;
1260 int i;
1261
1262 if (!res || index >= res->end)
1263 return -EINVAL;
1264
1265 id |= ICE_RES_VALID_BIT;
1266 for (i = index; i < res->end && res->list[i] == id; i++) {
1267 res->list[i] = 0;
1268 count++;
1269 }
1270
1271 return count;
1272 }
1273
1274 /**
1275 * ice_search_res - Search the tracker for a block of resources
1276 * @res: pointer to the resource
1277 * @needed: size of the block needed
1278 * @id: identifier to track owner
1279 *
1280 * Returns the base item index of the block, or -ENOMEM for error
1281 */
ice_search_res(struct ice_res_tracker * res,u16 needed,u16 id)1282 static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
1283 {
1284 u16 start = 0, end = 0;
1285
1286 if (needed > res->end)
1287 return -ENOMEM;
1288
1289 id |= ICE_RES_VALID_BIT;
1290
1291 do {
1292 /* skip already allocated entries */
1293 if (res->list[end++] & ICE_RES_VALID_BIT) {
1294 start = end;
1295 if ((start + needed) > res->end)
1296 break;
1297 }
1298
1299 if (end == (start + needed)) {
1300 int i = start;
1301
1302 /* there was enough, so assign it to the requestor */
1303 while (i != end)
1304 res->list[i++] = id;
1305
1306 return start;
1307 }
1308 } while (end < res->end);
1309
1310 return -ENOMEM;
1311 }
1312
1313 /**
1314 * ice_get_free_res_count - Get free count from a resource tracker
1315 * @res: Resource tracker instance
1316 */
ice_get_free_res_count(struct ice_res_tracker * res)1317 static u16 ice_get_free_res_count(struct ice_res_tracker *res)
1318 {
1319 u16 i, count = 0;
1320
1321 for (i = 0; i < res->end; i++)
1322 if (!(res->list[i] & ICE_RES_VALID_BIT))
1323 count++;
1324
1325 return count;
1326 }
1327
1328 /**
1329 * ice_get_res - get a block of resources
1330 * @pf: board private structure
1331 * @res: pointer to the resource
1332 * @needed: size of the block needed
1333 * @id: identifier to track owner
1334 *
1335 * Returns the base item index of the block, or negative for error
1336 */
1337 int
ice_get_res(struct ice_pf * pf,struct ice_res_tracker * res,u16 needed,u16 id)1338 ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
1339 {
1340 if (!res || !pf)
1341 return -EINVAL;
1342
1343 if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
1344 dev_err(ice_pf_to_dev(pf), "param err: needed=%d, num_entries = %d id=0x%04x\n",
1345 needed, res->num_entries, id);
1346 return -EINVAL;
1347 }
1348
1349 return ice_search_res(res, needed, id);
1350 }
1351
1352 /**
1353 * ice_get_vf_ctrl_res - Get VF control VSI resource
1354 * @pf: pointer to the PF structure
1355 * @vsi: the VSI to allocate a resource for
1356 *
1357 * Look up whether another VF has already allocated the control VSI resource.
1358 * If so, re-use this resource so that we share it among all VFs.
1359 *
1360 * Otherwise, allocate the resource and return it.
1361 */
ice_get_vf_ctrl_res(struct ice_pf * pf,struct ice_vsi * vsi)1362 static int ice_get_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi)
1363 {
1364 struct ice_vf *vf;
1365 unsigned int bkt;
1366 int base;
1367
1368 rcu_read_lock();
1369 ice_for_each_vf_rcu(pf, bkt, vf) {
1370 if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) {
1371 base = pf->vsi[vf->ctrl_vsi_idx]->base_vector;
1372 rcu_read_unlock();
1373 return base;
1374 }
1375 }
1376 rcu_read_unlock();
1377
1378 return ice_get_res(pf, pf->irq_tracker, vsi->num_q_vectors,
1379 ICE_RES_VF_CTRL_VEC_ID);
1380 }
1381
1382 /**
1383 * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
1384 * @vsi: ptr to the VSI
1385 *
1386 * This should only be called after ice_vsi_alloc() which allocates the
1387 * corresponding SW VSI structure and initializes num_queue_pairs for the
1388 * newly allocated VSI.
1389 *
1390 * Returns 0 on success or negative on failure
1391 */
ice_vsi_setup_vector_base(struct ice_vsi * vsi)1392 static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
1393 {
1394 struct ice_pf *pf = vsi->back;
1395 struct device *dev;
1396 u16 num_q_vectors;
1397 int base;
1398
1399 dev = ice_pf_to_dev(pf);
1400 /* SRIOV doesn't grab irq_tracker entries for each VSI */
1401 if (vsi->type == ICE_VSI_VF)
1402 return 0;
1403 if (vsi->type == ICE_VSI_CHNL)
1404 return 0;
1405
1406 if (vsi->base_vector) {
1407 dev_dbg(dev, "VSI %d has non-zero base vector %d\n",
1408 vsi->vsi_num, vsi->base_vector);
1409 return -EEXIST;
1410 }
1411
1412 num_q_vectors = vsi->num_q_vectors;
1413 /* reserve slots from OS requested IRQs */
1414 if (vsi->type == ICE_VSI_CTRL && vsi->vf) {
1415 base = ice_get_vf_ctrl_res(pf, vsi);
1416 } else {
1417 base = ice_get_res(pf, pf->irq_tracker, num_q_vectors,
1418 vsi->idx);
1419 }
1420
1421 if (base < 0) {
1422 dev_err(dev, "%d MSI-X interrupts available. %s %d failed to get %d MSI-X vectors\n",
1423 ice_get_free_res_count(pf->irq_tracker),
1424 ice_vsi_type_str(vsi->type), vsi->idx, num_q_vectors);
1425 return -ENOENT;
1426 }
1427 vsi->base_vector = (u16)base;
1428 pf->num_avail_sw_msix -= num_q_vectors;
1429
1430 return 0;
1431 }
1432
1433 /**
1434 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1435 * @vsi: the VSI having rings deallocated
1436 */
ice_vsi_clear_rings(struct ice_vsi * vsi)1437 static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1438 {
1439 int i;
1440
1441 /* Avoid stale references by clearing map from vector to ring */
1442 if (vsi->q_vectors) {
1443 ice_for_each_q_vector(vsi, i) {
1444 struct ice_q_vector *q_vector = vsi->q_vectors[i];
1445
1446 if (q_vector) {
1447 q_vector->tx.tx_ring = NULL;
1448 q_vector->rx.rx_ring = NULL;
1449 }
1450 }
1451 }
1452
1453 if (vsi->tx_rings) {
1454 ice_for_each_alloc_txq(vsi, i) {
1455 if (vsi->tx_rings[i]) {
1456 kfree_rcu(vsi->tx_rings[i], rcu);
1457 WRITE_ONCE(vsi->tx_rings[i], NULL);
1458 }
1459 }
1460 }
1461 if (vsi->rx_rings) {
1462 ice_for_each_alloc_rxq(vsi, i) {
1463 if (vsi->rx_rings[i]) {
1464 kfree_rcu(vsi->rx_rings[i], rcu);
1465 WRITE_ONCE(vsi->rx_rings[i], NULL);
1466 }
1467 }
1468 }
1469 }
1470
1471 /**
1472 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1473 * @vsi: VSI which is having rings allocated
1474 */
ice_vsi_alloc_rings(struct ice_vsi * vsi)1475 static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1476 {
1477 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw);
1478 struct ice_pf *pf = vsi->back;
1479 struct device *dev;
1480 u16 i;
1481
1482 dev = ice_pf_to_dev(pf);
1483 /* Allocate Tx rings */
1484 ice_for_each_alloc_txq(vsi, i) {
1485 struct ice_tx_ring *ring;
1486
1487 /* allocate with kzalloc(), free with kfree_rcu() */
1488 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1489
1490 if (!ring)
1491 goto err_out;
1492
1493 ring->q_index = i;
1494 ring->reg_idx = vsi->txq_map[i];
1495 ring->vsi = vsi;
1496 ring->tx_tstamps = &pf->ptp.port.tx;
1497 ring->dev = dev;
1498 ring->count = vsi->num_tx_desc;
1499 ring->txq_teid = ICE_INVAL_TEID;
1500 if (dvm_ena)
1501 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2;
1502 else
1503 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1;
1504 WRITE_ONCE(vsi->tx_rings[i], ring);
1505 }
1506
1507 /* Allocate Rx rings */
1508 ice_for_each_alloc_rxq(vsi, i) {
1509 struct ice_rx_ring *ring;
1510
1511 /* allocate with kzalloc(), free with kfree_rcu() */
1512 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1513 if (!ring)
1514 goto err_out;
1515
1516 ring->q_index = i;
1517 ring->reg_idx = vsi->rxq_map[i];
1518 ring->vsi = vsi;
1519 ring->netdev = vsi->netdev;
1520 ring->dev = dev;
1521 ring->count = vsi->num_rx_desc;
1522 WRITE_ONCE(vsi->rx_rings[i], ring);
1523 }
1524
1525 return 0;
1526
1527 err_out:
1528 ice_vsi_clear_rings(vsi);
1529 return -ENOMEM;
1530 }
1531
1532 /**
1533 * ice_vsi_manage_rss_lut - disable/enable RSS
1534 * @vsi: the VSI being changed
1535 * @ena: boolean value indicating if this is an enable or disable request
1536 *
1537 * In the event of disable request for RSS, this function will zero out RSS
1538 * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1539 * LUT.
1540 */
ice_vsi_manage_rss_lut(struct ice_vsi * vsi,bool ena)1541 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1542 {
1543 u8 *lut;
1544
1545 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1546 if (!lut)
1547 return;
1548
1549 if (ena) {
1550 if (vsi->rss_lut_user)
1551 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1552 else
1553 ice_fill_rss_lut(lut, vsi->rss_table_size,
1554 vsi->rss_size);
1555 }
1556
1557 ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1558 kfree(lut);
1559 }
1560
1561 /**
1562 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1563 * @vsi: VSI to be configured
1564 */
ice_vsi_cfg_rss_lut_key(struct ice_vsi * vsi)1565 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1566 {
1567 struct ice_pf *pf = vsi->back;
1568 struct device *dev;
1569 u8 *lut, *key;
1570 int err;
1571
1572 dev = ice_pf_to_dev(pf);
1573 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size &&
1574 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) {
1575 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size);
1576 } else {
1577 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1578
1579 /* If orig_rss_size is valid and it is less than determined
1580 * main VSI's rss_size, update main VSI's rss_size to be
1581 * orig_rss_size so that when tc-qdisc is deleted, main VSI
1582 * RSS table gets programmed to be correct (whatever it was
1583 * to begin with (prior to setup-tc for ADQ config)
1584 */
1585 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size &&
1586 vsi->orig_rss_size <= vsi->num_rxq) {
1587 vsi->rss_size = vsi->orig_rss_size;
1588 /* now orig_rss_size is used, reset it to zero */
1589 vsi->orig_rss_size = 0;
1590 }
1591 }
1592
1593 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1594 if (!lut)
1595 return -ENOMEM;
1596
1597 if (vsi->rss_lut_user)
1598 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1599 else
1600 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1601
1602 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1603 if (err) {
1604 dev_err(dev, "set_rss_lut failed, error %d\n", err);
1605 goto ice_vsi_cfg_rss_exit;
1606 }
1607
1608 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL);
1609 if (!key) {
1610 err = -ENOMEM;
1611 goto ice_vsi_cfg_rss_exit;
1612 }
1613
1614 if (vsi->rss_hkey_user)
1615 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1616 else
1617 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1618
1619 err = ice_set_rss_key(vsi, key);
1620 if (err)
1621 dev_err(dev, "set_rss_key failed, error %d\n", err);
1622
1623 kfree(key);
1624 ice_vsi_cfg_rss_exit:
1625 kfree(lut);
1626 return err;
1627 }
1628
1629 /**
1630 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows
1631 * @vsi: VSI to be configured
1632 *
1633 * This function will only be called during the VF VSI setup. Upon successful
1634 * completion of package download, this function will configure default RSS
1635 * input sets for VF VSI.
1636 */
ice_vsi_set_vf_rss_flow_fld(struct ice_vsi * vsi)1637 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1638 {
1639 struct ice_pf *pf = vsi->back;
1640 struct device *dev;
1641 int status;
1642
1643 dev = ice_pf_to_dev(pf);
1644 if (ice_is_safe_mode(pf)) {
1645 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1646 vsi->vsi_num);
1647 return;
1648 }
1649
1650 status = ice_add_avf_rss_cfg(&pf->hw, vsi->idx, ICE_DEFAULT_RSS_HENA);
1651 if (status)
1652 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",
1653 vsi->vsi_num, status);
1654 }
1655
1656 /**
1657 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows
1658 * @vsi: VSI to be configured
1659 *
1660 * This function will only be called after successful download package call
1661 * during initialization of PF. Since the downloaded package will erase the
1662 * RSS section, this function will configure RSS input sets for different
1663 * flow types. The last profile added has the highest priority, therefore 2
1664 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles
1665 * (i.e. IPv4 src/dst TCP src/dst port).
1666 */
ice_vsi_set_rss_flow_fld(struct ice_vsi * vsi)1667 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1668 {
1669 u16 vsi_handle = vsi->idx, vsi_num = vsi->vsi_num;
1670 struct ice_pf *pf = vsi->back;
1671 struct ice_hw *hw = &pf->hw;
1672 struct device *dev;
1673 int status;
1674
1675 dev = ice_pf_to_dev(pf);
1676 if (ice_is_safe_mode(pf)) {
1677 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1678 vsi_num);
1679 return;
1680 }
1681 /* configure RSS for IPv4 with input set IP src/dst */
1682 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1683 ICE_FLOW_SEG_HDR_IPV4);
1684 if (status)
1685 dev_dbg(dev, "ice_add_rss_cfg failed for ipv4 flow, vsi = %d, error = %d\n",
1686 vsi_num, status);
1687
1688 /* configure RSS for IPv6 with input set IPv6 src/dst */
1689 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1690 ICE_FLOW_SEG_HDR_IPV6);
1691 if (status)
1692 dev_dbg(dev, "ice_add_rss_cfg failed for ipv6 flow, vsi = %d, error = %d\n",
1693 vsi_num, status);
1694
1695 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1696 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV4,
1697 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1698 if (status)
1699 dev_dbg(dev, "ice_add_rss_cfg failed for tcp4 flow, vsi = %d, error = %d\n",
1700 vsi_num, status);
1701
1702 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1703 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV4,
1704 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1705 if (status)
1706 dev_dbg(dev, "ice_add_rss_cfg failed for udp4 flow, vsi = %d, error = %d\n",
1707 vsi_num, status);
1708
1709 /* configure RSS for sctp4 with input set IP src/dst */
1710 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1711 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1712 if (status)
1713 dev_dbg(dev, "ice_add_rss_cfg failed for sctp4 flow, vsi = %d, error = %d\n",
1714 vsi_num, status);
1715
1716 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1717 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV6,
1718 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1719 if (status)
1720 dev_dbg(dev, "ice_add_rss_cfg failed for tcp6 flow, vsi = %d, error = %d\n",
1721 vsi_num, status);
1722
1723 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1724 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV6,
1725 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1726 if (status)
1727 dev_dbg(dev, "ice_add_rss_cfg failed for udp6 flow, vsi = %d, error = %d\n",
1728 vsi_num, status);
1729
1730 /* configure RSS for sctp6 with input set IPv6 src/dst */
1731 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1732 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1733 if (status)
1734 dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n",
1735 vsi_num, status);
1736
1737 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_ESP_SPI,
1738 ICE_FLOW_SEG_HDR_ESP);
1739 if (status)
1740 dev_dbg(dev, "ice_add_rss_cfg failed for esp/spi flow, vsi = %d, error = %d\n",
1741 vsi_num, status);
1742 }
1743
1744 /**
1745 * ice_pf_state_is_nominal - checks the PF for nominal state
1746 * @pf: pointer to PF to check
1747 *
1748 * Check the PF's state for a collection of bits that would indicate
1749 * the PF is in a state that would inhibit normal operation for
1750 * driver functionality.
1751 *
1752 * Returns true if PF is in a nominal state, false otherwise
1753 */
ice_pf_state_is_nominal(struct ice_pf * pf)1754 bool ice_pf_state_is_nominal(struct ice_pf *pf)
1755 {
1756 DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 };
1757
1758 if (!pf)
1759 return false;
1760
1761 bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS);
1762 if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS))
1763 return false;
1764
1765 return true;
1766 }
1767
1768 /**
1769 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1770 * @vsi: the VSI to be updated
1771 */
ice_update_eth_stats(struct ice_vsi * vsi)1772 void ice_update_eth_stats(struct ice_vsi *vsi)
1773 {
1774 struct ice_eth_stats *prev_es, *cur_es;
1775 struct ice_hw *hw = &vsi->back->hw;
1776 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */
1777
1778 prev_es = &vsi->eth_stats_prev;
1779 cur_es = &vsi->eth_stats;
1780
1781 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,
1782 &prev_es->rx_bytes, &cur_es->rx_bytes);
1783
1784 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,
1785 &prev_es->rx_unicast, &cur_es->rx_unicast);
1786
1787 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,
1788 &prev_es->rx_multicast, &cur_es->rx_multicast);
1789
1790 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,
1791 &prev_es->rx_broadcast, &cur_es->rx_broadcast);
1792
1793 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1794 &prev_es->rx_discards, &cur_es->rx_discards);
1795
1796 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,
1797 &prev_es->tx_bytes, &cur_es->tx_bytes);
1798
1799 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,
1800 &prev_es->tx_unicast, &cur_es->tx_unicast);
1801
1802 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,
1803 &prev_es->tx_multicast, &cur_es->tx_multicast);
1804
1805 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,
1806 &prev_es->tx_broadcast, &cur_es->tx_broadcast);
1807
1808 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1809 &prev_es->tx_errors, &cur_es->tx_errors);
1810
1811 vsi->stat_offsets_loaded = true;
1812 }
1813
1814 /**
1815 * ice_vsi_cfg_frame_size - setup max frame size and Rx buffer length
1816 * @vsi: VSI
1817 */
ice_vsi_cfg_frame_size(struct ice_vsi * vsi)1818 void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)
1819 {
1820 if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) {
1821 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1822 vsi->rx_buf_len = ICE_RXBUF_2048;
1823 #if (PAGE_SIZE < 8192)
1824 } else if (!ICE_2K_TOO_SMALL_WITH_PADDING &&
1825 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
1826 vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;
1827 vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;
1828 #endif
1829 } else {
1830 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1831 #if (PAGE_SIZE < 8192)
1832 vsi->rx_buf_len = ICE_RXBUF_3072;
1833 #else
1834 vsi->rx_buf_len = ICE_RXBUF_2048;
1835 #endif
1836 }
1837 }
1838
1839 /**
1840 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
1841 * @hw: HW pointer
1842 * @pf_q: index of the Rx queue in the PF's queue space
1843 * @rxdid: flexible descriptor RXDID
1844 * @prio: priority for the RXDID for this queue
1845 * @ena_ts: true to enable timestamp and false to disable timestamp
1846 */
1847 void
ice_write_qrxflxp_cntxt(struct ice_hw * hw,u16 pf_q,u32 rxdid,u32 prio,bool ena_ts)1848 ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,
1849 bool ena_ts)
1850 {
1851 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1852
1853 /* clear any previous values */
1854 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1855 QRXFLXP_CNTXT_RXDID_PRIO_M |
1856 QRXFLXP_CNTXT_TS_M);
1857
1858 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
1859 QRXFLXP_CNTXT_RXDID_IDX_M;
1860
1861 regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) &
1862 QRXFLXP_CNTXT_RXDID_PRIO_M;
1863
1864 if (ena_ts)
1865 /* Enable TimeSync on this queue */
1866 regval |= QRXFLXP_CNTXT_TS_M;
1867
1868 wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1869 }
1870
ice_vsi_cfg_single_rxq(struct ice_vsi * vsi,u16 q_idx)1871 int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx)
1872 {
1873 if (q_idx >= vsi->num_rxq)
1874 return -EINVAL;
1875
1876 return ice_vsi_cfg_rxq(vsi->rx_rings[q_idx]);
1877 }
1878
ice_vsi_cfg_single_txq(struct ice_vsi * vsi,struct ice_tx_ring ** tx_rings,u16 q_idx)1879 int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings, u16 q_idx)
1880 {
1881 struct ice_aqc_add_tx_qgrp *qg_buf;
1882 int err;
1883
1884 if (q_idx >= vsi->alloc_txq || !tx_rings || !tx_rings[q_idx])
1885 return -EINVAL;
1886
1887 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1888 if (!qg_buf)
1889 return -ENOMEM;
1890
1891 qg_buf->num_txqs = 1;
1892
1893 err = ice_vsi_cfg_txq(vsi, tx_rings[q_idx], qg_buf);
1894 kfree(qg_buf);
1895 return err;
1896 }
1897
1898 /**
1899 * ice_vsi_cfg_rxqs - Configure the VSI for Rx
1900 * @vsi: the VSI being configured
1901 *
1902 * Return 0 on success and a negative value on error
1903 * Configure the Rx VSI for operation.
1904 */
ice_vsi_cfg_rxqs(struct ice_vsi * vsi)1905 int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1906 {
1907 u16 i;
1908
1909 if (vsi->type == ICE_VSI_VF)
1910 goto setup_rings;
1911
1912 ice_vsi_cfg_frame_size(vsi);
1913 setup_rings:
1914 /* set up individual rings */
1915 ice_for_each_rxq(vsi, i) {
1916 int err = ice_vsi_cfg_rxq(vsi->rx_rings[i]);
1917
1918 if (err)
1919 return err;
1920 }
1921
1922 return 0;
1923 }
1924
1925 /**
1926 * ice_vsi_cfg_txqs - Configure the VSI for Tx
1927 * @vsi: the VSI being configured
1928 * @rings: Tx ring array to be configured
1929 * @count: number of Tx ring array elements
1930 *
1931 * Return 0 on success and a negative value on error
1932 * Configure the Tx VSI for operation.
1933 */
1934 static int
ice_vsi_cfg_txqs(struct ice_vsi * vsi,struct ice_tx_ring ** rings,u16 count)1935 ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_tx_ring **rings, u16 count)
1936 {
1937 struct ice_aqc_add_tx_qgrp *qg_buf;
1938 u16 q_idx = 0;
1939 int err = 0;
1940
1941 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1942 if (!qg_buf)
1943 return -ENOMEM;
1944
1945 qg_buf->num_txqs = 1;
1946
1947 for (q_idx = 0; q_idx < count; q_idx++) {
1948 err = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf);
1949 if (err)
1950 goto err_cfg_txqs;
1951 }
1952
1953 err_cfg_txqs:
1954 kfree(qg_buf);
1955 return err;
1956 }
1957
1958 /**
1959 * ice_vsi_cfg_lan_txqs - Configure the VSI for Tx
1960 * @vsi: the VSI being configured
1961 *
1962 * Return 0 on success and a negative value on error
1963 * Configure the Tx VSI for operation.
1964 */
ice_vsi_cfg_lan_txqs(struct ice_vsi * vsi)1965 int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)
1966 {
1967 return ice_vsi_cfg_txqs(vsi, vsi->tx_rings, vsi->num_txq);
1968 }
1969
1970 /**
1971 * ice_vsi_cfg_xdp_txqs - Configure Tx queues dedicated for XDP in given VSI
1972 * @vsi: the VSI being configured
1973 *
1974 * Return 0 on success and a negative value on error
1975 * Configure the Tx queues dedicated for XDP in given VSI for operation.
1976 */
ice_vsi_cfg_xdp_txqs(struct ice_vsi * vsi)1977 int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi)
1978 {
1979 int ret;
1980 int i;
1981
1982 ret = ice_vsi_cfg_txqs(vsi, vsi->xdp_rings, vsi->num_xdp_txq);
1983 if (ret)
1984 return ret;
1985
1986 ice_for_each_rxq(vsi, i)
1987 ice_tx_xsk_pool(vsi, i);
1988
1989 return ret;
1990 }
1991
1992 /**
1993 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1994 * @intrl: interrupt rate limit in usecs
1995 * @gran: interrupt rate limit granularity in usecs
1996 *
1997 * This function converts a decimal interrupt rate limit in usecs to the format
1998 * expected by firmware.
1999 */
ice_intrl_usec_to_reg(u8 intrl,u8 gran)2000 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
2001 {
2002 u32 val = intrl / gran;
2003
2004 if (val)
2005 return val | GLINT_RATE_INTRL_ENA_M;
2006 return 0;
2007 }
2008
2009 /**
2010 * ice_write_intrl - write throttle rate limit to interrupt specific register
2011 * @q_vector: pointer to interrupt specific structure
2012 * @intrl: throttle rate limit in microseconds to write
2013 */
ice_write_intrl(struct ice_q_vector * q_vector,u8 intrl)2014 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl)
2015 {
2016 struct ice_hw *hw = &q_vector->vsi->back->hw;
2017
2018 wr32(hw, GLINT_RATE(q_vector->reg_idx),
2019 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25));
2020 }
2021
ice_pull_qvec_from_rc(struct ice_ring_container * rc)2022 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc)
2023 {
2024 switch (rc->type) {
2025 case ICE_RX_CONTAINER:
2026 if (rc->rx_ring)
2027 return rc->rx_ring->q_vector;
2028 break;
2029 case ICE_TX_CONTAINER:
2030 if (rc->tx_ring)
2031 return rc->tx_ring->q_vector;
2032 break;
2033 default:
2034 break;
2035 }
2036
2037 return NULL;
2038 }
2039
2040 /**
2041 * __ice_write_itr - write throttle rate to register
2042 * @q_vector: pointer to interrupt data structure
2043 * @rc: pointer to ring container
2044 * @itr: throttle rate in microseconds to write
2045 */
__ice_write_itr(struct ice_q_vector * q_vector,struct ice_ring_container * rc,u16 itr)2046 static void __ice_write_itr(struct ice_q_vector *q_vector,
2047 struct ice_ring_container *rc, u16 itr)
2048 {
2049 struct ice_hw *hw = &q_vector->vsi->back->hw;
2050
2051 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx),
2052 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S);
2053 }
2054
2055 /**
2056 * ice_write_itr - write throttle rate to queue specific register
2057 * @rc: pointer to ring container
2058 * @itr: throttle rate in microseconds to write
2059 */
ice_write_itr(struct ice_ring_container * rc,u16 itr)2060 void ice_write_itr(struct ice_ring_container *rc, u16 itr)
2061 {
2062 struct ice_q_vector *q_vector;
2063
2064 q_vector = ice_pull_qvec_from_rc(rc);
2065 if (!q_vector)
2066 return;
2067
2068 __ice_write_itr(q_vector, rc, itr);
2069 }
2070
2071 /**
2072 * ice_set_q_vector_intrl - set up interrupt rate limiting
2073 * @q_vector: the vector to be configured
2074 *
2075 * Interrupt rate limiting is local to the vector, not per-queue so we must
2076 * detect if either ring container has dynamic moderation enabled to decide
2077 * what to set the interrupt rate limit to via INTRL settings. In the case that
2078 * dynamic moderation is disabled on both, write the value with the cached
2079 * setting to make sure INTRL register matches the user visible value.
2080 */
ice_set_q_vector_intrl(struct ice_q_vector * q_vector)2081 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector)
2082 {
2083 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) {
2084 /* in the case of dynamic enabled, cap each vector to no more
2085 * than (4 us) 250,000 ints/sec, which allows low latency
2086 * but still less than 500,000 interrupts per second, which
2087 * reduces CPU a bit in the case of the lowest latency
2088 * setting. The 4 here is a value in microseconds.
2089 */
2090 ice_write_intrl(q_vector, 4);
2091 } else {
2092 ice_write_intrl(q_vector, q_vector->intrl);
2093 }
2094 }
2095
2096 /**
2097 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
2098 * @vsi: the VSI being configured
2099 *
2100 * This configures MSIX mode interrupts for the PF VSI, and should not be used
2101 * for the VF VSI.
2102 */
ice_vsi_cfg_msix(struct ice_vsi * vsi)2103 void ice_vsi_cfg_msix(struct ice_vsi *vsi)
2104 {
2105 struct ice_pf *pf = vsi->back;
2106 struct ice_hw *hw = &pf->hw;
2107 u16 txq = 0, rxq = 0;
2108 int i, q;
2109
2110 ice_for_each_q_vector(vsi, i) {
2111 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2112 u16 reg_idx = q_vector->reg_idx;
2113
2114 ice_cfg_itr(hw, q_vector);
2115
2116 /* Both Transmit Queue Interrupt Cause Control register
2117 * and Receive Queue Interrupt Cause control register
2118 * expects MSIX_INDX field to be the vector index
2119 * within the function space and not the absolute
2120 * vector index across PF or across device.
2121 * For SR-IOV VF VSIs queue vector index always starts
2122 * with 1 since first vector index(0) is used for OICR
2123 * in VF space. Since VMDq and other PF VSIs are within
2124 * the PF function space, use the vector index that is
2125 * tracked for this PF.
2126 */
2127 for (q = 0; q < q_vector->num_ring_tx; q++) {
2128 ice_cfg_txq_interrupt(vsi, txq, reg_idx,
2129 q_vector->tx.itr_idx);
2130 txq++;
2131 }
2132
2133 for (q = 0; q < q_vector->num_ring_rx; q++) {
2134 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx,
2135 q_vector->rx.itr_idx);
2136 rxq++;
2137 }
2138 }
2139 }
2140
2141 /**
2142 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings
2143 * @vsi: the VSI whose rings are to be enabled
2144 *
2145 * Returns 0 on success and a negative value on error
2146 */
ice_vsi_start_all_rx_rings(struct ice_vsi * vsi)2147 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
2148 {
2149 return ice_vsi_ctrl_all_rx_rings(vsi, true);
2150 }
2151
2152 /**
2153 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings
2154 * @vsi: the VSI whose rings are to be disabled
2155 *
2156 * Returns 0 on success and a negative value on error
2157 */
ice_vsi_stop_all_rx_rings(struct ice_vsi * vsi)2158 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
2159 {
2160 return ice_vsi_ctrl_all_rx_rings(vsi, false);
2161 }
2162
2163 /**
2164 * ice_vsi_stop_tx_rings - Disable Tx rings
2165 * @vsi: the VSI being configured
2166 * @rst_src: reset source
2167 * @rel_vmvf_num: Relative ID of VF/VM
2168 * @rings: Tx ring array to be stopped
2169 * @count: number of Tx ring array elements
2170 */
2171 static int
ice_vsi_stop_tx_rings(struct ice_vsi * vsi,enum ice_disq_rst_src rst_src,u16 rel_vmvf_num,struct ice_tx_ring ** rings,u16 count)2172 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2173 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count)
2174 {
2175 u16 q_idx;
2176
2177 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
2178 return -EINVAL;
2179
2180 for (q_idx = 0; q_idx < count; q_idx++) {
2181 struct ice_txq_meta txq_meta = { };
2182 int status;
2183
2184 if (!rings || !rings[q_idx])
2185 return -EINVAL;
2186
2187 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);
2188 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
2189 rings[q_idx], &txq_meta);
2190
2191 if (status)
2192 return status;
2193 }
2194
2195 return 0;
2196 }
2197
2198 /**
2199 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2200 * @vsi: the VSI being configured
2201 * @rst_src: reset source
2202 * @rel_vmvf_num: Relative ID of VF/VM
2203 */
2204 int
ice_vsi_stop_lan_tx_rings(struct ice_vsi * vsi,enum ice_disq_rst_src rst_src,u16 rel_vmvf_num)2205 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2206 u16 rel_vmvf_num)
2207 {
2208 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq);
2209 }
2210
2211 /**
2212 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings
2213 * @vsi: the VSI being configured
2214 */
ice_vsi_stop_xdp_tx_rings(struct ice_vsi * vsi)2215 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
2216 {
2217 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq);
2218 }
2219
2220 /**
2221 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not
2222 * @vsi: VSI to check whether or not VLAN pruning is enabled.
2223 *
2224 * returns true if Rx VLAN pruning is enabled and false otherwise.
2225 */
ice_vsi_is_vlan_pruning_ena(struct ice_vsi * vsi)2226 bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
2227 {
2228 if (!vsi)
2229 return false;
2230
2231 return (vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA);
2232 }
2233
ice_vsi_set_tc_cfg(struct ice_vsi * vsi)2234 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2235 {
2236 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
2237 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;
2238 vsi->tc_cfg.numtc = 1;
2239 return;
2240 }
2241
2242 /* set VSI TC information based on DCB config */
2243 ice_vsi_set_dcb_tc_cfg(vsi);
2244 }
2245
2246 /**
2247 * ice_vsi_set_q_vectors_reg_idx - set the HW register index for all q_vectors
2248 * @vsi: VSI to set the q_vectors register index on
2249 */
2250 static int
ice_vsi_set_q_vectors_reg_idx(struct ice_vsi * vsi)2251 ice_vsi_set_q_vectors_reg_idx(struct ice_vsi *vsi)
2252 {
2253 u16 i;
2254
2255 if (!vsi || !vsi->q_vectors)
2256 return -EINVAL;
2257
2258 ice_for_each_q_vector(vsi, i) {
2259 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2260
2261 if (!q_vector) {
2262 dev_err(ice_pf_to_dev(vsi->back), "Failed to set reg_idx on q_vector %d VSI %d\n",
2263 i, vsi->vsi_num);
2264 goto clear_reg_idx;
2265 }
2266
2267 if (vsi->type == ICE_VSI_VF) {
2268 struct ice_vf *vf = vsi->vf;
2269
2270 q_vector->reg_idx = ice_calc_vf_reg_idx(vf, q_vector);
2271 } else {
2272 q_vector->reg_idx =
2273 q_vector->v_idx + vsi->base_vector;
2274 }
2275 }
2276
2277 return 0;
2278
2279 clear_reg_idx:
2280 ice_for_each_q_vector(vsi, i) {
2281 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2282
2283 if (q_vector)
2284 q_vector->reg_idx = 0;
2285 }
2286
2287 return -EINVAL;
2288 }
2289
2290 /**
2291 * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling
2292 * @vsi: the VSI being configured
2293 * @tx: bool to determine Tx or Rx rule
2294 * @create: bool to determine create or remove Rule
2295 */
ice_cfg_sw_lldp(struct ice_vsi * vsi,bool tx,bool create)2296 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2297 {
2298 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2299 enum ice_sw_fwd_act_type act);
2300 struct ice_pf *pf = vsi->back;
2301 struct device *dev;
2302 int status;
2303
2304 dev = ice_pf_to_dev(pf);
2305 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2306
2307 if (tx) {
2308 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2309 ICE_DROP_PACKET);
2310 } else {
2311 if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) {
2312 status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num,
2313 create);
2314 } else {
2315 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,
2316 ICE_FWD_TO_VSI);
2317 }
2318 }
2319
2320 if (status)
2321 dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n",
2322 create ? "adding" : "removing", tx ? "TX" : "RX",
2323 vsi->vsi_num, status);
2324 }
2325
2326 /**
2327 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it
2328 * @vsi: pointer to the VSI
2329 *
2330 * This function will allocate new scheduler aggregator now if needed and will
2331 * move specified VSI into it.
2332 */
ice_set_agg_vsi(struct ice_vsi * vsi)2333 static void ice_set_agg_vsi(struct ice_vsi *vsi)
2334 {
2335 struct device *dev = ice_pf_to_dev(vsi->back);
2336 struct ice_agg_node *agg_node_iter = NULL;
2337 u32 agg_id = ICE_INVALID_AGG_NODE_ID;
2338 struct ice_agg_node *agg_node = NULL;
2339 int node_offset, max_agg_nodes = 0;
2340 struct ice_port_info *port_info;
2341 struct ice_pf *pf = vsi->back;
2342 u32 agg_node_id_start = 0;
2343 int status;
2344
2345 /* create (as needed) scheduler aggregator node and move VSI into
2346 * corresponding aggregator node
2347 * - PF aggregator node to contains VSIs of type _PF and _CTRL
2348 * - VF aggregator nodes will contain VF VSI
2349 */
2350 port_info = pf->hw.port_info;
2351 if (!port_info)
2352 return;
2353
2354 switch (vsi->type) {
2355 case ICE_VSI_CTRL:
2356 case ICE_VSI_CHNL:
2357 case ICE_VSI_LB:
2358 case ICE_VSI_PF:
2359 case ICE_VSI_SWITCHDEV_CTRL:
2360 max_agg_nodes = ICE_MAX_PF_AGG_NODES;
2361 agg_node_id_start = ICE_PF_AGG_NODE_ID_START;
2362 agg_node_iter = &pf->pf_agg_node[0];
2363 break;
2364 case ICE_VSI_VF:
2365 /* user can create 'n' VFs on a given PF, but since max children
2366 * per aggregator node can be only 64. Following code handles
2367 * aggregator(s) for VF VSIs, either selects a agg_node which
2368 * was already created provided num_vsis < 64, otherwise
2369 * select next available node, which will be created
2370 */
2371 max_agg_nodes = ICE_MAX_VF_AGG_NODES;
2372 agg_node_id_start = ICE_VF_AGG_NODE_ID_START;
2373 agg_node_iter = &pf->vf_agg_node[0];
2374 break;
2375 default:
2376 /* other VSI type, handle later if needed */
2377 dev_dbg(dev, "unexpected VSI type %s\n",
2378 ice_vsi_type_str(vsi->type));
2379 return;
2380 }
2381
2382 /* find the appropriate aggregator node */
2383 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) {
2384 /* see if we can find space in previously created
2385 * node if num_vsis < 64, otherwise skip
2386 */
2387 if (agg_node_iter->num_vsis &&
2388 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) {
2389 agg_node_iter++;
2390 continue;
2391 }
2392
2393 if (agg_node_iter->valid &&
2394 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) {
2395 agg_id = agg_node_iter->agg_id;
2396 agg_node = agg_node_iter;
2397 break;
2398 }
2399
2400 /* find unclaimed agg_id */
2401 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) {
2402 agg_id = node_offset + agg_node_id_start;
2403 agg_node = agg_node_iter;
2404 break;
2405 }
2406 /* move to next agg_node */
2407 agg_node_iter++;
2408 }
2409
2410 if (!agg_node)
2411 return;
2412
2413 /* if selected aggregator node was not created, create it */
2414 if (!agg_node->valid) {
2415 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG,
2416 (u8)vsi->tc_cfg.ena_tc);
2417 if (status) {
2418 dev_err(dev, "unable to create aggregator node with agg_id %u\n",
2419 agg_id);
2420 return;
2421 }
2422 /* aggregator node is created, store the neeeded info */
2423 agg_node->valid = true;
2424 agg_node->agg_id = agg_id;
2425 }
2426
2427 /* move VSI to corresponding aggregator node */
2428 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx,
2429 (u8)vsi->tc_cfg.ena_tc);
2430 if (status) {
2431 dev_err(dev, "unable to move VSI idx %u into aggregator %u node",
2432 vsi->idx, agg_id);
2433 return;
2434 }
2435
2436 /* keep active children count for aggregator node */
2437 agg_node->num_vsis++;
2438
2439 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved
2440 * to aggregator node
2441 */
2442 vsi->agg_node = agg_node;
2443 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n",
2444 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,
2445 vsi->agg_node->num_vsis);
2446 }
2447
2448 /**
2449 * ice_vsi_setup - Set up a VSI by a given type
2450 * @pf: board private structure
2451 * @pi: pointer to the port_info instance
2452 * @vsi_type: VSI type
2453 * @vf: pointer to VF to which this VSI connects. This field is used primarily
2454 * for the ICE_VSI_VF type. Other VSI types should pass NULL.
2455 * @ch: ptr to channel
2456 *
2457 * This allocates the sw VSI structure and its queue resources.
2458 *
2459 * Returns pointer to the successfully allocated and configured VSI sw struct on
2460 * success, NULL on failure.
2461 */
2462 struct ice_vsi *
ice_vsi_setup(struct ice_pf * pf,struct ice_port_info * pi,enum ice_vsi_type vsi_type,struct ice_vf * vf,struct ice_channel * ch)2463 ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
2464 enum ice_vsi_type vsi_type, struct ice_vf *vf,
2465 struct ice_channel *ch)
2466 {
2467 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2468 struct device *dev = ice_pf_to_dev(pf);
2469 struct ice_vsi *vsi;
2470 int ret, i;
2471
2472 if (vsi_type == ICE_VSI_CHNL)
2473 vsi = ice_vsi_alloc(pf, vsi_type, ch, NULL);
2474 else if (vsi_type == ICE_VSI_VF || vsi_type == ICE_VSI_CTRL)
2475 vsi = ice_vsi_alloc(pf, vsi_type, NULL, vf);
2476 else
2477 vsi = ice_vsi_alloc(pf, vsi_type, NULL, NULL);
2478
2479 if (!vsi) {
2480 dev_err(dev, "could not allocate VSI\n");
2481 return NULL;
2482 }
2483
2484 vsi->port_info = pi;
2485 vsi->vsw = pf->first_sw;
2486 if (vsi->type == ICE_VSI_PF)
2487 vsi->ethtype = ETH_P_PAUSE;
2488
2489 ice_alloc_fd_res(vsi);
2490
2491 if (vsi_type != ICE_VSI_CHNL) {
2492 if (ice_vsi_get_qs(vsi)) {
2493 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2494 vsi->idx);
2495 goto unroll_vsi_alloc;
2496 }
2497 }
2498
2499 /* set RSS capabilities */
2500 ice_vsi_set_rss_params(vsi);
2501
2502 /* set TC configuration */
2503 ice_vsi_set_tc_cfg(vsi);
2504
2505 /* create the VSI */
2506 ret = ice_vsi_init(vsi, true);
2507 if (ret)
2508 goto unroll_get_qs;
2509
2510 ice_vsi_init_vlan_ops(vsi);
2511
2512 switch (vsi->type) {
2513 case ICE_VSI_CTRL:
2514 case ICE_VSI_SWITCHDEV_CTRL:
2515 case ICE_VSI_PF:
2516 ret = ice_vsi_alloc_q_vectors(vsi);
2517 if (ret)
2518 goto unroll_vsi_init;
2519
2520 ret = ice_vsi_setup_vector_base(vsi);
2521 if (ret)
2522 goto unroll_alloc_q_vector;
2523
2524 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2525 if (ret)
2526 goto unroll_vector_base;
2527
2528 ret = ice_vsi_alloc_rings(vsi);
2529 if (ret)
2530 goto unroll_vector_base;
2531
2532 ice_vsi_map_rings_to_vectors(vsi);
2533
2534 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */
2535 if (vsi->type != ICE_VSI_CTRL)
2536 /* Do not exit if configuring RSS had an issue, at
2537 * least receive traffic on first queue. Hence no
2538 * need to capture return value
2539 */
2540 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2541 ice_vsi_cfg_rss_lut_key(vsi);
2542 ice_vsi_set_rss_flow_fld(vsi);
2543 }
2544 ice_init_arfs(vsi);
2545 break;
2546 case ICE_VSI_CHNL:
2547 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2548 ice_vsi_cfg_rss_lut_key(vsi);
2549 ice_vsi_set_rss_flow_fld(vsi);
2550 }
2551 break;
2552 case ICE_VSI_VF:
2553 /* VF driver will take care of creating netdev for this type and
2554 * map queues to vectors through Virtchnl, PF driver only
2555 * creates a VSI and corresponding structures for bookkeeping
2556 * purpose
2557 */
2558 ret = ice_vsi_alloc_q_vectors(vsi);
2559 if (ret)
2560 goto unroll_vsi_init;
2561
2562 ret = ice_vsi_alloc_rings(vsi);
2563 if (ret)
2564 goto unroll_alloc_q_vector;
2565
2566 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2567 if (ret)
2568 goto unroll_vector_base;
2569
2570 /* Do not exit if configuring RSS had an issue, at least
2571 * receive traffic on first queue. Hence no need to capture
2572 * return value
2573 */
2574 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2575 ice_vsi_cfg_rss_lut_key(vsi);
2576 ice_vsi_set_vf_rss_flow_fld(vsi);
2577 }
2578 break;
2579 case ICE_VSI_LB:
2580 ret = ice_vsi_alloc_rings(vsi);
2581 if (ret)
2582 goto unroll_vsi_init;
2583 break;
2584 default:
2585 /* clean up the resources and exit */
2586 goto unroll_vsi_init;
2587 }
2588
2589 /* configure VSI nodes based on number of queues and TC's */
2590 ice_for_each_traffic_class(i) {
2591 if (!(vsi->tc_cfg.ena_tc & BIT(i)))
2592 continue;
2593
2594 if (vsi->type == ICE_VSI_CHNL) {
2595 if (!vsi->alloc_txq && vsi->num_txq)
2596 max_txqs[i] = vsi->num_txq;
2597 else
2598 max_txqs[i] = pf->num_lan_tx;
2599 } else {
2600 max_txqs[i] = vsi->alloc_txq;
2601 }
2602 }
2603
2604 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);
2605 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2606 max_txqs);
2607 if (ret) {
2608 dev_err(dev, "VSI %d failed lan queue config, error %d\n",
2609 vsi->vsi_num, ret);
2610 goto unroll_clear_rings;
2611 }
2612
2613 /* Add switch rule to drop all Tx Flow Control Frames, of look up
2614 * type ETHERTYPE from VSIs, and restrict malicious VF from sending
2615 * out PAUSE or PFC frames. If enabled, FW can still send FC frames.
2616 * The rule is added once for PF VSI in order to create appropriate
2617 * recipe, since VSI/VSI list is ignored with drop action...
2618 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to
2619 * be dropped so that VFs cannot send LLDP packets to reconfig DCB
2620 * settings in the HW.
2621 */
2622 if (!ice_is_safe_mode(pf))
2623 if (vsi->type == ICE_VSI_PF) {
2624 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2625 ICE_DROP_PACKET);
2626 ice_cfg_sw_lldp(vsi, true, true);
2627 }
2628
2629 if (!vsi->agg_node)
2630 ice_set_agg_vsi(vsi);
2631 return vsi;
2632
2633 unroll_clear_rings:
2634 ice_vsi_clear_rings(vsi);
2635 unroll_vector_base:
2636 /* reclaim SW interrupts back to the common pool */
2637 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2638 pf->num_avail_sw_msix += vsi->num_q_vectors;
2639 unroll_alloc_q_vector:
2640 ice_vsi_free_q_vectors(vsi);
2641 unroll_vsi_init:
2642 ice_vsi_delete(vsi);
2643 unroll_get_qs:
2644 ice_vsi_put_qs(vsi);
2645 unroll_vsi_alloc:
2646 if (vsi_type == ICE_VSI_VF)
2647 ice_enable_lag(pf->lag);
2648 ice_vsi_clear(vsi);
2649
2650 return NULL;
2651 }
2652
2653 /**
2654 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2655 * @vsi: the VSI being cleaned up
2656 */
ice_vsi_release_msix(struct ice_vsi * vsi)2657 static void ice_vsi_release_msix(struct ice_vsi *vsi)
2658 {
2659 struct ice_pf *pf = vsi->back;
2660 struct ice_hw *hw = &pf->hw;
2661 u32 txq = 0;
2662 u32 rxq = 0;
2663 int i, q;
2664
2665 ice_for_each_q_vector(vsi, i) {
2666 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2667
2668 ice_write_intrl(q_vector, 0);
2669 for (q = 0; q < q_vector->num_ring_tx; q++) {
2670 ice_write_itr(&q_vector->tx, 0);
2671 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2672 if (ice_is_xdp_ena_vsi(vsi)) {
2673 u32 xdp_txq = txq + vsi->num_xdp_txq;
2674
2675 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2676 }
2677 txq++;
2678 }
2679
2680 for (q = 0; q < q_vector->num_ring_rx; q++) {
2681 ice_write_itr(&q_vector->rx, 0);
2682 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2683 rxq++;
2684 }
2685 }
2686
2687 ice_flush(hw);
2688 }
2689
2690 /**
2691 * ice_vsi_free_irq - Free the IRQ association with the OS
2692 * @vsi: the VSI being configured
2693 */
ice_vsi_free_irq(struct ice_vsi * vsi)2694 void ice_vsi_free_irq(struct ice_vsi *vsi)
2695 {
2696 struct ice_pf *pf = vsi->back;
2697 int base = vsi->base_vector;
2698 int i;
2699
2700 if (!vsi->q_vectors || !vsi->irqs_ready)
2701 return;
2702
2703 ice_vsi_release_msix(vsi);
2704 if (vsi->type == ICE_VSI_VF)
2705 return;
2706
2707 vsi->irqs_ready = false;
2708 ice_free_cpu_rx_rmap(vsi);
2709
2710 ice_for_each_q_vector(vsi, i) {
2711 u16 vector = i + base;
2712 int irq_num;
2713
2714 irq_num = pf->msix_entries[vector].vector;
2715
2716 /* free only the irqs that were actually requested */
2717 if (!vsi->q_vectors[i] ||
2718 !(vsi->q_vectors[i]->num_ring_tx ||
2719 vsi->q_vectors[i]->num_ring_rx))
2720 continue;
2721
2722 /* clear the affinity notifier in the IRQ descriptor */
2723 if (!IS_ENABLED(CONFIG_RFS_ACCEL))
2724 irq_set_affinity_notifier(irq_num, NULL);
2725
2726 /* clear the affinity_mask in the IRQ descriptor */
2727 irq_set_affinity_hint(irq_num, NULL);
2728 synchronize_irq(irq_num);
2729 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]);
2730 }
2731 }
2732
2733 /**
2734 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2735 * @vsi: the VSI having resources freed
2736 */
ice_vsi_free_tx_rings(struct ice_vsi * vsi)2737 void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2738 {
2739 int i;
2740
2741 if (!vsi->tx_rings)
2742 return;
2743
2744 ice_for_each_txq(vsi, i)
2745 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2746 ice_free_tx_ring(vsi->tx_rings[i]);
2747 }
2748
2749 /**
2750 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2751 * @vsi: the VSI having resources freed
2752 */
ice_vsi_free_rx_rings(struct ice_vsi * vsi)2753 void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2754 {
2755 int i;
2756
2757 if (!vsi->rx_rings)
2758 return;
2759
2760 ice_for_each_rxq(vsi, i)
2761 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2762 ice_free_rx_ring(vsi->rx_rings[i]);
2763 }
2764
2765 /**
2766 * ice_vsi_close - Shut down a VSI
2767 * @vsi: the VSI being shut down
2768 */
ice_vsi_close(struct ice_vsi * vsi)2769 void ice_vsi_close(struct ice_vsi *vsi)
2770 {
2771 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state))
2772 ice_down(vsi);
2773
2774 ice_vsi_free_irq(vsi);
2775 ice_vsi_free_tx_rings(vsi);
2776 ice_vsi_free_rx_rings(vsi);
2777 }
2778
2779 /**
2780 * ice_ena_vsi - resume a VSI
2781 * @vsi: the VSI being resume
2782 * @locked: is the rtnl_lock already held
2783 */
ice_ena_vsi(struct ice_vsi * vsi,bool locked)2784 int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2785 {
2786 int err = 0;
2787
2788 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state))
2789 return 0;
2790
2791 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2792
2793 if (vsi->netdev && vsi->type == ICE_VSI_PF) {
2794 if (netif_running(vsi->netdev)) {
2795 if (!locked)
2796 rtnl_lock();
2797
2798 err = ice_open_internal(vsi->netdev);
2799
2800 if (!locked)
2801 rtnl_unlock();
2802 }
2803 } else if (vsi->type == ICE_VSI_CTRL) {
2804 err = ice_vsi_open_ctrl(vsi);
2805 }
2806
2807 return err;
2808 }
2809
2810 /**
2811 * ice_dis_vsi - pause a VSI
2812 * @vsi: the VSI being paused
2813 * @locked: is the rtnl_lock already held
2814 */
ice_dis_vsi(struct ice_vsi * vsi,bool locked)2815 void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2816 {
2817 if (test_bit(ICE_VSI_DOWN, vsi->state))
2818 return;
2819
2820 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2821
2822 if (vsi->type == ICE_VSI_PF && vsi->netdev) {
2823 if (netif_running(vsi->netdev)) {
2824 if (!locked)
2825 rtnl_lock();
2826
2827 ice_vsi_close(vsi);
2828
2829 if (!locked)
2830 rtnl_unlock();
2831 } else {
2832 ice_vsi_close(vsi);
2833 }
2834 } else if (vsi->type == ICE_VSI_CTRL ||
2835 vsi->type == ICE_VSI_SWITCHDEV_CTRL) {
2836 ice_vsi_close(vsi);
2837 }
2838 }
2839
2840 /**
2841 * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
2842 * @vsi: the VSI being un-configured
2843 */
ice_vsi_dis_irq(struct ice_vsi * vsi)2844 void ice_vsi_dis_irq(struct ice_vsi *vsi)
2845 {
2846 int base = vsi->base_vector;
2847 struct ice_pf *pf = vsi->back;
2848 struct ice_hw *hw = &pf->hw;
2849 u32 val;
2850 int i;
2851
2852 /* disable interrupt causation from each queue */
2853 if (vsi->tx_rings) {
2854 ice_for_each_txq(vsi, i) {
2855 if (vsi->tx_rings[i]) {
2856 u16 reg;
2857
2858 reg = vsi->tx_rings[i]->reg_idx;
2859 val = rd32(hw, QINT_TQCTL(reg));
2860 val &= ~QINT_TQCTL_CAUSE_ENA_M;
2861 wr32(hw, QINT_TQCTL(reg), val);
2862 }
2863 }
2864 }
2865
2866 if (vsi->rx_rings) {
2867 ice_for_each_rxq(vsi, i) {
2868 if (vsi->rx_rings[i]) {
2869 u16 reg;
2870
2871 reg = vsi->rx_rings[i]->reg_idx;
2872 val = rd32(hw, QINT_RQCTL(reg));
2873 val &= ~QINT_RQCTL_CAUSE_ENA_M;
2874 wr32(hw, QINT_RQCTL(reg), val);
2875 }
2876 }
2877 }
2878
2879 /* disable each interrupt */
2880 ice_for_each_q_vector(vsi, i) {
2881 if (!vsi->q_vectors[i])
2882 continue;
2883 wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0);
2884 }
2885
2886 ice_flush(hw);
2887
2888 /* don't call synchronize_irq() for VF's from the host */
2889 if (vsi->type == ICE_VSI_VF)
2890 return;
2891
2892 ice_for_each_q_vector(vsi, i)
2893 synchronize_irq(pf->msix_entries[i + base].vector);
2894 }
2895
2896 /**
2897 * ice_napi_del - Remove NAPI handler for the VSI
2898 * @vsi: VSI for which NAPI handler is to be removed
2899 */
ice_napi_del(struct ice_vsi * vsi)2900 void ice_napi_del(struct ice_vsi *vsi)
2901 {
2902 int v_idx;
2903
2904 if (!vsi->netdev)
2905 return;
2906
2907 ice_for_each_q_vector(vsi, v_idx)
2908 netif_napi_del(&vsi->q_vectors[v_idx]->napi);
2909 }
2910
2911 /**
2912 * ice_free_vf_ctrl_res - Free the VF control VSI resource
2913 * @pf: pointer to PF structure
2914 * @vsi: the VSI to free resources for
2915 *
2916 * Check if the VF control VSI resource is still in use. If no VF is using it
2917 * any more, release the VSI resource. Otherwise, leave it to be cleaned up
2918 * once no other VF uses it.
2919 */
ice_free_vf_ctrl_res(struct ice_pf * pf,struct ice_vsi * vsi)2920 static void ice_free_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi)
2921 {
2922 struct ice_vf *vf;
2923 unsigned int bkt;
2924
2925 rcu_read_lock();
2926 ice_for_each_vf_rcu(pf, bkt, vf) {
2927 if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) {
2928 rcu_read_unlock();
2929 return;
2930 }
2931 }
2932 rcu_read_unlock();
2933
2934 /* No other VFs left that have control VSI. It is now safe to reclaim
2935 * SW interrupts back to the common pool.
2936 */
2937 ice_free_res(pf->irq_tracker, vsi->base_vector,
2938 ICE_RES_VF_CTRL_VEC_ID);
2939 pf->num_avail_sw_msix += vsi->num_q_vectors;
2940 }
2941
2942 /**
2943 * ice_vsi_release - Delete a VSI and free its resources
2944 * @vsi: the VSI being removed
2945 *
2946 * Returns 0 on success or < 0 on error
2947 */
ice_vsi_release(struct ice_vsi * vsi)2948 int ice_vsi_release(struct ice_vsi *vsi)
2949 {
2950 struct ice_pf *pf;
2951 int err;
2952
2953 if (!vsi->back)
2954 return -ENODEV;
2955 pf = vsi->back;
2956
2957 /* do not unregister while driver is in the reset recovery pending
2958 * state. Since reset/rebuild happens through PF service task workqueue,
2959 * it's not a good idea to unregister netdev that is associated to the
2960 * PF that is running the work queue items currently. This is done to
2961 * avoid check_flush_dependency() warning on this wq
2962 */
2963 if (vsi->netdev && !ice_is_reset_in_progress(pf->state) &&
2964 (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state))) {
2965 unregister_netdev(vsi->netdev);
2966 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
2967 }
2968
2969 if (vsi->type == ICE_VSI_PF)
2970 ice_devlink_destroy_pf_port(pf);
2971
2972 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2973 ice_rss_clean(vsi);
2974
2975 /* Disable VSI and free resources */
2976 if (vsi->type != ICE_VSI_LB)
2977 ice_vsi_dis_irq(vsi);
2978 ice_vsi_close(vsi);
2979
2980 /* SR-IOV determines needed MSIX resources all at once instead of per
2981 * VSI since when VFs are spawned we know how many VFs there are and how
2982 * many interrupts each VF needs. SR-IOV MSIX resources are also
2983 * cleared in the same manner.
2984 */
2985 if (vsi->type == ICE_VSI_CTRL && vsi->vf) {
2986 ice_free_vf_ctrl_res(pf, vsi);
2987 } else if (vsi->type != ICE_VSI_VF) {
2988 /* reclaim SW interrupts back to the common pool */
2989 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2990 pf->num_avail_sw_msix += vsi->num_q_vectors;
2991 }
2992
2993 if (!ice_is_safe_mode(pf)) {
2994 if (vsi->type == ICE_VSI_PF) {
2995 ice_fltr_remove_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2996 ICE_DROP_PACKET);
2997 ice_cfg_sw_lldp(vsi, true, false);
2998 /* The Rx rule will only exist to remove if the LLDP FW
2999 * engine is currently stopped
3000 */
3001 if (!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags))
3002 ice_cfg_sw_lldp(vsi, false, false);
3003 }
3004 }
3005
3006 if (ice_is_vsi_dflt_vsi(pf->first_sw, vsi))
3007 ice_clear_dflt_vsi(pf->first_sw);
3008 ice_fltr_remove_all(vsi);
3009 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3010 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3011 if (err)
3012 dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3013 vsi->vsi_num, err);
3014 ice_vsi_delete(vsi);
3015 ice_vsi_free_q_vectors(vsi);
3016
3017 if (vsi->netdev) {
3018 if (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state)) {
3019 unregister_netdev(vsi->netdev);
3020 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
3021 }
3022 if (test_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state)) {
3023 free_netdev(vsi->netdev);
3024 vsi->netdev = NULL;
3025 clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
3026 }
3027 }
3028
3029 if (vsi->type == ICE_VSI_VF &&
3030 vsi->agg_node && vsi->agg_node->valid)
3031 vsi->agg_node->num_vsis--;
3032 ice_vsi_clear_rings(vsi);
3033
3034 ice_vsi_put_qs(vsi);
3035
3036 /* retain SW VSI data structure since it is needed to unregister and
3037 * free VSI netdev when PF is not in reset recovery pending state,\
3038 * for ex: during rmmod.
3039 */
3040 if (!ice_is_reset_in_progress(pf->state))
3041 ice_vsi_clear(vsi);
3042
3043 return 0;
3044 }
3045
3046 /**
3047 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors
3048 * @vsi: VSI connected with q_vectors
3049 * @coalesce: array of struct with stored coalesce
3050 *
3051 * Returns array size.
3052 */
3053 static int
ice_vsi_rebuild_get_coalesce(struct ice_vsi * vsi,struct ice_coalesce_stored * coalesce)3054 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
3055 struct ice_coalesce_stored *coalesce)
3056 {
3057 int i;
3058
3059 ice_for_each_q_vector(vsi, i) {
3060 struct ice_q_vector *q_vector = vsi->q_vectors[i];
3061
3062 coalesce[i].itr_tx = q_vector->tx.itr_settings;
3063 coalesce[i].itr_rx = q_vector->rx.itr_settings;
3064 coalesce[i].intrl = q_vector->intrl;
3065
3066 if (i < vsi->num_txq)
3067 coalesce[i].tx_valid = true;
3068 if (i < vsi->num_rxq)
3069 coalesce[i].rx_valid = true;
3070 }
3071
3072 return vsi->num_q_vectors;
3073 }
3074
3075 /**
3076 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays
3077 * @vsi: VSI connected with q_vectors
3078 * @coalesce: pointer to array of struct with stored coalesce
3079 * @size: size of coalesce array
3080 *
3081 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save
3082 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce
3083 * to default value.
3084 */
3085 static void
ice_vsi_rebuild_set_coalesce(struct ice_vsi * vsi,struct ice_coalesce_stored * coalesce,int size)3086 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
3087 struct ice_coalesce_stored *coalesce, int size)
3088 {
3089 struct ice_ring_container *rc;
3090 int i;
3091
3092 if ((size && !coalesce) || !vsi)
3093 return;
3094
3095 /* There are a couple of cases that have to be handled here:
3096 * 1. The case where the number of queue vectors stays the same, but
3097 * the number of Tx or Rx rings changes (the first for loop)
3098 * 2. The case where the number of queue vectors increased (the
3099 * second for loop)
3100 */
3101 for (i = 0; i < size && i < vsi->num_q_vectors; i++) {
3102 /* There are 2 cases to handle here and they are the same for
3103 * both Tx and Rx:
3104 * if the entry was valid previously (coalesce[i].[tr]x_valid
3105 * and the loop variable is less than the number of rings
3106 * allocated, then write the previous values
3107 *
3108 * if the entry was not valid previously, but the number of
3109 * rings is less than are allocated (this means the number of
3110 * rings increased from previously), then write out the
3111 * values in the first element
3112 *
3113 * Also, always write the ITR, even if in ITR_IS_DYNAMIC
3114 * as there is no harm because the dynamic algorithm
3115 * will just overwrite.
3116 */
3117 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
3118 rc = &vsi->q_vectors[i]->rx;
3119 rc->itr_settings = coalesce[i].itr_rx;
3120 ice_write_itr(rc, rc->itr_setting);
3121 } else if (i < vsi->alloc_rxq) {
3122 rc = &vsi->q_vectors[i]->rx;
3123 rc->itr_settings = coalesce[0].itr_rx;
3124 ice_write_itr(rc, rc->itr_setting);
3125 }
3126
3127 if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
3128 rc = &vsi->q_vectors[i]->tx;
3129 rc->itr_settings = coalesce[i].itr_tx;
3130 ice_write_itr(rc, rc->itr_setting);
3131 } else if (i < vsi->alloc_txq) {
3132 rc = &vsi->q_vectors[i]->tx;
3133 rc->itr_settings = coalesce[0].itr_tx;
3134 ice_write_itr(rc, rc->itr_setting);
3135 }
3136
3137 vsi->q_vectors[i]->intrl = coalesce[i].intrl;
3138 ice_set_q_vector_intrl(vsi->q_vectors[i]);
3139 }
3140
3141 /* the number of queue vectors increased so write whatever is in
3142 * the first element
3143 */
3144 for (; i < vsi->num_q_vectors; i++) {
3145 /* transmit */
3146 rc = &vsi->q_vectors[i]->tx;
3147 rc->itr_settings = coalesce[0].itr_tx;
3148 ice_write_itr(rc, rc->itr_setting);
3149
3150 /* receive */
3151 rc = &vsi->q_vectors[i]->rx;
3152 rc->itr_settings = coalesce[0].itr_rx;
3153 ice_write_itr(rc, rc->itr_setting);
3154
3155 vsi->q_vectors[i]->intrl = coalesce[0].intrl;
3156 ice_set_q_vector_intrl(vsi->q_vectors[i]);
3157 }
3158 }
3159
3160 /**
3161 * ice_vsi_rebuild - Rebuild VSI after reset
3162 * @vsi: VSI to be rebuild
3163 * @init_vsi: is this an initialization or a reconfigure of the VSI
3164 *
3165 * Returns 0 on success and negative value on failure
3166 */
ice_vsi_rebuild(struct ice_vsi * vsi,bool init_vsi)3167 int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi)
3168 {
3169 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3170 struct ice_coalesce_stored *coalesce;
3171 int prev_num_q_vectors = 0;
3172 enum ice_vsi_type vtype;
3173 struct ice_pf *pf;
3174 int ret, i;
3175
3176 if (!vsi)
3177 return -EINVAL;
3178
3179 pf = vsi->back;
3180 vtype = vsi->type;
3181 if (WARN_ON(vtype == ICE_VSI_VF && !vsi->vf))
3182 return -EINVAL;
3183
3184 ice_vsi_init_vlan_ops(vsi);
3185
3186 coalesce = kcalloc(vsi->num_q_vectors,
3187 sizeof(struct ice_coalesce_stored), GFP_KERNEL);
3188 if (!coalesce)
3189 return -ENOMEM;
3190
3191 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce);
3192
3193 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3194 ret = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3195 if (ret)
3196 dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3197 vsi->vsi_num, ret);
3198 ice_vsi_free_q_vectors(vsi);
3199
3200 /* SR-IOV determines needed MSIX resources all at once instead of per
3201 * VSI since when VFs are spawned we know how many VFs there are and how
3202 * many interrupts each VF needs. SR-IOV MSIX resources are also
3203 * cleared in the same manner.
3204 */
3205 if (vtype != ICE_VSI_VF) {
3206 /* reclaim SW interrupts back to the common pool */
3207 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
3208 pf->num_avail_sw_msix += vsi->num_q_vectors;
3209 vsi->base_vector = 0;
3210 }
3211
3212 if (ice_is_xdp_ena_vsi(vsi))
3213 /* return value check can be skipped here, it always returns
3214 * 0 if reset is in progress
3215 */
3216 ice_destroy_xdp_rings(vsi);
3217 ice_vsi_put_qs(vsi);
3218 ice_vsi_clear_rings(vsi);
3219 ice_vsi_free_arrays(vsi);
3220 if (vtype == ICE_VSI_VF)
3221 ice_vsi_set_num_qs(vsi, vsi->vf);
3222 else
3223 ice_vsi_set_num_qs(vsi, NULL);
3224
3225 ret = ice_vsi_alloc_arrays(vsi);
3226 if (ret < 0)
3227 goto err_vsi;
3228
3229 ice_vsi_get_qs(vsi);
3230
3231 ice_alloc_fd_res(vsi);
3232 ice_vsi_set_tc_cfg(vsi);
3233
3234 /* Initialize VSI struct elements and create VSI in FW */
3235 ret = ice_vsi_init(vsi, init_vsi);
3236 if (ret < 0)
3237 goto err_vsi;
3238
3239 switch (vtype) {
3240 case ICE_VSI_CTRL:
3241 case ICE_VSI_SWITCHDEV_CTRL:
3242 case ICE_VSI_PF:
3243 ret = ice_vsi_alloc_q_vectors(vsi);
3244 if (ret)
3245 goto err_rings;
3246
3247 ret = ice_vsi_setup_vector_base(vsi);
3248 if (ret)
3249 goto err_vectors;
3250
3251 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3252 if (ret)
3253 goto err_vectors;
3254
3255 ret = ice_vsi_alloc_rings(vsi);
3256 if (ret)
3257 goto err_vectors;
3258
3259 ice_vsi_map_rings_to_vectors(vsi);
3260 if (ice_is_xdp_ena_vsi(vsi)) {
3261 ret = ice_vsi_determine_xdp_res(vsi);
3262 if (ret)
3263 goto err_vectors;
3264 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog);
3265 if (ret)
3266 goto err_vectors;
3267 }
3268 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */
3269 if (vtype != ICE_VSI_CTRL)
3270 /* Do not exit if configuring RSS had an issue, at
3271 * least receive traffic on first queue. Hence no
3272 * need to capture return value
3273 */
3274 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
3275 ice_vsi_cfg_rss_lut_key(vsi);
3276 break;
3277 case ICE_VSI_VF:
3278 ret = ice_vsi_alloc_q_vectors(vsi);
3279 if (ret)
3280 goto err_rings;
3281
3282 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3283 if (ret)
3284 goto err_vectors;
3285
3286 ret = ice_vsi_alloc_rings(vsi);
3287 if (ret)
3288 goto err_vectors;
3289
3290 break;
3291 case ICE_VSI_CHNL:
3292 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
3293 ice_vsi_cfg_rss_lut_key(vsi);
3294 ice_vsi_set_rss_flow_fld(vsi);
3295 }
3296 break;
3297 default:
3298 break;
3299 }
3300
3301 /* configure VSI nodes based on number of queues and TC's */
3302 for (i = 0; i < vsi->tc_cfg.numtc; i++) {
3303 /* configure VSI nodes based on number of queues and TC's.
3304 * ADQ creates VSIs for each TC/Channel but doesn't
3305 * allocate queues instead it reconfigures the PF queues
3306 * as per the TC command. So max_txqs should point to the
3307 * PF Tx queues.
3308 */
3309 if (vtype == ICE_VSI_CHNL)
3310 max_txqs[i] = pf->num_lan_tx;
3311 else
3312 max_txqs[i] = vsi->alloc_txq;
3313
3314 if (ice_is_xdp_ena_vsi(vsi))
3315 max_txqs[i] += vsi->num_xdp_txq;
3316 }
3317
3318 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3319 /* If MQPRIO is set, means channel code path, hence for main
3320 * VSI's, use TC as 1
3321 */
3322 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3323 else
3324 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3325 vsi->tc_cfg.ena_tc, max_txqs);
3326
3327 if (ret) {
3328 dev_err(ice_pf_to_dev(pf), "VSI %d failed lan queue config, error %d\n",
3329 vsi->vsi_num, ret);
3330 if (init_vsi) {
3331 ret = -EIO;
3332 goto err_vectors;
3333 } else {
3334 return ice_schedule_reset(pf, ICE_RESET_PFR);
3335 }
3336 }
3337 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors);
3338 kfree(coalesce);
3339
3340 return 0;
3341
3342 err_vectors:
3343 ice_vsi_free_q_vectors(vsi);
3344 err_rings:
3345 if (vsi->netdev) {
3346 vsi->current_netdev_flags = 0;
3347 unregister_netdev(vsi->netdev);
3348 free_netdev(vsi->netdev);
3349 vsi->netdev = NULL;
3350 }
3351 err_vsi:
3352 ice_vsi_clear(vsi);
3353 set_bit(ICE_RESET_FAILED, pf->state);
3354 kfree(coalesce);
3355 return ret;
3356 }
3357
3358 /**
3359 * ice_is_reset_in_progress - check for a reset in progress
3360 * @state: PF state field
3361 */
ice_is_reset_in_progress(unsigned long * state)3362 bool ice_is_reset_in_progress(unsigned long *state)
3363 {
3364 return test_bit(ICE_RESET_OICR_RECV, state) ||
3365 test_bit(ICE_PFR_REQ, state) ||
3366 test_bit(ICE_CORER_REQ, state) ||
3367 test_bit(ICE_GLOBR_REQ, state);
3368 }
3369
3370 /**
3371 * ice_wait_for_reset - Wait for driver to finish reset and rebuild
3372 * @pf: pointer to the PF structure
3373 * @timeout: length of time to wait, in jiffies
3374 *
3375 * Wait (sleep) for a short time until the driver finishes cleaning up from
3376 * a device reset. The caller must be able to sleep. Use this to delay
3377 * operations that could fail while the driver is cleaning up after a device
3378 * reset.
3379 *
3380 * Returns 0 on success, -EBUSY if the reset is not finished within the
3381 * timeout, and -ERESTARTSYS if the thread was interrupted.
3382 */
ice_wait_for_reset(struct ice_pf * pf,unsigned long timeout)3383 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout)
3384 {
3385 long ret;
3386
3387 ret = wait_event_interruptible_timeout(pf->reset_wait_queue,
3388 !ice_is_reset_in_progress(pf->state),
3389 timeout);
3390 if (ret < 0)
3391 return ret;
3392 else if (!ret)
3393 return -EBUSY;
3394 else
3395 return 0;
3396 }
3397
3398 /**
3399 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map
3400 * @vsi: VSI being configured
3401 * @ctx: the context buffer returned from AQ VSI update command
3402 */
ice_vsi_update_q_map(struct ice_vsi * vsi,struct ice_vsi_ctx * ctx)3403 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
3404 {
3405 vsi->info.mapping_flags = ctx->info.mapping_flags;
3406 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
3407 sizeof(vsi->info.q_mapping));
3408 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
3409 sizeof(vsi->info.tc_mapping));
3410 }
3411
3412 /**
3413 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
3414 * @vsi: the VSI being configured
3415 * @ena_tc: TC map to be enabled
3416 */
ice_vsi_cfg_netdev_tc(struct ice_vsi * vsi,u8 ena_tc)3417 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
3418 {
3419 struct net_device *netdev = vsi->netdev;
3420 struct ice_pf *pf = vsi->back;
3421 int numtc = vsi->tc_cfg.numtc;
3422 struct ice_dcbx_cfg *dcbcfg;
3423 u8 netdev_tc;
3424 int i;
3425
3426 if (!netdev)
3427 return;
3428
3429 /* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */
3430 if (vsi->type == ICE_VSI_CHNL)
3431 return;
3432
3433 if (!ena_tc) {
3434 netdev_reset_tc(netdev);
3435 return;
3436 }
3437
3438 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf))
3439 numtc = vsi->all_numtc;
3440
3441 if (netdev_set_num_tc(netdev, numtc))
3442 return;
3443
3444 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
3445
3446 ice_for_each_traffic_class(i)
3447 if (vsi->tc_cfg.ena_tc & BIT(i))
3448 netdev_set_tc_queue(netdev,
3449 vsi->tc_cfg.tc_info[i].netdev_tc,
3450 vsi->tc_cfg.tc_info[i].qcount_tx,
3451 vsi->tc_cfg.tc_info[i].qoffset);
3452 /* setup TC queue map for CHNL TCs */
3453 ice_for_each_chnl_tc(i) {
3454 if (!(vsi->all_enatc & BIT(i)))
3455 break;
3456 if (!vsi->mqprio_qopt.qopt.count[i])
3457 break;
3458 netdev_set_tc_queue(netdev, i,
3459 vsi->mqprio_qopt.qopt.count[i],
3460 vsi->mqprio_qopt.qopt.offset[i]);
3461 }
3462
3463 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3464 return;
3465
3466 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
3467 u8 ets_tc = dcbcfg->etscfg.prio_table[i];
3468
3469 /* Get the mapped netdev TC# for the UP */
3470 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
3471 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3472 }
3473 }
3474
3475 /**
3476 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config
3477 * @vsi: the VSI being configured,
3478 * @ctxt: VSI context structure
3479 * @ena_tc: number of traffic classes to enable
3480 *
3481 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
3482 */
3483 static int
ice_vsi_setup_q_map_mqprio(struct ice_vsi * vsi,struct ice_vsi_ctx * ctxt,u8 ena_tc)3484 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt,
3485 u8 ena_tc)
3486 {
3487 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap;
3488 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0];
3489 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0];
3490 u8 netdev_tc = 0;
3491 int i;
3492
3493 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;
3494
3495 pow = order_base_2(tc0_qcount);
3496 qmap = ((tc0_offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
3497 ICE_AQ_VSI_TC_Q_OFFSET_M) |
3498 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) & ICE_AQ_VSI_TC_Q_NUM_M);
3499
3500 ice_for_each_traffic_class(i) {
3501 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
3502 /* TC is not enabled */
3503 vsi->tc_cfg.tc_info[i].qoffset = 0;
3504 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
3505 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
3506 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
3507 ctxt->info.tc_mapping[i] = 0;
3508 continue;
3509 }
3510
3511 offset = vsi->mqprio_qopt.qopt.offset[i];
3512 qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3513 qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3514 vsi->tc_cfg.tc_info[i].qoffset = offset;
3515 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
3516 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;
3517 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
3518 }
3519
3520 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {
3521 ice_for_each_chnl_tc(i) {
3522 if (!(vsi->all_enatc & BIT(i)))
3523 continue;
3524 offset = vsi->mqprio_qopt.qopt.offset[i];
3525 qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3526 qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3527 }
3528 }
3529
3530 /* Set actual Tx/Rx queue pairs */
3531 vsi->num_txq = offset + qcount_tx;
3532 if (vsi->num_txq > vsi->alloc_txq) {
3533 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
3534 vsi->num_txq, vsi->alloc_txq);
3535 return -EINVAL;
3536 }
3537
3538 vsi->num_rxq = offset + qcount_rx;
3539 if (vsi->num_rxq > vsi->alloc_rxq) {
3540 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
3541 vsi->num_rxq, vsi->alloc_rxq);
3542 return -EINVAL;
3543 }
3544
3545 /* Setup queue TC[0].qmap for given VSI context */
3546 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
3547 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
3548 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount);
3549
3550 /* Find queue count available for channel VSIs and starting offset
3551 * for channel VSIs
3552 */
3553 if (tc0_qcount && tc0_qcount < vsi->num_rxq) {
3554 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount;
3555 vsi->next_base_q = tc0_qcount;
3556 }
3557 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq);
3558 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq);
3559 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n",
3560 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);
3561
3562 return 0;
3563 }
3564
3565 /**
3566 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
3567 * @vsi: VSI to be configured
3568 * @ena_tc: TC bitmap
3569 *
3570 * VSI queues expected to be quiesced before calling this function
3571 */
ice_vsi_cfg_tc(struct ice_vsi * vsi,u8 ena_tc)3572 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
3573 {
3574 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3575 struct ice_pf *pf = vsi->back;
3576 struct ice_vsi_ctx *ctx;
3577 struct device *dev;
3578 int i, ret = 0;
3579 u8 num_tc = 0;
3580
3581 dev = ice_pf_to_dev(pf);
3582 if (vsi->tc_cfg.ena_tc == ena_tc &&
3583 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
3584 return ret;
3585
3586 ice_for_each_traffic_class(i) {
3587 /* build bitmap of enabled TCs */
3588 if (ena_tc & BIT(i))
3589 num_tc++;
3590 /* populate max_txqs per TC */
3591 max_txqs[i] = vsi->alloc_txq;
3592 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are
3593 * zero for CHNL VSI, hence use num_txq instead as max_txqs
3594 */
3595 if (vsi->type == ICE_VSI_CHNL &&
3596 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3597 max_txqs[i] = vsi->num_txq;
3598 }
3599
3600 vsi->tc_cfg.ena_tc = ena_tc;
3601 vsi->tc_cfg.numtc = num_tc;
3602
3603 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
3604 if (!ctx)
3605 return -ENOMEM;
3606
3607 ctx->vf_num = 0;
3608 ctx->info = vsi->info;
3609
3610 if (vsi->type == ICE_VSI_PF &&
3611 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3612 ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc);
3613 else
3614 ret = ice_vsi_setup_q_map(vsi, ctx);
3615
3616 if (ret)
3617 goto out;
3618
3619 /* must to indicate which section of VSI context are being modified */
3620 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3621 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
3622 if (ret) {
3623 dev_info(dev, "Failed VSI Update\n");
3624 goto out;
3625 }
3626
3627 if (vsi->type == ICE_VSI_PF &&
3628 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3629 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3630 else
3631 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3632 vsi->tc_cfg.ena_tc, max_txqs);
3633
3634 if (ret) {
3635 dev_err(dev, "VSI %d failed TC config, error %d\n",
3636 vsi->vsi_num, ret);
3637 goto out;
3638 }
3639 ice_vsi_update_q_map(vsi, ctx);
3640 vsi->info.valid_sections = 0;
3641
3642 ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3643 out:
3644 kfree(ctx);
3645 return ret;
3646 }
3647
3648 /**
3649 * ice_update_ring_stats - Update ring statistics
3650 * @stats: stats to be updated
3651 * @pkts: number of processed packets
3652 * @bytes: number of processed bytes
3653 *
3654 * This function assumes that caller has acquired a u64_stats_sync lock.
3655 */
ice_update_ring_stats(struct ice_q_stats * stats,u64 pkts,u64 bytes)3656 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes)
3657 {
3658 stats->bytes += bytes;
3659 stats->pkts += pkts;
3660 }
3661
3662 /**
3663 * ice_update_tx_ring_stats - Update Tx ring specific counters
3664 * @tx_ring: ring to update
3665 * @pkts: number of processed packets
3666 * @bytes: number of processed bytes
3667 */
ice_update_tx_ring_stats(struct ice_tx_ring * tx_ring,u64 pkts,u64 bytes)3668 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes)
3669 {
3670 u64_stats_update_begin(&tx_ring->syncp);
3671 ice_update_ring_stats(&tx_ring->stats, pkts, bytes);
3672 u64_stats_update_end(&tx_ring->syncp);
3673 }
3674
3675 /**
3676 * ice_update_rx_ring_stats - Update Rx ring specific counters
3677 * @rx_ring: ring to update
3678 * @pkts: number of processed packets
3679 * @bytes: number of processed bytes
3680 */
ice_update_rx_ring_stats(struct ice_rx_ring * rx_ring,u64 pkts,u64 bytes)3681 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes)
3682 {
3683 u64_stats_update_begin(&rx_ring->syncp);
3684 ice_update_ring_stats(&rx_ring->stats, pkts, bytes);
3685 u64_stats_update_end(&rx_ring->syncp);
3686 }
3687
3688 /**
3689 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used
3690 * @sw: switch to check if its default forwarding VSI is free
3691 *
3692 * Return true if the default forwarding VSI is already being used, else returns
3693 * false signalling that it's available to use.
3694 */
ice_is_dflt_vsi_in_use(struct ice_sw * sw)3695 bool ice_is_dflt_vsi_in_use(struct ice_sw *sw)
3696 {
3697 return (sw->dflt_vsi && sw->dflt_vsi_ena);
3698 }
3699
3700 /**
3701 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI
3702 * @sw: switch for the default forwarding VSI to compare against
3703 * @vsi: VSI to compare against default forwarding VSI
3704 *
3705 * If this VSI passed in is the default forwarding VSI then return true, else
3706 * return false
3707 */
ice_is_vsi_dflt_vsi(struct ice_sw * sw,struct ice_vsi * vsi)3708 bool ice_is_vsi_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi)
3709 {
3710 return (sw->dflt_vsi == vsi && sw->dflt_vsi_ena);
3711 }
3712
3713 /**
3714 * ice_set_dflt_vsi - set the default forwarding VSI
3715 * @sw: switch used to assign the default forwarding VSI
3716 * @vsi: VSI getting set as the default forwarding VSI on the switch
3717 *
3718 * If the VSI passed in is already the default VSI and it's enabled just return
3719 * success.
3720 *
3721 * If there is already a default VSI on the switch and it's enabled then return
3722 * -EEXIST since there can only be one default VSI per switch.
3723 *
3724 * Otherwise try to set the VSI passed in as the switch's default VSI and
3725 * return the result.
3726 */
ice_set_dflt_vsi(struct ice_sw * sw,struct ice_vsi * vsi)3727 int ice_set_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi)
3728 {
3729 struct device *dev;
3730 int status;
3731
3732 if (!sw || !vsi)
3733 return -EINVAL;
3734
3735 dev = ice_pf_to_dev(vsi->back);
3736
3737 /* the VSI passed in is already the default VSI */
3738 if (ice_is_vsi_dflt_vsi(sw, vsi)) {
3739 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3740 vsi->vsi_num);
3741 return 0;
3742 }
3743
3744 /* another VSI is already the default VSI for this switch */
3745 if (ice_is_dflt_vsi_in_use(sw)) {
3746 dev_err(dev, "Default forwarding VSI %d already in use, disable it and try again\n",
3747 sw->dflt_vsi->vsi_num);
3748 return -EEXIST;
3749 }
3750
3751 status = ice_cfg_dflt_vsi(&vsi->back->hw, vsi->idx, true, ICE_FLTR_RX);
3752 if (status) {
3753 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n",
3754 vsi->vsi_num, status);
3755 return status;
3756 }
3757
3758 sw->dflt_vsi = vsi;
3759 sw->dflt_vsi_ena = true;
3760
3761 return 0;
3762 }
3763
3764 /**
3765 * ice_clear_dflt_vsi - clear the default forwarding VSI
3766 * @sw: switch used to clear the default VSI
3767 *
3768 * If the switch has no default VSI or it's not enabled then return error.
3769 *
3770 * Otherwise try to clear the default VSI and return the result.
3771 */
ice_clear_dflt_vsi(struct ice_sw * sw)3772 int ice_clear_dflt_vsi(struct ice_sw *sw)
3773 {
3774 struct ice_vsi *dflt_vsi;
3775 struct device *dev;
3776 int status;
3777
3778 if (!sw)
3779 return -EINVAL;
3780
3781 dev = ice_pf_to_dev(sw->pf);
3782
3783 dflt_vsi = sw->dflt_vsi;
3784
3785 /* there is no default VSI configured */
3786 if (!ice_is_dflt_vsi_in_use(sw))
3787 return -ENODEV;
3788
3789 status = ice_cfg_dflt_vsi(&dflt_vsi->back->hw, dflt_vsi->idx, false,
3790 ICE_FLTR_RX);
3791 if (status) {
3792 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n",
3793 dflt_vsi->vsi_num, status);
3794 return -EIO;
3795 }
3796
3797 sw->dflt_vsi = NULL;
3798 sw->dflt_vsi_ena = false;
3799
3800 return 0;
3801 }
3802
3803 /**
3804 * ice_get_link_speed_mbps - get link speed in Mbps
3805 * @vsi: the VSI whose link speed is being queried
3806 *
3807 * Return current VSI link speed and 0 if the speed is unknown.
3808 */
ice_get_link_speed_mbps(struct ice_vsi * vsi)3809 int ice_get_link_speed_mbps(struct ice_vsi *vsi)
3810 {
3811 switch (vsi->port_info->phy.link_info.link_speed) {
3812 case ICE_AQ_LINK_SPEED_100GB:
3813 return SPEED_100000;
3814 case ICE_AQ_LINK_SPEED_50GB:
3815 return SPEED_50000;
3816 case ICE_AQ_LINK_SPEED_40GB:
3817 return SPEED_40000;
3818 case ICE_AQ_LINK_SPEED_25GB:
3819 return SPEED_25000;
3820 case ICE_AQ_LINK_SPEED_20GB:
3821 return SPEED_20000;
3822 case ICE_AQ_LINK_SPEED_10GB:
3823 return SPEED_10000;
3824 case ICE_AQ_LINK_SPEED_5GB:
3825 return SPEED_5000;
3826 case ICE_AQ_LINK_SPEED_2500MB:
3827 return SPEED_2500;
3828 case ICE_AQ_LINK_SPEED_1000MB:
3829 return SPEED_1000;
3830 case ICE_AQ_LINK_SPEED_100MB:
3831 return SPEED_100;
3832 case ICE_AQ_LINK_SPEED_10MB:
3833 return SPEED_10;
3834 case ICE_AQ_LINK_SPEED_UNKNOWN:
3835 default:
3836 return 0;
3837 }
3838 }
3839
3840 /**
3841 * ice_get_link_speed_kbps - get link speed in Kbps
3842 * @vsi: the VSI whose link speed is being queried
3843 *
3844 * Return current VSI link speed and 0 if the speed is unknown.
3845 */
ice_get_link_speed_kbps(struct ice_vsi * vsi)3846 int ice_get_link_speed_kbps(struct ice_vsi *vsi)
3847 {
3848 int speed_mbps;
3849
3850 speed_mbps = ice_get_link_speed_mbps(vsi);
3851
3852 return speed_mbps * 1000;
3853 }
3854
3855 /**
3856 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate
3857 * @vsi: VSI to be configured
3858 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit
3859 *
3860 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit
3861 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI
3862 * on TC 0.
3863 */
ice_set_min_bw_limit(struct ice_vsi * vsi,u64 min_tx_rate)3864 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate)
3865 {
3866 struct ice_pf *pf = vsi->back;
3867 struct device *dev;
3868 int status;
3869 int speed;
3870
3871 dev = ice_pf_to_dev(pf);
3872 if (!vsi->port_info) {
3873 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3874 vsi->idx, vsi->type);
3875 return -EINVAL;
3876 }
3877
3878 speed = ice_get_link_speed_kbps(vsi);
3879 if (min_tx_rate > (u64)speed) {
3880 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3881 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3882 speed);
3883 return -EINVAL;
3884 }
3885
3886 /* Configure min BW for VSI limit */
3887 if (min_tx_rate) {
3888 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3889 ICE_MIN_BW, min_tx_rate);
3890 if (status) {
3891 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n",
3892 min_tx_rate, ice_vsi_type_str(vsi->type),
3893 vsi->idx);
3894 return status;
3895 }
3896
3897 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n",
3898 min_tx_rate, ice_vsi_type_str(vsi->type));
3899 } else {
3900 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3901 vsi->idx, 0,
3902 ICE_MIN_BW);
3903 if (status) {
3904 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n",
3905 ice_vsi_type_str(vsi->type), vsi->idx);
3906 return status;
3907 }
3908
3909 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n",
3910 ice_vsi_type_str(vsi->type), vsi->idx);
3911 }
3912
3913 return 0;
3914 }
3915
3916 /**
3917 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate
3918 * @vsi: VSI to be configured
3919 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit
3920 *
3921 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit
3922 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI
3923 * on TC 0.
3924 */
ice_set_max_bw_limit(struct ice_vsi * vsi,u64 max_tx_rate)3925 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate)
3926 {
3927 struct ice_pf *pf = vsi->back;
3928 struct device *dev;
3929 int status;
3930 int speed;
3931
3932 dev = ice_pf_to_dev(pf);
3933 if (!vsi->port_info) {
3934 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3935 vsi->idx, vsi->type);
3936 return -EINVAL;
3937 }
3938
3939 speed = ice_get_link_speed_kbps(vsi);
3940 if (max_tx_rate > (u64)speed) {
3941 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3942 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3943 speed);
3944 return -EINVAL;
3945 }
3946
3947 /* Configure max BW for VSI limit */
3948 if (max_tx_rate) {
3949 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3950 ICE_MAX_BW, max_tx_rate);
3951 if (status) {
3952 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n",
3953 max_tx_rate, ice_vsi_type_str(vsi->type),
3954 vsi->idx);
3955 return status;
3956 }
3957
3958 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n",
3959 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx);
3960 } else {
3961 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3962 vsi->idx, 0,
3963 ICE_MAX_BW);
3964 if (status) {
3965 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n",
3966 ice_vsi_type_str(vsi->type), vsi->idx);
3967 return status;
3968 }
3969
3970 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n",
3971 ice_vsi_type_str(vsi->type), vsi->idx);
3972 }
3973
3974 return 0;
3975 }
3976
3977 /**
3978 * ice_set_link - turn on/off physical link
3979 * @vsi: VSI to modify physical link on
3980 * @ena: turn on/off physical link
3981 */
ice_set_link(struct ice_vsi * vsi,bool ena)3982 int ice_set_link(struct ice_vsi *vsi, bool ena)
3983 {
3984 struct device *dev = ice_pf_to_dev(vsi->back);
3985 struct ice_port_info *pi = vsi->port_info;
3986 struct ice_hw *hw = pi->hw;
3987 int status;
3988
3989 if (vsi->type != ICE_VSI_PF)
3990 return -EINVAL;
3991
3992 status = ice_aq_set_link_restart_an(pi, ena, NULL);
3993
3994 /* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE.
3995 * this is not a fatal error, so print a warning message and return
3996 * a success code. Return an error if FW returns an error code other
3997 * than ICE_AQ_RC_EMODE
3998 */
3999 if (status == -EIO) {
4000 if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)
4001 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",
4002 (ena ? "ON" : "OFF"), status,
4003 ice_aq_str(hw->adminq.sq_last_status));
4004 } else if (status) {
4005 dev_err(dev, "can't set link to %s, err %d aq_err %s\n",
4006 (ena ? "ON" : "OFF"), status,
4007 ice_aq_str(hw->adminq.sq_last_status));
4008 return status;
4009 }
4010
4011 return 0;
4012 }
4013
4014 /**
4015 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI
4016 * @vsi: VSI used to add VLAN filters
4017 *
4018 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based
4019 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't
4020 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via
4021 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID.
4022 *
4023 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic
4024 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged
4025 * traffic in SVM, since the VLAN TPID isn't part of filtering.
4026 *
4027 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be
4028 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is
4029 * part of filtering.
4030 */
ice_vsi_add_vlan_zero(struct ice_vsi * vsi)4031 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi)
4032 {
4033 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
4034 struct ice_vlan vlan;
4035 int err;
4036
4037 vlan = ICE_VLAN(0, 0, 0);
4038 err = vlan_ops->add_vlan(vsi, &vlan);
4039 if (err && err != -EEXIST)
4040 return err;
4041
4042 /* in SVM both VLAN 0 filters are identical */
4043 if (!ice_is_dvm_ena(&vsi->back->hw))
4044 return 0;
4045
4046 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
4047 err = vlan_ops->add_vlan(vsi, &vlan);
4048 if (err && err != -EEXIST)
4049 return err;
4050
4051 return 0;
4052 }
4053
4054 /**
4055 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI
4056 * @vsi: VSI used to add VLAN filters
4057 *
4058 * Delete the VLAN 0 filters in the same manner that they were added in
4059 * ice_vsi_add_vlan_zero.
4060 */
ice_vsi_del_vlan_zero(struct ice_vsi * vsi)4061 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi)
4062 {
4063 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
4064 struct ice_vlan vlan;
4065 int err;
4066
4067 vlan = ICE_VLAN(0, 0, 0);
4068 err = vlan_ops->del_vlan(vsi, &vlan);
4069 if (err && err != -EEXIST)
4070 return err;
4071
4072 /* in SVM both VLAN 0 filters are identical */
4073 if (!ice_is_dvm_ena(&vsi->back->hw))
4074 return 0;
4075
4076 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
4077 err = vlan_ops->del_vlan(vsi, &vlan);
4078 if (err && err != -EEXIST)
4079 return err;
4080
4081 /* when deleting the last VLAN filter, make sure to disable the VLAN
4082 * promisc mode so the filter isn't left by accident
4083 */
4084 return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx,
4085 ICE_MCAST_VLAN_PROMISC_BITS, 0);
4086 }
4087
4088 /**
4089 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode
4090 * @vsi: VSI used to get the VLAN mode
4091 *
4092 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled
4093 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details.
4094 */
ice_vsi_num_zero_vlans(struct ice_vsi * vsi)4095 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi)
4096 {
4097 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2
4098 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1
4099 /* no VLAN 0 filter is created when a port VLAN is active */
4100 if (vsi->type == ICE_VSI_VF) {
4101 if (WARN_ON(!vsi->vf))
4102 return 0;
4103
4104 if (ice_vf_is_port_vlan_ena(vsi->vf))
4105 return 0;
4106 }
4107
4108 if (ice_is_dvm_ena(&vsi->back->hw))
4109 return ICE_DVM_NUM_ZERO_VLAN_FLTRS;
4110 else
4111 return ICE_SVM_NUM_ZERO_VLAN_FLTRS;
4112 }
4113
4114 /**
4115 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs
4116 * @vsi: VSI used to determine if any non-zero VLANs have been added
4117 */
ice_vsi_has_non_zero_vlans(struct ice_vsi * vsi)4118 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi)
4119 {
4120 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi));
4121 }
4122
4123 /**
4124 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI
4125 * @vsi: VSI used to get the number of non-zero VLANs added
4126 */
ice_vsi_num_non_zero_vlans(struct ice_vsi * vsi)4127 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi)
4128 {
4129 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi));
4130 }
4131
4132 /**
4133 * ice_is_feature_supported
4134 * @pf: pointer to the struct ice_pf instance
4135 * @f: feature enum to be checked
4136 *
4137 * returns true if feature is supported, false otherwise
4138 */
ice_is_feature_supported(struct ice_pf * pf,enum ice_feature f)4139 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f)
4140 {
4141 if (f < 0 || f >= ICE_F_MAX)
4142 return false;
4143
4144 return test_bit(f, pf->features);
4145 }
4146
4147 /**
4148 * ice_set_feature_support
4149 * @pf: pointer to the struct ice_pf instance
4150 * @f: feature enum to set
4151 */
ice_set_feature_support(struct ice_pf * pf,enum ice_feature f)4152 static void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f)
4153 {
4154 if (f < 0 || f >= ICE_F_MAX)
4155 return;
4156
4157 set_bit(f, pf->features);
4158 }
4159
4160 /**
4161 * ice_clear_feature_support
4162 * @pf: pointer to the struct ice_pf instance
4163 * @f: feature enum to clear
4164 */
ice_clear_feature_support(struct ice_pf * pf,enum ice_feature f)4165 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f)
4166 {
4167 if (f < 0 || f >= ICE_F_MAX)
4168 return;
4169
4170 clear_bit(f, pf->features);
4171 }
4172
4173 /**
4174 * ice_init_feature_support
4175 * @pf: pointer to the struct ice_pf instance
4176 *
4177 * called during init to setup supported feature
4178 */
ice_init_feature_support(struct ice_pf * pf)4179 void ice_init_feature_support(struct ice_pf *pf)
4180 {
4181 switch (pf->hw.device_id) {
4182 case ICE_DEV_ID_E810C_BACKPLANE:
4183 case ICE_DEV_ID_E810C_QSFP:
4184 case ICE_DEV_ID_E810C_SFP:
4185 ice_set_feature_support(pf, ICE_F_DSCP);
4186 if (ice_is_e810t(&pf->hw)) {
4187 ice_set_feature_support(pf, ICE_F_SMA_CTRL);
4188 if (ice_gnss_is_gps_present(&pf->hw))
4189 ice_set_feature_support(pf, ICE_F_GNSS);
4190 }
4191 break;
4192 default:
4193 break;
4194 }
4195 }
4196
4197 /**
4198 * ice_vsi_update_security - update security block in VSI
4199 * @vsi: pointer to VSI structure
4200 * @fill: function pointer to fill ctx
4201 */
4202 int
ice_vsi_update_security(struct ice_vsi * vsi,void (* fill)(struct ice_vsi_ctx *))4203 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))
4204 {
4205 struct ice_vsi_ctx ctx = { 0 };
4206
4207 ctx.info = vsi->info;
4208 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
4209 fill(&ctx);
4210
4211 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL))
4212 return -ENODEV;
4213
4214 vsi->info = ctx.info;
4215 return 0;
4216 }
4217
4218 /**
4219 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx
4220 * @ctx: pointer to VSI ctx structure
4221 */
ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx * ctx)4222 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx)
4223 {
4224 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
4225 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4226 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4227 }
4228
4229 /**
4230 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx
4231 * @ctx: pointer to VSI ctx structure
4232 */
ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx * ctx)4233 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)
4234 {
4235 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF &
4236 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4237 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4238 }
4239
4240 /**
4241 * ice_vsi_ctx_set_allow_override - allow destination override on VSI
4242 * @ctx: pointer to VSI ctx structure
4243 */
ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx * ctx)4244 void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx)
4245 {
4246 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4247 }
4248
4249 /**
4250 * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI
4251 * @ctx: pointer to VSI ctx structure
4252 */
ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx * ctx)4253 void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx)
4254 {
4255 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4256 }
4257