1/* $Id: hypersparc.S,v 1.17 2000/07/16 21:48:52 anton Exp $
2 * hypersparc.S: High speed Hypersparc mmu/cache operations.
3 *
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 */
6
7#include <asm/ptrace.h>
8#include <asm/psr.h>
9#include <asm/asi.h>
10#include <asm/page.h>
11#include <asm/pgtsrmmu.h>
12#include <linux/config.h>
13#include <linux/init.h>
14
15	.text
16	.align	4
17
18	.globl	hypersparc_flush_cache_all, hypersparc_flush_cache_mm
19	.globl	hypersparc_flush_cache_range, hypersparc_flush_cache_page
20	.globl	hypersparc_flush_page_to_ram
21	.globl	hypersparc_flush_page_for_dma, hypersparc_flush_sig_insns
22	.globl	hypersparc_flush_tlb_all, hypersparc_flush_tlb_mm
23	.globl	hypersparc_flush_tlb_range, hypersparc_flush_tlb_page
24
25hypersparc_flush_cache_all:
26	WINDOW_FLUSH(%g4, %g5)
27	sethi	%hi(vac_cache_size), %g4
28	ld	[%g4 + %lo(vac_cache_size)], %g5
29	sethi	%hi(vac_line_size), %g1
30	ld	[%g1 + %lo(vac_line_size)], %g2
311:
32	subcc	%g5, %g2, %g5			! hyper_flush_unconditional_combined
33	bne	1b
34	 sta	%g0, [%g5] ASI_M_FLUSH_CTX
35	retl
36	 sta	%g0, [%g0] ASI_M_FLUSH_IWHOLE	! hyper_flush_whole_icache
37
38	/* We expand the window flush to get maximum performance. */
39hypersparc_flush_cache_mm:
40#ifndef CONFIG_SMP
41	ld	[%o0 + AOFF_mm_context], %g1
42	cmp	%g1, -1
43	be	hypersparc_flush_cache_mm_out
44#endif
45	WINDOW_FLUSH(%g4, %g5)
46
47	sethi	%hi(vac_line_size), %g1
48	ld	[%g1 + %lo(vac_line_size)], %o1
49	sethi	%hi(vac_cache_size), %g2
50	ld	[%g2 + %lo(vac_cache_size)], %o0
51	add	%o1, %o1, %g1
52	add	%o1, %g1, %g2
53	add	%o1, %g2, %g3
54	add	%o1, %g3, %g4
55	add	%o1, %g4, %g5
56	add	%o1, %g5, %o4
57	add	%o1, %o4, %o5
58
59	/* BLAMMO! */
601:
61	subcc	%o0, %o5, %o0				! hyper_flush_cache_user
62	sta	%g0, [%o0 + %g0] ASI_M_FLUSH_USER
63	sta	%g0, [%o0 + %o1] ASI_M_FLUSH_USER
64	sta	%g0, [%o0 + %g1] ASI_M_FLUSH_USER
65	sta	%g0, [%o0 + %g2] ASI_M_FLUSH_USER
66	sta	%g0, [%o0 + %g3] ASI_M_FLUSH_USER
67	sta	%g0, [%o0 + %g4] ASI_M_FLUSH_USER
68	sta	%g0, [%o0 + %g5] ASI_M_FLUSH_USER
69	bne	1b
70	 sta	%g0, [%o0 + %o4] ASI_M_FLUSH_USER
71hypersparc_flush_cache_mm_out:
72	retl
73	 nop
74
75	/* The things we do for performance... */
76hypersparc_flush_cache_range:
77#ifndef CONFIG_SMP
78	ld	[%o0 + AOFF_mm_context], %g1
79	cmp	%g1, -1
80	be	hypersparc_flush_cache_range_out
81#endif
82	WINDOW_FLUSH(%g4, %g5)
83
84	sethi	%hi(vac_line_size), %g1
85	ld	[%g1 + %lo(vac_line_size)], %o4
86	sethi	%hi(vac_cache_size), %g2
87	ld	[%g2 + %lo(vac_cache_size)], %o3
88
89	/* Here comes the fun part... */
90	add	%o2, (PAGE_SIZE - 1), %o2
91	andn	%o1, (PAGE_SIZE - 1), %o1
92	add	%o4, %o4, %o5
93	andn	%o2, (PAGE_SIZE - 1), %o2
94	add	%o4, %o5, %g1
95	sub	%o2, %o1, %g4
96	add	%o4, %g1, %g2
97	sll	%o3, 2, %g5
98	add	%o4, %g2, %g3
99	cmp	%g4, %g5
100	add	%o4, %g3, %g4
101	blu	0f
102	 add	%o4, %g4, %g5
103	add	%o4, %g5, %g7
104
105	/* Flush entire user space, believe it or not this is quicker
106	 * than page at a time flushings for range > (cache_size<<2).
107	 */
1081:
109	subcc	%o3, %g7, %o3
110	sta	%g0, [%o3 + %g0] ASI_M_FLUSH_USER
111	sta	%g0, [%o3 + %o4] ASI_M_FLUSH_USER
112	sta	%g0, [%o3 + %o5] ASI_M_FLUSH_USER
113	sta	%g0, [%o3 + %g1] ASI_M_FLUSH_USER
114	sta	%g0, [%o3 + %g2] ASI_M_FLUSH_USER
115	sta	%g0, [%o3 + %g3] ASI_M_FLUSH_USER
116	sta	%g0, [%o3 + %g4] ASI_M_FLUSH_USER
117	bne	1b
118	 sta	%g0, [%o3 + %g5] ASI_M_FLUSH_USER
119	retl
120	 nop
121
122	/* Below our threshold, flush one page at a time. */
1230:
124	ld	[%o0 + AOFF_mm_context], %o0
125	mov	SRMMU_CTX_REG, %g7
126	lda	[%g7] ASI_M_MMUREGS, %o3
127	sta	%o0, [%g7] ASI_M_MMUREGS
128	add	%o2, -PAGE_SIZE, %o0
1291:
130	or	%o0, 0x400, %g7
131	lda	[%g7] ASI_M_FLUSH_PROBE, %g7
132	orcc	%g7, 0, %g0
133	be,a	3f
134	 mov	%o0, %o2
135	add	%o4, %g5, %g7
1362:
137	sub	%o2, %g7, %o2
138	sta	%g0, [%o2 + %g0] ASI_M_FLUSH_PAGE
139	sta	%g0, [%o2 + %o4] ASI_M_FLUSH_PAGE
140	sta	%g0, [%o2 + %o5] ASI_M_FLUSH_PAGE
141	sta	%g0, [%o2 + %g1] ASI_M_FLUSH_PAGE
142	sta	%g0, [%o2 + %g2] ASI_M_FLUSH_PAGE
143	sta	%g0, [%o2 + %g3] ASI_M_FLUSH_PAGE
144	andcc	%o2, 0xffc, %g0
145	sta	%g0, [%o2 + %g4] ASI_M_FLUSH_PAGE
146	bne	2b
147	 sta	%g0, [%o2 + %g5] ASI_M_FLUSH_PAGE
1483:
149	cmp	%o2, %o1
150	bne	1b
151	 add	%o2, -PAGE_SIZE, %o0
152	mov	SRMMU_FAULT_STATUS, %g5
153	lda	[%g5] ASI_M_MMUREGS, %g0
154	mov	SRMMU_CTX_REG, %g7
155	sta	%o3, [%g7] ASI_M_MMUREGS
156hypersparc_flush_cache_range_out:
157	retl
158	 nop
159
160	/* HyperSparc requires a valid mapping where we are about to flush
161	 * in order to check for a physical tag match during the flush.
162	 */
163	/* Verified, my ass... */
164hypersparc_flush_cache_page:
165	ld	[%o0 + 0x0], %o0		/* XXX vma->vm_mm, GROSS XXX */
166	ld	[%o0 + AOFF_mm_context], %g2
167#ifndef CONFIG_SMP
168	cmp	%g2, -1
169	be	hypersparc_flush_cache_page_out
170#endif
171	WINDOW_FLUSH(%g4, %g5)
172
173	sethi	%hi(vac_line_size), %g1
174	ld	[%g1 + %lo(vac_line_size)], %o4
175	mov	SRMMU_CTX_REG, %o3
176	andn	%o1, (PAGE_SIZE - 1), %o1
177	lda	[%o3] ASI_M_MMUREGS, %o2
178	sta	%g2, [%o3] ASI_M_MMUREGS
179	or	%o1, 0x400, %o5
180	lda	[%o5] ASI_M_FLUSH_PROBE, %g1
181	orcc	%g0, %g1, %g0
182	be	2f
183	 add	%o4, %o4, %o5
184	sub	%o1, -PAGE_SIZE, %o1
185	add	%o4, %o5, %g1
186	add	%o4, %g1, %g2
187	add	%o4, %g2, %g3
188	add	%o4, %g3, %g4
189	add	%o4, %g4, %g5
190	add	%o4, %g5, %g7
191
192	/* BLAMMO! */
1931:
194	sub	%o1, %g7, %o1
195	sta	%g0, [%o1 + %g0] ASI_M_FLUSH_PAGE
196	sta	%g0, [%o1 + %o4] ASI_M_FLUSH_PAGE
197	sta	%g0, [%o1 + %o5] ASI_M_FLUSH_PAGE
198	sta	%g0, [%o1 + %g1] ASI_M_FLUSH_PAGE
199	sta	%g0, [%o1 + %g2] ASI_M_FLUSH_PAGE
200	sta	%g0, [%o1 + %g3] ASI_M_FLUSH_PAGE
201	andcc	%o1, 0xffc, %g0
202	sta	%g0, [%o1 + %g4] ASI_M_FLUSH_PAGE
203	bne	1b
204	 sta	%g0, [%o1 + %g5] ASI_M_FLUSH_PAGE
2052:
206	mov	SRMMU_FAULT_STATUS, %g7
207	mov	SRMMU_CTX_REG, %g4
208	lda	[%g7] ASI_M_MMUREGS, %g0
209	sta	%o2, [%g4] ASI_M_MMUREGS
210hypersparc_flush_cache_page_out:
211	retl
212	 nop
213
214hypersparc_flush_sig_insns:
215	flush	%o1
216	retl
217	 flush	%o1 + 4
218
219	/* HyperSparc is copy-back. */
220hypersparc_flush_page_to_ram:
221	sethi	%hi(vac_line_size), %g1
222	ld	[%g1 + %lo(vac_line_size)], %o4
223	andn	%o0, (PAGE_SIZE - 1), %o0
224	add	%o4, %o4, %o5
225	or	%o0, 0x400, %g7
226	lda	[%g7] ASI_M_FLUSH_PROBE, %g5
227	add	%o4, %o5, %g1
228	orcc	%g5, 0, %g0
229	be	2f
230	 add	%o4, %g1, %g2
231	add	%o4, %g2, %g3
232	sub	%o0, -PAGE_SIZE, %o0
233	add	%o4, %g3, %g4
234	add	%o4, %g4, %g5
235	add	%o4, %g5, %g7
236
237	/* BLAMMO! */
2381:
239	sub	%o0, %g7, %o0
240	sta	%g0, [%o0 + %g0] ASI_M_FLUSH_PAGE
241	sta	%g0, [%o0 + %o4] ASI_M_FLUSH_PAGE
242	sta	%g0, [%o0 + %o5] ASI_M_FLUSH_PAGE
243	sta	%g0, [%o0 + %g1] ASI_M_FLUSH_PAGE
244	sta	%g0, [%o0 + %g2] ASI_M_FLUSH_PAGE
245	sta	%g0, [%o0 + %g3] ASI_M_FLUSH_PAGE
246	andcc	%o0, 0xffc, %g0
247	sta	%g0, [%o0 + %g4] ASI_M_FLUSH_PAGE
248	bne	1b
249	 sta	%g0, [%o0 + %g5] ASI_M_FLUSH_PAGE
2502:
251	mov	SRMMU_FAULT_STATUS, %g1
252	retl
253	 lda	[%g1] ASI_M_MMUREGS, %g0
254
255	/* HyperSparc is IO cache coherent. */
256hypersparc_flush_page_for_dma:
257	retl
258	 nop
259
260	/* It was noted that at boot time a TLB flush all in a delay slot
261	 * can deliver an illegal instruction to the processor if the timing
262	 * is just right...
263	 */
264hypersparc_flush_tlb_all:
265	mov	0x400, %g1
266	sta	%g0, [%g1] ASI_M_FLUSH_PROBE
267	retl
268	 nop
269
270hypersparc_flush_tlb_mm:
271	mov	SRMMU_CTX_REG, %g1
272	ld	[%o0 + AOFF_mm_context], %o1
273	lda	[%g1] ASI_M_MMUREGS, %g5
274#ifndef CONFIG_SMP
275	cmp	%o1, -1
276	be	hypersparc_flush_tlb_mm_out
277#endif
278	 mov	0x300, %g2
279	sta	%o1, [%g1] ASI_M_MMUREGS
280	sta	%g0, [%g2] ASI_M_FLUSH_PROBE
281hypersparc_flush_tlb_mm_out:
282	retl
283	 sta	%g5, [%g1] ASI_M_MMUREGS
284
285hypersparc_flush_tlb_range:
286	mov	SRMMU_CTX_REG, %g1
287	ld	[%o0 + AOFF_mm_context], %o3
288	lda	[%g1] ASI_M_MMUREGS, %g5
289#ifndef CONFIG_SMP
290	cmp	%o3, -1
291	be	hypersparc_flush_tlb_range_out
292#endif
293	 sethi	%hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
294	sta	%o3, [%g1] ASI_M_MMUREGS
295	and	%o1, %o4, %o1
296	add	%o1, 0x200, %o1
297	sta	%g0, [%o1] ASI_M_FLUSH_PROBE
2981:
299	sub	%o1, %o4, %o1
300	cmp	%o1, %o2
301	blu,a	1b
302	 sta	%g0, [%o1] ASI_M_FLUSH_PROBE
303hypersparc_flush_tlb_range_out:
304	retl
305	 sta	%g5, [%g1] ASI_M_MMUREGS
306
307hypersparc_flush_tlb_page:
308	ld	[%o0 + 0x00], %o0	/* XXX vma->vm_mm GROSS XXX */
309	mov	SRMMU_CTX_REG, %g1
310	ld	[%o0 + AOFF_mm_context], %o3
311	andn	%o1, (PAGE_SIZE - 1), %o1
312#ifndef CONFIG_SMP
313	cmp	%o3, -1
314	be	hypersparc_flush_tlb_page_out
315#endif
316	 lda	[%g1] ASI_M_MMUREGS, %g5
317	sta	%o3, [%g1] ASI_M_MMUREGS
318	sta	%g0, [%o1] ASI_M_FLUSH_PROBE
319hypersparc_flush_tlb_page_out:
320	retl
321	 sta	%g5, [%g1] ASI_M_MMUREGS
322
323	__INIT
324
325	/* High speed page clear/copy. */
326hypersparc_bzero_1page:
327/* NOTE: This routine has to be shorter than 40insns --jj */
328	clr	%g1
329	mov	32, %g2
330	mov	64, %g3
331	mov	96, %g4
332	mov	128, %g5
333	mov	160, %g7
334	mov	192, %o2
335	mov	224, %o3
336	mov	16, %o1
3371:
338	stda	%g0, [%o0 + %g0] ASI_M_BFILL
339	stda	%g0, [%o0 + %g2] ASI_M_BFILL
340	stda	%g0, [%o0 + %g3] ASI_M_BFILL
341	stda	%g0, [%o0 + %g4] ASI_M_BFILL
342	stda	%g0, [%o0 + %g5] ASI_M_BFILL
343	stda	%g0, [%o0 + %g7] ASI_M_BFILL
344	stda	%g0, [%o0 + %o2] ASI_M_BFILL
345	stda	%g0, [%o0 + %o3] ASI_M_BFILL
346	subcc	%o1, 1, %o1
347	bne	1b
348	 add	%o0, 256, %o0
349
350	retl
351	 nop
352
353hypersparc_copy_1page:
354/* NOTE: This routine has to be shorter than 70insns --jj */
355	sub	%o1, %o0, %o2		! difference
356	mov	16, %g1
3571:
358	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
359	add	%o0, 32, %o0
360	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
361	add	%o0, 32, %o0
362	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
363	add	%o0, 32, %o0
364	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
365	add	%o0, 32, %o0
366	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
367	add	%o0, 32, %o0
368	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
369	add	%o0, 32, %o0
370	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
371	add	%o0, 32, %o0
372	sta	%o0, [%o0 + %o2] ASI_M_BCOPY
373	subcc	%g1, 1, %g1
374	bne	1b
375	 add	%o0, 32, %o0
376
377	retl
378	 nop
379
380	.globl	hypersparc_setup_blockops
381hypersparc_setup_blockops:
382	sethi	%hi(bzero_1page), %o0
383	or	%o0, %lo(bzero_1page), %o0
384	sethi	%hi(hypersparc_bzero_1page), %o1
385	or	%o1, %lo(hypersparc_bzero_1page), %o1
386	sethi	%hi(hypersparc_copy_1page), %o2
387	or	%o2, %lo(hypersparc_copy_1page), %o2
388	ld	[%o1], %o4
3891:
390	add	%o1, 4, %o1
391	st	%o4, [%o0]
392	add	%o0, 4, %o0
393	cmp	%o1, %o2
394	bne	1b
395	 ld	[%o1], %o4
396	sethi	%hi(__copy_1page), %o0
397	or	%o0, %lo(__copy_1page), %o0
398	sethi	%hi(hypersparc_setup_blockops), %o2
399	or	%o2, %lo(hypersparc_setup_blockops), %o2
400	ld	[%o1], %o4
4011:
402	add	%o1, 4, %o1
403	st	%o4, [%o0]
404	add	%o0, 4, %o0
405	cmp	%o1, %o2
406	bne	1b
407	 ld	[%o1], %o4
408	sta	%g0, [%g0] ASI_M_FLUSH_IWHOLE
409	retl
410	 nop
411