1 /* Tests for presence or absence of hardware registers.
2  * This code was originally in atari/config.c, but I noticed
3  * that it was also in drivers/nubus/nubus.c and I wanted to
4  * use it in hp300/config.c, so it seemed sensible to pull it
5  * out into its own file.
6  *
7  * The test is for use when trying to read a hardware register
8  * that isn't present would cause a bus error. We set up a
9  * temporary handler so that this doesn't kill the kernel.
10  *
11  * There is a test-by-reading and a test-by-writing; I present
12  * them here complete with the comments from the original atari
13  * config.c...
14  *                -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998
15  */
16 
17 /* This function tests for the presence of an address, specially a
18  * hardware register address. It is called very early in the kernel
19  * initialization process, when the VBR register isn't set up yet. On
20  * an Atari, it still points to address 0, which is unmapped. So a bus
21  * error would cause another bus error while fetching the exception
22  * vector, and the CPU would do nothing at all. So we needed to set up
23  * a temporary VBR and a vector table for the duration of the test.
24  */
25 
hwreg_present(volatile void * regp)26 int hwreg_present( volatile void *regp )
27 {
28     int	ret = 0;
29     long	save_sp, save_vbr;
30     long	tmp_vectors[3];
31 
32     __asm__ __volatile__
33 	(	"movec	%/vbr,%2\n\t"
34 		"movel	#Lberr1,%4@(8)\n\t"
35                 "movec	%4,%/vbr\n\t"
36 		"movel	%/sp,%1\n\t"
37 		"moveq	#0,%0\n\t"
38 		"tstb	%3@\n\t"
39 		"nop\n\t"
40 		"moveq	#1,%0\n"
41                 "Lberr1:\n\t"
42 		"movel	%1,%/sp\n\t"
43 		"movec	%2,%/vbr"
44 		: "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
45 		: "a" (regp), "a" (tmp_vectors)
46                 );
47 
48     return( ret );
49 }
50 
51 /* Basically the same, but writes a value into a word register, protected
52  * by a bus error handler. Returns 1 if successful, 0 otherwise.
53  */
54 
hwreg_write(volatile void * regp,unsigned short val)55 int hwreg_write( volatile void *regp, unsigned short val )
56 {
57 	int		ret;
58 	long	save_sp, save_vbr;
59 	long	tmp_vectors[3];
60 
61 	__asm__ __volatile__
62 	(	"movec	%/vbr,%2\n\t"
63 		"movel	#Lberr2,%4@(8)\n\t"
64 		"movec	%4,%/vbr\n\t"
65 		"movel	%/sp,%1\n\t"
66 		"moveq	#0,%0\n\t"
67 		"movew	%5,%3@\n\t"
68 		"nop	\n\t"	/* If this nop isn't present, 'ret' may already be
69 				 * loaded with 1 at the time the bus error
70 				 * happens! */
71 		"moveq	#1,%0\n"
72 	"Lberr2:\n\t"
73 		"movel	%1,%/sp\n\t"
74 		"movec	%2,%/vbr"
75 		: "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
76 		: "a" (regp), "a" (tmp_vectors), "g" (val)
77 	);
78 
79 	return( ret );
80 }
81 
82