1 /*
2  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3  * All rights reserved
4  * www.brocade.com
5  *
6  * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License (GPL) Version 2 as
10  * published by the Free Software Foundation
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  */
17 #ifndef __BFA_H__
18 #define __BFA_H__
19 
20 #include "bfad_drv.h"
21 #include "bfa_cs.h"
22 #include "bfa_plog.h"
23 #include "bfa_defs_svc.h"
24 #include "bfi.h"
25 #include "bfa_ioc.h"
26 
27 struct bfa_s;
28 
29 typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m);
30 typedef void (*bfa_cb_cbfn_status_t) (void *cbarg, bfa_status_t status);
31 
32 /*
33  * Interrupt message handlers
34  */
35 void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m);
36 
37 /*
38  * Request and response queue related defines
39  */
40 #define BFA_REQQ_NELEMS_MIN	(4)
41 #define BFA_RSPQ_NELEMS_MIN	(4)
42 
43 #define bfa_reqq_pi(__bfa, __reqq)	((__bfa)->iocfc.req_cq_pi[__reqq])
44 #define bfa_reqq_ci(__bfa, __reqq)					\
45 	(*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva))
46 
47 #define bfa_reqq_full(__bfa, __reqq)				\
48 	(((bfa_reqq_pi(__bfa, __reqq) + 1) &			\
49 	  ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) ==	\
50 	 bfa_reqq_ci(__bfa, __reqq))
51 
52 #define bfa_reqq_next(__bfa, __reqq)					\
53 	(bfa_reqq_full(__bfa, __reqq) ? NULL :				\
54 	 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \
55 		   + bfa_reqq_pi((__bfa), (__reqq)))))
56 
57 #define bfa_reqq_produce(__bfa, __reqq, __mh)  do {			\
58 		(__mh).mtag.h2i.qid     = (__bfa)->iocfc.hw_qid[__reqq];\
59 		(__bfa)->iocfc.req_cq_pi[__reqq]++;			\
60 		(__bfa)->iocfc.req_cq_pi[__reqq] &=			\
61 			((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \
62 		writel((__bfa)->iocfc.req_cq_pi[__reqq],		\
63 			(__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]);	\
64 		mmiowb();      \
65 	} while (0)
66 
67 #define bfa_rspq_pi(__bfa, __rspq)					\
68 	(*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva))
69 
70 #define bfa_rspq_ci(__bfa, __rspq)	((__bfa)->iocfc.rsp_cq_ci[__rspq])
71 #define bfa_rspq_elem(__bfa, __rspq, __ci)				\
72 	(&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci])
73 
74 #define CQ_INCR(__index, __size) do {			\
75 	(__index)++;					\
76 	(__index) &= ((__size) - 1);			\
77 } while (0)
78 
79 /*
80  * Circular queue usage assignments
81  */
82 enum {
83 	BFA_REQQ_IOC	= 0,	/*  all low-priority IOC msgs	*/
84 	BFA_REQQ_FCXP	= 0,	/*  all FCXP messages		*/
85 	BFA_REQQ_LPS	= 0,	/*  all lport service msgs	*/
86 	BFA_REQQ_PORT	= 0,	/*  all port messages		*/
87 	BFA_REQQ_FLASH	= 0,	/*  for flash module		*/
88 	BFA_REQQ_DIAG	= 0,	/*  for diag module		*/
89 	BFA_REQQ_RPORT	= 0,	/*  all port messages		*/
90 	BFA_REQQ_SBOOT	= 0,	/*  all san boot messages	*/
91 	BFA_REQQ_QOS_LO	= 1,	/*  all low priority IO	*/
92 	BFA_REQQ_QOS_MD	= 2,	/*  all medium priority IO	*/
93 	BFA_REQQ_QOS_HI	= 3,	/*  all high priority IO	*/
94 };
95 
96 static inline void
bfa_reqq_winit(struct bfa_reqq_wait_s * wqe,void (* qresume)(void * cbarg),void * cbarg)97 bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg),
98 	       void *cbarg)
99 {
100 	wqe->qresume = qresume;
101 	wqe->cbarg = cbarg;
102 }
103 
104 #define bfa_reqq(__bfa, __reqq)	(&(__bfa)->reqq_waitq[__reqq])
105 
106 /*
107  * static inline void
108  * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe)
109  */
110 #define bfa_reqq_wait(__bfa, __reqq, __wqe) do {			\
111 									\
112 		struct list_head *waitq = bfa_reqq(__bfa, __reqq);      \
113 									\
114 		WARN_ON(((__reqq) >= BFI_IOC_MAX_CQS));			\
115 		WARN_ON(!((__wqe)->qresume && (__wqe)->cbarg));		\
116 									\
117 		list_add_tail(&(__wqe)->qe, waitq);      \
118 	} while (0)
119 
120 #define bfa_reqq_wcancel(__wqe)	list_del(&(__wqe)->qe)
121 
122 #define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\
123 		(__hcb_qe)->cbfn  = (__cbfn);      \
124 		(__hcb_qe)->cbarg = (__cbarg);      \
125 		(__hcb_qe)->pre_rmv = BFA_FALSE;		\
126 		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \
127 	} while (0)
128 
129 #define bfa_cb_dequeue(__hcb_qe)	list_del(&(__hcb_qe)->qe)
130 
131 #define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\
132 		(__hcb_qe)->cbfn  = (__cbfn);      \
133 		(__hcb_qe)->cbarg = (__cbarg);      \
134 		if (!(__hcb_qe)->once) {      \
135 			list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \
136 			(__hcb_qe)->once = BFA_TRUE;			\
137 		}							\
138 	} while (0)
139 
140 #define bfa_cb_queue_status(__bfa, __hcb_qe, __status) do {		\
141 		(__hcb_qe)->fw_status = (__status);			\
142 		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);	\
143 } while (0)
144 
145 #define bfa_cb_queue_done(__hcb_qe) do {	\
146 		(__hcb_qe)->once = BFA_FALSE;	\
147 	} while (0)
148 
149 
150 /*
151  * PCI devices supported by the current BFA
152  */
153 struct bfa_pciid_s {
154 	u16	device_id;
155 	u16	vendor_id;
156 };
157 
158 extern char     bfa_version[];
159 
160 struct bfa_iocfc_regs_s {
161 	void __iomem	*intr_status;
162 	void __iomem	*intr_mask;
163 	void __iomem	*cpe_q_pi[BFI_IOC_MAX_CQS];
164 	void __iomem	*cpe_q_ci[BFI_IOC_MAX_CQS];
165 	void __iomem	*cpe_q_ctrl[BFI_IOC_MAX_CQS];
166 	void __iomem	*rme_q_ci[BFI_IOC_MAX_CQS];
167 	void __iomem	*rme_q_pi[BFI_IOC_MAX_CQS];
168 	void __iomem	*rme_q_ctrl[BFI_IOC_MAX_CQS];
169 };
170 
171 /*
172  * MSIX vector handlers
173  */
174 #define BFA_MSIX_MAX_VECTORS	22
175 typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec);
176 struct bfa_msix_s {
177 	int	nvecs;
178 	bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS];
179 };
180 
181 /*
182  * Chip specific interfaces
183  */
184 struct bfa_hwif_s {
185 	void (*hw_reginit)(struct bfa_s *bfa);
186 	void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq);
187 	void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq, u32 ci);
188 	void (*hw_msix_init)(struct bfa_s *bfa, int nvecs);
189 	void (*hw_msix_ctrl_install)(struct bfa_s *bfa);
190 	void (*hw_msix_queue_install)(struct bfa_s *bfa);
191 	void (*hw_msix_uninstall)(struct bfa_s *bfa);
192 	void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix);
193 	void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap,
194 				u32 *nvecs, u32 *maxvec);
195 	void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start,
196 				       u32 *end);
197 	int	cpe_vec_q0;
198 	int	rme_vec_q0;
199 };
200 typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status);
201 
202 struct bfa_faa_cbfn_s {
203 	bfa_cb_iocfc_t	faa_cbfn;
204 	void		*faa_cbarg;
205 };
206 
207 #define BFA_FAA_ENABLED		1
208 #define BFA_FAA_DISABLED	2
209 
210 /*
211  *	FAA attributes
212  */
213 struct bfa_faa_attr_s {
214 	wwn_t	faa;
215 	u8	faa_state;
216 	u8	pwwn_source;
217 	u8	rsvd[6];
218 };
219 
220 struct bfa_faa_args_s {
221 	struct bfa_faa_attr_s	*faa_attr;
222 	struct bfa_faa_cbfn_s	faa_cb;
223 	u8			faa_state;
224 	bfa_boolean_t		busy;
225 };
226 
227 struct bfa_iocfc_s {
228 	bfa_fsm_t		fsm;
229 	struct bfa_s		*bfa;
230 	struct bfa_iocfc_cfg_s	cfg;
231 	u32		req_cq_pi[BFI_IOC_MAX_CQS];
232 	u32		rsp_cq_ci[BFI_IOC_MAX_CQS];
233 	u8		hw_qid[BFI_IOC_MAX_CQS];
234 	struct bfa_cb_qe_s	init_hcb_qe;
235 	struct bfa_cb_qe_s	stop_hcb_qe;
236 	struct bfa_cb_qe_s	dis_hcb_qe;
237 	struct bfa_cb_qe_s	en_hcb_qe;
238 	struct bfa_cb_qe_s	stats_hcb_qe;
239 	bfa_boolean_t		submod_enabled;
240 	bfa_boolean_t		cb_reqd;	/* Driver call back reqd */
241 	bfa_status_t		op_status;	/* Status of bfa iocfc op */
242 
243 	struct bfa_dma_s	cfg_info;
244 	struct bfi_iocfc_cfg_s *cfginfo;
245 	struct bfa_dma_s	cfgrsp_dma;
246 	struct bfi_iocfc_cfgrsp_s *cfgrsp;
247 	struct bfa_dma_s	req_cq_ba[BFI_IOC_MAX_CQS];
248 	struct bfa_dma_s	req_cq_shadow_ci[BFI_IOC_MAX_CQS];
249 	struct bfa_dma_s	rsp_cq_ba[BFI_IOC_MAX_CQS];
250 	struct bfa_dma_s	rsp_cq_shadow_pi[BFI_IOC_MAX_CQS];
251 	struct bfa_iocfc_regs_s	bfa_regs;	/*  BFA device registers */
252 	struct bfa_hwif_s	hwif;
253 	bfa_cb_iocfc_t		updateq_cbfn; /*  bios callback function */
254 	void			*updateq_cbarg;	/*  bios callback arg */
255 	u32	intr_mask;
256 	struct bfa_faa_args_s	faa_args;
257 	struct bfa_mem_dma_s	ioc_dma;
258 	struct bfa_mem_dma_s	iocfc_dma;
259 	struct bfa_mem_dma_s	reqq_dma[BFI_IOC_MAX_CQS];
260 	struct bfa_mem_dma_s	rspq_dma[BFI_IOC_MAX_CQS];
261 	struct bfa_mem_kva_s	kva_seg;
262 };
263 
264 #define BFA_MEM_IOC_DMA(_bfa)		(&((_bfa)->iocfc.ioc_dma))
265 #define BFA_MEM_IOCFC_DMA(_bfa)		(&((_bfa)->iocfc.iocfc_dma))
266 #define BFA_MEM_REQQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.reqq_dma[(_qno)]))
267 #define BFA_MEM_RSPQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.rspq_dma[(_qno)]))
268 #define BFA_MEM_IOCFC_KVA(_bfa)		(&((_bfa)->iocfc.kva_seg))
269 
270 #define bfa_fn_lpu(__bfa)	\
271 	bfi_fn_lpu(bfa_ioc_pcifn(&(__bfa)->ioc), bfa_ioc_portid(&(__bfa)->ioc))
272 #define bfa_msix_init(__bfa, __nvecs)					\
273 	((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs))
274 #define bfa_msix_ctrl_install(__bfa)					\
275 	((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa))
276 #define bfa_msix_queue_install(__bfa)					\
277 	((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa))
278 #define bfa_msix_uninstall(__bfa)					\
279 	((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa))
280 #define bfa_isr_rspq_ack(__bfa, __queue, __ci)				\
281 	((__bfa)->iocfc.hwif.hw_rspq_ack(__bfa, __queue, __ci))
282 #define bfa_isr_reqq_ack(__bfa, __queue) do {				\
283 	if ((__bfa)->iocfc.hwif.hw_reqq_ack)				\
284 		(__bfa)->iocfc.hwif.hw_reqq_ack(__bfa, __queue);	\
285 } while (0)
286 #define bfa_isr_mode_set(__bfa, __msix) do {				\
287 	if ((__bfa)->iocfc.hwif.hw_isr_mode_set)			\
288 		(__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix);	\
289 } while (0)
290 #define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec)		\
291 	((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap,		\
292 					__nvecs, __maxvec))
293 #define bfa_msix_get_rme_range(__bfa, __start, __end)			\
294 	((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end))
295 #define bfa_msix(__bfa, __vec)						\
296 	((__bfa)->msix.handler[__vec](__bfa, __vec))
297 
298 /*
299  * FC specific IOC functions.
300  */
301 void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg,
302 			struct bfa_meminfo_s *meminfo,
303 			struct bfa_s *bfa);
304 void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad,
305 		      struct bfa_iocfc_cfg_s *cfg,
306 		      struct bfa_pcidev_s *pcidev);
307 void bfa_iocfc_init(struct bfa_s *bfa);
308 void bfa_iocfc_start(struct bfa_s *bfa);
309 void bfa_iocfc_stop(struct bfa_s *bfa);
310 void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg);
311 void bfa_iocfc_set_snsbase(struct bfa_s *bfa, int seg_no, u64 snsbase_pa);
312 bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa);
313 void bfa_iocfc_reset_queues(struct bfa_s *bfa);
314 
315 void bfa_msix_all(struct bfa_s *bfa, int vec);
316 void bfa_msix_reqq(struct bfa_s *bfa, int vec);
317 void bfa_msix_rspq(struct bfa_s *bfa, int vec);
318 void bfa_msix_lpu_err(struct bfa_s *bfa, int vec);
319 
320 void bfa_hwcb_reginit(struct bfa_s *bfa);
321 void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
322 void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs);
323 void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa);
324 void bfa_hwcb_msix_queue_install(struct bfa_s *bfa);
325 void bfa_hwcb_msix_uninstall(struct bfa_s *bfa);
326 void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
327 void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
328 			   u32 *maxvec);
329 void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
330 				 u32 *end);
331 void bfa_hwct_reginit(struct bfa_s *bfa);
332 void bfa_hwct2_reginit(struct bfa_s *bfa);
333 void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq);
334 void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
335 void bfa_hwct2_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
336 void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs);
337 void bfa_hwct_msix_ctrl_install(struct bfa_s *bfa);
338 void bfa_hwct_msix_queue_install(struct bfa_s *bfa);
339 void bfa_hwct_msix_uninstall(struct bfa_s *bfa);
340 void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
341 void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
342 			   u32 *maxvec);
343 void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
344 				 u32 *end);
345 void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns);
346 int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa,
347 				struct bfi_pbc_vport_s *pbc_vport);
348 
349 
350 /*
351  *----------------------------------------------------------------------
352  *		BFA public interfaces
353  *----------------------------------------------------------------------
354  */
355 #define bfa_stats(_mod, _stats)	((_mod)->stats._stats++)
356 #define bfa_ioc_get_stats(__bfa, __ioc_stats)		\
357 	bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats)
358 #define bfa_ioc_clear_stats(__bfa)		\
359 	bfa_ioc_clr_stats(&(__bfa)->ioc)
360 #define bfa_get_nports(__bfa)			\
361 	bfa_ioc_get_nports(&(__bfa)->ioc)
362 #define bfa_get_adapter_manufacturer(__bfa, __manufacturer)		\
363 	bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer)
364 #define bfa_get_adapter_model(__bfa, __model)			\
365 	bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model)
366 #define bfa_get_adapter_serial_num(__bfa, __serial_num)			\
367 	bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num)
368 #define bfa_get_adapter_fw_ver(__bfa, __fw_ver)			\
369 	bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver)
370 #define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver)			\
371 	bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver)
372 #define bfa_get_pci_chip_rev(__bfa, __chip_rev)			\
373 	bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev)
374 #define bfa_get_ioc_state(__bfa)		\
375 	bfa_ioc_get_state(&(__bfa)->ioc)
376 #define bfa_get_type(__bfa)			\
377 	bfa_ioc_get_type(&(__bfa)->ioc)
378 #define bfa_get_mac(__bfa)			\
379 	bfa_ioc_get_mac(&(__bfa)->ioc)
380 #define bfa_get_mfg_mac(__bfa)			\
381 	bfa_ioc_get_mfg_mac(&(__bfa)->ioc)
382 #define bfa_get_fw_clock_res(__bfa)		\
383 	((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res)
384 
385 /*
386  * lun mask macros return NULL when min cfg is enabled and there is
387  * no memory allocated for lunmask.
388  */
389 #define bfa_get_lun_mask(__bfa)					\
390 	((&(__bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\
391 	 (&(BFA_DCONF_MOD(__bfa)->dconf->lun_mask))
392 
393 #define bfa_get_lun_mask_list(_bfa)				\
394 	((&(_bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\
395 	 (bfa_get_lun_mask(_bfa)->lun_list)
396 
397 #define bfa_get_lun_mask_status(_bfa)				\
398 	(((&(_bfa)->modules.dconf_mod)->min_cfg)		\
399 	 ? BFA_LUNMASK_MINCFG : ((bfa_get_lun_mask(_bfa))->status))
400 
401 void bfa_get_pciids(struct bfa_pciid_s **pciids, int *npciids);
402 void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg);
403 void bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg);
404 void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg,
405 			struct bfa_meminfo_s *meminfo,
406 			struct bfa_s *bfa);
407 void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg,
408 		struct bfa_meminfo_s *meminfo,
409 		struct bfa_pcidev_s *pcidev);
410 void bfa_detach(struct bfa_s *bfa);
411 void bfa_cb_init(void *bfad, bfa_status_t status);
412 void bfa_cb_updateq(void *bfad, bfa_status_t status);
413 
414 bfa_boolean_t bfa_intx(struct bfa_s *bfa);
415 void bfa_isr_enable(struct bfa_s *bfa);
416 void bfa_isr_disable(struct bfa_s *bfa);
417 
418 void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q);
419 void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q);
420 void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q);
421 
422 typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status);
423 void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr);
424 
425 
426 bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa,
427 				   struct bfa_iocfc_intr_attr_s *attr);
428 
429 void bfa_iocfc_enable(struct bfa_s *bfa);
430 void bfa_iocfc_disable(struct bfa_s *bfa);
431 #define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout)		\
432 	bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout)
433 
434 struct bfa_cb_pending_q_s {
435 	struct bfa_cb_qe_s	hcb_qe;
436 	void			*data;  /* Driver buffer */
437 };
438 
439 /* Common macros to operate on pending stats/attr apis */
440 #define bfa_pending_q_init(__qe, __cbfn, __cbarg, __data) do {	\
441 	bfa_q_qe_init(&((__qe)->hcb_qe.qe));			\
442 	(__qe)->hcb_qe.cbfn = (__cbfn);				\
443 	(__qe)->hcb_qe.cbarg = (__cbarg);			\
444 	(__qe)->hcb_qe.pre_rmv = BFA_TRUE;			\
445 	(__qe)->data = (__data);				\
446 } while (0)
447 
448 #endif /* __BFA_H__ */
449