1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "head.h"
23 
24 static void
gv100_head_vblank_put(struct nvkm_head * head)25 gv100_head_vblank_put(struct nvkm_head *head)
26 {
27 	struct nvkm_device *device = head->disp->engine.subdev.device;
28 	nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000004, 0x00000000);
29 }
30 
31 static void
gv100_head_vblank_get(struct nvkm_head * head)32 gv100_head_vblank_get(struct nvkm_head *head)
33 {
34 	struct nvkm_device *device = head->disp->engine.subdev.device;
35 	nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000004, 0x00000004);
36 }
37 
38 static void
gv100_head_rgpos(struct nvkm_head * head,u16 * hline,u16 * vline)39 gv100_head_rgpos(struct nvkm_head *head, u16 *hline, u16 *vline)
40 {
41 	struct nvkm_device *device = head->disp->engine.subdev.device;
42 	const u32 hoff = head->id * 0x800;
43 	/* vline read locks hline. */
44 	*vline = nvkm_rd32(device, 0x616330 + hoff) & 0x0000ffff;
45 	*hline = nvkm_rd32(device, 0x616334 + hoff) & 0x0000ffff;
46 }
47 
48 static void
gv100_head_state(struct nvkm_head * head,struct nvkm_head_state * state)49 gv100_head_state(struct nvkm_head *head, struct nvkm_head_state *state)
50 {
51 	struct nvkm_device *device = head->disp->engine.subdev.device;
52 	const u32 hoff = (state == &head->arm) * 0x8000 + head->id * 0x400;
53 	u32 data;
54 
55 	data = nvkm_rd32(device, 0x682064 + hoff);
56 	state->vtotal = (data & 0xffff0000) >> 16;
57 	state->htotal = (data & 0x0000ffff);
58 	data = nvkm_rd32(device, 0x682068 + hoff);
59 	state->vsynce = (data & 0xffff0000) >> 16;
60 	state->hsynce = (data & 0x0000ffff);
61 	data = nvkm_rd32(device, 0x68206c + hoff);
62 	state->vblanke = (data & 0xffff0000) >> 16;
63 	state->hblanke = (data & 0x0000ffff);
64 	data = nvkm_rd32(device, 0x682070 + hoff);
65 	state->vblanks = (data & 0xffff0000) >> 16;
66 	state->hblanks = (data & 0x0000ffff);
67 	state->hz = nvkm_rd32(device, 0x68200c + hoff);
68 
69 	data = nvkm_rd32(device, 0x682004 + hoff);
70 	switch ((data & 0x000000f0) >> 4) {
71 	case 5: state->or.depth = 30; break;
72 	case 4: state->or.depth = 24; break;
73 	case 1: state->or.depth = 18; break;
74 	default:
75 		state->or.depth = 18;
76 		WARN_ON(1);
77 		break;
78 	}
79 }
80 
81 static const struct nvkm_head_func
82 gv100_head = {
83 	.state = gv100_head_state,
84 	.rgpos = gv100_head_rgpos,
85 	.rgclk = gf119_head_rgclk,
86 	.vblank_get = gv100_head_vblank_get,
87 	.vblank_put = gv100_head_vblank_put,
88 };
89 
90 int
gv100_head_new(struct nvkm_disp * disp,int id)91 gv100_head_new(struct nvkm_disp *disp, int id)
92 {
93 	struct nvkm_device *device = disp->engine.subdev.device;
94 	if (!(nvkm_rd32(device, 0x610060) & (0x00000001 << id)))
95 		return 0;
96 	return nvkm_head_new_(&gv100_head, disp, id);
97 }
98 
99 int
gv100_head_cnt(struct nvkm_disp * disp,unsigned long * pmask)100 gv100_head_cnt(struct nvkm_disp *disp, unsigned long *pmask)
101 {
102 	struct nvkm_device *device = disp->engine.subdev.device;
103 	*pmask = nvkm_rd32(device, 0x610060) & 0x000000ff;
104 	return nvkm_rd32(device, 0x610074) & 0x0000000f;
105 }
106