1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_GT__
7 #define __INTEL_GT__
8 
9 #include "intel_engine_types.h"
10 #include "intel_gt_types.h"
11 #include "intel_reset.h"
12 
13 struct drm_i915_private;
14 struct drm_printer;
15 
16 #define GT_TRACE(gt, fmt, ...) do {					\
17 	const struct intel_gt *gt__ __maybe_unused = (gt);		\
18 	GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev),		\
19 		  ##__VA_ARGS__);					\
20 } while (0)
21 
gt_is_root(struct intel_gt * gt)22 static inline bool gt_is_root(struct intel_gt *gt)
23 {
24 	return !gt->info.id;
25 }
26 
uc_to_gt(struct intel_uc * uc)27 static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
28 {
29 	return container_of(uc, struct intel_gt, uc);
30 }
31 
guc_to_gt(struct intel_guc * guc)32 static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
33 {
34 	return container_of(guc, struct intel_gt, uc.guc);
35 }
36 
huc_to_gt(struct intel_huc * huc)37 static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
38 {
39 	return container_of(huc, struct intel_gt, uc.huc);
40 }
41 
gsc_to_gt(struct intel_gsc * gsc)42 static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
43 {
44 	return container_of(gsc, struct intel_gt, gsc);
45 }
46 
47 void intel_gt_common_init_early(struct intel_gt *gt);
48 int intel_root_gt_init_early(struct drm_i915_private *i915);
49 int intel_gt_assign_ggtt(struct intel_gt *gt);
50 int intel_gt_init_mmio(struct intel_gt *gt);
51 int __must_check intel_gt_init_hw(struct intel_gt *gt);
52 int intel_gt_init(struct intel_gt *gt);
53 void intel_gt_driver_register(struct intel_gt *gt);
54 
55 void intel_gt_driver_unregister(struct intel_gt *gt);
56 void intel_gt_driver_remove(struct intel_gt *gt);
57 void intel_gt_driver_release(struct intel_gt *gt);
58 void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
59 
60 int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
61 
62 void intel_gt_check_and_clear_faults(struct intel_gt *gt);
63 void intel_gt_clear_error_registers(struct intel_gt *gt,
64 				    intel_engine_mask_t engine_mask);
65 
66 void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
67 void intel_gt_chipset_flush(struct intel_gt *gt);
68 
intel_gt_scratch_offset(const struct intel_gt * gt,enum intel_gt_scratch_field field)69 static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
70 					  enum intel_gt_scratch_field field)
71 {
72 	return i915_ggtt_offset(gt->scratch) + field;
73 }
74 
intel_gt_has_unrecoverable_error(const struct intel_gt * gt)75 static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
76 {
77 	return test_bit(I915_WEDGED_ON_INIT, &gt->reset.flags) ||
78 	       test_bit(I915_WEDGED_ON_FINI, &gt->reset.flags);
79 }
80 
intel_gt_is_wedged(const struct intel_gt * gt)81 static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
82 {
83 	GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
84 		   !test_bit(I915_WEDGED, &gt->reset.flags));
85 
86 	return unlikely(test_bit(I915_WEDGED, &gt->reset.flags));
87 }
88 
89 int intel_gt_probe_all(struct drm_i915_private *i915);
90 int intel_gt_tiles_init(struct drm_i915_private *i915);
91 void intel_gt_release_all(struct drm_i915_private *i915);
92 
93 #define for_each_gt(gt__, i915__, id__) \
94 	for ((id__) = 0; \
95 	     (id__) < I915_MAX_GT; \
96 	     (id__)++) \
97 		for_each_if(((gt__) = (i915__)->gt[(id__)]))
98 
99 void intel_gt_info_print(const struct intel_gt_info *info,
100 			 struct drm_printer *p);
101 
102 void intel_gt_watchdog_work(struct work_struct *work);
103 
intel_gt_tlb_seqno(const struct intel_gt * gt)104 static inline u32 intel_gt_tlb_seqno(const struct intel_gt *gt)
105 {
106 	return seqprop_sequence(&gt->tlb.seqno);
107 }
108 
intel_gt_next_invalidate_tlb_full(const struct intel_gt * gt)109 static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
110 {
111 	return intel_gt_tlb_seqno(gt) | 1;
112 }
113 
114 void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
115 
116 #endif /* __INTEL_GT_H__ */
117