1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright 2020-2021 NXP
4  */
5 
6 #ifndef _AMPHION_VPU_H
7 #define _AMPHION_VPU_H
8 
9 #include <media/v4l2-device.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-mem2mem.h>
12 #include <linux/mailbox_client.h>
13 #include <linux/mailbox_controller.h>
14 #include <linux/kfifo.h>
15 
16 #define VPU_TIMEOUT_WAKEUP	msecs_to_jiffies(200)
17 #define VPU_TIMEOUT		msecs_to_jiffies(1000)
18 #define VPU_INST_NULL_ID	(-1L)
19 #define VPU_MSG_BUFFER_SIZE	(8192)
20 
21 enum imx_plat_type {
22 	IMX8QXP = 0,
23 	IMX8QM  = 1,
24 	IMX8DM,
25 	IMX8DX,
26 	PLAT_TYPE_RESERVED
27 };
28 
29 enum vpu_core_type {
30 	VPU_CORE_TYPE_ENC = 0,
31 	VPU_CORE_TYPE_DEC = 0x10,
32 };
33 
34 struct vpu_dev;
35 struct vpu_resources {
36 	enum imx_plat_type plat_type;
37 	u32 mreg_base;
38 	int (*setup)(struct vpu_dev *vpu);
39 	int (*setup_encoder)(struct vpu_dev *vpu);
40 	int (*setup_decoder)(struct vpu_dev *vpu);
41 	int (*reset)(struct vpu_dev *vpu);
42 };
43 
44 struct vpu_buffer {
45 	void *virt;
46 	dma_addr_t phys;
47 	u32 length;
48 	u32 bytesused;
49 	struct device *dev;
50 };
51 
52 struct vpu_func {
53 	struct video_device *vfd;
54 	struct v4l2_m2m_dev *m2m_dev;
55 	enum vpu_core_type type;
56 	int function;
57 };
58 
59 struct vpu_dev {
60 	void __iomem *base;
61 	struct platform_device *pdev;
62 	struct device *dev;
63 	struct mutex lock; /* protect vpu device */
64 	const struct vpu_resources *res;
65 	struct list_head cores;
66 
67 	struct v4l2_device v4l2_dev;
68 	struct vpu_func encoder;
69 	struct vpu_func decoder;
70 	struct media_device mdev;
71 
72 	struct delayed_work watchdog_work;
73 	void (*get_vpu)(struct vpu_dev *vpu);
74 	void (*put_vpu)(struct vpu_dev *vpu);
75 	void (*get_enc)(struct vpu_dev *vpu);
76 	void (*put_enc)(struct vpu_dev *vpu);
77 	void (*get_dec)(struct vpu_dev *vpu);
78 	void (*put_dec)(struct vpu_dev *vpu);
79 	atomic_t ref_vpu;
80 	atomic_t ref_enc;
81 	atomic_t ref_dec;
82 
83 	struct dentry *debugfs;
84 };
85 
86 struct vpu_format {
87 	u32 pixfmt;
88 	unsigned int num_planes;
89 	u32 type;
90 	u32 flags;
91 	u32 width;
92 	u32 height;
93 	u32 sizeimage[VIDEO_MAX_PLANES];
94 	u32 bytesperline[VIDEO_MAX_PLANES];
95 	u32 field;
96 };
97 
98 struct vpu_core_resources {
99 	enum vpu_core_type type;
100 	const char *fwname;
101 	u32 stride;
102 	u32 max_width;
103 	u32 min_width;
104 	u32 step_width;
105 	u32 max_height;
106 	u32 min_height;
107 	u32 step_height;
108 	u32 rpc_size;
109 	u32 fwlog_size;
110 	u32 act_size;
111 };
112 
113 struct vpu_mbox {
114 	char name[20];
115 	struct mbox_client cl;
116 	struct mbox_chan *ch;
117 	bool block;
118 };
119 
120 enum vpu_core_state {
121 	VPU_CORE_DEINIT = 0,
122 	VPU_CORE_ACTIVE,
123 	VPU_CORE_HANG
124 };
125 
126 struct vpu_core {
127 	void __iomem *base;
128 	struct platform_device *pdev;
129 	struct device *dev;
130 	struct device *parent;
131 	struct device *pd;
132 	struct device_link *pd_link;
133 	struct mutex lock;     /* protect vpu core */
134 	struct mutex cmd_lock; /* Lock vpu command */
135 	struct list_head list;
136 	enum vpu_core_type type;
137 	int id;
138 	const struct vpu_core_resources *res;
139 	unsigned long instance_mask;
140 	u32 supported_instance_count;
141 	unsigned long hang_mask;
142 	u32 request_count;
143 	struct list_head instances;
144 	enum vpu_core_state state;
145 	u32 fw_version;
146 
147 	struct vpu_buffer fw;
148 	struct vpu_buffer rpc;
149 	struct vpu_buffer log;
150 	struct vpu_buffer act;
151 
152 	struct vpu_mbox tx_type;
153 	struct vpu_mbox tx_data;
154 	struct vpu_mbox rx;
155 	unsigned long cmd_seq;
156 
157 	wait_queue_head_t ack_wq;
158 	struct completion cmp;
159 	struct workqueue_struct *workqueue;
160 	struct work_struct msg_work;
161 	struct delayed_work msg_delayed_work;
162 	struct kfifo msg_fifo;
163 	void *msg_buffer;
164 	unsigned int msg_buffer_size;
165 
166 	struct vpu_dev *vpu;
167 	void *iface;
168 
169 	struct dentry *debugfs;
170 	struct dentry *debugfs_fwlog;
171 };
172 
173 enum vpu_codec_state {
174 	VPU_CODEC_STATE_DEINIT = 1,
175 	VPU_CODEC_STATE_CONFIGURED,
176 	VPU_CODEC_STATE_START,
177 	VPU_CODEC_STATE_STARTED,
178 	VPU_CODEC_STATE_ACTIVE,
179 	VPU_CODEC_STATE_SEEK,
180 	VPU_CODEC_STATE_STOP,
181 	VPU_CODEC_STATE_DRAIN,
182 	VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE,
183 };
184 
185 struct vpu_frame_info {
186 	u32 type;
187 	u32 id;
188 	u32 sequence;
189 	u32 luma;
190 	u32 chroma_u;
191 	u32 chroma_v;
192 	u32 data_offset;
193 	u32 flags;
194 	u32 skipped;
195 	s64 timestamp;
196 };
197 
198 struct vpu_inst;
199 struct vpu_inst_ops {
200 	int (*ctrl_init)(struct vpu_inst *inst);
201 	int (*start)(struct vpu_inst *inst, u32 type);
202 	int (*stop)(struct vpu_inst *inst, u32 type);
203 	int (*abort)(struct vpu_inst *inst);
204 	bool (*check_ready)(struct vpu_inst *inst, unsigned int type);
205 	void (*buf_done)(struct vpu_inst *inst, struct vpu_frame_info *frame);
206 	void (*event_notify)(struct vpu_inst *inst, u32 event, void *data);
207 	void (*release)(struct vpu_inst *inst);
208 	void (*cleanup)(struct vpu_inst *inst);
209 	void (*mem_request)(struct vpu_inst *inst,
210 			    u32 enc_frame_size,
211 			    u32 enc_frame_num,
212 			    u32 ref_frame_size,
213 			    u32 ref_frame_num,
214 			    u32 act_frame_size,
215 			    u32 act_frame_num);
216 	void (*input_done)(struct vpu_inst *inst);
217 	void (*stop_done)(struct vpu_inst *inst);
218 	int (*process_output)(struct vpu_inst *inst, struct vb2_buffer *vb);
219 	int (*process_capture)(struct vpu_inst *inst, struct vb2_buffer *vb);
220 	int (*get_one_frame)(struct vpu_inst *inst, void *info);
221 	void (*on_queue_empty)(struct vpu_inst *inst, u32 type);
222 	int (*get_debug_info)(struct vpu_inst *inst, char *str, u32 size, u32 i);
223 	void (*wait_prepare)(struct vpu_inst *inst);
224 	void (*wait_finish)(struct vpu_inst *inst);
225 };
226 
227 struct vpu_inst {
228 	struct list_head list;
229 	struct mutex lock; /* v4l2 and videobuf2 lock */
230 	struct vpu_dev *vpu;
231 	struct vpu_core *core;
232 	struct device *dev;
233 	int id;
234 
235 	struct v4l2_fh fh;
236 	struct v4l2_ctrl_handler ctrl_handler;
237 	atomic_t ref_count;
238 	int (*release)(struct vpu_inst *inst);
239 
240 	enum vpu_codec_state state;
241 	enum vpu_core_type type;
242 
243 	struct workqueue_struct *workqueue;
244 	struct work_struct msg_work;
245 	struct kfifo msg_fifo;
246 	u8 msg_buffer[VPU_MSG_BUFFER_SIZE];
247 
248 	struct vpu_buffer stream_buffer;
249 	bool use_stream_buffer;
250 	struct vpu_buffer act;
251 
252 	struct list_head cmd_q;
253 	void *pending;
254 
255 	struct vpu_inst_ops *ops;
256 	const struct vpu_format *formats;
257 	struct vpu_format out_format;
258 	struct vpu_format cap_format;
259 	u32 min_buffer_cap;
260 	u32 min_buffer_out;
261 	u32 total_input_count;
262 
263 	struct v4l2_rect crop;
264 	u32 colorspace;
265 	u8 ycbcr_enc;
266 	u8 quantization;
267 	u8 xfer_func;
268 	u32 sequence;
269 	u32 extra_size;
270 
271 	u32 flows[16];
272 	u32 flow_idx;
273 
274 	pid_t pid;
275 	pid_t tgid;
276 	struct dentry *debugfs;
277 
278 	void *priv;
279 };
280 
281 #define call_vop(inst, op, args...)					\
282 	((inst)->ops->op ? (inst)->ops->op(inst, ##args) : 0)		\
283 
284 #define call_void_vop(inst, op, args...)				\
285 	do {								\
286 		if ((inst)->ops->op)					\
287 			(inst)->ops->op(inst, ##args);				\
288 	} while (0)
289 
290 enum {
291 	VPU_BUF_STATE_IDLE = 0,
292 	VPU_BUF_STATE_INUSE,
293 	VPU_BUF_STATE_DECODED,
294 	VPU_BUF_STATE_READY,
295 	VPU_BUF_STATE_SKIP,
296 	VPU_BUF_STATE_ERROR
297 };
298 
299 struct vpu_vb2_buffer {
300 	struct v4l2_m2m_buffer m2m_buf;
301 	dma_addr_t luma;
302 	dma_addr_t chroma_u;
303 	dma_addr_t chroma_v;
304 	unsigned int state;
305 	u32 tag;
306 };
307 
308 void vpu_writel(struct vpu_dev *vpu, u32 reg, u32 val);
309 u32 vpu_readl(struct vpu_dev *vpu, u32 reg);
310 
to_vpu_vb2_buffer(struct vb2_v4l2_buffer * vbuf)311 static inline struct vpu_vb2_buffer *to_vpu_vb2_buffer(struct vb2_v4l2_buffer *vbuf)
312 {
313 	struct v4l2_m2m_buffer *m2m_buf = container_of(vbuf, struct v4l2_m2m_buffer, vb);
314 
315 	return container_of(m2m_buf, struct vpu_vb2_buffer, m2m_buf);
316 }
317 
vpu_core_type_desc(enum vpu_core_type type)318 static inline const char *vpu_core_type_desc(enum vpu_core_type type)
319 {
320 	return type == VPU_CORE_TYPE_ENC ? "encoder" : "decoder";
321 }
322 
to_inst(struct file * filp)323 static inline struct vpu_inst *to_inst(struct file *filp)
324 {
325 	return container_of(filp->private_data, struct vpu_inst, fh);
326 }
327 
328 #define ctrl_to_inst(ctrl)	\
329 	container_of((ctrl)->handler, struct vpu_inst, ctrl_handler)
330 
331 const struct v4l2_ioctl_ops *venc_get_ioctl_ops(void);
332 const struct v4l2_file_operations *venc_get_fops(void);
333 const struct v4l2_ioctl_ops *vdec_get_ioctl_ops(void);
334 const struct v4l2_file_operations *vdec_get_fops(void);
335 
336 int vpu_add_func(struct vpu_dev *vpu, struct vpu_func *func);
337 void vpu_remove_func(struct vpu_func *func);
338 
339 struct vpu_inst *vpu_inst_get(struct vpu_inst *inst);
340 void vpu_inst_put(struct vpu_inst *inst);
341 struct vpu_core *vpu_request_core(struct vpu_dev *vpu, enum vpu_core_type type);
342 void vpu_release_core(struct vpu_core *core);
343 int vpu_inst_register(struct vpu_inst *inst);
344 int vpu_inst_unregister(struct vpu_inst *inst);
345 const struct vpu_core_resources *vpu_get_resource(struct vpu_inst *inst);
346 
347 int vpu_inst_create_dbgfs_file(struct vpu_inst *inst);
348 int vpu_inst_remove_dbgfs_file(struct vpu_inst *inst);
349 int vpu_core_create_dbgfs_file(struct vpu_core *core);
350 int vpu_core_remove_dbgfs_file(struct vpu_core *core);
351 void vpu_inst_record_flow(struct vpu_inst *inst, u32 flow);
352 
353 int vpu_core_driver_init(void);
354 void vpu_core_driver_exit(void);
355 
356 extern bool debug;
357 #define vpu_trace(dev, fmt, arg...)					\
358 	do {								\
359 		if (debug)						\
360 			dev_info(dev, "%s: " fmt, __func__, ## arg);	\
361 	} while (0)
362 
363 #endif
364