1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #ifndef __AMDGPU_GEM_H__ 24 #define __AMDGPU_GEM_H__ 25 26 #include <drm/amdgpu_drm.h> 27 #include <drm/drm_gem.h> 28 29 /* 30 * GEM. 31 */ 32 33 #define AMDGPU_GEM_DOMAIN_MAX 0x3 34 #define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base) 35 36 unsigned long amdgpu_gem_timeout(uint64_t timeout_ns); 37 38 /* 39 * GEM objects. 40 */ 41 void amdgpu_gem_force_release(struct amdgpu_device *adev); 42 int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, 43 int alignment, u32 initial_domain, 44 u64 flags, enum ttm_bo_type type, 45 struct dma_resv *resv, 46 struct drm_gem_object **obj, int8_t xcp_id_plus1); 47 int amdgpu_mode_dumb_create(struct drm_file *file_priv, 48 struct drm_device *dev, 49 struct drm_mode_create_dumb *args); 50 int amdgpu_mode_dumb_mmap(struct drm_file *filp, 51 struct drm_device *dev, 52 uint32_t handle, uint64_t *offset_p); 53 54 int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, 55 struct drm_file *filp); 56 int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data, 57 struct drm_file *filp); 58 int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data, 59 struct drm_file *filp); 60 int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data, 61 struct drm_file *filp); 62 int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 63 struct drm_file *filp); 64 uint64_t amdgpu_gem_va_map_flags(struct amdgpu_device *adev, uint32_t flags); 65 int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 66 struct drm_file *filp); 67 int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, 68 struct drm_file *filp); 69 70 int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, 71 struct drm_file *filp); 72 73 #endif 74