1 /*
2 * ePAPR hcall interface
3 *
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 *
6 * Author: Timur Tabi <timur@freescale.com>
7 *
8 * This file is provided under a dual BSD/GPL license. When using or
9 * redistributing this file, you may do so under either license.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 * * Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * * Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * * Neither the name of Freescale Semiconductor nor the
19 * names of its contributors may be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 *
23 * ALTERNATIVELY, this software may be distributed under the terms of the
24 * GNU General Public License ("GPL") as published by the Free Software
25 * Foundation, either version 2 of that License or (at your option) any
26 * later version.
27 *
28 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
29 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
30 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
37 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /* A "hypercall" is an "sc 1" instruction. This header file file provides C
41 * wrapper functions for the ePAPR hypervisor interface. It is inteded
42 * for use by Linux device drivers and other operating systems.
43 *
44 * The hypercalls are implemented as inline assembly, rather than assembly
45 * language functions in a .S file, for optimization. It allows
46 * the caller to issue the hypercall instruction directly, improving both
47 * performance and memory footprint.
48 */
49
50 #ifndef _EPAPR_HCALLS_H
51 #define _EPAPR_HCALLS_H
52
53 #include <linux/types.h>
54 #include <linux/errno.h>
55 #include <asm/byteorder.h>
56
57 #define EV_BYTE_CHANNEL_SEND 1
58 #define EV_BYTE_CHANNEL_RECEIVE 2
59 #define EV_BYTE_CHANNEL_POLL 3
60 #define EV_INT_SET_CONFIG 4
61 #define EV_INT_GET_CONFIG 5
62 #define EV_INT_SET_MASK 6
63 #define EV_INT_GET_MASK 7
64 #define EV_INT_IACK 9
65 #define EV_INT_EOI 10
66 #define EV_INT_SEND_IPI 11
67 #define EV_INT_SET_TASK_PRIORITY 12
68 #define EV_INT_GET_TASK_PRIORITY 13
69 #define EV_DOORBELL_SEND 14
70 #define EV_MSGSND 15
71 #define EV_IDLE 16
72
73 /* vendor ID: epapr */
74 #define EV_LOCAL_VENDOR_ID 0 /* for private use */
75 #define EV_EPAPR_VENDOR_ID 1
76 #define EV_FSL_VENDOR_ID 2 /* Freescale Semiconductor */
77 #define EV_IBM_VENDOR_ID 3 /* IBM */
78 #define EV_GHS_VENDOR_ID 4 /* Green Hills Software */
79 #define EV_ENEA_VENDOR_ID 5 /* Enea */
80 #define EV_WR_VENDOR_ID 6 /* Wind River Systems */
81 #define EV_AMCC_VENDOR_ID 7 /* Applied Micro Circuits */
82 #define EV_KVM_VENDOR_ID 42 /* KVM */
83
84 /* The max number of bytes that a byte channel can send or receive per call */
85 #define EV_BYTE_CHANNEL_MAX_BYTES 16
86
87
88 #define _EV_HCALL_TOKEN(id, num) (((id) << 16) | (num))
89 #define EV_HCALL_TOKEN(hcall_num) _EV_HCALL_TOKEN(EV_EPAPR_VENDOR_ID, hcall_num)
90
91 /* epapr error codes */
92 #define EV_EPERM 1 /* Operation not permitted */
93 #define EV_ENOENT 2 /* Entry Not Found */
94 #define EV_EIO 3 /* I/O error occured */
95 #define EV_EAGAIN 4 /* The operation had insufficient
96 * resources to complete and should be
97 * retried
98 */
99 #define EV_ENOMEM 5 /* There was insufficient memory to
100 * complete the operation */
101 #define EV_EFAULT 6 /* Bad guest address */
102 #define EV_ENODEV 7 /* No such device */
103 #define EV_EINVAL 8 /* An argument supplied to the hcall
104 was out of range or invalid */
105 #define EV_INTERNAL 9 /* An internal error occured */
106 #define EV_CONFIG 10 /* A configuration error was detected */
107 #define EV_INVALID_STATE 11 /* The object is in an invalid state */
108 #define EV_UNIMPLEMENTED 12 /* Unimplemented hypercall */
109 #define EV_BUFFER_OVERFLOW 13 /* Caller-supplied buffer too small */
110
111 /*
112 * Hypercall register clobber list
113 *
114 * These macros are used to define the list of clobbered registers during a
115 * hypercall. Technically, registers r0 and r3-r12 are always clobbered,
116 * but the gcc inline assembly syntax does not allow us to specify registers
117 * on the clobber list that are also on the input/output list. Therefore,
118 * the lists of clobbered registers depends on the number of register
119 * parmeters ("+r" and "=r") passed to the hypercall.
120 *
121 * Each assembly block should use one of the HCALL_CLOBBERSx macros. As a
122 * general rule, 'x' is the number of parameters passed to the assembly
123 * block *except* for r11.
124 *
125 * If you're not sure, just use the smallest value of 'x' that does not
126 * generate a compilation error. Because these are static inline functions,
127 * the compiler will only check the clobber list for a function if you
128 * compile code that calls that function.
129 *
130 * r3 and r11 are not included in any clobbers list because they are always
131 * listed as output registers.
132 *
133 * XER, CTR, and LR are currently listed as clobbers because it's uncertain
134 * whether they will be clobbered.
135 *
136 * Note that r11 can be used as an output parameter.
137 *
138 * The "memory" clobber is only necessary for hcalls where the Hypervisor
139 * will read or write guest memory. However, we add it to all hcalls because
140 * the impact is minimal, and we want to ensure that it's present for the
141 * hcalls that need it.
142 */
143
144 /* List of common clobbered registers. Do not use this macro. */
145 #define EV_HCALL_CLOBBERS "r0", "r12", "xer", "ctr", "lr", "cc", "memory"
146
147 #define EV_HCALL_CLOBBERS8 EV_HCALL_CLOBBERS
148 #define EV_HCALL_CLOBBERS7 EV_HCALL_CLOBBERS8, "r10"
149 #define EV_HCALL_CLOBBERS6 EV_HCALL_CLOBBERS7, "r9"
150 #define EV_HCALL_CLOBBERS5 EV_HCALL_CLOBBERS6, "r8"
151 #define EV_HCALL_CLOBBERS4 EV_HCALL_CLOBBERS5, "r7"
152 #define EV_HCALL_CLOBBERS3 EV_HCALL_CLOBBERS4, "r6"
153 #define EV_HCALL_CLOBBERS2 EV_HCALL_CLOBBERS3, "r5"
154 #define EV_HCALL_CLOBBERS1 EV_HCALL_CLOBBERS2, "r4"
155
156
157 /*
158 * We use "uintptr_t" to define a register because it's guaranteed to be a
159 * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit
160 * platform.
161 *
162 * All registers are either input/output or output only. Registers that are
163 * initialized before making the hypercall are input/output. All
164 * input/output registers are represented with "+r". Output-only registers
165 * are represented with "=r". Do not specify any unused registers. The
166 * clobber list will tell the compiler that the hypercall modifies those
167 * registers, which is good enough.
168 */
169
170 /**
171 * ev_int_set_config - configure the specified interrupt
172 * @interrupt: the interrupt number
173 * @config: configuration for this interrupt
174 * @priority: interrupt priority
175 * @destination: destination CPU number
176 *
177 * Returns 0 for success, or an error code.
178 */
ev_int_set_config(unsigned int interrupt,uint32_t config,unsigned int priority,uint32_t destination)179 static inline unsigned int ev_int_set_config(unsigned int interrupt,
180 uint32_t config, unsigned int priority, uint32_t destination)
181 {
182 register uintptr_t r11 __asm__("r11");
183 register uintptr_t r3 __asm__("r3");
184 register uintptr_t r4 __asm__("r4");
185 register uintptr_t r5 __asm__("r5");
186 register uintptr_t r6 __asm__("r6");
187
188 r11 = EV_HCALL_TOKEN(EV_INT_SET_CONFIG);
189 r3 = interrupt;
190 r4 = config;
191 r5 = priority;
192 r6 = destination;
193
194 __asm__ __volatile__ ("sc 1"
195 : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6)
196 : : EV_HCALL_CLOBBERS4
197 );
198
199 return r3;
200 }
201
202 /**
203 * ev_int_get_config - return the config of the specified interrupt
204 * @interrupt: the interrupt number
205 * @config: returned configuration for this interrupt
206 * @priority: returned interrupt priority
207 * @destination: returned destination CPU number
208 *
209 * Returns 0 for success, or an error code.
210 */
ev_int_get_config(unsigned int interrupt,uint32_t * config,unsigned int * priority,uint32_t * destination)211 static inline unsigned int ev_int_get_config(unsigned int interrupt,
212 uint32_t *config, unsigned int *priority, uint32_t *destination)
213 {
214 register uintptr_t r11 __asm__("r11");
215 register uintptr_t r3 __asm__("r3");
216 register uintptr_t r4 __asm__("r4");
217 register uintptr_t r5 __asm__("r5");
218 register uintptr_t r6 __asm__("r6");
219
220 r11 = EV_HCALL_TOKEN(EV_INT_GET_CONFIG);
221 r3 = interrupt;
222
223 __asm__ __volatile__ ("sc 1"
224 : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5), "=r" (r6)
225 : : EV_HCALL_CLOBBERS4
226 );
227
228 *config = r4;
229 *priority = r5;
230 *destination = r6;
231
232 return r3;
233 }
234
235 /**
236 * ev_int_set_mask - sets the mask for the specified interrupt source
237 * @interrupt: the interrupt number
238 * @mask: 0=enable interrupts, 1=disable interrupts
239 *
240 * Returns 0 for success, or an error code.
241 */
ev_int_set_mask(unsigned int interrupt,unsigned int mask)242 static inline unsigned int ev_int_set_mask(unsigned int interrupt,
243 unsigned int mask)
244 {
245 register uintptr_t r11 __asm__("r11");
246 register uintptr_t r3 __asm__("r3");
247 register uintptr_t r4 __asm__("r4");
248
249 r11 = EV_HCALL_TOKEN(EV_INT_SET_MASK);
250 r3 = interrupt;
251 r4 = mask;
252
253 __asm__ __volatile__ ("sc 1"
254 : "+r" (r11), "+r" (r3), "+r" (r4)
255 : : EV_HCALL_CLOBBERS2
256 );
257
258 return r3;
259 }
260
261 /**
262 * ev_int_get_mask - returns the mask for the specified interrupt source
263 * @interrupt: the interrupt number
264 * @mask: returned mask for this interrupt (0=enabled, 1=disabled)
265 *
266 * Returns 0 for success, or an error code.
267 */
ev_int_get_mask(unsigned int interrupt,unsigned int * mask)268 static inline unsigned int ev_int_get_mask(unsigned int interrupt,
269 unsigned int *mask)
270 {
271 register uintptr_t r11 __asm__("r11");
272 register uintptr_t r3 __asm__("r3");
273 register uintptr_t r4 __asm__("r4");
274
275 r11 = EV_HCALL_TOKEN(EV_INT_GET_MASK);
276 r3 = interrupt;
277
278 __asm__ __volatile__ ("sc 1"
279 : "+r" (r11), "+r" (r3), "=r" (r4)
280 : : EV_HCALL_CLOBBERS2
281 );
282
283 *mask = r4;
284
285 return r3;
286 }
287
288 /**
289 * ev_int_eoi - signal the end of interrupt processing
290 * @interrupt: the interrupt number
291 *
292 * This function signals the end of processing for the the specified
293 * interrupt, which must be the interrupt currently in service. By
294 * definition, this is also the highest-priority interrupt.
295 *
296 * Returns 0 for success, or an error code.
297 */
ev_int_eoi(unsigned int interrupt)298 static inline unsigned int ev_int_eoi(unsigned int interrupt)
299 {
300 register uintptr_t r11 __asm__("r11");
301 register uintptr_t r3 __asm__("r3");
302
303 r11 = EV_HCALL_TOKEN(EV_INT_EOI);
304 r3 = interrupt;
305
306 __asm__ __volatile__ ("sc 1"
307 : "+r" (r11), "+r" (r3)
308 : : EV_HCALL_CLOBBERS1
309 );
310
311 return r3;
312 }
313
314 /**
315 * ev_byte_channel_send - send characters to a byte stream
316 * @handle: byte stream handle
317 * @count: (input) num of chars to send, (output) num chars sent
318 * @buffer: pointer to a 16-byte buffer
319 *
320 * @buffer must be at least 16 bytes long, because all 16 bytes will be
321 * read from memory into registers, even if count < 16.
322 *
323 * Returns 0 for success, or an error code.
324 */
ev_byte_channel_send(unsigned int handle,unsigned int * count,const char buffer[EV_BYTE_CHANNEL_MAX_BYTES])325 static inline unsigned int ev_byte_channel_send(unsigned int handle,
326 unsigned int *count, const char buffer[EV_BYTE_CHANNEL_MAX_BYTES])
327 {
328 register uintptr_t r11 __asm__("r11");
329 register uintptr_t r3 __asm__("r3");
330 register uintptr_t r4 __asm__("r4");
331 register uintptr_t r5 __asm__("r5");
332 register uintptr_t r6 __asm__("r6");
333 register uintptr_t r7 __asm__("r7");
334 register uintptr_t r8 __asm__("r8");
335 const uint32_t *p = (const uint32_t *) buffer;
336
337 r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_SEND);
338 r3 = handle;
339 r4 = *count;
340 r5 = be32_to_cpu(p[0]);
341 r6 = be32_to_cpu(p[1]);
342 r7 = be32_to_cpu(p[2]);
343 r8 = be32_to_cpu(p[3]);
344
345 __asm__ __volatile__ ("sc 1"
346 : "+r" (r11), "+r" (r3),
347 "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), "+r" (r8)
348 : : EV_HCALL_CLOBBERS6
349 );
350
351 *count = r4;
352
353 return r3;
354 }
355
356 /**
357 * ev_byte_channel_receive - fetch characters from a byte channel
358 * @handle: byte channel handle
359 * @count: (input) max num of chars to receive, (output) num chars received
360 * @buffer: pointer to a 16-byte buffer
361 *
362 * The size of @buffer must be at least 16 bytes, even if you request fewer
363 * than 16 characters, because we always write 16 bytes to @buffer. This is
364 * for performance reasons.
365 *
366 * Returns 0 for success, or an error code.
367 */
ev_byte_channel_receive(unsigned int handle,unsigned int * count,char buffer[EV_BYTE_CHANNEL_MAX_BYTES])368 static inline unsigned int ev_byte_channel_receive(unsigned int handle,
369 unsigned int *count, char buffer[EV_BYTE_CHANNEL_MAX_BYTES])
370 {
371 register uintptr_t r11 __asm__("r11");
372 register uintptr_t r3 __asm__("r3");
373 register uintptr_t r4 __asm__("r4");
374 register uintptr_t r5 __asm__("r5");
375 register uintptr_t r6 __asm__("r6");
376 register uintptr_t r7 __asm__("r7");
377 register uintptr_t r8 __asm__("r8");
378 uint32_t *p = (uint32_t *) buffer;
379
380 r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_RECEIVE);
381 r3 = handle;
382 r4 = *count;
383
384 __asm__ __volatile__ ("sc 1"
385 : "+r" (r11), "+r" (r3), "+r" (r4),
386 "=r" (r5), "=r" (r6), "=r" (r7), "=r" (r8)
387 : : EV_HCALL_CLOBBERS6
388 );
389
390 *count = r4;
391 p[0] = cpu_to_be32(r5);
392 p[1] = cpu_to_be32(r6);
393 p[2] = cpu_to_be32(r7);
394 p[3] = cpu_to_be32(r8);
395
396 return r3;
397 }
398
399 /**
400 * ev_byte_channel_poll - returns the status of the byte channel buffers
401 * @handle: byte channel handle
402 * @rx_count: returned count of bytes in receive queue
403 * @tx_count: returned count of free space in transmit queue
404 *
405 * This function reports the amount of data in the receive queue (i.e. the
406 * number of bytes you can read), and the amount of free space in the transmit
407 * queue (i.e. the number of bytes you can write).
408 *
409 * Returns 0 for success, or an error code.
410 */
ev_byte_channel_poll(unsigned int handle,unsigned int * rx_count,unsigned int * tx_count)411 static inline unsigned int ev_byte_channel_poll(unsigned int handle,
412 unsigned int *rx_count, unsigned int *tx_count)
413 {
414 register uintptr_t r11 __asm__("r11");
415 register uintptr_t r3 __asm__("r3");
416 register uintptr_t r4 __asm__("r4");
417 register uintptr_t r5 __asm__("r5");
418
419 r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_POLL);
420 r3 = handle;
421
422 __asm__ __volatile__ ("sc 1"
423 : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5)
424 : : EV_HCALL_CLOBBERS3
425 );
426
427 *rx_count = r4;
428 *tx_count = r5;
429
430 return r3;
431 }
432
433 /**
434 * ev_int_iack - acknowledge an interrupt
435 * @handle: handle to the target interrupt controller
436 * @vector: returned interrupt vector
437 *
438 * If handle is zero, the function returns the next interrupt source
439 * number to be handled irrespective of the hierarchy or cascading
440 * of interrupt controllers. If non-zero, specifies a handle to the
441 * interrupt controller that is the target of the acknowledge.
442 *
443 * Returns 0 for success, or an error code.
444 */
ev_int_iack(unsigned int handle,unsigned int * vector)445 static inline unsigned int ev_int_iack(unsigned int handle,
446 unsigned int *vector)
447 {
448 register uintptr_t r11 __asm__("r11");
449 register uintptr_t r3 __asm__("r3");
450 register uintptr_t r4 __asm__("r4");
451
452 r11 = EV_HCALL_TOKEN(EV_INT_IACK);
453 r3 = handle;
454
455 __asm__ __volatile__ ("sc 1"
456 : "+r" (r11), "+r" (r3), "=r" (r4)
457 : : EV_HCALL_CLOBBERS2
458 );
459
460 *vector = r4;
461
462 return r3;
463 }
464
465 /**
466 * ev_doorbell_send - send a doorbell to another partition
467 * @handle: doorbell send handle
468 *
469 * Returns 0 for success, or an error code.
470 */
ev_doorbell_send(unsigned int handle)471 static inline unsigned int ev_doorbell_send(unsigned int handle)
472 {
473 register uintptr_t r11 __asm__("r11");
474 register uintptr_t r3 __asm__("r3");
475
476 r11 = EV_HCALL_TOKEN(EV_DOORBELL_SEND);
477 r3 = handle;
478
479 __asm__ __volatile__ ("sc 1"
480 : "+r" (r11), "+r" (r3)
481 : : EV_HCALL_CLOBBERS1
482 );
483
484 return r3;
485 }
486
487 /**
488 * ev_idle -- wait for next interrupt on this core
489 *
490 * Returns 0 for success, or an error code.
491 */
ev_idle(void)492 static inline unsigned int ev_idle(void)
493 {
494 register uintptr_t r11 __asm__("r11");
495 register uintptr_t r3 __asm__("r3");
496
497 r11 = EV_HCALL_TOKEN(EV_IDLE);
498
499 __asm__ __volatile__ ("sc 1"
500 : "+r" (r11), "=r" (r3)
501 : : EV_HCALL_CLOBBERS1
502 );
503
504 return r3;
505 }
506
507 #endif
508