1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3 * x86_emulate.h
4 *
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
6 *
7 * Copyright (c) 2005 Keir Fraser
8 *
9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
10 */
11
12 #ifndef _ASM_X86_KVM_X86_EMULATE_H
13 #define _ASM_X86_KVM_X86_EMULATE_H
14
15 #include <asm/desc_defs.h>
16 #include "fpu.h"
17
18 struct x86_emulate_ctxt;
19 enum x86_intercept;
20 enum x86_intercept_stage;
21
22 struct x86_exception {
23 u8 vector;
24 bool error_code_valid;
25 u16 error_code;
26 bool nested_page_fault;
27 u64 address; /* cr2 or nested page fault gpa */
28 u8 async_page_fault;
29 };
30
31 /*
32 * This struct is used to carry enough information from the instruction
33 * decoder to main KVM so that a decision can be made whether the
34 * instruction needs to be intercepted or not.
35 */
36 struct x86_instruction_info {
37 u8 intercept; /* which intercept */
38 u8 rep_prefix; /* rep prefix? */
39 u8 modrm_mod; /* mod part of modrm */
40 u8 modrm_reg; /* index of register used */
41 u8 modrm_rm; /* rm part of modrm */
42 u64 src_val; /* value of source operand */
43 u64 dst_val; /* value of destination operand */
44 u8 src_bytes; /* size of source operand */
45 u8 dst_bytes; /* size of destination operand */
46 u8 ad_bytes; /* size of src/dst address */
47 u64 next_rip; /* rip following the instruction */
48 };
49
50 /*
51 * x86_emulate_ops:
52 *
53 * These operations represent the instruction emulator's interface to memory.
54 * There are two categories of operation: those that act on ordinary memory
55 * regions (*_std), and those that act on memory regions known to require
56 * special treatment or emulation (*_emulated).
57 *
58 * The emulator assumes that an instruction accesses only one 'emulated memory'
59 * location, that this location is the given linear faulting address (cr2), and
60 * that this is one of the instruction's data operands. Instruction fetches and
61 * stack operations are assumed never to access emulated memory. The emulator
62 * automatically deduces which operand of a string-move operation is accessing
63 * emulated memory, and assumes that the other operand accesses normal memory.
64 *
65 * NOTES:
66 * 1. The emulator isn't very smart about emulated vs. standard memory.
67 * 'Emulated memory' access addresses should be checked for sanity.
68 * 'Normal memory' accesses may fault, and the caller must arrange to
69 * detect and handle reentrancy into the emulator via recursive faults.
70 * Accesses may be unaligned and may cross page boundaries.
71 * 2. If the access fails (cannot emulate, or a standard access faults) then
72 * it is up to the memop to propagate the fault to the guest VM via
73 * some out-of-band mechanism, unknown to the emulator. The memop signals
74 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
75 * then immediately bail.
76 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
77 * cmpxchg8b_emulated need support 8-byte accesses.
78 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
79 */
80 /* Access completed successfully: continue emulation as normal. */
81 #define X86EMUL_CONTINUE 0
82 /* Access is unhandleable: bail from emulation and return error to caller. */
83 #define X86EMUL_UNHANDLEABLE 1
84 /* Terminate emulation but return success to the caller. */
85 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
86 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
87 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
88 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
89 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
90
91 struct x86_emulate_ops {
92 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
93 /*
94 * read_gpr: read a general purpose register (rax - r15)
95 *
96 * @reg: gpr number.
97 */
98 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
99 /*
100 * write_gpr: write a general purpose register (rax - r15)
101 *
102 * @reg: gpr number.
103 * @val: value to write.
104 */
105 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
106 /*
107 * read_std: Read bytes of standard (non-emulated/special) memory.
108 * Used for descriptor reading.
109 * @addr: [IN ] Linear address from which to read.
110 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
111 * @bytes: [IN ] Number of bytes to read from memory.
112 * @system:[IN ] Whether the access is forced to be at CPL0.
113 */
114 int (*read_std)(struct x86_emulate_ctxt *ctxt,
115 unsigned long addr, void *val,
116 unsigned int bytes,
117 struct x86_exception *fault, bool system);
118
119 /*
120 * write_std: Write bytes of standard (non-emulated/special) memory.
121 * Used for descriptor writing.
122 * @addr: [IN ] Linear address to which to write.
123 * @val: [OUT] Value write to memory, zero-extended to 'u_long'.
124 * @bytes: [IN ] Number of bytes to write to memory.
125 * @system:[IN ] Whether the access is forced to be at CPL0.
126 */
127 int (*write_std)(struct x86_emulate_ctxt *ctxt,
128 unsigned long addr, void *val, unsigned int bytes,
129 struct x86_exception *fault, bool system);
130 /*
131 * fetch: Read bytes of standard (non-emulated/special) memory.
132 * Used for instruction fetch.
133 * @addr: [IN ] Linear address from which to read.
134 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
135 * @bytes: [IN ] Number of bytes to read from memory.
136 */
137 int (*fetch)(struct x86_emulate_ctxt *ctxt,
138 unsigned long addr, void *val, unsigned int bytes,
139 struct x86_exception *fault);
140
141 /*
142 * read_emulated: Read bytes from emulated/special memory area.
143 * @addr: [IN ] Linear address from which to read.
144 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
145 * @bytes: [IN ] Number of bytes to read from memory.
146 */
147 int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
148 unsigned long addr, void *val, unsigned int bytes,
149 struct x86_exception *fault);
150
151 /*
152 * write_emulated: Write bytes to emulated/special memory area.
153 * @addr: [IN ] Linear address to which to write.
154 * @val: [IN ] Value to write to memory (low-order bytes used as
155 * required).
156 * @bytes: [IN ] Number of bytes to write to memory.
157 */
158 int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
159 unsigned long addr, const void *val,
160 unsigned int bytes,
161 struct x86_exception *fault);
162
163 /*
164 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
165 * emulated/special memory area.
166 * @addr: [IN ] Linear address to access.
167 * @old: [IN ] Value expected to be current at @addr.
168 * @new: [IN ] Value to write to @addr.
169 * @bytes: [IN ] Number of bytes to access using CMPXCHG.
170 */
171 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
172 unsigned long addr,
173 const void *old,
174 const void *new,
175 unsigned int bytes,
176 struct x86_exception *fault);
177 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
178
179 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
180 int size, unsigned short port, void *val,
181 unsigned int count);
182
183 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
184 int size, unsigned short port, const void *val,
185 unsigned int count);
186
187 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
188 struct desc_struct *desc, u32 *base3, int seg);
189 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
190 struct desc_struct *desc, u32 base3, int seg);
191 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
192 int seg);
193 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
194 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
195 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
196 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
197 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
198 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
199 int (*cpl)(struct x86_emulate_ctxt *ctxt);
200 void (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
201 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
202 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
203 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
204 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
205 int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
206 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
207 void (*halt)(struct x86_emulate_ctxt *ctxt);
208 void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
209 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
210 int (*intercept)(struct x86_emulate_ctxt *ctxt,
211 struct x86_instruction_info *info,
212 enum x86_intercept_stage stage);
213
214 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
215 u32 *ecx, u32 *edx, bool exact_only);
216 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
217 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
218 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
219
220 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
221
222 bool (*is_smm)(struct x86_emulate_ctxt *ctxt);
223 bool (*is_guest_mode)(struct x86_emulate_ctxt *ctxt);
224 int (*leave_smm)(struct x86_emulate_ctxt *ctxt);
225 void (*triple_fault)(struct x86_emulate_ctxt *ctxt);
226 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
227 };
228
229 /* Type, address-of, and value of an instruction's operand. */
230 struct operand {
231 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
232 unsigned int bytes;
233 unsigned int count;
234 union {
235 unsigned long orig_val;
236 u64 orig_val64;
237 };
238 union {
239 unsigned long *reg;
240 struct segmented_address {
241 ulong ea;
242 unsigned seg;
243 } mem;
244 unsigned xmm;
245 unsigned mm;
246 } addr;
247 union {
248 unsigned long val;
249 u64 val64;
250 char valptr[sizeof(sse128_t)];
251 sse128_t vec_val;
252 u64 mm_val;
253 void *data;
254 };
255 };
256
257 struct fetch_cache {
258 u8 data[15];
259 u8 *ptr;
260 u8 *end;
261 };
262
263 struct read_cache {
264 u8 data[1024];
265 unsigned long pos;
266 unsigned long end;
267 };
268
269 /* Execution mode, passed to the emulator. */
270 enum x86emul_mode {
271 X86EMUL_MODE_REAL, /* Real mode. */
272 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
273 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
274 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
275 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
276 };
277
278 /*
279 * fastop functions are declared as taking a never-defined fastop parameter,
280 * so they can't be called from C directly.
281 */
282 struct fastop;
283
284 typedef void (*fastop_t)(struct fastop *);
285
286 /*
287 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is
288 * tracked/accessed via _eip, and except for RIP relative addressing, which
289 * also uses _eip, RIP cannot be a register operand nor can it be an operand in
290 * a ModRM or SIB byte.
291 */
292 #ifdef CONFIG_X86_64
293 #define NR_EMULATOR_GPRS 16
294 #else
295 #define NR_EMULATOR_GPRS 8
296 #endif
297
298 struct x86_emulate_ctxt {
299 void *vcpu;
300 const struct x86_emulate_ops *ops;
301
302 /* Register state before/after emulation. */
303 unsigned long eflags;
304 unsigned long eip; /* eip before instruction emulation */
305 /* Emulated execution mode, represented by an X86EMUL_MODE value. */
306 enum x86emul_mode mode;
307
308 /* interruptibility state, as a result of execution of STI or MOV SS */
309 int interruptibility;
310
311 bool perm_ok; /* do not check permissions if true */
312 bool tf; /* TF value before instruction (after for syscall/sysret) */
313
314 bool have_exception;
315 struct x86_exception exception;
316
317 /* GPA available */
318 bool gpa_available;
319 gpa_t gpa_val;
320
321 /*
322 * decode cache
323 */
324
325 /* current opcode length in bytes */
326 u8 opcode_len;
327 u8 b;
328 u8 intercept;
329 u8 op_bytes;
330 u8 ad_bytes;
331 union {
332 int (*execute)(struct x86_emulate_ctxt *ctxt);
333 fastop_t fop;
334 };
335 int (*check_perm)(struct x86_emulate_ctxt *ctxt);
336
337 bool rip_relative;
338 u8 rex_prefix;
339 u8 lock_prefix;
340 u8 rep_prefix;
341 /* bitmaps of registers in _regs[] that can be read */
342 u16 regs_valid;
343 /* bitmaps of registers in _regs[] that have been written */
344 u16 regs_dirty;
345 /* modrm */
346 u8 modrm;
347 u8 modrm_mod;
348 u8 modrm_reg;
349 u8 modrm_rm;
350 u8 modrm_seg;
351 u8 seg_override;
352 u64 d;
353 unsigned long _eip;
354
355 /* Here begins the usercopy section. */
356 struct operand src;
357 struct operand src2;
358 struct operand dst;
359 struct operand memop;
360 unsigned long _regs[NR_EMULATOR_GPRS];
361 struct operand *memopp;
362 struct fetch_cache fetch;
363 struct read_cache io_read;
364 struct read_cache mem_read;
365 bool is_branch;
366 };
367
368 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \
369 ({ \
370 int __ret = (cond); \
371 \
372 if (WARN_ON_ONCE(__ret)) \
373 ctxt->ops->vm_bugged(ctxt); \
374 unlikely(__ret); \
375 })
376
377 /* Repeat String Operation Prefix */
378 #define REPE_PREFIX 0xf3
379 #define REPNE_PREFIX 0xf2
380
381 /* CPUID vendors */
382 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
383 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
384 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
385
386 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
387 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
388 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
389
390 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
391 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
392 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
393
394 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
395 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
396 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
397
398 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
399 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
400 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
401
is_guest_vendor_intel(u32 ebx,u32 ecx,u32 edx)402 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
403 {
404 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
405 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
406 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
407 }
408
is_guest_vendor_amd(u32 ebx,u32 ecx,u32 edx)409 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
410 {
411 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
412 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
413 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
414 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
415 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
416 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
417 }
418
is_guest_vendor_hygon(u32 ebx,u32 ecx,u32 edx)419 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
420 {
421 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
422 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
423 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
424 }
425
426 enum x86_intercept_stage {
427 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
428 X86_ICPT_PRE_EXCEPT,
429 X86_ICPT_POST_EXCEPT,
430 X86_ICPT_POST_MEMACCESS,
431 };
432
433 enum x86_intercept {
434 x86_intercept_none,
435 x86_intercept_cr_read,
436 x86_intercept_cr_write,
437 x86_intercept_clts,
438 x86_intercept_lmsw,
439 x86_intercept_smsw,
440 x86_intercept_dr_read,
441 x86_intercept_dr_write,
442 x86_intercept_lidt,
443 x86_intercept_sidt,
444 x86_intercept_lgdt,
445 x86_intercept_sgdt,
446 x86_intercept_lldt,
447 x86_intercept_sldt,
448 x86_intercept_ltr,
449 x86_intercept_str,
450 x86_intercept_rdtsc,
451 x86_intercept_rdpmc,
452 x86_intercept_pushf,
453 x86_intercept_popf,
454 x86_intercept_cpuid,
455 x86_intercept_rsm,
456 x86_intercept_iret,
457 x86_intercept_intn,
458 x86_intercept_invd,
459 x86_intercept_pause,
460 x86_intercept_hlt,
461 x86_intercept_invlpg,
462 x86_intercept_invlpga,
463 x86_intercept_vmrun,
464 x86_intercept_vmload,
465 x86_intercept_vmsave,
466 x86_intercept_vmmcall,
467 x86_intercept_stgi,
468 x86_intercept_clgi,
469 x86_intercept_skinit,
470 x86_intercept_rdtscp,
471 x86_intercept_rdpid,
472 x86_intercept_icebp,
473 x86_intercept_wbinvd,
474 x86_intercept_monitor,
475 x86_intercept_mwait,
476 x86_intercept_rdmsr,
477 x86_intercept_wrmsr,
478 x86_intercept_in,
479 x86_intercept_ins,
480 x86_intercept_out,
481 x86_intercept_outs,
482 x86_intercept_xsetbv,
483
484 nr_x86_intercepts
485 };
486
487 /* Host execution mode. */
488 #if defined(CONFIG_X86_32)
489 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
490 #elif defined(CONFIG_X86_64)
491 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
492 #endif
493
494 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type);
495 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
496 #define EMULATION_FAILED -1
497 #define EMULATION_OK 0
498 #define EMULATION_RESTART 1
499 #define EMULATION_INTERCEPTED 2
500 void init_decode_cache(struct x86_emulate_ctxt *ctxt);
501 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
502 int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
503 u16 tss_selector, int idt_index, int reason,
504 bool has_error_code, u32 error_code);
505 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
506 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
507 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
508 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
509
reg_read(struct x86_emulate_ctxt * ctxt,unsigned nr)510 static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr)
511 {
512 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
513 nr &= NR_EMULATOR_GPRS - 1;
514
515 if (!(ctxt->regs_valid & (1 << nr))) {
516 ctxt->regs_valid |= 1 << nr;
517 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr);
518 }
519 return ctxt->_regs[nr];
520 }
521
reg_write(struct x86_emulate_ctxt * ctxt,unsigned nr)522 static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr)
523 {
524 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
525 nr &= NR_EMULATOR_GPRS - 1;
526
527 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
528 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
529
530 ctxt->regs_valid |= 1 << nr;
531 ctxt->regs_dirty |= 1 << nr;
532 return &ctxt->_regs[nr];
533 }
534
reg_rmw(struct x86_emulate_ctxt * ctxt,unsigned nr)535 static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr)
536 {
537 reg_read(ctxt, nr);
538 return reg_write(ctxt, nr);
539 }
540
541 #endif /* _ASM_X86_KVM_X86_EMULATE_H */
542