1 #ifndef __PPC64_ELF_H
2 #define __PPC64_ELF_H
3
4 /*
5 * ELF register definitions..
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12 #include <asm/types.h>
13 #include <asm/ptrace.h>
14 #include <asm/cputable.h>
15
16 #define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
17 #define ELF_NFPREG 33 /* includes fpscr */
18 #define ELF_NVRREG 33 /* includes vscr */
19
20 typedef unsigned long elf_greg_t64;
21 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
22
23 typedef unsigned int elf_greg_t32;
24 typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
25
26 /*
27 * These are used to set parameters in the core dumps.
28 */
29 #ifndef ELF_ARCH
30 # define ELF_ARCH EM_PPC64
31 # define ELF_CLASS ELFCLASS64
32 # define ELF_DATA ELFDATA2MSB
33 typedef elf_greg_t64 elf_greg_t;
34 typedef elf_gregset_t64 elf_gregset_t;
35 # define elf_addr_t unsigned long
36 # define elf_caddr_t char *
37 #else
38 /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
39 typedef elf_greg_t32 elf_greg_t;
40 typedef elf_gregset_t32 elf_gregset_t;
41 # define elf_addr_t u32
42 # define elf_caddr_t u32
43 #endif
44
45 /* Floating point registers */
46 typedef double elf_fpreg_t;
47 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
48
49 /* Altivec registers */
50 typedef __vector128 elf_vrreg_t;
51 typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
52
53
54 #ifdef __KERNEL__
55
56 /*
57 * This is used to ensure we don't load something for the wrong architecture.
58 */
59 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
60
61 #define USE_ELF_CORE_DUMP
62 #define ELF_EXEC_PAGESIZE 4096
63
64 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical
65 use of this is to invoke "./ld.so someprog" to test out a new version of
66 the loader. We need to make sure that it is out of the way of the program
67 that it will "exec", and that there is sufficient room for the brk. */
68
69 #define ELF_ET_DYN_BASE (0x08000000)
70
71 /* Common routine for both 32-bit and 64-bit processes */
72 #define ELF_CORE_COPY_REGS(gregs, regs) elf_core_copy_regs(gregs, regs);
73 static inline void
elf_core_copy_regs(elf_gregset_t dstRegs,struct pt_regs * srcRegs)74 elf_core_copy_regs(elf_gregset_t dstRegs, struct pt_regs* srcRegs)
75 {
76 int i;
77
78 int numGPRS = ((sizeof(struct pt_regs)/sizeof(elf_greg_t64)) < ELF_NGREG) ? (sizeof(struct pt_regs)/sizeof(elf_greg_t64)) : ELF_NGREG;
79
80 for (i=0; i < numGPRS; i++)
81 dstRegs[i] = (elf_greg_t)((elf_greg_t64 *)srcRegs)[i];
82 }
83
84 /* This yields a mask that user programs can use to figure out what
85 instruction set this cpu supports. This could be done in userspace,
86 but it's not easy, and we've already done it here. */
87
88 #define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
89
90 /* This yields a string that ld.so will use to load implementation
91 specific libraries for optimization. This is more specific in
92 intent than poking at uname or /proc/cpuinfo.
93
94 For the moment, we have only optimizations for the Intel generations,
95 but that could change... */
96
97 #define ELF_PLATFORM (NULL)
98
99
100 #define ELF_PLAT_INIT(_r, interp_load_addr) do { \
101 memset(_r->gpr, 0, sizeof(_r->gpr)); \
102 _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
103 _r->gpr[2] = interp_load_addr; \
104 } while (0)
105
106
107
108 #define SET_PERSONALITY(ex, ibcs2) \
109 do { if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
110 current->thread.flags |= PPC_FLAG_32BIT; \
111 else \
112 current->thread.flags &= ~PPC_FLAG_32BIT; \
113 if (ibcs2) \
114 set_personality(PER_SVR4); \
115 else if (current->personality != PER_LINUX32) \
116 set_personality(PER_LINUX); \
117 } while (0)
118
119 /*
120 * We need to put in some extra aux table entries to tell glibc what
121 * the cache block size is, so it can use the dcbz instruction safely.
122 */
123 #define AT_DCACHEBSIZE 19
124 #define AT_ICACHEBSIZE 20
125 #define AT_UCACHEBSIZE 21
126 /* A special ignored type value for PPC, for glibc compatibility. */
127 #define AT_IGNOREPPC 22
128
129 extern int dcache_bsize;
130 extern int icache_bsize;
131 extern int ucache_bsize;
132
133 /*
134 * The requirements here are:
135 * - keep the final alignment of sp (sp & 0xf)
136 * - make sure the 32-bit value at the first 16 byte aligned position of
137 * AUXV is greater than 16 for glibc compatibility.
138 * AT_IGNOREPPC is used for that.
139 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
140 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
141 */
142 #define DLINFO_ARCH_ITEMS 3
143 #define ARCH_DLINFO \
144 do { \
145 sp -= DLINFO_ARCH_ITEMS * 2; \
146 NEW_AUX_ENT(0, AT_DCACHEBSIZE, dcache_bsize); \
147 NEW_AUX_ENT(1, AT_ICACHEBSIZE, icache_bsize); \
148 NEW_AUX_ENT(2, AT_UCACHEBSIZE, ucache_bsize); \
149 /* \
150 * Now handle glibc compatibility. \
151 */ \
152 sp -= 2*2; \
153 NEW_AUX_ENT(0, AT_IGNOREPPC, AT_IGNOREPPC); \
154 NEW_AUX_ENT(1, AT_IGNOREPPC, AT_IGNOREPPC); \
155 } while (0)
156
157 #endif /* __KERNEL__ */
158 #endif /* __PPC64_ELF_H */
159