1 /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- 2 * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com 3 * 4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 6 * All rights reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: 28 * Jeff Hartmann <jhartmann@valinux.com> 29 * Keith Whitwell <keith@tungstengraphics.com> 30 * 31 * Rewritten by: 32 * Gareth Hughes <gareth@valinux.com> 33 */ 34 35 #ifndef __MGA_DRM_H__ 36 #define __MGA_DRM_H__ 37 38 /* WARNING: If you change any of these defines, make sure to change the 39 * defines in the Xserver file (mga_sarea.h) 40 */ 41 #ifndef __MGA_SAREA_DEFINES__ 42 #define __MGA_SAREA_DEFINES__ 43 44 /* WARP pipe flags 45 */ 46 #define MGA_F 0x1 /* fog */ 47 #define MGA_A 0x2 /* alpha */ 48 #define MGA_S 0x4 /* specular */ 49 #define MGA_T2 0x8 /* multitexture */ 50 51 #define MGA_WARP_TGZ 0 52 #define MGA_WARP_TGZF (MGA_F) 53 #define MGA_WARP_TGZA (MGA_A) 54 #define MGA_WARP_TGZAF (MGA_F|MGA_A) 55 #define MGA_WARP_TGZS (MGA_S) 56 #define MGA_WARP_TGZSF (MGA_S|MGA_F) 57 #define MGA_WARP_TGZSA (MGA_S|MGA_A) 58 #define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) 59 #define MGA_WARP_T2GZ (MGA_T2) 60 #define MGA_WARP_T2GZF (MGA_T2|MGA_F) 61 #define MGA_WARP_T2GZA (MGA_T2|MGA_A) 62 #define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) 63 #define MGA_WARP_T2GZS (MGA_T2|MGA_S) 64 #define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) 65 #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) 66 #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) 67 68 #define MGA_MAX_G200_PIPES 8 /* no multitex */ 69 #define MGA_MAX_G400_PIPES 16 70 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES 71 #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ 72 73 #define MGA_CARD_TYPE_G200 1 74 #define MGA_CARD_TYPE_G400 2 75 76 77 #define MGA_FRONT 0x1 78 #define MGA_BACK 0x2 79 #define MGA_DEPTH 0x4 80 81 /* What needs to be changed for the current vertex dma buffer? 82 */ 83 #define MGA_UPLOAD_CONTEXT 0x1 84 #define MGA_UPLOAD_TEX0 0x2 85 #define MGA_UPLOAD_TEX1 0x4 86 #define MGA_UPLOAD_PIPE 0x8 87 #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ 88 #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ 89 #define MGA_UPLOAD_2D 0x40 90 #define MGA_WAIT_AGE 0x80 /* handled client-side */ 91 #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ 92 #if 0 93 #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock 94 quiescent */ 95 #endif 96 97 /* 32 buffers of 64k each, total 2 meg. 98 */ 99 #define MGA_BUFFER_SIZE (1 << 16) 100 #define MGA_NUM_BUFFERS 128 101 102 /* Keep these small for testing. 103 */ 104 #define MGA_NR_SAREA_CLIPRECTS 8 105 106 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128 107 * regions, subject to a minimum region size of (1<<16) == 64k. 108 * 109 * Clients may subdivide regions internally, but when sharing between 110 * clients, the region size is the minimum granularity. 111 */ 112 113 #define MGA_CARD_HEAP 0 114 #define MGA_AGP_HEAP 1 115 #define MGA_NR_TEX_HEAPS 2 116 #define MGA_NR_TEX_REGIONS 16 117 #define MGA_LOG_MIN_TEX_REGION_SIZE 16 118 119 #endif /* __MGA_SAREA_DEFINES__ */ 120 121 122 /* Setup registers for 3D context 123 */ 124 typedef struct { 125 unsigned int dstorg; 126 unsigned int maccess; 127 unsigned int plnwt; 128 unsigned int dwgctl; 129 unsigned int alphactrl; 130 unsigned int fogcolor; 131 unsigned int wflag; 132 unsigned int tdualstage0; 133 unsigned int tdualstage1; 134 unsigned int fcol; 135 unsigned int stencil; 136 unsigned int stencilctl; 137 } drm_mga_context_regs_t; 138 139 /* Setup registers for 2D, X server 140 */ 141 typedef struct { 142 unsigned int pitch; 143 } drm_mga_server_regs_t; 144 145 /* Setup registers for each texture unit 146 */ 147 typedef struct { 148 unsigned int texctl; 149 unsigned int texctl2; 150 unsigned int texfilter; 151 unsigned int texbordercol; 152 unsigned int texorg; 153 unsigned int texwidth; 154 unsigned int texheight; 155 unsigned int texorg1; 156 unsigned int texorg2; 157 unsigned int texorg3; 158 unsigned int texorg4; 159 } drm_mga_texture_regs_t; 160 161 /* General aging mechanism 162 */ 163 typedef struct { 164 unsigned int head; /* Position of head pointer */ 165 unsigned int wrap; /* Primary DMA wrap count */ 166 } drm_mga_age_t; 167 168 typedef struct _drm_mga_sarea { 169 /* The channel for communication of state information to the kernel 170 * on firing a vertex dma buffer. 171 */ 172 drm_mga_context_regs_t context_state; 173 drm_mga_server_regs_t server_state; 174 drm_mga_texture_regs_t tex_state[2]; 175 unsigned int warp_pipe; 176 unsigned int dirty; 177 unsigned int vertsize; 178 179 /* The current cliprects, or a subset thereof. 180 */ 181 drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; 182 unsigned int nbox; 183 184 /* Information about the most recently used 3d drawable. The 185 * client fills in the req_* fields, the server fills in the 186 * exported_ fields and puts the cliprects into boxes, above. 187 * 188 * The client clears the exported_drawable field before 189 * clobbering the boxes data. 190 */ 191 unsigned int req_drawable; /* the X drawable id */ 192 unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ 193 194 unsigned int exported_drawable; 195 unsigned int exported_index; 196 unsigned int exported_stamp; 197 unsigned int exported_buffers; 198 unsigned int exported_nfront; 199 unsigned int exported_nback; 200 int exported_back_x, exported_front_x, exported_w; 201 int exported_back_y, exported_front_y, exported_h; 202 drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; 203 204 /* Counters for aging textures and for client-side throttling. 205 */ 206 unsigned int status[4]; 207 unsigned int last_wrap; 208 209 drm_mga_age_t last_frame; 210 unsigned int last_enqueue; /* last time a buffer was enqueued */ 211 unsigned int last_dispatch; /* age of the most recently dispatched buffer */ 212 unsigned int last_quiescent; /* */ 213 214 /* LRU lists for texture memory in agp space and on the card. 215 */ 216 drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; 217 unsigned int texAge[MGA_NR_TEX_HEAPS]; 218 219 /* Mechanism to validate card state. 220 */ 221 int ctxOwner; 222 } drm_mga_sarea_t; 223 224 225 /* WARNING: If you change any of these defines, make sure to change the 226 * defines in the Xserver file (xf86drmMga.h) 227 */ 228 229 /* MGA specific ioctls 230 * The device specific ioctl range is 0x40 to 0x79. 231 */ 232 #define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t) 233 #define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t) 234 #define DRM_IOCTL_MGA_RESET DRM_IO( 0x42) 235 #define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43) 236 #define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t) 237 #define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t) 238 #define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t) 239 #define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t) 240 #define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t) 241 242 typedef struct _drm_mga_warp_index { 243 int installed; 244 unsigned long phys_addr; 245 int size; 246 } drm_mga_warp_index_t; 247 248 typedef struct drm_mga_init { 249 enum { 250 MGA_INIT_DMA = 0x01, 251 MGA_CLEANUP_DMA = 0x02 252 } func; 253 254 unsigned long sarea_priv_offset; 255 256 int chipset; 257 int sgram; 258 259 unsigned int maccess; 260 261 unsigned int fb_cpp; 262 unsigned int front_offset, front_pitch; 263 unsigned int back_offset, back_pitch; 264 265 unsigned int depth_cpp; 266 unsigned int depth_offset, depth_pitch; 267 268 unsigned int texture_offset[MGA_NR_TEX_HEAPS]; 269 unsigned int texture_size[MGA_NR_TEX_HEAPS]; 270 271 unsigned long fb_offset; 272 unsigned long mmio_offset; 273 unsigned long status_offset; 274 unsigned long warp_offset; 275 unsigned long primary_offset; 276 unsigned long buffers_offset; 277 } drm_mga_init_t; 278 279 typedef struct drm_mga_fullscreen { 280 enum { 281 MGA_INIT_FULLSCREEN = 0x01, 282 MGA_CLEANUP_FULLSCREEN = 0x02 283 } func; 284 } drm_mga_fullscreen_t; 285 286 typedef struct drm_mga_clear { 287 unsigned int flags; 288 unsigned int clear_color; 289 unsigned int clear_depth; 290 unsigned int color_mask; 291 unsigned int depth_mask; 292 } drm_mga_clear_t; 293 294 typedef struct drm_mga_vertex { 295 int idx; /* buffer to queue */ 296 int used; /* bytes in use */ 297 int discard; /* client finished with buffer? */ 298 } drm_mga_vertex_t; 299 300 typedef struct drm_mga_indices { 301 int idx; /* buffer to queue */ 302 unsigned int start; 303 unsigned int end; 304 int discard; /* client finished with buffer? */ 305 } drm_mga_indices_t; 306 307 typedef struct drm_mga_iload { 308 int idx; 309 unsigned int dstorg; 310 unsigned int length; 311 } drm_mga_iload_t; 312 313 typedef struct _drm_mga_blit { 314 unsigned int planemask; 315 unsigned int srcorg; 316 unsigned int dstorg; 317 int src_pitch, dst_pitch; 318 int delta_sx, delta_sy; 319 int delta_dx, delta_dy; 320 int height, ydir; /* flip image vertically */ 321 int source_pitch, dest_pitch; 322 } drm_mga_blit_t; 323 324 #endif 325