1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4 *
5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 */
8
9 #ifndef __SOUND_SOC_INTEL_AVS_MSGS_H
10 #define __SOUND_SOC_INTEL_AVS_MSGS_H
11
12 struct avs_dev;
13
14 #define AVS_MAILBOX_SIZE 4096
15
16 enum avs_msg_target {
17 AVS_FW_GEN_MSG = 0,
18 AVS_MOD_MSG = 1
19 };
20
21 enum avs_msg_direction {
22 AVS_MSG_REQUEST = 0,
23 AVS_MSG_REPLY = 1
24 };
25
26 enum avs_global_msg_type {
27 AVS_GLB_ROM_CONTROL = 1,
28 AVS_GLB_LOAD_MULTIPLE_MODULES = 15,
29 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16,
30 AVS_GLB_CREATE_PIPELINE = 17,
31 AVS_GLB_DELETE_PIPELINE = 18,
32 AVS_GLB_SET_PIPELINE_STATE = 19,
33 AVS_GLB_GET_PIPELINE_STATE = 20,
34 AVS_GLB_LOAD_LIBRARY = 24,
35 AVS_GLB_NOTIFICATION = 27,
36 };
37
38 union avs_global_msg {
39 u64 val;
40 struct {
41 union {
42 u32 primary;
43 struct {
44 u32 rsvd:24;
45 u32 global_msg_type:5;
46 u32 msg_direction:1;
47 u32 msg_target:1;
48 };
49 /* set boot config */
50 struct {
51 u32 rom_ctrl_msg_type:9;
52 u32 dma_id:5;
53 u32 purge_request:1;
54 } boot_cfg;
55 /* module loading */
56 struct {
57 u32 mod_cnt:8;
58 } load_multi_mods;
59 /* pipeline management */
60 struct {
61 u32 ppl_mem_size:11;
62 u32 ppl_priority:5;
63 u32 instance_id:8;
64 } create_ppl;
65 struct {
66 u32 rsvd:16;
67 u32 instance_id:8;
68 } ppl; /* generic ppl request */
69 struct {
70 u32 state:16;
71 u32 ppl_id:8;
72 } set_ppl_state;
73 struct {
74 u32 ppl_id:8;
75 } get_ppl_state;
76 /* library loading */
77 struct {
78 u32 dma_id:5;
79 u32 rsvd:11;
80 u32 lib_id:4;
81 } load_lib;
82 };
83 union {
84 u32 val;
85 /* pipeline management */
86 struct {
87 u32 lp:1; /* low power flag */
88 u32 rsvd:3;
89 u32 attributes:16; /* additional scheduling flags */
90 } create_ppl;
91 } ext;
92 };
93 } __packed;
94
95 struct avs_tlv {
96 u32 type;
97 u32 length;
98 u32 value[];
99 } __packed;
100
101 enum avs_module_msg_type {
102 AVS_MOD_INIT_INSTANCE = 0,
103 AVS_MOD_LARGE_CONFIG_GET = 3,
104 AVS_MOD_LARGE_CONFIG_SET = 4,
105 AVS_MOD_BIND = 5,
106 AVS_MOD_UNBIND = 6,
107 AVS_MOD_SET_DX = 7,
108 AVS_MOD_SET_D0IX = 8,
109 AVS_MOD_DELETE_INSTANCE = 11,
110 };
111
112 union avs_module_msg {
113 u64 val;
114 struct {
115 union {
116 u32 primary;
117 struct {
118 u32 module_id:16;
119 u32 instance_id:8;
120 u32 module_msg_type:5;
121 u32 msg_direction:1;
122 u32 msg_target:1;
123 };
124 };
125 union {
126 u32 val;
127 struct {
128 u32 param_block_size:16;
129 u32 ppl_instance_id:8;
130 u32 core_id:4;
131 u32 proc_domain:1;
132 } init_instance;
133 struct {
134 u32 data_off_size:20;
135 u32 large_param_id:8;
136 u32 final_block:1;
137 u32 init_block:1;
138 } large_config;
139 struct {
140 u32 dst_module_id:16;
141 u32 dst_instance_id:8;
142 u32 dst_queue:3;
143 u32 src_queue:3;
144 } bind_unbind;
145 struct {
146 u32 wake:1;
147 u32 streaming:1;
148 } set_d0ix;
149 } ext;
150 };
151 } __packed;
152
153 union avs_reply_msg {
154 u64 val;
155 struct {
156 union {
157 u32 primary;
158 struct {
159 u32 status:24;
160 u32 global_msg_type:5;
161 u32 msg_direction:1;
162 u32 msg_target:1;
163 };
164 };
165 union {
166 u32 val;
167 /* module loading */
168 struct {
169 u32 err_mod_id:16;
170 } load_multi_mods;
171 /* pipeline management */
172 struct {
173 u32 state:5;
174 } get_ppl_state;
175 /* module management */
176 struct {
177 u32 data_off_size:20;
178 u32 large_param_id:8;
179 u32 final_block:1;
180 u32 init_block:1;
181 } large_config;
182 } ext;
183 };
184 } __packed;
185
186 enum avs_notify_msg_type {
187 AVS_NOTIFY_PHRASE_DETECTED = 4,
188 AVS_NOTIFY_RESOURCE_EVENT = 5,
189 AVS_NOTIFY_LOG_BUFFER_STATUS = 6,
190 AVS_NOTIFY_FW_READY = 8,
191 AVS_NOTIFY_EXCEPTION_CAUGHT = 10,
192 AVS_NOTIFY_MODULE_EVENT = 12,
193 };
194
195 union avs_notify_msg {
196 u64 val;
197 struct {
198 union {
199 u32 primary;
200 struct {
201 u32 rsvd:16;
202 u32 notify_msg_type:8;
203 u32 global_msg_type:5;
204 u32 msg_direction:1;
205 u32 msg_target:1;
206 };
207 struct {
208 u16 rsvd:12;
209 u16 core:4;
210 } log;
211 };
212 union {
213 u32 val;
214 struct {
215 u32 core_id:2;
216 u32 stack_dump_size:16;
217 } coredump;
218 } ext;
219 };
220 } __packed;
221
222 #define AVS_MSG(hdr) { .val = hdr }
223
224 #define AVS_GLOBAL_REQUEST(msg_type) \
225 { \
226 .global_msg_type = AVS_GLB_##msg_type, \
227 .msg_direction = AVS_MSG_REQUEST, \
228 .msg_target = AVS_FW_GEN_MSG, \
229 }
230
231 #define AVS_MODULE_REQUEST(msg_type) \
232 { \
233 .module_msg_type = AVS_MOD_##msg_type, \
234 .msg_direction = AVS_MSG_REQUEST, \
235 .msg_target = AVS_MOD_MSG, \
236 }
237
238 #define AVS_NOTIFICATION(msg_type) \
239 { \
240 .notify_msg_type = AVS_NOTIFY_##msg_type,\
241 .global_msg_type = AVS_GLB_NOTIFICATION,\
242 .msg_direction = AVS_MSG_REPLY, \
243 .msg_target = AVS_FW_GEN_MSG, \
244 }
245
246 #define avs_msg_is_reply(hdr) \
247 ({ \
248 union avs_reply_msg __msg = AVS_MSG(hdr); \
249 __msg.msg_direction == AVS_MSG_REPLY && \
250 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \
251 })
252
253 /* Notification types */
254
255 struct avs_notify_voice_data {
256 u16 kpd_score;
257 u16 reserved;
258 } __packed;
259
260 struct avs_notify_res_data {
261 u32 resource_type;
262 u32 resource_id;
263 u32 event_type;
264 u32 reserved;
265 u32 data[6];
266 } __packed;
267
268 struct avs_notify_mod_data {
269 u32 module_instance_id;
270 u32 event_id;
271 u32 data_size;
272 u32 data[];
273 } __packed;
274
275 /* ROM messages */
276 enum avs_rom_control_msg_type {
277 AVS_ROM_SET_BOOT_CONFIG = 0,
278 };
279
280 int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge);
281
282 /* Code loading messages */
283 int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
284 int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
285 int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id);
286
287 /* Pipeline management messages */
288 enum avs_pipeline_state {
289 AVS_PPL_STATE_INVALID,
290 AVS_PPL_STATE_UNINITIALIZED,
291 AVS_PPL_STATE_RESET,
292 AVS_PPL_STATE_PAUSED,
293 AVS_PPL_STATE_RUNNING,
294 };
295
296 int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
297 u8 instance_id, bool lp, u16 attributes);
298 int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id);
299 int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id,
300 enum avs_pipeline_state state);
301 int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id,
302 enum avs_pipeline_state *state);
303
304 /* Module management messages */
305 int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id,
306 u8 ppl_id, u8 core_id, u8 domain,
307 void *param, u32 param_size);
308 int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id);
309 int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id,
310 u16 dst_module_id, u8 dst_instance_id,
311 u8 dst_queue, u8 src_queue);
312 int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id,
313 u16 dst_module_id, u8 dst_instance_id,
314 u8 dst_queue, u8 src_queue);
315 int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id,
316 u8 instance_id, u8 param_id,
317 u8 *request, size_t request_size);
318 int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id,
319 u8 param_id, u8 *request_data, size_t request_size,
320 u8 **reply_data, size_t *reply_size);
321
322 /* DSP cores and domains power management messages */
323 struct avs_dxstate_info {
324 u32 core_mask; /* which cores are subject for power transition */
325 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */
326 } __packed;
327
328 int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup);
329 int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming);
330
331 /* Base-firmware runtime parameters */
332
333 #define AVS_BASEFW_MOD_ID 0
334 #define AVS_BASEFW_INST_ID 0
335
336 enum avs_basefw_runtime_param {
337 AVS_BASEFW_ENABLE_LOGS = 6,
338 AVS_BASEFW_FIRMWARE_CONFIG = 7,
339 AVS_BASEFW_HARDWARE_CONFIG = 8,
340 AVS_BASEFW_MODULES_INFO = 9,
341 AVS_BASEFW_LIBRARIES_INFO = 16,
342 AVS_BASEFW_SYSTEM_TIME = 20,
343 };
344
345 enum avs_log_enable {
346 AVS_LOG_DISABLE = 0,
347 AVS_LOG_ENABLE = 1
348 };
349
350 enum avs_skl_log_priority {
351 AVS_SKL_LOG_CRITICAL = 1,
352 AVS_SKL_LOG_HIGH,
353 AVS_SKL_LOG_MEDIUM,
354 AVS_SKL_LOG_LOW,
355 AVS_SKL_LOG_VERBOSE,
356 };
357
358 struct skl_log_state {
359 u32 enable;
360 u32 min_priority;
361 } __packed;
362
363 struct skl_log_state_info {
364 u32 core_mask;
365 struct skl_log_state logs_core[];
366 } __packed;
367
368 struct apl_log_state_info {
369 u32 aging_timer_period;
370 u32 fifo_full_timer_period;
371 u32 core_mask;
372 struct skl_log_state logs_core[];
373 } __packed;
374
375 int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size);
376
377 struct avs_fw_version {
378 u16 major;
379 u16 minor;
380 u16 hotfix;
381 u16 build;
382 };
383
384 enum avs_fw_cfg_params {
385 AVS_FW_CFG_FW_VERSION = 0,
386 AVS_FW_CFG_MEMORY_RECLAIMED,
387 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ,
388 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ,
389 AVS_FW_CFG_DMA_BUFFER_CONFIG,
390 AVS_FW_CFG_ALH_SUPPORT_LEVEL,
391 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES,
392 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES,
393 AVS_FW_CFG_TRACE_LOG_BYTES,
394 AVS_FW_CFG_MAX_PPL_COUNT,
395 AVS_FW_CFG_MAX_ASTATE_COUNT,
396 AVS_FW_CFG_MAX_MODULE_PIN_COUNT,
397 AVS_FW_CFG_MODULES_COUNT,
398 AVS_FW_CFG_MAX_MOD_INST_COUNT,
399 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT,
400 AVS_FW_CFG_LL_PRI_COUNT,
401 AVS_FW_CFG_MAX_DP_TASKS_COUNT,
402 AVS_FW_CFG_MAX_LIBS_COUNT,
403 AVS_FW_CFG_SCHEDULER_CONFIG,
404 AVS_FW_CFG_XTAL_FREQ_HZ,
405 AVS_FW_CFG_CLOCKS_CONFIG,
406 AVS_FW_CFG_RESERVED,
407 AVS_FW_CFG_POWER_GATING_POLICY,
408 AVS_FW_CFG_ASSERT_MODE,
409 };
410
411 struct avs_fw_cfg {
412 struct avs_fw_version fw_version;
413 u32 memory_reclaimed;
414 u32 slow_clock_freq_hz;
415 u32 fast_clock_freq_hz;
416 u32 alh_support;
417 u32 ipc_dl_mailbox_bytes;
418 u32 ipc_ul_mailbox_bytes;
419 u32 trace_log_bytes;
420 u32 max_ppl_count;
421 u32 max_astate_count;
422 u32 max_module_pin_count;
423 u32 modules_count;
424 u32 max_mod_inst_count;
425 u32 max_ll_tasks_per_pri_count;
426 u32 ll_pri_count;
427 u32 max_dp_tasks_count;
428 u32 max_libs_count;
429 u32 xtal_freq_hz;
430 u32 power_gating_policy;
431 };
432
433 int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg);
434
435 enum avs_hw_cfg_params {
436 AVS_HW_CFG_AVS_VER,
437 AVS_HW_CFG_DSP_CORES,
438 AVS_HW_CFG_MEM_PAGE_BYTES,
439 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES,
440 AVS_HW_CFG_I2S_CAPS,
441 AVS_HW_CFG_GPDMA_CAPS,
442 AVS_HW_CFG_GATEWAY_COUNT,
443 AVS_HW_CFG_HP_EBB_COUNT,
444 AVS_HW_CFG_LP_EBB_COUNT,
445 AVS_HW_CFG_EBB_SIZE_BYTES,
446 };
447
448 enum avs_iface_version {
449 AVS_AVS_VER_1_5 = 0x10005,
450 AVS_AVS_VER_1_8 = 0x10008,
451 };
452
453 enum avs_i2s_version {
454 AVS_I2S_VER_15_SKYLAKE = 0x00000,
455 AVS_I2S_VER_15_BROXTON = 0x10000,
456 AVS_I2S_VER_15_BROXTON_P = 0x20000,
457 AVS_I2S_VER_18_KBL_CNL = 0x30000,
458 };
459
460 struct avs_i2s_caps {
461 u32 i2s_version;
462 u32 ctrl_count;
463 u32 *ctrl_base_addr;
464 };
465
466 struct avs_hw_cfg {
467 u32 avs_version;
468 u32 dsp_cores;
469 u32 mem_page_bytes;
470 u32 total_phys_mem_pages;
471 struct avs_i2s_caps i2s_caps;
472 u32 gateway_count;
473 u32 hp_ebb_count;
474 u32 lp_ebb_count;
475 u32 ebb_size_bytes;
476 };
477
478 int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg);
479
480 #define AVS_MODULE_LOAD_TYPE_BUILTIN 0
481 #define AVS_MODULE_LOAD_TYPE_LOADABLE 1
482 #define AVS_MODULE_STATE_LOADED BIT(0)
483
484 struct avs_module_type {
485 u32 load_type:4;
486 u32 auto_start:1;
487 u32 domain_ll:1;
488 u32 domain_dp:1;
489 u32 lib_code:1;
490 u32 rsvd:24;
491 } __packed;
492
493 union avs_segment_flags {
494 u32 ul;
495 struct {
496 u32 contents:1;
497 u32 alloc:1;
498 u32 load:1;
499 u32 readonly:1;
500 u32 code:1;
501 u32 data:1;
502 u32 rsvd_1:2;
503 u32 type:4;
504 u32 rsvd_2:4;
505 u32 length:16;
506 };
507 } __packed;
508
509 struct avs_segment_desc {
510 union avs_segment_flags flags;
511 u32 v_base_addr;
512 u32 file_offset;
513 } __packed;
514
515 struct avs_module_entry {
516 u16 module_id;
517 u16 state_flags;
518 u8 name[8];
519 guid_t uuid;
520 struct avs_module_type type;
521 u8 hash[32];
522 u32 entry_point;
523 u16 cfg_offset;
524 u16 cfg_count;
525 u32 affinity_mask;
526 u16 instance_max_count;
527 u16 instance_bss_size;
528 struct avs_segment_desc segments[3];
529 } __packed;
530
531 struct avs_mods_info {
532 u32 count;
533 struct avs_module_entry entries[];
534 } __packed;
535
avs_module_entry_is_loaded(struct avs_module_entry * mentry)536 static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry)
537 {
538 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN ||
539 mentry->state_flags & AVS_MODULE_STATE_LOADED;
540 }
541
542 int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info);
543
544 struct avs_sys_time {
545 u32 val_l;
546 u32 val_u;
547 } __packed;
548
549 int avs_ipc_set_system_time(struct avs_dev *adev);
550
551 /* Module configuration */
552
553 #define AVS_MIXIN_MOD_UUID \
554 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09)
555
556 #define AVS_MIXOUT_MOD_UUID \
557 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0)
558
559 #define AVS_COPIER_MOD_UUID \
560 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA)
561
562 #define AVS_KPBUFF_MOD_UUID \
563 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6)
564
565 #define AVS_MICSEL_MOD_UUID \
566 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A)
567
568 #define AVS_MUX_MOD_UUID \
569 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69)
570
571 #define AVS_UPDWMIX_MOD_UUID \
572 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35)
573
574 #define AVS_SRCINTC_MOD_UUID \
575 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE)
576
577 #define AVS_PROBE_MOD_UUID \
578 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF)
579
580 #define AVS_AEC_MOD_UUID \
581 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05)
582
583 #define AVS_ASRC_MOD_UUID \
584 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4)
585
586 #define AVS_INTELWOV_MOD_UUID \
587 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7)
588
589 /* channel map */
590 enum avs_channel_index {
591 AVS_CHANNEL_LEFT = 0,
592 AVS_CHANNEL_RIGHT = 1,
593 AVS_CHANNEL_CENTER = 2,
594 AVS_CHANNEL_LEFT_SURROUND = 3,
595 AVS_CHANNEL_CENTER_SURROUND = 3,
596 AVS_CHANNEL_RIGHT_SURROUND = 4,
597 AVS_CHANNEL_LFE = 7,
598 AVS_CHANNEL_INVALID = 0xF,
599 };
600
601 enum avs_channel_config {
602 AVS_CHANNEL_CONFIG_MONO = 0,
603 AVS_CHANNEL_CONFIG_STEREO = 1,
604 AVS_CHANNEL_CONFIG_2_1 = 2,
605 AVS_CHANNEL_CONFIG_3_0 = 3,
606 AVS_CHANNEL_CONFIG_3_1 = 4,
607 AVS_CHANNEL_CONFIG_QUATRO = 5,
608 AVS_CHANNEL_CONFIG_4_0 = 6,
609 AVS_CHANNEL_CONFIG_5_0 = 7,
610 AVS_CHANNEL_CONFIG_5_1 = 8,
611 AVS_CHANNEL_CONFIG_DUAL_MONO = 9,
612 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10,
613 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11,
614 AVS_CHANNEL_CONFIG_4_CHANNEL = 12,
615 AVS_CHANNEL_CONFIG_INVALID
616 };
617
618 enum avs_interleaving {
619 AVS_INTERLEAVING_PER_CHANNEL = 0,
620 AVS_INTERLEAVING_PER_SAMPLE = 1,
621 };
622
623 enum avs_sample_type {
624 AVS_SAMPLE_TYPE_INT_MSB = 0,
625 AVS_SAMPLE_TYPE_INT_LSB = 1,
626 AVS_SAMPLE_TYPE_INT_SIGNED = 2,
627 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3,
628 AVS_SAMPLE_TYPE_FLOAT = 4,
629 };
630
631 #define AVS_CHANNELS_MAX 8
632 #define AVS_ALL_CHANNELS_MASK UINT_MAX
633
634 struct avs_audio_format {
635 u32 sampling_freq;
636 u32 bit_depth;
637 u32 channel_map;
638 u32 channel_config;
639 u32 interleaving;
640 u32 num_channels:8;
641 u32 valid_bit_depth:8;
642 u32 sample_type:8;
643 u32 reserved:8;
644 } __packed;
645
646 struct avs_modcfg_base {
647 u32 cpc;
648 u32 ibs;
649 u32 obs;
650 u32 is_pages;
651 struct avs_audio_format audio_fmt;
652 } __packed;
653
654 struct avs_pin_format {
655 u32 pin_index;
656 u32 iobs;
657 struct avs_audio_format audio_fmt;
658 } __packed;
659
660 struct avs_modcfg_ext {
661 struct avs_modcfg_base base;
662 u16 num_input_pins;
663 u16 num_output_pins;
664 u8 reserved[12];
665 /* input pin formats followed by output ones */
666 struct avs_pin_format pin_fmts[];
667 } __packed;
668
669 enum avs_dma_type {
670 AVS_DMA_HDA_HOST_OUTPUT = 0,
671 AVS_DMA_HDA_HOST_INPUT = 1,
672 AVS_DMA_HDA_LINK_OUTPUT = 8,
673 AVS_DMA_HDA_LINK_INPUT = 9,
674 AVS_DMA_DMIC_LINK_INPUT = 11,
675 AVS_DMA_I2S_LINK_OUTPUT = 12,
676 AVS_DMA_I2S_LINK_INPUT = 13,
677 };
678
679 union avs_virtual_index {
680 u8 val;
681 struct {
682 u8 time_slot:4;
683 u8 instance:4;
684 } i2s;
685 struct {
686 u8 queue_id:3;
687 u8 time_slot:2;
688 u8 instance:3;
689 } dmic;
690 } __packed;
691
692 union avs_connector_node_id {
693 u32 val;
694 struct {
695 u32 vindex:8;
696 u32 dma_type:5;
697 u32 rsvd:19;
698 };
699 } __packed;
700
701 #define INVALID_PIPELINE_ID 0xFF
702 #define INVALID_NODE_ID \
703 ((union avs_connector_node_id) { UINT_MAX })
704
705 union avs_gtw_attributes {
706 u32 val;
707 struct {
708 u32 lp_buffer_alloc:1;
709 u32 rsvd:31;
710 };
711 } __packed;
712
713 struct avs_copier_gtw_cfg {
714 union avs_connector_node_id node_id;
715 u32 dma_buffer_size;
716 u32 config_length;
717 struct {
718 union avs_gtw_attributes attrs;
719 u32 blob[];
720 } config;
721 } __packed;
722
723 struct avs_copier_cfg {
724 struct avs_modcfg_base base;
725 struct avs_audio_format out_fmt;
726 u32 feature_mask;
727 struct avs_copier_gtw_cfg gtw_cfg;
728 } __packed;
729
730 struct avs_micsel_cfg {
731 struct avs_modcfg_base base;
732 struct avs_audio_format out_fmt;
733 } __packed;
734
735 struct avs_mux_cfg {
736 struct avs_modcfg_base base;
737 struct avs_audio_format ref_fmt;
738 struct avs_audio_format out_fmt;
739 } __packed;
740
741 struct avs_updown_mixer_cfg {
742 struct avs_modcfg_base base;
743 u32 out_channel_config;
744 u32 coefficients_select;
745 s32 coefficients[AVS_CHANNELS_MAX];
746 u32 channel_map;
747 } __packed;
748
749 struct avs_src_cfg {
750 struct avs_modcfg_base base;
751 u32 out_freq;
752 } __packed;
753
754 struct avs_probe_gtw_cfg {
755 union avs_connector_node_id node_id;
756 u32 dma_buffer_size;
757 } __packed;
758
759 struct avs_probe_cfg {
760 struct avs_modcfg_base base;
761 struct avs_probe_gtw_cfg gtw_cfg;
762 } __packed;
763
764 struct avs_aec_cfg {
765 struct avs_modcfg_base base;
766 struct avs_audio_format ref_fmt;
767 struct avs_audio_format out_fmt;
768 u32 cpc_lp_mode;
769 } __packed;
770
771 struct avs_asrc_cfg {
772 struct avs_modcfg_base base;
773 u32 out_freq;
774 u32 rsvd0:1;
775 u32 mode:1;
776 u32 rsvd2:2;
777 u32 disable_jitter_buffer:1;
778 u32 rsvd3:27;
779 } __packed;
780
781 struct avs_wov_cfg {
782 struct avs_modcfg_base base;
783 u32 cpc_lp_mode;
784 } __packed;
785
786 /* Module runtime parameters */
787
788 enum avs_copier_runtime_param {
789 AVS_COPIER_SET_SINK_FORMAT = 2,
790 };
791
792 struct avs_copier_sink_format {
793 u32 sink_id;
794 struct avs_audio_format src_fmt;
795 struct avs_audio_format sink_fmt;
796 } __packed;
797
798 int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id,
799 u8 instance_id, u32 sink_id,
800 const struct avs_audio_format *src_fmt,
801 const struct avs_audio_format *sink_fmt);
802
803 #endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */
804