1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _POWERPC_PROM_H
3 #define _POWERPC_PROM_H
4 #ifdef __KERNEL__
5 
6 /*
7  * Definitions for talking to the Open Firmware PROM on
8  * Power Macintosh computers.
9  *
10  * Copyright (C) 1996-2005 Paul Mackerras.
11  *
12  * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
13  */
14 #include <linux/types.h>
15 #include <asm/irq.h>
16 #include <linux/atomic.h>
17 
18 /* These includes should be removed once implicit includes are cleaned up. */
19 #include <linux/of.h>
20 #include <linux/of_fdt.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 
25 #define OF_DT_BEGIN_NODE	0x1		/* Start of node, full name */
26 #define OF_DT_END_NODE		0x2		/* End node */
27 #define OF_DT_PROP		0x3		/* Property: name off, size,
28 						 * content */
29 #define OF_DT_NOP		0x4		/* nop */
30 #define OF_DT_END		0x9
31 
32 #define OF_DT_VERSION		0x10
33 
34 /*
35  * This is what gets passed to the kernel by prom_init or kexec
36  *
37  * The dt struct contains the device tree structure, full pathes and
38  * property contents. The dt strings contain a separate block with just
39  * the strings for the property names, and is fully page aligned and
40  * self contained in a page, so that it can be kept around by the kernel,
41  * each property name appears only once in this page (cheap compression)
42  *
43  * the mem_rsvmap contains a map of reserved ranges of physical memory,
44  * passing it here instead of in the device-tree itself greatly simplifies
45  * the job of everybody. It's just a list of u64 pairs (base/size) that
46  * ends when size is 0
47  */
48 struct boot_param_header {
49 	__be32	magic;			/* magic word OF_DT_HEADER */
50 	__be32	totalsize;		/* total size of DT block */
51 	__be32	off_dt_struct;		/* offset to structure */
52 	__be32	off_dt_strings;		/* offset to strings */
53 	__be32	off_mem_rsvmap;		/* offset to memory reserve map */
54 	__be32	version;		/* format version */
55 	__be32	last_comp_version;	/* last compatible version */
56 	/* version 2 fields below */
57 	__be32	boot_cpuid_phys;	/* Physical CPU id we're booting on */
58 	/* version 3 fields below */
59 	__be32	dt_strings_size;	/* size of the DT strings block */
60 	/* version 17 fields below */
61 	__be32	dt_struct_size;		/* size of the DT structure block */
62 };
63 
64 /*
65  * OF address retreival & translation
66  */
67 
68 /* Parse the ibm,dma-window property of an OF node into the busno, phys and
69  * size parameters.
70  */
71 void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
72 			 unsigned long *busno, unsigned long *phys,
73 			 unsigned long *size);
74 
75 extern void of_instantiate_rtc(void);
76 
77 extern int of_get_ibm_chip_id(struct device_node *np);
78 
79 struct of_drc_info {
80 	char *drc_type;
81 	char *drc_name_prefix;
82 	u32 drc_index_start;
83 	u32 drc_name_suffix_start;
84 	u32 num_sequential_elems;
85 	u32 sequential_inc;
86 	u32 drc_power_domain;
87 	u32 last_drc_index;
88 };
89 
90 extern int of_read_drc_info_cell(struct property **prop,
91 			const __be32 **curval, struct of_drc_info *data);
92 
93 
94 /*
95  * There are two methods for telling firmware what our capabilities are.
96  * Newer machines have an "ibm,client-architecture-support" method on the
97  * root node.  For older machines, we have to call the "process-elf-header"
98  * method in the /packages/elf-loader node, passing it a fake 32-bit
99  * ELF header containing a couple of PT_NOTE sections that contain
100  * structures that contain various information.
101  */
102 
103 /* New method - extensible architecture description vector. */
104 
105 /* Option vector bits - generic bits in byte 1 */
106 #define OV_IGNORE		0x80	/* ignore this vector */
107 #define OV_CESSATION_POLICY	0x40	/* halt if unsupported option present*/
108 
109 /* Option vector 1: processor architectures supported */
110 #define OV1_PPC_2_00		0x80	/* set if we support PowerPC 2.00 */
111 #define OV1_PPC_2_01		0x40	/* set if we support PowerPC 2.01 */
112 #define OV1_PPC_2_02		0x20	/* set if we support PowerPC 2.02 */
113 #define OV1_PPC_2_03		0x10	/* set if we support PowerPC 2.03 */
114 #define OV1_PPC_2_04		0x08	/* set if we support PowerPC 2.04 */
115 #define OV1_PPC_2_05		0x04	/* set if we support PowerPC 2.05 */
116 #define OV1_PPC_2_06		0x02	/* set if we support PowerPC 2.06 */
117 #define OV1_PPC_2_07		0x01	/* set if we support PowerPC 2.07 */
118 
119 #define OV1_PPC_3_00		0x80	/* set if we support PowerPC 3.00 */
120 #define OV1_PPC_3_1			0x40	/* set if we support PowerPC 3.1 */
121 
122 /* Option vector 2: Open Firmware options supported */
123 #define OV2_REAL_MODE		0x20	/* set if we want OF in real mode */
124 
125 /* Option vector 3: processor options supported */
126 #define OV3_FP			0x80	/* floating point */
127 #define OV3_VMX			0x40	/* VMX/Altivec */
128 #define OV3_DFP			0x20	/* decimal FP */
129 
130 /* Option vector 4: IBM PAPR implementation */
131 #define OV4_MIN_ENT_CAP		0x01	/* minimum VP entitled capacity */
132 
133 /* Option vector 5: PAPR/OF options supported
134  * These bits are also used in firmware_has_feature() to validate
135  * the capabilities reported for vector 5 in the device tree so we
136  * encode the vector index in the define and use the OV5_FEAT()
137  * and OV5_INDX() macros to extract the desired information.
138  */
139 #define OV5_FEAT(x)	((x) & 0xff)
140 #define OV5_INDX(x)	((x) >> 8)
141 #define OV5_LPAR		0x0280	/* logical partitioning supported */
142 #define OV5_SPLPAR		0x0240	/* shared-processor LPAR supported */
143 /* ibm,dynamic-reconfiguration-memory property supported */
144 #define OV5_DRCONF_MEMORY	0x0220
145 #define OV5_LARGE_PAGES		0x0210	/* large pages supported */
146 #define OV5_DONATE_DEDICATE_CPU	0x0202	/* donate dedicated CPU support */
147 #define OV5_MSI			0x0201	/* PCIe/MSI support */
148 #define OV5_CMO			0x0480	/* Cooperative Memory Overcommitment */
149 #define OV5_XCMO		0x0440	/* Page Coalescing */
150 #define OV5_FORM1_AFFINITY	0x0580	/* FORM1 NUMA affinity */
151 #define OV5_PRRN		0x0540	/* Platform Resource Reassignment */
152 #define OV5_FORM2_AFFINITY	0x0520	/* Form2 NUMA affinity */
153 #define OV5_HP_EVT		0x0604	/* Hot Plug Event support */
154 #define OV5_RESIZE_HPT		0x0601	/* Hash Page Table resizing */
155 #define OV5_PFO_HW_RNG		0x1180	/* PFO Random Number Generator */
156 #define OV5_PFO_HW_842		0x1140	/* PFO Compression Accelerator */
157 #define OV5_PFO_HW_ENCR		0x1120	/* PFO Encryption Accelerator */
158 #define OV5_SUB_PROCESSORS	0x1501	/* 1,2,or 4 Sub-Processors supported */
159 #define OV5_DRMEM_V2		0x1680	/* ibm,dynamic-reconfiguration-v2 */
160 #define OV5_XIVE_SUPPORT	0x17C0	/* XIVE Exploitation Support Mask */
161 #define OV5_XIVE_LEGACY		0x1700	/* XIVE legacy mode Only */
162 #define OV5_XIVE_EXPLOIT	0x1740	/* XIVE exploitation mode Only */
163 #define OV5_XIVE_EITHER		0x1780	/* XIVE legacy or exploitation mode */
164 /* MMU Base Architecture */
165 #define OV5_MMU_SUPPORT		0x18C0	/* MMU Mode Support Mask */
166 #define OV5_MMU_HASH		0x1800	/* Hash MMU Only */
167 #define OV5_MMU_RADIX		0x1840	/* Radix MMU Only */
168 #define OV5_MMU_EITHER		0x1880	/* Hash or Radix Supported */
169 #define OV5_MMU_DYNAMIC		0x18C0	/* Hash or Radix Can Switch Later */
170 #define OV5_NMMU		0x1820	/* Nest MMU Available */
171 /* Hash Table Extensions */
172 #define OV5_HASH_SEG_TBL	0x1980	/* In Memory Segment Tables Available */
173 #define OV5_HASH_GTSE		0x1940	/* Guest Translation Shoot Down Avail */
174 /* Radix Table Extensions */
175 #define OV5_RADIX_GTSE		0x1A40	/* Guest Translation Shoot Down Avail */
176 #define OV5_DRC_INFO		0x1640	/* Redef Prop Structures: drc-info   */
177 
178 /* Option Vector 6: IBM PAPR hints */
179 #define OV6_LINUX		0x02	/* Linux is our OS */
180 
181 #endif /* __KERNEL__ */
182 #endif /* _POWERPC_PROM_H */
183